lib/main/STM32_USB-FS-Device_Driver/inc/usb_regs.h

   1 /**
   2   ******************************************************************************
   3   * @file    usb_regs.h
   4   * @author  MCD Application Team
   5   * @version V4.0.0
   6   * @date    28-August-2012
   7   * @brief   Interface prototype functions to USB cell registers
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
  12   *
  13   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14   * You may not use this file except in compliance with the License.
  15   * You may obtain a copy of the License at:
  16   *
  17   *        http://www.st.com/software_license_agreement_liberty_v2
  18   *
  19   * Unless required by applicable law or agreed to in writing, software
  20   * distributed under the License is distributed on an "AS IS" BASIS,
  21   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22   * See the License for the specific language governing permissions and
  23   * limitations under the License.
  24   *
  25   ******************************************************************************
  26   */
  27
  28
  29 /* Define to prevent recursive inclusion -------------------------------------*/
  30 #ifndef __USB_REGS_H
  31 #define __USB_REGS_H
  32
  33 /* Includes ------------------------------------------------------------------*/
  34 /* Exported types ------------------------------------------------------------*/
  35 typedef enum _EP_DBUF_DIR
  36 {
  37   /* double buffered endpoint direction */
  38   EP_DBUF_ERR,
  39   EP_DBUF_OUT,
  40   EP_DBUF_IN
  41 }EP_DBUF_DIR;
  42
  43 /* endpoint buffer number */
  44 enum EP_BUF_NUM
  45 {
  46   EP_NOBUF,
  47   EP_BUF0,
  48   EP_BUF1
  49 };
  50
  51 /* Exported constants --------------------------------------------------------*/
  52 #define RegBase  (0x40005C00L)  /* USB_IP Peripheral Registers base address */
  53 #define PMAAddr  (0x40006000L)  /* USB_IP Packet Memory Area base address   */
  54
  55 /******************************************************************************/
  56 /*                         General registers                                  */
  57 /******************************************************************************/
  58
  59 /* Control register */
  60 #define CNTR    ((__IO unsigned *)(RegBase + 0x40))
  61 /* Interrupt status register */
  62 #define ISTR    ((__IO unsigned *)(RegBase + 0x44))
  63 /* Frame number register */
  64 #define FNR     ((__IO unsigned *)(RegBase + 0x48))
  65 /* Device address register */
  66 #define DADDR   ((__IO unsigned *)(RegBase + 0x4C))
  67 /* Buffer Table address register */
  68 #define BTABLE  ((__IO unsigned *)(RegBase + 0x50))
  69 /******************************************************************************/
  70 /*                         Endpoint registers                                 */
  71 /******************************************************************************/
  72 #define EP0REG  ((__IO unsigned *)(RegBase)) /* endpoint 0 register address */
  73
  74 /* Endpoint Addresses (w/direction) */
  75 #define EP0_OUT     ((uint8_t)0x00)
  76 #define EP0_IN      ((uint8_t)0x80)
  77 #define EP1_OUT     ((uint8_t)0x01)
  78 #define EP1_IN      ((uint8_t)0x81)
  79 #define EP2_OUT     ((uint8_t)0x02)
  80 #define EP2_IN      ((uint8_t)0x82)
  81 #define EP3_OUT     ((uint8_t)0x03)
  82 #define EP3_IN      ((uint8_t)0x83)
  83 #define EP4_OUT     ((uint8_t)0x04)
  84 #define EP4_IN      ((uint8_t)0x84)
  85 #define EP5_OUT     ((uint8_t)0x05)
  86 #define EP5_IN      ((uint8_t)0x85)
  87 #define EP6_OUT     ((uint8_t)0x06)
  88 #define EP6_IN      ((uint8_t)0x86)
  89 #define EP7_OUT     ((uint8_t)0x07)
  90 #define EP7_IN      ((uint8_t)0x87)
  91
  92 /* endpoints enumeration */
  93 #define ENDP0       ((uint8_t)0)
  94 #define ENDP1       ((uint8_t)1)
  95 #define ENDP2       ((uint8_t)2)
  96 #define ENDP3       ((uint8_t)3)
  97 #define ENDP4       ((uint8_t)4)
  98 #define ENDP5       ((uint8_t)5)
  99 #define ENDP6       ((uint8_t)6)
 100 #define ENDP7       ((uint8_t)7)
 101
 102 /******************************************************************************/
 103 /*                       ISTR interrupt events                                */
 104 /******************************************************************************/
 105 #define ISTR_CTR    (0x8000) /* Correct TRansfer (clear-only bit) */
 106 #define ISTR_DOVR   (0x4000) /* DMA OVeR/underrun (clear-only bit) */
 107 #define ISTR_ERR    (0x2000) /* ERRor (clear-only bit) */
 108 #define ISTR_WKUP   (0x1000) /* WaKe UP (clear-only bit) */
 109 #define ISTR_SUSP   (0x0800) /* SUSPend (clear-only bit) */
 110 #define ISTR_RESET  (0x0400) /* RESET (clear-only bit) */
 111 #define ISTR_SOF    (0x0200) /* Start Of Frame (clear-only bit) */
 112 #define ISTR_ESOF   (0x0100) /* Expected Start Of Frame (clear-only bit) */
 113
 114
 115 #define ISTR_DIR    (0x0010)  /* DIRection of transaction (read-only bit)  */
 116 #define ISTR_EP_ID  (0x000F)  /* EndPoint IDentifier (read-only bit)  */
 117
 118 #define CLR_CTR    (~ISTR_CTR)   /* clear Correct TRansfer bit */
 119 #define CLR_DOVR   (~ISTR_DOVR)  /* clear DMA OVeR/underrun bit*/
 120 #define CLR_ERR    (~ISTR_ERR)   /* clear ERRor bit */
 121 #define CLR_WKUP   (~ISTR_WKUP)  /* clear WaKe UP bit     */
 122 #define CLR_SUSP   (~ISTR_SUSP)  /* clear SUSPend bit     */
 123 #define CLR_RESET  (~ISTR_RESET) /* clear RESET bit      */
 124 #define CLR_SOF    (~ISTR_SOF)   /* clear Start Of Frame bit   */
 125 #define CLR_ESOF   (~ISTR_ESOF)  /* clear Expected Start Of Frame bit */
 126
 127 /******************************************************************************/
 128 /*             CNTR control register bits definitions                         */
 129 /******************************************************************************/
 130 #define CNTR_CTRM   (0x8000) /* Correct TRansfer Mask */
 131 #define CNTR_DOVRM  (0x4000) /* DMA OVeR/underrun Mask */
 132 #define CNTR_ERRM   (0x2000) /* ERRor Mask */
 133 #define CNTR_WKUPM  (0x1000) /* WaKe UP Mask */
 134 #define CNTR_SUSPM  (0x0800) /* SUSPend Mask */
 135 #define CNTR_RESETM (0x0400) /* RESET Mask   */
 136 #define CNTR_SOFM   (0x0200) /* Start Of Frame Mask */
 137 #define CNTR_ESOFM  (0x0100) /* Expected Start Of Frame Mask */
 138
 139
 140 #define CNTR_RESUME (0x0010) /* RESUME request */
 141 #define CNTR_FSUSP  (0x0008) /* Force SUSPend */
 142 #define CNTR_LPMODE (0x0004) /* Low-power MODE */
 143 #define CNTR_PDWN   (0x0002) /* Power DoWN */
 144 #define CNTR_FRES   (0x0001) /* Force USB RESet */
 145
 146 /******************************************************************************/
 147 /*                FNR Frame Number Register bit definitions                   */
 148 /******************************************************************************/
 149 #define FNR_RXDP (0x8000) /* status of D+ data line */
 150 #define FNR_RXDM (0x4000) /* status of D- data line */
 151 #define FNR_LCK  (0x2000) /* LoCKed */
 152 #define FNR_LSOF (0x1800) /* Lost SOF */
 153 #define FNR_FN  (0x07FF) /* Frame Number */
 154 /******************************************************************************/
 155 /*               DADDR Device ADDRess bit definitions                         */
 156 /******************************************************************************/
 157 #define DADDR_EF (0x80)
 158 #define DADDR_ADD (0x7F)
 159 /******************************************************************************/
 160 /*                            Endpoint register                               */
 161 /******************************************************************************/
 162 /* bit positions */
 163 #define EP_CTR_RX      (0x8000) /* EndPoint Correct TRansfer RX */
 164 #define EP_DTOG_RX     (0x4000) /* EndPoint Data TOGGLE RX */
 165 #define EPRX_STAT      (0x3000) /* EndPoint RX STATus bit field */
 166 #define EP_SETUP       (0x0800) /* EndPoint SETUP */
 167 #define EP_T_FIELD     (0x0600) /* EndPoint TYPE */
 168 #define EP_KIND        (0x0100) /* EndPoint KIND */
 169 #define EP_CTR_TX      (0x0080) /* EndPoint Correct TRansfer TX */
 170 #define EP_DTOG_TX     (0x0040) /* EndPoint Data TOGGLE TX */
 171 #define EPTX_STAT      (0x0030) /* EndPoint TX STATus bit field */
 172 #define EPADDR_FIELD   (0x000F) /* EndPoint ADDRess FIELD */
 173
 174 /* EndPoint REGister MASK (no toggle fields) */
 175 #define EPREG_MASK     (EP_CTR_RX|EP_SETUP|EP_T_FIELD|EP_KIND|EP_CTR_TX|EPADDR_FIELD)
 176
 177 /* EP_TYPE[1:0] EndPoint TYPE */
 178 #define EP_TYPE_MASK   (0x0600) /* EndPoint TYPE Mask */
 179 #define EP_BULK        (0x0000) /* EndPoint BULK */
 180 #define EP_CONTROL     (0x0200) /* EndPoint CONTROL */
 181 #define EP_ISOCHRONOUS (0x0400) /* EndPoint ISOCHRONOUS */
 182 #define EP_INTERRUPT   (0x0600) /* EndPoint INTERRUPT */
 183 #define EP_T_MASK      (~EP_T_FIELD & EPREG_MASK)
 184
 185
 186 /* EP_KIND EndPoint KIND */
 187 #define EPKIND_MASK    (~EP_KIND & EPREG_MASK)
 188
 189 /* STAT_TX[1:0] STATus for TX transfer */
 190 #define EP_TX_DIS      (0x0000) /* EndPoint TX DISabled */
 191 #define EP_TX_STALL    (0x0010) /* EndPoint TX STALLed */
 192 #define EP_TX_NAK      (0x0020) /* EndPoint TX NAKed */
 193 #define EP_TX_VALID    (0x0030) /* EndPoint TX VALID */
 194 #define EPTX_DTOG1     (0x0010) /* EndPoint TX Data TOGgle bit1 */
 195 #define EPTX_DTOG2     (0x0020) /* EndPoint TX Data TOGgle bit2 */
 196 #define EPTX_DTOGMASK  (EPTX_STAT|EPREG_MASK)
 197
 198 /* STAT_RX[1:0] STATus for RX transfer */
 199 #define EP_RX_DIS      (0x0000) /* EndPoint RX DISabled */
 200 #define EP_RX_STALL    (0x1000) /* EndPoint RX STALLed */
 201 #define EP_RX_NAK      (0x2000) /* EndPoint RX NAKed */
 202 #define EP_RX_VALID    (0x3000) /* EndPoint RX VALID */
 203 #define EPRX_DTOG1     (0x1000) /* EndPoint RX Data TOGgle bit1 */
 204 #define EPRX_DTOG2     (0x2000) /* EndPoint RX Data TOGgle bit1 */
 205 #define EPRX_DTOGMASK  (EPRX_STAT|EPREG_MASK)
 206 /* Exported macro ------------------------------------------------------------*/
 207 /* SetCNTR */
 208 #define _SetCNTR(wRegValue)  (*CNTR   = (uint16_t)wRegValue)
 209
 210 /* SetISTR */
 211 #define _SetISTR(wRegValue)  (*ISTR   = (uint16_t)wRegValue)
 212
 213 /* SetDADDR */
 214 #define _SetDADDR(wRegValue) (*DADDR  = (uint16_t)wRegValue)
 215
 216 /* SetBTABLE */
 217 #define _SetBTABLE(wRegValue)(*BTABLE = (uint16_t)(wRegValue & 0xFFF8))
 218
 219 /* GetCNTR */
 220 #define _GetCNTR()   ((__IO uint16_t) *CNTR)
 221
 222 /* GetISTR */
 223 #define _GetISTR()   ((__IO uint16_t) *ISTR)
 224
 225 /* GetFNR */
 226 #define _GetFNR()    ((__IO uint16_t) *FNR)
 227
 228 /* GetDADDR */
 229 #define _GetDADDR()  ((__IO uint16_t) *DADDR)
 230
 231 /* GetBTABLE ; clear low-order bits explicitly to avoid problems in gcc 5.x */
 232 #define _GetBTABLE() (((__IO uint16_t) *BTABLE) & ~0x07)
 233
 234 /* SetENDPOINT */
 235 #define _SetENDPOINT(bEpNum,wRegValue)  (*(EP0REG + bEpNum)= \
 236     (uint16_t)wRegValue)
 237
 238 /* GetENDPOINT */
 239 #define _GetENDPOINT(bEpNum)        ((__IO uint16_t)(*(EP0REG + bEpNum)))
 240
 241 /*******************************************************************************
 242 * Macro Name     : SetEPType
 243 * Description    : sets the type in the endpoint register(bits EP_TYPE[1:0])
 244 * Input          : bEpNum: Endpoint Number.
 245 *                  wType
 246 * Output         : None.
 247 * Return         : None.
 248 *******************************************************************************/
 249 #define _SetEPType(bEpNum,wType) (_SetENDPOINT(bEpNum,\
 250                                   ((_GetENDPOINT(bEpNum) & EP_T_MASK) | wType )))
 251
 252 /*******************************************************************************
 253 * Macro Name     : GetEPType
 254 * Description    : gets the type in the endpoint register(bits EP_TYPE[1:0])
 255 * Input          : bEpNum: Endpoint Number.
 256 * Output         : None.
 257 * Return         : Endpoint Type
 258 *******************************************************************************/
 259 #define _GetEPType(bEpNum) (_GetENDPOINT(bEpNum) & EP_T_FIELD)
 260
 261 /*******************************************************************************
 262 * Macro Name     : SetEPTxStatus
 263 * Description    : sets the status for tx transfer (bits STAT_TX[1:0]).
 264 * Input          : bEpNum: Endpoint Number.
 265 *                  wState: new state
 266 * Output         : None.
 267 * Return         : None.
 268 *******************************************************************************/
 269 #define _SetEPTxStatus(bEpNum,wState) {\
 270     register uint16_t _wRegVal;       \
 271     _wRegVal = _GetENDPOINT(bEpNum) & EPTX_DTOGMASK;\
 272     /* toggle first bit ? */     \
 273     if((EPTX_DTOG1 & wState)!= 0)      \
 274       _wRegVal ^= EPTX_DTOG1;        \
 275     /* toggle second bit ?  */         \
 276     if((EPTX_DTOG2 & wState)!= 0)      \
 277       _wRegVal ^= EPTX_DTOG2;        \
 278     _SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX));    \
 279   } /* _SetEPTxStatus */
 280
 281 /*******************************************************************************
 282 * Macro Name     : SetEPRxStatus
 283 * Description    : sets the status for rx transfer (bits STAT_TX[1:0])
 284 * Input          : bEpNum: Endpoint Number.
 285 *                  wState: new state.
 286 * Output         : None.
 287 * Return         : None.
 288 *******************************************************************************/
 289 #define _SetEPRxStatus(bEpNum,wState) {\
 290     register uint16_t _wRegVal;   \
 291     \
 292     _wRegVal = _GetENDPOINT(bEpNum) & EPRX_DTOGMASK;\
 293     /* toggle first bit ? */  \
 294     if((EPRX_DTOG1 & wState)!= 0) \
 295       _wRegVal ^= EPRX_DTOG1;  \
 296     /* toggle second bit ? */  \
 297     if((EPRX_DTOG2 & wState)!= 0) \
 298       _wRegVal ^= EPRX_DTOG2;  \
 299     _SetENDPOINT(bEpNum, (_wRegVal | EP_CTR_RX|EP_CTR_TX)); \
 300   } /* _SetEPRxStatus */
 301
 302 /*******************************************************************************
 303 * Macro Name     : SetEPRxTxStatus
 304 * Description    : sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 305 * Input          : bEpNum: Endpoint Number.
 306 *                  wStaterx: new state.
 307 *                  wStatetx: new state.
 308 * Output         : None.
 309 * Return         : None.
 310 *******************************************************************************/
 311 #define _SetEPRxTxStatus(bEpNum,wStaterx,wStatetx) {\
 312     register uint32_t _wRegVal;   \
 313     \
 314     _wRegVal = _GetENDPOINT(bEpNum) & (EPRX_DTOGMASK |EPTX_STAT) ;\
 315     /* toggle first bit ? */  \
 316     if((EPRX_DTOG1 & wStaterx)!= 0) \
 317       _wRegVal ^= EPRX_DTOG1;  \
 318     /* toggle second bit ? */  \
 319     if((EPRX_DTOG2 & wStaterx)!= 0) \
 320       _wRegVal ^= EPRX_DTOG2;  \
 321     /* toggle first bit ? */     \
 322     if((EPTX_DTOG1 & wStatetx)!= 0)      \
 323       _wRegVal ^= EPTX_DTOG1;        \
 324     /* toggle second bit ?  */         \
 325     if((EPTX_DTOG2 & wStatetx)!= 0)      \
 326       _wRegVal ^= EPTX_DTOG2;        \
 327     _SetENDPOINT(bEpNum, _wRegVal | EP_CTR_RX|EP_CTR_TX);    \
 328   } /* _SetEPRxTxStatus */
 329 /*******************************************************************************
 330 * Macro Name     : GetEPTxStatus / GetEPRxStatus
 331 * Description    : gets the status for tx/rx transfer (bits STAT_TX[1:0]
 332 *                  /STAT_RX[1:0])
 333 * Input          : bEpNum: Endpoint Number.
 334 * Output         : None.
 335 * Return         : status .
 336 *******************************************************************************/
 337 #define _GetEPTxStatus(bEpNum) ((__IO uint16_t)_GetENDPOINT(bEpNum) & EPTX_STAT)
 338
 339 #define _GetEPRxStatus(bEpNum) ((__IO uint16_t)_GetENDPOINT(bEpNum) & EPRX_STAT)
 340
 341 /*******************************************************************************
 342 * Macro Name     : SetEPTxValid / SetEPRxValid
 343 * Description    : sets directly the VALID tx/rx-status into the enpoint register
 344 * Input          : bEpNum: Endpoint Number.
 345 * Output         : None.
 346 * Return         : None.
 347 *******************************************************************************/
 348 #define _SetEPTxValid(bEpNum)     (_SetEPTxStatus(bEpNum, EP_TX_VALID))
 349
 350 #define _SetEPRxValid(bEpNum)     (_SetEPRxStatus(bEpNum, EP_RX_VALID))
 351
 352 /*******************************************************************************
 353 * Macro Name     : GetTxStallStatus / GetRxStallStatus.
 354 * Description    : checks stall condition in an endpoint.
 355 * Input          : bEpNum: Endpoint Number.
 356 * Output         : None.
 357 * Return         : TRUE = endpoint in stall condition.
 358 *******************************************************************************/
 359 #define _GetTxStallStatus(bEpNum) (_GetEPTxStatus(bEpNum) \
 360                                    == EP_TX_STALL)
 361 #define _GetRxStallStatus(bEpNum) (_GetEPRxStatus(bEpNum) \
 362                                    == EP_RX_STALL)
 363
 364 /*******************************************************************************
 365 * Macro Name     : SetEP_KIND / ClearEP_KIND.
 366 * Description    : set & clear EP_KIND bit.
 367 * Input          : bEpNum: Endpoint Number.
 368 * Output         : None.
 369 * Return         : None.
 370 *******************************************************************************/
 371 #define _SetEP_KIND(bEpNum)    (_SetENDPOINT(bEpNum, \
 372                                 (EP_CTR_RX|EP_CTR_TX|((_GetENDPOINT(bEpNum) | EP_KIND) & EPREG_MASK))))
 373 #define _ClearEP_KIND(bEpNum)  (_SetENDPOINT(bEpNum, \
 374                                 (EP_CTR_RX|EP_CTR_TX|(_GetENDPOINT(bEpNum) & EPKIND_MASK))))
 375
 376 /*******************************************************************************
 377 * Macro Name     : Set_Status_Out / Clear_Status_Out.
 378 * Description    : Sets/clears directly STATUS_OUT bit in the endpoint register.
 379 * Input          : bEpNum: Endpoint Number.
 380 * Output         : None.
 381 * Return         : None.
 382 *******************************************************************************/
 383 #define _Set_Status_Out(bEpNum)    _SetEP_KIND(bEpNum)
 384 #define _Clear_Status_Out(bEpNum)  _ClearEP_KIND(bEpNum)
 385
 386 /*******************************************************************************
 387 * Macro Name     : SetEPDoubleBuff / ClearEPDoubleBuff.
 388 * Description    : Sets/clears directly EP_KIND bit in the endpoint register.
 389 * Input          : bEpNum: Endpoint Number.
 390 * Output         : None.
 391 * Return         : None.
 392 *******************************************************************************/
 393 #define _SetEPDoubleBuff(bEpNum)   _SetEP_KIND(bEpNum)
 394 #define _ClearEPDoubleBuff(bEpNum) _ClearEP_KIND(bEpNum)
 395
 396 /*******************************************************************************
 397 * Macro Name     : ClearEP_CTR_RX / ClearEP_CTR_TX.
 398 * Description    : Clears bit CTR_RX / CTR_TX in the endpoint register.
 399 * Input          : bEpNum: Endpoint Number.
 400 * Output         : None.
 401 * Return         : None.
 402 *******************************************************************************/
 403 #define _ClearEP_CTR_RX(bEpNum)   (_SetENDPOINT(bEpNum,\
 404                                    _GetENDPOINT(bEpNum) & 0x7FFF & EPREG_MASK))
 405 #define _ClearEP_CTR_TX(bEpNum)   (_SetENDPOINT(bEpNum,\
 406                                    _GetENDPOINT(bEpNum) & 0xFF7F & EPREG_MASK))
 407
 408 /*******************************************************************************
 409 * Macro Name     : ToggleDTOG_RX / ToggleDTOG_TX .
 410 * Description    : Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 411 * Input          : bEpNum: Endpoint Number.
 412 * Output         : None.
 413 * Return         : None.
 414 *******************************************************************************/
 415 #define _ToggleDTOG_RX(bEpNum)    (_SetENDPOINT(bEpNum, \
 416                                    EP_CTR_RX|EP_CTR_TX|EP_DTOG_RX | (_GetENDPOINT(bEpNum) & EPREG_MASK)))
 417 #define _ToggleDTOG_TX(bEpNum)    (_SetENDPOINT(bEpNum, \
 418                                    EP_CTR_RX|EP_CTR_TX|EP_DTOG_TX | (_GetENDPOINT(bEpNum) & EPREG_MASK)))
 419
 420 /*******************************************************************************
 421 * Macro Name     : ClearDTOG_RX / ClearDTOG_TX.
 422 * Description    : Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 423 * Input          : bEpNum: Endpoint Number.
 424 * Output         : None.
 425 * Return         : None.
 426 *******************************************************************************/
 427 #define _ClearDTOG_RX(bEpNum)  if((_GetENDPOINT(bEpNum) & EP_DTOG_RX) != 0)\
 428     _ToggleDTOG_RX(bEpNum)
 429 #define _ClearDTOG_TX(bEpNum)  if((_GetENDPOINT(bEpNum) & EP_DTOG_TX) != 0)\
 430     _ToggleDTOG_TX(bEpNum)
 431 /*******************************************************************************
 432 * Macro Name     : SetEPAddress.
 433 * Description    : Sets address in an endpoint register.
 434 * Input          : bEpNum: Endpoint Number.
 435 *                  bAddr: Address.
 436 * Output         : None.
 437 * Return         : None.
 438 *******************************************************************************/
 439 #define _SetEPAddress(bEpNum,bAddr) _SetENDPOINT(bEpNum,\
 440     EP_CTR_RX|EP_CTR_TX|(_GetENDPOINT(bEpNum) & EPREG_MASK) | bAddr)
 441
 442 /*******************************************************************************
 443 * Macro Name     : GetEPAddress.
 444 * Description    : Gets address in an endpoint register.
 445 * Input          : bEpNum: Endpoint Number.
 446 * Output         : None.
 447 * Return         : None.
 448 *******************************************************************************/
 449 #define _GetEPAddress(bEpNum) ((__IO uint8_t)(_GetENDPOINT(bEpNum) & EPADDR_FIELD))
 450
 451 #define _pEPTxAddr(bEpNum) ((__IO uint32_t *)((_GetBTABLE()+bEpNum*8  )*2 + PMAAddr))
 452 #define _pEPTxCount(bEpNum) ((__IO uint32_t *)((_GetBTABLE()+bEpNum*8+2)*2 + PMAAddr))
 453 #define _pEPRxAddr(bEpNum) ((__IO uint32_t *)((_GetBTABLE()+bEpNum*8+4)*2 + PMAAddr))
 454 #define _pEPRxCount(bEpNum) ((__IO uint32_t *)((_GetBTABLE()+bEpNum*8+6)*2 + PMAAddr))
 455
 456 /*******************************************************************************
 457 * Macro Name     : SetEPTxAddr / SetEPRxAddr.
 458 * Description    : sets address of the tx/rx buffer.
 459 * Input          : bEpNum: Endpoint Number.
 460 *                  wAddr: address to be set (must be word aligned).
 461 * Output         : None.
 462 * Return         : None.
 463 *******************************************************************************/
 464 #define _SetEPTxAddr(bEpNum,wAddr) (*_pEPTxAddr(bEpNum) = ((wAddr >> 1) << 1))
 465 #define _SetEPRxAddr(bEpNum,wAddr) (*_pEPRxAddr(bEpNum) = ((wAddr >> 1) << 1))
 466
 467 /*******************************************************************************
 468 * Macro Name     : GetEPTxAddr / GetEPRxAddr.
 469 * Description    : Gets address of the tx/rx buffer.
 470 * Input          : bEpNum: Endpoint Number.
 471 * Output         : None.
 472 * Return         : address of the buffer.
 473 *******************************************************************************/
 474 #define _GetEPTxAddr(bEpNum) ((__IO uint16_t)*_pEPTxAddr(bEpNum))
 475 #define _GetEPRxAddr(bEpNum) ((__IO uint16_t)*_pEPRxAddr(bEpNum))
 476
 477 /*******************************************************************************
 478 * Macro Name     : SetEPCountRxReg.
 479 * Description    : Sets counter of rx buffer with no. of blocks.
 480 * Input          : pdwReg: pointer to counter.
 481 *                  wCount: Counter.
 482 * Output         : None.
 483 * Return         : None.
 484 *******************************************************************************/
 485 #define _BlocksOf32(dwReg,wCount,wNBlocks) {\
 486     wNBlocks = wCount >> 5;\
 487     if((wCount & 0x1f) == 0)\
 488       wNBlocks--;\
 489     *pdwReg = (uint32_t)((wNBlocks << 10) | 0x8000);\
 490   }/* _BlocksOf32 */
 491
 492 #define _BlocksOf2(dwReg,wCount,wNBlocks) {\
 493     wNBlocks = wCount >> 1;\
 494     if((wCount & 0x1) != 0)\
 495       wNBlocks++;\
 496     *pdwReg = (uint32_t)(wNBlocks << 10);\
 497   }/* _BlocksOf2 */
 498
 499 #define _SetEPCountRxReg(dwReg,wCount)  {\
 500     uint16_t wNBlocks;\
 501     if(wCount > 62){_BlocksOf32(dwReg,wCount,wNBlocks);}\
 502     else {_BlocksOf2(dwReg,wCount,wNBlocks);}\
 503   }/* _SetEPCountRxReg */
 504
 505
 506
 507 #define _SetEPRxDblBuf0Count(bEpNum,wCount) {\
 508     __IO uint32_t *pdwReg = _pEPTxCount(bEpNum); \
 509     _SetEPCountRxReg(pdwReg, wCount);\
 510   }
 511 /*******************************************************************************
 512 * Macro Name     : SetEPTxCount / SetEPRxCount.
 513 * Description    : sets counter for the tx/rx buffer.
 514 * Input          : bEpNum: endpoint number.
 515 *                  wCount: Counter value.
 516 * Output         : None.
 517 * Return         : None.
 518 *******************************************************************************/
 519 #define _SetEPTxCount(bEpNum,wCount) (*_pEPTxCount(bEpNum) = wCount)
 520 #define _SetEPRxCount(bEpNum,wCount) {\
 521     __IO uint32_t *pdwReg = _pEPRxCount(bEpNum); \
 522     _SetEPCountRxReg(pdwReg, wCount);\
 523   }
 524 /*******************************************************************************
 525 * Macro Name     : GetEPTxCount / GetEPRxCount.
 526 * Description    : gets counter of the tx buffer.
 527 * Input          : bEpNum: endpoint number.
 528 * Output         : None.
 529 * Return         : Counter value.
 530 *******************************************************************************/
 531 #define _GetEPTxCount(bEpNum)((__IO uint16_t)(*_pEPTxCount(bEpNum)) & 0x3ff)
 532 #define _GetEPRxCount(bEpNum)((__IO uint16_t)(*_pEPRxCount(bEpNum)) & 0x3ff)
 533
 534 /*******************************************************************************
 535 * Macro Name     : SetEPDblBuf0Addr / SetEPDblBuf1Addr.
 536 * Description    : Sets buffer 0/1 address in a double buffer endpoint.
 537 * Input          : bEpNum: endpoint number.
 538 *                : wBuf0Addr: buffer 0 address.
 539 * Output         : None.
 540 * Return         : None.
 541 *******************************************************************************/
 542 #define _SetEPDblBuf0Addr(bEpNum,wBuf0Addr) {_SetEPTxAddr(bEpNum, wBuf0Addr);}
 543 #define _SetEPDblBuf1Addr(bEpNum,wBuf1Addr) {_SetEPRxAddr(bEpNum, wBuf1Addr);}
 544
 545 /*******************************************************************************
 546 * Macro Name     : SetEPDblBuffAddr.
 547 * Description    : Sets addresses in a double buffer endpoint.
 548 * Input          : bEpNum: endpoint number.
 549 *                : wBuf0Addr: buffer 0 address.
 550 *                : wBuf1Addr = buffer 1 address.
 551 * Output         : None.
 552 * Return         : None.
 553 *******************************************************************************/
 554 #define _SetEPDblBuffAddr(bEpNum,wBuf0Addr,wBuf1Addr) { \
 555     _SetEPDblBuf0Addr(bEpNum, wBuf0Addr);\
 556     _SetEPDblBuf1Addr(bEpNum, wBuf1Addr);\
 557   } /* _SetEPDblBuffAddr */
 558
 559 /*******************************************************************************
 560 * Macro Name     : GetEPDblBuf0Addr / GetEPDblBuf1Addr.
 561 * Description    : Gets buffer 0/1 address of a double buffer endpoint.
 562 * Input          : bEpNum: endpoint number.
 563 * Output         : None.
 564 * Return         : None.
 565 *******************************************************************************/
 566 #define _GetEPDblBuf0Addr(bEpNum) (_GetEPTxAddr(bEpNum))
 567 #define _GetEPDblBuf1Addr(bEpNum) (_GetEPRxAddr(bEpNum))
 568
 569 /*******************************************************************************
 570 * Macro Name     : SetEPDblBuffCount / SetEPDblBuf0Count / SetEPDblBuf1Count.
 571 * Description    : Gets buffer 0/1 address of a double buffer endpoint.
 572 * Input          : bEpNum: endpoint number.
 573 *                : bDir: endpoint dir  EP_DBUF_OUT = OUT
 574 *                                      EP_DBUF_IN  = IN
 575 *                : wCount: Counter value
 576 * Output         : None.
 577 * Return         : None.
 578 *******************************************************************************/
 579 #define _SetEPDblBuf0Count(bEpNum, bDir, wCount)  { \
 580     if(bDir == EP_DBUF_OUT)\
 581       /* OUT endpoint */ \
 582     {_SetEPRxDblBuf0Count(bEpNum,wCount);} \
 583     else if(bDir == EP_DBUF_IN)\
 584       /* IN endpoint */ \
 585       *_pEPTxCount(bEpNum) = (uint32_t)wCount;  \
 586   } /* SetEPDblBuf0Count*/
 587
 588 #define _SetEPDblBuf1Count(bEpNum, bDir, wCount)  { \
 589     if(bDir == EP_DBUF_OUT)\
 590       /* OUT endpoint */ \
 591     {_SetEPRxCount(bEpNum,wCount);}\
 592     else if(bDir == EP_DBUF_IN)\
 593       /* IN endpoint */\
 594       *_pEPRxCount(bEpNum) = (uint32_t)wCount; \
 595   } /* SetEPDblBuf1Count */
 596
 597 #define _SetEPDblBuffCount(bEpNum, bDir, wCount) {\
 598     _SetEPDblBuf0Count(bEpNum, bDir, wCount); \
 599     _SetEPDblBuf1Count(bEpNum, bDir, wCount); \
 600   } /* _SetEPDblBuffCount  */
 601
 602 /*******************************************************************************
 603 * Macro Name     : GetEPDblBuf0Count / GetEPDblBuf1Count.
 604 * Description    : Gets buffer 0/1 rx/tx counter for double buffering.
 605 * Input          : bEpNum: endpoint number.
 606 * Output         : None.
 607 * Return         : None.
 608 *******************************************************************************/
 609 #define _GetEPDblBuf0Count(bEpNum) (_GetEPTxCount(bEpNum))
 610 #define _GetEPDblBuf1Count(bEpNum) (_GetEPRxCount(bEpNum))
 611
 612
 613 /* External variables --------------------------------------------------------*/
 614 extern __IO uint16_t wIstr;  /* ISTR register last read value */
 615
 616 /* Exported functions ------------------------------------------------------- */
 617 void SetCNTR(uint16_t /*wRegValue*/);
 618 void SetISTR(uint16_t /*wRegValue*/);
 619 void SetDADDR(uint16_t /*wRegValue*/);
 620 void SetBTABLE(uint16_t /*wRegValue*/);
 621 void SetBTABLE(uint16_t /*wRegValue*/);
 622 uint16_t GetCNTR(void);
 623 uint16_t GetISTR(void);
 624 uint16_t GetFNR(void);
 625 uint16_t GetDADDR(void);
 626 uint16_t GetBTABLE(void);
 627 void SetENDPOINT(uint8_t /*bEpNum*/, uint16_t /*wRegValue*/);
 628 uint16_t GetENDPOINT(uint8_t /*bEpNum*/);
 629 void SetEPType(uint8_t /*bEpNum*/, uint16_t /*wType*/);
 630 uint16_t GetEPType(uint8_t /*bEpNum*/);
 631 void SetEPTxStatus(uint8_t /*bEpNum*/, uint16_t /*wState*/);
 632 void SetEPRxStatus(uint8_t /*bEpNum*/, uint16_t /*wState*/);
 633 void SetDouBleBuffEPStall(uint8_t /*bEpNum*/, uint8_t bDir);
 634 uint16_t GetEPTxStatus(uint8_t /*bEpNum*/);
 635 uint16_t GetEPRxStatus(uint8_t /*bEpNum*/);
 636 void SetEPTxValid(uint8_t /*bEpNum*/);
 637 void SetEPRxValid(uint8_t /*bEpNum*/);
 638 uint16_t GetTxStallStatus(uint8_t /*bEpNum*/);
 639 uint16_t GetRxStallStatus(uint8_t /*bEpNum*/);
 640 void SetEP_KIND(uint8_t /*bEpNum*/);
 641 void ClearEP_KIND(uint8_t /*bEpNum*/);
 642 void Set_Status_Out(uint8_t /*bEpNum*/);
 643 void Clear_Status_Out(uint8_t /*bEpNum*/);
 644 void SetEPDoubleBuff(uint8_t /*bEpNum*/);
 645 void ClearEPDoubleBuff(uint8_t /*bEpNum*/);
 646 void ClearEP_CTR_RX(uint8_t /*bEpNum*/);
 647 void ClearEP_CTR_TX(uint8_t /*bEpNum*/);
 648 void ToggleDTOG_RX(uint8_t /*bEpNum*/);
 649 void ToggleDTOG_TX(uint8_t /*bEpNum*/);
 650 void ClearDTOG_RX(uint8_t /*bEpNum*/);
 651 void ClearDTOG_TX(uint8_t /*bEpNum*/);
 652 void SetEPAddress(uint8_t /*bEpNum*/, uint8_t /*bAddr*/);
 653 uint8_t GetEPAddress(uint8_t /*bEpNum*/);
 654 void SetEPTxAddr(uint8_t /*bEpNum*/, uint16_t /*wAddr*/);
 655 void SetEPRxAddr(uint8_t /*bEpNum*/, uint16_t /*wAddr*/);
 656 uint16_t GetEPTxAddr(uint8_t /*bEpNum*/);
 657 uint16_t GetEPRxAddr(uint8_t /*bEpNum*/);
 658 void SetEPCountRxReg(uint32_t * /*pdwReg*/, uint16_t /*wCount*/);
 659 void SetEPTxCount(uint8_t /*bEpNum*/, uint16_t /*wCount*/);
 660 void SetEPRxCount(uint8_t /*bEpNum*/, uint16_t /*wCount*/);
 661 uint16_t GetEPTxCount(uint8_t /*bEpNum*/);
 662 uint16_t GetEPRxCount(uint8_t /*bEpNum*/);
 663 void SetEPDblBuf0Addr(uint8_t /*bEpNum*/, uint16_t /*wBuf0Addr*/);
 664 void SetEPDblBuf1Addr(uint8_t /*bEpNum*/, uint16_t /*wBuf1Addr*/);
 665 void SetEPDblBuffAddr(uint8_t /*bEpNum*/, uint16_t /*wBuf0Addr*/, uint16_t /*wBuf1Addr*/);
 666 uint16_t GetEPDblBuf0Addr(uint8_t /*bEpNum*/);
 667 uint16_t GetEPDblBuf1Addr(uint8_t /*bEpNum*/);
 668 void SetEPDblBuffCount(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/);
 669 void SetEPDblBuf0Count(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/);
 670 void SetEPDblBuf1Count(uint8_t /*bEpNum*/, uint8_t /*bDir*/, uint16_t /*wCount*/);
 671 uint16_t GetEPDblBuf0Count(uint8_t /*bEpNum*/);
 672 uint16_t GetEPDblBuf1Count(uint8_t /*bEpNum*/);
 673 EP_DBUF_DIR GetEPDblBufDir(uint8_t /*bEpNum*/);
 674 void FreeUserBuffer(uint8_t bEpNum/*bEpNum*/, uint8_t bDir);
 675 uint16_t ToWord(uint8_t, uint8_t);
 676 uint16_t ByteSwap(uint16_t);
 677
 678 #endif /* __USB_REGS_H */
 679
 680 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/