lib/main/STM32F3/Drivers/STM32F30x_StdPeriph_Driver/src/stm32f30x_misc.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f30x_misc.c
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    04-April-2014
   7   * @brief   This file provides all the miscellaneous firmware functions (add-on
   8   *          to CMSIS functions).
   9   *
  10   @verbatim
  11
  12  ===============================================================================
  13               ##### How to configure Interrupts using driver #####
  14  ===============================================================================
  15     [..] This section provide functions allowing to configure the NVIC interrupts
  16          (IRQ). The Cortex-M4 exceptions are managed by CMSIS functions.
  17          (#) Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
  18              function according to the following table.
  19              The table below gives the allowed values of the pre-emption priority
  20              and subpriority according to the Priority Grouping configuration
  21              performed by NVIC_PriorityGroupConfig function.
  22
  23          (#) Enable and Configure the priority of the selected IRQ Channels.
  24     [..]
  25     (@) When the NVIC_PriorityGroup_0 is selected, it will no any nested interrupt,
  26         the IRQ priority will be managed only by subpriority.
  27         The sub-priority is only used to sort pending exception priorities,
  28         and does not affect active exceptions.
  29     (@) Lower priority values gives higher priority.
  30     (@) Priority Order:
  31         (#@) Lowest Preemption priority.
  32         (#@) Lowest Subpriority.
  33         (#@) Lowest hardware priority (IRQn position).
  34
  35   @endverbatim
  36
  37   ******************************************************************************
  38   * @attention
  39   *
  40   * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
  41   *
  42   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  43   * You may not use this file except in compliance with the License.
  44   * You may obtain a copy of the License at:
  45   *
  46   *        http://www.st.com/software_license_agreement_liberty_v2
  47   *
  48   * Unless required by applicable law or agreed to in writing, software
  49   * distributed under the License is distributed on an "AS IS" BASIS,
  50   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  51   * See the License for the specific language governing permissions and
  52   * limitations under the License.
  53   *
  54   ******************************************************************************
  55   */
  56
  57 /* Includes ------------------------------------------------------------------*/
  58 #include "stm32f30x_misc.h"
  59
  60 /** @addtogroup STM32F30x_StdPeriph_Driver
  61   * @{
  62   */
  63
  64 /** @defgroup MISC
  65   * @brief MISC driver modules
  66   * @{
  67   */
  68
  69 /* Private typedef -----------------------------------------------------------*/
  70 /* Private define ------------------------------------------------------------*/
  71 #define AIRCR_VECTKEY_MASK    ((uint32_t)0x05FA0000)
  72
  73 /* Private macro -------------------------------------------------------------*/
  74 /* Private variables ---------------------------------------------------------*/
  75 /* Private function prototypes -----------------------------------------------*/
  76 /* Private functions ---------------------------------------------------------*/
  77
  78 /** @defgroup MISC_Private_Functions
  79   * @{
  80   */
  81
  82 /**
  83   * @brief  Configures the priority grouping: pre-emption priority and subpriority.
  84   * @param  NVIC_PriorityGroup: specifies the priority grouping bits length.
  85   *   This parameter can be one of the following values:
  86   *     @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority.
  87   *                                4 bits for subpriority.
  88   *     @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority.
  89   *                                3 bits for subpriority.
  90   *     @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority.
  91   *                                2 bits for subpriority.
  92   *     @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority.
  93   *                                1 bits for subpriority.
  94   *     @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority.
  95   *                                0 bits for subpriority.
  96   *     @note When NVIC_PriorityGroup_0 is selected, it will no be any nested
  97   *           interrupt. This interrupts priority is managed only with subpriority.
  98   * @retval None
  99   */
 100 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
 101 {
 102   /* Check the parameters */
 103   assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
 104
 105   /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
 106   SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
 107 }
 108
 109 /**
 110   * @brief  Initializes the NVIC peripheral according to the specified
 111   *         parameters in the NVIC_InitStruct.
 112   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
 113   *         function should be called before.
 114   * @param  NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
 115   *         the configuration information for the specified NVIC peripheral.
 116   * @retval None
 117   */
 118 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
 119 {
 120   uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
 121
 122   /* Check the parameters */
 123   assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
 124   assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
 125   assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
 126
 127   if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
 128   {
 129     /* Compute the Corresponding IRQ Priority --------------------------------*/
 130     tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
 131     tmppre = (0x4 - tmppriority);
 132     tmpsub = tmpsub >> tmppriority;
 133
 134     tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
 135     tmppriority |=  NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
 136     tmppriority = tmppriority << 0x04;
 137
 138     NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
 139
 140     /* Enable the Selected IRQ Channels --------------------------------------*/
 141     NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
 142       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
 143   }
 144   else
 145   {
 146     /* Disable the Selected IRQ Channels -------------------------------------*/
 147     NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
 148       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
 149   }
 150 }
 151
 152 /**
 153   * @brief  Sets the vector table location and Offset.
 154   * @param  NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
 155   *   This parameter can be one of the following values:
 156   *     @arg NVIC_VectTab_RAM
 157   *     @arg NVIC_VectTab_FLASH
 158   * @param  Offset: Vector Table base offset field. This value must be a multiple of 0x200.
 159   * @retval None
 160   */
 161 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
 162 {
 163   /* Check the parameters */
 164   assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
 165   assert_param(IS_NVIC_OFFSET(Offset));
 166
 167   SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
 168 }
 169
 170 /**
 171   * @brief  Selects the condition for the system to enter low power mode.
 172   * @param  LowPowerMode: Specifies the new mode for the system to enter low power mode.
 173   *   This parameter can be one of the following values:
 174   *     @arg NVIC_LP_SEVONPEND
 175   *     @arg NVIC_LP_SLEEPDEEP
 176   *     @arg NVIC_LP_SLEEPONEXIT
 177   * @param  NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
 178   * @retval None
 179   */
 180 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
 181 {
 182   /* Check the parameters */
 183   assert_param(IS_NVIC_LP(LowPowerMode));
 184   assert_param(IS_FUNCTIONAL_STATE(NewState));
 185
 186   if (NewState != DISABLE)
 187   {
 188     SCB->SCR |= LowPowerMode;
 189   }
 190   else
 191   {
 192     SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
 193   }
 194 }
 195
 196 /**
 197   * @brief  Configures the SysTick clock source.
 198   * @param  SysTick_CLKSource: specifies the SysTick clock source.
 199   *   This parameter can be one of the following values:
 200   *     @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
 201   *     @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
 202   * @retval None
 203   */
 204 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
 205 {
 206   /* Check the parameters */
 207   assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
 208   if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
 209   {
 210     SysTick->CTRL |= SysTick_CLKSource_HCLK;
 211   }
 212   else
 213   {
 214     SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
 215   }
 216 }
 217
 218 /**
 219   * @}
 220   */
 221
 222 /**
 223   * @}
 224   */
 225
 226 /**
 227   * @}
 228   */
 229
 230 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/