Move telemetry displayport init and cms device registering
[betaflight.git] / lib / main / STM32F4 / Drivers / STM32F4xx_HAL_Driver / Inc / stm32f4xx_hal_sdram.h
blob1ab391e43c24f634e030b71fa888780a170d95d4
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sdram.h
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 14-April-2017
7 * @brief Header file of SDRAM HAL module.
8 ******************************************************************************
9 * @attention
11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 ******************************************************************************
36 */
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_HAL_SDRAM_H
40 #define __STM32F4xx_HAL_SDRAM_H
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
46 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
47 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
49 /* Includes ------------------------------------------------------------------*/
50 #include "stm32f4xx_ll_fmc.h"
52 /** @addtogroup STM32F4xx_HAL_Driver
53 * @{
56 /** @addtogroup SDRAM
57 * @{
58 */
60 /* Exported typedef ----------------------------------------------------------*/
61 /** @defgroup SDRAM_Exported_Types SDRAM Exported Types
62 * @{
65 /**
66 * @brief HAL SDRAM State structure definition
67 */
68 typedef enum
70 HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */
71 HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */
72 HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */
73 HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */
74 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */
75 HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */
77 }HAL_SDRAM_StateTypeDef;
79 /**
80 * @brief SDRAM handle Structure definition
81 */
82 typedef struct
84 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
86 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
88 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
90 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
94 }SDRAM_HandleTypeDef;
95 /**
96 * @}
99 /* Exported constants --------------------------------------------------------*/
100 /* Exported macro ------------------------------------------------------------*/
101 /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
102 * @{
105 /** @brief Reset SDRAM handle state
106 * @param __HANDLE__: specifies the SDRAM handle.
107 * @retval None
109 #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
111 * @}
114 /* Exported functions --------------------------------------------------------*/
115 /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
116 * @{
119 /** @addtogroup SDRAM_Exported_Functions_Group1
120 * @{
123 /* Initialization/de-initialization functions *********************************/
124 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
125 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
126 void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
127 void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
129 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
130 void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
131 void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
132 void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
134 * @}
137 /** @addtogroup SDRAM_Exported_Functions_Group2
138 * @{
140 /* I/O operation functions ****************************************************/
141 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
142 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
143 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
144 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
145 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
146 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
148 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
149 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
151 * @}
154 /** @addtogroup SDRAM_Exported_Functions_Group3
155 * @{
157 /* SDRAM Control functions *****************************************************/
158 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
159 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
160 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
161 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
162 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
163 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
165 * @}
168 /** @addtogroup SDRAM_Exported_Functions_Group4
169 * @{
171 /* SDRAM State functions ********************************************************/
172 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
174 * @}
178 * @}
182 * @}
185 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
188 * @}
191 #ifdef __cplusplus
193 #endif
195 #endif /* __STM32F4xx_HAL_SDRAM_H */
197 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/