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Move telemetry displayport init and cms device registering
[betaflight.git] / lib / main / STM32F4 / Drivers / STM32F4xx_HAL_Driver / Inc / stm32f4xx_ll_dma2d.h
blobf1ec30fc246aab1b37803822970b5b20d4de195a
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_ll_dma2d.h
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 14-April-2017
7 * @brief Header file of DMA2D LL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38 /* Define to prevent recursive inclusion -------------------------------------*/
39 #ifndef __STM32F4xx_LL_DMA2D_H
40 #define __STM32F4xx_LL_DMA2D_H
41
42 #ifdef __cplusplus
43 extern "C" {
44 #endif
45
46 /* Includes ------------------------------------------------------------------*/
47 #include "stm32f4xx.h"
48
49 /** @addtogroup STM32F4xx_LL_Driver
50 * @{
51 */
52
53 #if defined (DMA2D)
54
55 /** @defgroup DMA2D_LL DMA2D
56 * @{
57 */
58
59 /* Private types -------------------------------------------------------------*/
60 /* Private variables ---------------------------------------------------------*/
61 /* Private constants ---------------------------------------------------------*/
62 /* Private macros ------------------------------------------------------------*/
63 #if defined(USE_FULL_LL_DRIVER)
64 /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
65 * @{
66 */
67
68 /**
69 * @}
70 */
71 #endif /*USE_FULL_LL_DRIVER*/
72
73 /* Exported types ------------------------------------------------------------*/
74 #if defined(USE_FULL_LL_DRIVER)
75 /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
76 * @{
77 */
78
79 /**
80 * @brief LL DMA2D Init Structure Definition
81 */
82 typedef struct
83 {
84 uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
85 - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
86
87 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
88
89 uint32_t ColorMode; /*!< Specifies the color format of the output image.
90 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
91
92 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
93
94 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
95 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
96 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
97 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
98 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
99 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
100
101 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
102 function @ref LL_DMA2D_ConfigOutputColor(). */
103
104 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
105 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
106 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
107 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
108 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
109 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
110
111 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
112 function @ref LL_DMA2D_ConfigOutputColor(). */
113
114 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
115 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
116 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
117 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
118 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
119 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
120
121 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
122 function @ref LL_DMA2D_ConfigOutputColor(). */
123
124 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
125 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
126 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
127 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
128 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
129
130 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
131 function @ref LL_DMA2D_ConfigOutputColor(). */
132
133 uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
134 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
135
136 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
137
138 uint32_t LineOffset; /*!< Specifies the output line offset value.
139 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
140
141 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
142
143 uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
144 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
145
146 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
147
148 uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
149 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
150
151 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
152
153 } LL_DMA2D_InitTypeDef;
154
155 /**
156 * @brief LL DMA2D Layer Configuration Structure Definition
157 */
158 typedef struct
159 {
160 uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
161 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
162
163 This parameter can be modified afterwards using unitary functions
164 - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
165 - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
166
167 uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
168 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
169
170 This parameter can be modified afterwards using unitary functions
171 - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
172 - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
173
174 uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
175 - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
176
177 This parameter can be modified afterwards using unitary functions
178 - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
179 - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
180
181 uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
182 - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
183
184 This parameter can be modified afterwards using unitary functions
185 - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
186 - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
187
188 uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
189 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
190
191 This parameter can be modified afterwards using unitary functions
192 - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
193 - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
194
195 uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
196 - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
197
198 This parameter can be modified afterwards using unitary functions
199 - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
200 - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
201
202 uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
203 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
204
205 This parameter can be modified afterwards using unitary functions
206 - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
207 - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
208
209 uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
210 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
211
212 This parameter can be modified afterwards using unitary functions
213 - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
214 - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
215
216 uint32_t Green; /*!< Specifies the foreground or background Green color value.
217 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
218
219 This parameter can be modified afterwards using unitary functions
220 - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
221 - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
222
223 uint32_t Red; /*!< Specifies the foreground or background Red color value.
224 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
225
226 This parameter can be modified afterwards using unitary functions
227 - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
228 - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
229
230 uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
231 - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
232
233 This parameter can be modified afterwards using unitary functions
234 - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
235 - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
236
237 } LL_DMA2D_LayerCfgTypeDef;
238
239 /**
240 * @brief LL DMA2D Output Color Structure Definition
241 */
242 typedef struct
243 {
244 uint32_t ColorMode; /*!< Specifies the color format of the output image.
245 - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
246
247 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
248
249 uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
250 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
251 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
252 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
253 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
254 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
255
256 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
257 function @ref LL_DMA2D_ConfigOutputColor(). */
258
259 uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
260 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
261 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
262 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
263 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
264 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
265
266 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
267 function @ref LL_DMA2D_ConfigOutputColor(). */
268
269 uint32_t OutputRed; /*!< Specifies the Red value of the output image.
270 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
271 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
272 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
273 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
274 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
275
276 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
277 function @ref LL_DMA2D_ConfigOutputColor(). */
278
279 uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
280 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
281 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
282 - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
283 - This parameter is not considered if RGB888 or RGB565 color mode is selected.
284
285 This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
286 function @ref LL_DMA2D_ConfigOutputColor(). */
287
288 } LL_DMA2D_ColorTypeDef;
289
290 /**
291 * @}
292 */
293 #endif /* USE_FULL_LL_DRIVER */
294
295 /* Exported constants --------------------------------------------------------*/
296 /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
297 * @{
298 */
299
300 /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
301 * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
302 * @{
303 */
304 #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
305 #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
306 #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
307 #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
308 #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
309 #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
310 /**
311 * @}
312 */
313
314 /** @defgroup DMA2D_LL_EC_IT IT Defines
315 * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
316 * @{
317 */
318 #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
319 #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
320 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
321 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
322 #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
323 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
324 /**
325 * @}
326 */
327
328 /** @defgroup DMA2D_LL_EC_MODE Mode
329 * @{
330 */
331 #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
332 #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
333 #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
334 #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
335 /**
336 * @}
337 */
338
339 /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
340 * @{
341 */
342 #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
343 #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
344 #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
345 #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
346 #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
347 /**
348 * @}
349 */
350
351 /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
352 * @{
353 */
354 #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
355 #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
356 #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
357 #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
358 #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
359 #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
360 #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
361 #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
362 #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
363 #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
364 #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
365 /**
366 * @}
367 */
368
369 /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
370 * @{
371 */
372 #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
373 #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
374 #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
375 with original alpha channel value */
376 /**
377 * @}
378 */
379
380 /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
381 * @{
382 */
383 #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
384 #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
385 /**
386 * @}
387 */
388
389 /**
390 * @}
391 */
392
393 /* Exported macro ------------------------------------------------------------*/
394 /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
395 * @{
396 */
397
398 /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
399 * @{
400 */
401
402 /**
403 * @brief Write a value in DMA2D register.
404 * @param __INSTANCE__ DMA2D Instance
405 * @param __REG__ Register to be written
406 * @param __VALUE__ Value to be written in the register
407 * @retval None
408 */
409 #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
410
411 /**
412 * @brief Read a value in DMA2D register.
413 * @param __INSTANCE__ DMA2D Instance
414 * @param __REG__ Register to be read
415 * @retval Register value
416 */
417 #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
418 /**
419 * @}
420 */
421
422 /**
423 * @}
424 */
425
426 /* Exported functions --------------------------------------------------------*/
427 /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
428 * @{
429 */
430
431 /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
432 * @{
433 */
434
435 /**
436 * @brief Start a DMA2D transfer.
437 * @rmtoll CR START LL_DMA2D_Start
438 * @param DMA2Dx DMA2D Instance
439 * @retval None
440 */
441 __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
442 {
443 SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
444 }
445
446 /**
447 * @brief Indicate if a DMA2D transfer is ongoing.
448 * @rmtoll CR START LL_DMA2D_IsTransferOngoing
449 * @param DMA2Dx DMA2D Instance
450 * @retval State of bit (1 or 0).
451 */
452 __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
453 {
454 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
455 }
456
457 /**
458 * @brief Suspend DMA2D transfer.
459 * @note This API can be used to suspend automatic foreground or background CLUT loading.
460 * @rmtoll CR SUSP LL_DMA2D_Suspend
461 * @param DMA2Dx DMA2D Instance
462 * @retval None
463 */
464 __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
465 {
466 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
467 }
468
469 /**
470 * @brief Resume DMA2D transfer.
471 * @note This API can be used to resume automatic foreground or background CLUT loading.
472 * @rmtoll CR SUSP LL_DMA2D_Resume
473 * @param DMA2Dx DMA2D Instance
474 * @retval None
475 */
476 __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
477 {
478 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
479 }
480
481 /**
482 * @brief Indicate if DMA2D transfer is suspended.
483 * @note This API can be used to indicate whether or not automatic foreground or
484 * background CLUT loading is suspended.
485 * @rmtoll CR SUSP LL_DMA2D_IsSuspended
486 * @param DMA2Dx DMA2D Instance
487 * @retval State of bit (1 or 0).
488 */
489 __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
490 {
491 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
492 }
493
494 /**
495 * @brief Abort DMA2D transfer.
496 * @note This API can be used to abort automatic foreground or background CLUT loading.
497 * @rmtoll CR ABORT LL_DMA2D_Abort
498 * @param DMA2Dx DMA2D Instance
499 * @retval None
500 */
501 __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
502 {
503 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
504 }
505
506 /**
507 * @brief Indicate if DMA2D transfer is aborted.
508 * @note This API can be used to indicate whether or not automatic foreground or
509 * background CLUT loading is aborted.
510 * @rmtoll CR ABORT LL_DMA2D_IsAborted
511 * @param DMA2Dx DMA2D Instance
512 * @retval State of bit (1 or 0).
513 */
514 __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
515 {
516 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
517 }
518
519 /**
520 * @brief Set DMA2D mode.
521 * @rmtoll CR MODE LL_DMA2D_SetMode
522 * @param DMA2Dx DMA2D Instance
523 * @param Mode This parameter can be one of the following values:
524 * @arg @ref LL_DMA2D_MODE_M2M
525 * @arg @ref LL_DMA2D_MODE_M2M_PFC
526 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
527 * @arg @ref LL_DMA2D_MODE_R2M
528 * @retval None
529 */
530 __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
531 {
532 MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
533 }
534
535 /**
536 * @brief Return DMA2D mode
537 * @rmtoll CR MODE LL_DMA2D_GetMode
538 * @param DMA2Dx DMA2D Instance
539 * @retval Returned value can be one of the following values:
540 * @arg @ref LL_DMA2D_MODE_M2M
541 * @arg @ref LL_DMA2D_MODE_M2M_PFC
542 * @arg @ref LL_DMA2D_MODE_M2M_BLEND
543 * @arg @ref LL_DMA2D_MODE_R2M
544 */
545 __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
546 {
547 return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
548 }
549
550 /**
551 * @brief Set DMA2D output color mode.
552 * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
553 * @param DMA2Dx DMA2D Instance
554 * @param ColorMode This parameter can be one of the following values:
555 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
556 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
557 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
558 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
559 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
560 * @retval None
561 */
562 __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
563 {
564 MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
565 }
566
567 /**
568 * @brief Return DMA2D output color mode.
569 * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
570 * @param DMA2Dx DMA2D Instance
571 * @retval Returned value can be one of the following values:
572 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
573 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
574 * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
575 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
576 * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
577 */
578 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
579 {
580 return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
581 }
582
583 /**
584 * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
585 * @rmtoll OOR LO LL_DMA2D_SetLineOffset
586 * @param DMA2Dx DMA2D Instance
587 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
588 * @retval None
589 */
590 __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
591 {
592 MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
593 }
594
595 /**
596 * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
597 * @rmtoll OOR LO LL_DMA2D_GetLineOffset
598 * @param DMA2Dx DMA2D Instance
599 * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
600 */
601 __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
602 {
603 return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
604 }
605
606 /**
607 * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
608 * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
609 * @param DMA2Dx DMA2D Instance
610 * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
611 * @retval None
612 */
613 __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
614 {
615 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
616 }
617
618 /**
619 * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
620 * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
621 * @param DMA2Dx DMA2D Instance
622 * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
623 */
624 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
625 {
626 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
627 }
628
629 /**
630 * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
631 * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
632 * @param DMA2Dx DMA2D Instance
633 * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
634 * @retval None
635 */
636 __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
637 {
638 MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
639 }
640
641 /**
642 * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
643 * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
644 * @param DMA2Dx DMA2D Instance
645 * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
646 */
647 __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
648 {
649 return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
650 }
651
652 /**
653 * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
654 * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
655 * @param DMA2Dx DMA2D Instance
656 * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
657 * @retval None
658 */
659 __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
660 {
661 LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
662 }
663
664 /**
665 * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
666 * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
667 * @param DMA2Dx DMA2D Instance
668 * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
669 */
670 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
671 {
672 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
673 }
674
675 /**
676 * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
677 * @note Output color format depends on output color mode, ARGB8888, RGB888,
678 * RGB565, ARGB1555 or ARGB4444.
679 * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
680 * with respect to color mode is not done by the user code.
681 * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
682 * OCOLR GREEN LL_DMA2D_SetOutputColor\n
683 * OCOLR RED LL_DMA2D_SetOutputColor\n
684 * OCOLR ALPHA LL_DMA2D_SetOutputColor
685 * @param DMA2Dx DMA2D Instance
686 * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
687 * @retval None
688 */
689 __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
690 {
691 MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
692 OutputColor);
693 }
694
695 /**
696 * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
697 * @note Alpha channel and red, green, blue color values must be retrieved from the returned
698 * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
699 * as set by @ref LL_DMA2D_SetOutputColorMode.
700 * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
701 * OCOLR GREEN LL_DMA2D_GetOutputColor\n
702 * OCOLR RED LL_DMA2D_GetOutputColor\n
703 * OCOLR ALPHA LL_DMA2D_GetOutputColor
704 * @param DMA2Dx DMA2D Instance
705 * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
706 */
707 __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
708 {
709 return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
710 (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
711 }
712
713 /**
714 * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
715 * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
716 * @param DMA2Dx DMA2D Instance
717 * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
718 * @retval None
719 */
720 __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
721 {
722 MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
723 }
724
725 /**
726 * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
727 * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
728 * @param DMA2Dx DMA2D Instance
729 * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
730 */
731 __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
732 {
733 return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
734 }
735
736 /**
737 * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
738 * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
739 * @param DMA2Dx DMA2D Instance
740 * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
741 * @retval None
742 */
743 __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
744 {
745 MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
746 }
747
748 /**
749 * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
750 * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
751 * @param DMA2Dx DMA2D Instance
752 * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
753 */
754 __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
755 {
756 return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
757 }
758
759 /**
760 * @brief Enable DMA2D dead time functionality.
761 * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
762 * @param DMA2Dx DMA2D Instance
763 * @retval None
764 */
765 __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
766 {
767 SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
768 }
769
770 /**
771 * @brief Disable DMA2D dead time functionality.
772 * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
773 * @param DMA2Dx DMA2D Instance
774 * @retval None
775 */
776 __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
777 {
778 CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
779 }
780
781 /**
782 * @brief Indicate if DMA2D dead time functionality is enabled.
783 * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
784 * @param DMA2Dx DMA2D Instance
785 * @retval State of bit (1 or 0).
786 */
787 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
788 {
789 return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
790 }
791
792 /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
793 * @{
794 */
795
796 /**
797 * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
798 * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
799 * @param DMA2Dx DMA2D Instance
800 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
801 * @retval None
802 */
803 __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
804 {
805 LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
806 }
807
808 /**
809 * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
810 * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
811 * @param DMA2Dx DMA2D Instance
812 * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
813 */
814 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
815 {
816 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
817 }
818
819 /**
820 * @brief Enable DMA2D foreground CLUT loading.
821 * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
822 * @param DMA2Dx DMA2D Instance
823 * @retval None
824 */
825 __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
826 {
827 SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
828 }
829
830 /**
831 * @brief Indicate if DMA2D foreground CLUT loading is enabled.
832 * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
833 * @param DMA2Dx DMA2D Instance
834 * @retval State of bit (1 or 0).
835 */
836 __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
837 {
838 return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
839 }
840
841 /**
842 * @brief Set DMA2D foreground color mode.
843 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
844 * @param DMA2Dx DMA2D Instance
845 * @param ColorMode This parameter can be one of the following values:
846 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
847 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
848 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
849 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
850 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
851 * @arg @ref LL_DMA2D_INPUT_MODE_L8
852 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
853 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
854 * @arg @ref LL_DMA2D_INPUT_MODE_L4
855 * @arg @ref LL_DMA2D_INPUT_MODE_A8
856 * @arg @ref LL_DMA2D_INPUT_MODE_A4
857 * @retval None
858 */
859 __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
860 {
861 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
862 }
863
864 /**
865 * @brief Return DMA2D foreground color mode.
866 * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
867 * @param DMA2Dx DMA2D Instance
868 * @retval Returned value can be one of the following values:
869 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
870 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
871 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
872 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
873 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
874 * @arg @ref LL_DMA2D_INPUT_MODE_L8
875 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
876 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
877 * @arg @ref LL_DMA2D_INPUT_MODE_L4
878 * @arg @ref LL_DMA2D_INPUT_MODE_A8
879 * @arg @ref LL_DMA2D_INPUT_MODE_A4
880 */
881 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
882 {
883 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
884 }
885
886 /**
887 * @brief Set DMA2D foreground alpha mode.
888 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
889 * @param DMA2Dx DMA2D Instance
890 * @param AphaMode This parameter can be one of the following values:
891 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
892 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
893 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
894 * @retval None
895 */
896 __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
897 {
898 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
899 }
900
901 /**
902 * @brief Return DMA2D foreground alpha mode.
903 * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
904 * @param DMA2Dx DMA2D Instance
905 * @retval Returned value can be one of the following values:
906 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
907 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
908 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
909 */
910 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
911 {
912 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
913 }
914
915 /**
916 * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
917 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
918 * @param DMA2Dx DMA2D Instance
919 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
920 * @retval None
921 */
922 __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
923 {
924 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
925 }
926
927 /**
928 * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
929 * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
930 * @param DMA2Dx DMA2D Instance
931 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
932 */
933 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
934 {
935 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
936 }
937
938 /**
939 * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
940 * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
941 * @param DMA2Dx DMA2D Instance
942 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
943 * @retval None
944 */
945 __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
946 {
947 MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
948 }
949
950 /**
951 * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
952 * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
953 * @param DMA2Dx DMA2D Instance
954 * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
955 */
956 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
957 {
958 return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
959 }
960
961 /**
962 * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
963 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
964 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
965 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
966 * @param DMA2Dx DMA2D Instance
967 * @param Red Value between Min_Data=0 and Max_Data=0xFF
968 * @param Green Value between Min_Data=0 and Max_Data=0xFF
969 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
970 * @retval None
971 */
972 __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
973 {
974 MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
975 ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
976 }
977
978 /**
979 * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
980 * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
981 * @param DMA2Dx DMA2D Instance
982 * @param Red Value between Min_Data=0 and Max_Data=0xFF
983 * @retval None
984 */
985 __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
986 {
987 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
988 }
989
990 /**
991 * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
992 * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
993 * @param DMA2Dx DMA2D Instance
994 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
995 */
996 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
997 {
998 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
999 }
1000
1001 /**
1002 * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
1003 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
1004 * @param DMA2Dx DMA2D Instance
1005 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1006 * @retval None
1007 */
1008 __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1009 {
1010 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
1011 }
1012
1013 /**
1014 * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
1015 * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
1016 * @param DMA2Dx DMA2D Instance
1017 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
1018 */
1019 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
1020 {
1021 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
1022 }
1023
1024 /**
1025 * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
1026 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
1027 * @param DMA2Dx DMA2D Instance
1028 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1029 * @retval None
1030 */
1031 __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1032 {
1033 MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
1034 }
1035
1036 /**
1037 * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
1038 * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
1039 * @param DMA2Dx DMA2D Instance
1040 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
1041 */
1042 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
1043 {
1044 return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
1045 }
1046
1047 /**
1048 * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
1049 * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
1050 * @param DMA2Dx DMA2D Instance
1051 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
1052 * @retval None
1053 */
1054 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1055 {
1056 LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
1057 }
1058
1059 /**
1060 * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
1061 * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
1062 * @param DMA2Dx DMA2D Instance
1063 * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
1064 */
1065 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
1066 {
1067 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
1068 }
1069
1070 /**
1071 * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
1072 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
1073 * @param DMA2Dx DMA2D Instance
1074 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
1075 * @retval None
1076 */
1077 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1078 {
1079 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
1080 }
1081
1082 /**
1083 * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
1084 * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
1085 * @param DMA2Dx DMA2D Instance
1086 * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
1087 */
1088 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
1089 {
1090 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
1091 }
1092
1093 /**
1094 * @brief Set DMA2D foreground CLUT color mode.
1095 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
1096 * @param DMA2Dx DMA2D Instance
1097 * @param CLUTColorMode This parameter can be one of the following values:
1098 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1099 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1100 * @retval None
1101 */
1102 __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1103 {
1104 MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
1105 }
1106
1107 /**
1108 * @brief Return DMA2D foreground CLUT color mode.
1109 * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
1110 * @param DMA2Dx DMA2D Instance
1111 * @retval Returned value can be one of the following values:
1112 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1113 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1114 */
1115 __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
1116 {
1117 return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
1118 }
1119
1120 /**
1121 * @}
1122 */
1123
1124 /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
1125 * @{
1126 */
1127
1128 /**
1129 * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
1130 * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
1131 * @param DMA2Dx DMA2D Instance
1132 * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
1133 * @retval None
1134 */
1135 __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
1136 {
1137 LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
1138 }
1139
1140 /**
1141 * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
1142 * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
1143 * @param DMA2Dx DMA2D Instance
1144 * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
1145 */
1146 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
1147 {
1148 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
1149 }
1150
1151 /**
1152 * @brief Enable DMA2D background CLUT loading.
1153 * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
1154 * @param DMA2Dx DMA2D Instance
1155 * @retval None
1156 */
1157 __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
1158 {
1159 SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
1160 }
1161
1162 /**
1163 * @brief Indicate if DMA2D background CLUT loading is enabled.
1164 * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
1165 * @param DMA2Dx DMA2D Instance
1166 * @retval State of bit (1 or 0).
1167 */
1168 __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
1169 {
1170 return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
1171 }
1172
1173 /**
1174 * @brief Set DMA2D background color mode.
1175 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
1176 * @param DMA2Dx DMA2D Instance
1177 * @param ColorMode This parameter can be one of the following values:
1178 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
1179 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
1180 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
1181 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
1182 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
1183 * @arg @ref LL_DMA2D_INPUT_MODE_L8
1184 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
1185 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
1186 * @arg @ref LL_DMA2D_INPUT_MODE_L4
1187 * @arg @ref LL_DMA2D_INPUT_MODE_A8
1188 * @arg @ref LL_DMA2D_INPUT_MODE_A4
1189 * @retval None
1190 */
1191 __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
1192 {
1193 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
1194 }
1195
1196 /**
1197 * @brief Return DMA2D background color mode.
1198 * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
1199 * @param DMA2Dx DMA2D Instance
1200 * @retval Returned value can be one of the following values:
1201 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
1202 * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
1203 * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
1204 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
1205 * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
1206 * @arg @ref LL_DMA2D_INPUT_MODE_L8
1207 * @arg @ref LL_DMA2D_INPUT_MODE_AL44
1208 * @arg @ref LL_DMA2D_INPUT_MODE_AL88
1209 * @arg @ref LL_DMA2D_INPUT_MODE_L4
1210 * @arg @ref LL_DMA2D_INPUT_MODE_A8
1211 * @arg @ref LL_DMA2D_INPUT_MODE_A4
1212 */
1213 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
1214 {
1215 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
1216 }
1217
1218 /**
1219 * @brief Set DMA2D background alpha mode.
1220 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
1221 * @param DMA2Dx DMA2D Instance
1222 * @param AphaMode This parameter can be one of the following values:
1223 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
1224 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
1225 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
1226 * @retval None
1227 */
1228 __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
1229 {
1230 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
1231 }
1232
1233 /**
1234 * @brief Return DMA2D background alpha mode.
1235 * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
1236 * @param DMA2Dx DMA2D Instance
1237 * @retval Returned value can be one of the following values:
1238 * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
1239 * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
1240 * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
1241 */
1242 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
1243 {
1244 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
1245 }
1246
1247 /**
1248 * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
1249 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
1250 * @param DMA2Dx DMA2D Instance
1251 * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
1252 * @retval None
1253 */
1254 __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
1255 {
1256 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
1257 }
1258
1259 /**
1260 * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
1261 * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
1262 * @param DMA2Dx DMA2D Instance
1263 * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
1264 */
1265 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
1266 {
1267 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
1268 }
1269
1270 /**
1271 * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
1272 * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
1273 * @param DMA2Dx DMA2D Instance
1274 * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
1275 * @retval None
1276 */
1277 __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
1278 {
1279 MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
1280 }
1281
1282 /**
1283 * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
1284 * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
1285 * @param DMA2Dx DMA2D Instance
1286 * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
1287 */
1288 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
1289 {
1290 return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
1291 }
1292
1293 /**
1294 * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
1295 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
1296 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
1297 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
1298 * @param DMA2Dx DMA2D Instance
1299 * @param Red Value between Min_Data=0 and Max_Data=0xFF
1300 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1301 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1302 * @retval None
1303 */
1304 __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
1305 {
1306 MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
1307 ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
1308 }
1309
1310 /**
1311 * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
1312 * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
1313 * @param DMA2Dx DMA2D Instance
1314 * @param Red Value between Min_Data=0 and Max_Data=0xFF
1315 * @retval None
1316 */
1317 __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
1318 {
1319 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
1320 }
1321
1322 /**
1323 * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
1324 * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
1325 * @param DMA2Dx DMA2D Instance
1326 * @retval Red color value between Min_Data=0 and Max_Data=0xFF
1327 */
1328 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
1329 {
1330 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
1331 }
1332
1333 /**
1334 * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
1335 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
1336 * @param DMA2Dx DMA2D Instance
1337 * @param Green Value between Min_Data=0 and Max_Data=0xFF
1338 * @retval None
1339 */
1340 __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
1341 {
1342 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
1343 }
1344
1345 /**
1346 * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
1347 * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
1348 * @param DMA2Dx DMA2D Instance
1349 * @retval Green color value between Min_Data=0 and Max_Data=0xFF
1350 */
1351 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
1352 {
1353 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
1354 }
1355
1356 /**
1357 * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
1358 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
1359 * @param DMA2Dx DMA2D Instance
1360 * @param Blue Value between Min_Data=0 and Max_Data=0xFF
1361 * @retval None
1362 */
1363 __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
1364 {
1365 MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
1366 }
1367
1368 /**
1369 * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
1370 * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
1371 * @param DMA2Dx DMA2D Instance
1372 * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
1373 */
1374 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
1375 {
1376 return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
1377 }
1378
1379 /**
1380 * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
1381 * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
1382 * @param DMA2Dx DMA2D Instance
1383 * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
1384 * @retval None
1385 */
1386 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
1387 {
1388 LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
1389 }
1390
1391 /**
1392 * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
1393 * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
1394 * @param DMA2Dx DMA2D Instance
1395 * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
1396 */
1397 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
1398 {
1399 return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
1400 }
1401
1402 /**
1403 * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
1404 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
1405 * @param DMA2Dx DMA2D Instance
1406 * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
1407 * @retval None
1408 */
1409 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
1410 {
1411 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
1412 }
1413
1414 /**
1415 * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
1416 * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
1417 * @param DMA2Dx DMA2D Instance
1418 * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
1419 */
1420 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
1421 {
1422 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
1423 }
1424
1425 /**
1426 * @brief Set DMA2D background CLUT color mode.
1427 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
1428 * @param DMA2Dx DMA2D Instance
1429 * @param CLUTColorMode This parameter can be one of the following values:
1430 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1431 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1432 * @retval None
1433 */
1434 __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
1435 {
1436 MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
1437 }
1438
1439 /**
1440 * @brief Return DMA2D background CLUT color mode.
1441 * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
1442 * @param DMA2Dx DMA2D Instance
1443 * @retval Returned value can be one of the following values:
1444 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
1445 * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
1446 */
1447 __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
1448 {
1449 return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
1450 }
1451
1452 /**
1453 * @}
1454 */
1455
1456 /**
1457 * @}
1458 */
1459
1460
1461 /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
1462 * @{
1463 */
1464
1465 /**
1466 * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
1467 * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
1468 * @param DMA2Dx DMA2D Instance
1469 * @retval State of bit (1 or 0).
1470 */
1471 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
1472 {
1473 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
1474 }
1475
1476 /**
1477 * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
1478 * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
1479 * @param DMA2Dx DMA2D Instance
1480 * @retval State of bit (1 or 0).
1481 */
1482 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
1483 {
1484 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
1485 }
1486
1487 /**
1488 * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
1489 * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
1490 * @param DMA2Dx DMA2D Instance
1491 * @retval State of bit (1 or 0).
1492 */
1493 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
1494 {
1495 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
1496 }
1497
1498 /**
1499 * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
1500 * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
1501 * @param DMA2Dx DMA2D Instance
1502 * @retval State of bit (1 or 0).
1503 */
1504 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
1505 {
1506 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
1507 }
1508
1509 /**
1510 * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
1511 * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
1512 * @param DMA2Dx DMA2D Instance
1513 * @retval State of bit (1 or 0).
1514 */
1515 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
1516 {
1517 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
1518 }
1519
1520 /**
1521 * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
1522 * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
1523 * @param DMA2Dx DMA2D Instance
1524 * @retval State of bit (1 or 0).
1525 */
1526 __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
1527 {
1528 return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
1529 }
1530
1531 /**
1532 * @brief Clear DMA2D Configuration Error Interrupt Flag
1533 * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
1534 * @param DMA2Dx DMA2D Instance
1535 * @retval None
1536 */
1537 __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
1538 {
1539 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
1540 }
1541
1542 /**
1543 * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
1544 * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
1545 * @param DMA2Dx DMA2D Instance
1546 * @retval None
1547 */
1548 __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
1549 {
1550 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
1551 }
1552
1553 /**
1554 * @brief Clear DMA2D CLUT Access Error Interrupt Flag
1555 * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
1556 * @param DMA2Dx DMA2D Instance
1557 * @retval None
1558 */
1559 __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
1560 {
1561 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
1562 }
1563
1564 /**
1565 * @brief Clear DMA2D Transfer Watermark Interrupt Flag
1566 * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
1567 * @param DMA2Dx DMA2D Instance
1568 * @retval None
1569 */
1570 __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
1571 {
1572 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
1573 }
1574
1575 /**
1576 * @brief Clear DMA2D Transfer Complete Interrupt Flag
1577 * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
1578 * @param DMA2Dx DMA2D Instance
1579 * @retval None
1580 */
1581 __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
1582 {
1583 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
1584 }
1585
1586 /**
1587 * @brief Clear DMA2D Transfer Error Interrupt Flag
1588 * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
1589 * @param DMA2Dx DMA2D Instance
1590 * @retval None
1591 */
1592 __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
1593 {
1594 WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
1595 }
1596
1597 /**
1598 * @}
1599 */
1600
1601 /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
1602 * @{
1603 */
1604
1605 /**
1606 * @brief Enable Configuration Error Interrupt
1607 * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
1608 * @param DMA2Dx DMA2D Instance
1609 * @retval None
1610 */
1611 __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
1612 {
1613 SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1614 }
1615
1616 /**
1617 * @brief Enable CLUT Transfer Complete Interrupt
1618 * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
1619 * @param DMA2Dx DMA2D Instance
1620 * @retval None
1621 */
1622 __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
1623 {
1624 SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1625 }
1626
1627 /**
1628 * @brief Enable CLUT Access Error Interrupt
1629 * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
1630 * @param DMA2Dx DMA2D Instance
1631 * @retval None
1632 */
1633 __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
1634 {
1635 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1636 }
1637
1638 /**
1639 * @brief Enable Transfer Watermark Interrupt
1640 * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
1641 * @param DMA2Dx DMA2D Instance
1642 * @retval None
1643 */
1644 __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
1645 {
1646 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1647 }
1648
1649 /**
1650 * @brief Enable Transfer Complete Interrupt
1651 * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
1652 * @param DMA2Dx DMA2D Instance
1653 * @retval None
1654 */
1655 __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
1656 {
1657 SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1658 }
1659
1660 /**
1661 * @brief Enable Transfer Error Interrupt
1662 * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
1663 * @param DMA2Dx DMA2D Instance
1664 * @retval None
1665 */
1666 __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
1667 {
1668 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
1669 }
1670
1671 /**
1672 * @brief Disable Configuration Error Interrupt
1673 * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
1674 * @param DMA2Dx DMA2D Instance
1675 * @retval None
1676 */
1677 __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
1678 {
1679 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
1680 }
1681
1682 /**
1683 * @brief Disable CLUT Transfer Complete Interrupt
1684 * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
1685 * @param DMA2Dx DMA2D Instance
1686 * @retval None
1687 */
1688 __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
1689 {
1690 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
1691 }
1692
1693 /**
1694 * @brief Disable CLUT Access Error Interrupt
1695 * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
1696 * @param DMA2Dx DMA2D Instance
1697 * @retval None
1698 */
1699 __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
1700 {
1701 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
1702 }
1703
1704 /**
1705 * @brief Disable Transfer Watermark Interrupt
1706 * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
1707 * @param DMA2Dx DMA2D Instance
1708 * @retval None
1709 */
1710 __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
1711 {
1712 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
1713 }
1714
1715 /**
1716 * @brief Disable Transfer Complete Interrupt
1717 * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
1718 * @param DMA2Dx DMA2D Instance
1719 * @retval None
1720 */
1721 __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
1722 {
1723 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
1724 }
1725
1726 /**
1727 * @brief Disable Transfer Error Interrupt
1728 * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
1729 * @param DMA2Dx DMA2D Instance
1730 * @retval None
1731 */
1732 __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
1733 {
1734 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
1735 }
1736
1737 /**
1738 * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
1739 * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
1740 * @param DMA2Dx DMA2D Instance
1741 * @retval State of bit (1 or 0).
1742 */
1743 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
1744 {
1745 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
1746 }
1747
1748 /**
1749 * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
1750 * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
1751 * @param DMA2Dx DMA2D Instance
1752 * @retval State of bit (1 or 0).
1753 */
1754 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
1755 {
1756 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
1757 }
1758
1759 /**
1760 * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
1761 * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
1762 * @param DMA2Dx DMA2D Instance
1763 * @retval State of bit (1 or 0).
1764 */
1765 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
1766 {
1767 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
1768 }
1769
1770 /**
1771 * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
1772 * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
1773 * @param DMA2Dx DMA2D Instance
1774 * @retval State of bit (1 or 0).
1775 */
1776 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
1777 {
1778 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
1779 }
1780
1781 /**
1782 * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
1783 * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
1784 * @param DMA2Dx DMA2D Instance
1785 * @retval State of bit (1 or 0).
1786 */
1787 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
1788 {
1789 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
1790 }
1791
1792 /**
1793 * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
1794 * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
1795 * @param DMA2Dx DMA2D Instance
1796 * @retval State of bit (1 or 0).
1797 */
1798 __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
1799 {
1800 return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
1801 }
1802
1803
1804
1805 /**
1806 * @}
1807 */
1808
1809 #if defined(USE_FULL_LL_DRIVER)
1810 /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
1811 * @{
1812 */
1813
1814 ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
1815 ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
1816 void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
1817 void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
1818 void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
1819 void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
1820 uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1821 uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1822 uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1823 uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
1824 void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
1825
1826 /**
1827 * @}
1828 */
1829 #endif /* USE_FULL_LL_DRIVER */
1830
1831 /**
1832 * @}
1833 */
1834
1835 /**
1836 * @}
1837 */
1838
1839 #endif /* defined (DMA2D) */
1840
1841 /**
1842 * @}
1843 */
1844
1845 #ifdef __cplusplus
1846 }
1847 #endif
1848
1849 #endif /* __STM32F4xx_LL_DMA2D_H */
1850
1851 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/