lib/main/STM32F4/Drivers/STM32F4xx_StdPeriph_Driver/inc/stm32f4xx_dma2d.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_dma2d.h
   4   * @author  MCD Application Team
   5   * @version V1.7.1
   6   * @date    20-May-2016
   7   * @brief   This file contains all the functions prototypes for the DMA2D firmware
   8   *          library.
   9   ******************************************************************************
  10   * @attention
  11   *
  12   * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
  13   *
  14   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  15   * You may not use this file except in compliance with the License.
  16   * You may obtain a copy of the License at:
  17   *
  18   *        http://www.st.com/software_license_agreement_liberty_v2
  19   *
  20   * Unless required by applicable law or agreed to in writing, software
  21   * distributed under the License is distributed on an "AS IS" BASIS,
  22   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  23   * See the License for the specific language governing permissions and
  24   * limitations under the License.
  25   *
  26   ******************************************************************************
  27   */
  28
  29 /* Define to prevent recursive inclusion -------------------------------------*/
  30 #ifndef __STM32F4xx_DMA2D_H
  31 #define __STM32F4xx_DMA2D_H
  32
  33 #ifdef __cplusplus
  34  extern "C" {
  35 #endif
  36
  37 /* Includes ------------------------------------------------------------------*/
  38 #include "stm32f4xx.h"
  39
  40 /** @addtogroup STM32F4xx_StdPeriph_Driver
  41   * @{
  42   */
  43
  44 /** @addtogroup DMA2D
  45   * @{
  46   */
  47
  48 /* Exported types ------------------------------------------------------------*/
  49
  50 /**
  51   * @brief  DMA2D Init structure definition
  52   */
  53
  54 typedef struct
  55 {
  56   uint32_t DMA2D_Mode;                           /*!< configures the DMA2D transfer mode.
  57                                                  This parameter can be one value of @ref DMA2D_MODE */
  58
  59   uint32_t DMA2D_CMode;                          /*!< configures the color format of the output image.
  60                                                  This parameter can be one value of @ref DMA2D_CMODE */
  61
  62   uint32_t DMA2D_OutputBlue;                     /*!< configures the blue value of the output image.
  63                                                  This parameter must range:
  64                                                  - from 0x00 to 0xFF if ARGB8888 color mode is slected
  65                                                  - from 0x00 to 0xFF if RGB888 color mode is slected
  66                                                  - from 0x00 to 0x1F if RGB565 color mode is slected
  67                                                  - from 0x00 to 0x1F if ARGB1555 color mode is slected
  68                                                  - from 0x00 to 0x0F if ARGB4444 color mode is slected  */
  69
  70   uint32_t DMA2D_OutputGreen;                    /*!< configures the green value of the output image.
  71                                                  This parameter must range:
  72                                                  - from 0x00 to 0xFF if ARGB8888 color mode is selected
  73                                                  - from 0x00 to 0xFF if RGB888 color mode is selected
  74                                                  - from 0x00 to 0x2F if RGB565 color mode is selected
  75                                                  - from 0x00 to 0x1F if ARGB1555 color mode is selected
  76                                                  - from 0x00 to 0x0F if ARGB4444 color mode is selected  */
  77
  78   uint32_t DMA2D_OutputRed;                      /*!< configures the red value of the output image.
  79                                                  This parameter must range:
  80                                                  - from 0x00 to 0xFF if ARGB8888 color mode is slected
  81                                                  - from 0x00 to 0xFF if RGB888 color mode is slected
  82                                                  - from 0x00 to 0x1F if RGB565 color mode is slected
  83                                                  - from 0x00 to 0x1F if ARGB1555 color mode is slected
  84                                                  - from 0x00 to 0x0F if ARGB4444 color mode is slected  */
  85
  86   uint32_t DMA2D_OutputAlpha;                    /*!< configures the alpha channel of the output color.
  87                                                  This parameter must range:
  88                                                  - from 0x00 to 0xFF if ARGB8888 color mode is selected
  89                                                  - from 0x00 to 0x01 if ARGB1555 color mode is selected
  90                                                  - from 0x00 to 0x0F if ARGB4444 color mode is selected  */
  91
  92   uint32_t DMA2D_OutputMemoryAdd;                /*!< Specifies the memory address. This parameter
  93                                                  must be range from 0x00000000 to 0xFFFFFFFF. */
  94
  95   uint32_t DMA2D_OutputOffset;                   /*!< Specifies the Offset value. This parameter must be range from
  96                                                  0x0000 to 0x3FFF. */
  97
  98   uint32_t DMA2D_NumberOfLine;                   /*!< Configures the number of line of the area to be transfered.
  99                                                  This parameter must range from 0x0000 to 0xFFFF */
 100
 101   uint32_t DMA2D_PixelPerLine;                   /*!< Configures the number pixel per line of the area to be transferred.
 102                                                  This parameter must range from 0x0000 to 0x3FFF */
 103 } DMA2D_InitTypeDef;
 104
 105
 106
 107 typedef struct
 108 {
 109   uint32_t DMA2D_FGMA;                           /*!< configures the DMA2D foreground memory address.
 110                                                  This parameter must be range from 0x00000000 to 0xFFFFFFFF. */
 111
 112   uint32_t DMA2D_FGO;                            /*!< configures the DMA2D foreground offset.
 113                                                  This parameter must be range from 0x0000 to 0x3FFF. */
 114
 115   uint32_t DMA2D_FGCM;                           /*!< configures the DMA2D foreground color mode .
 116                                                  This parameter can be one value of @ref DMA2D_FGCM */
 117
 118   uint32_t DMA2D_FG_CLUT_CM;                     /*!< configures the DMA2D foreground CLUT color mode.
 119                                                  This parameter can be one value of @ref DMA2D_FG_CLUT_CM */
 120
 121   uint32_t DMA2D_FG_CLUT_SIZE;                   /*!< configures the DMA2D foreground CLUT size.
 122                                                  This parameter must range from 0x00 to 0xFF. */
 123
 124   uint32_t DMA2D_FGPFC_ALPHA_MODE;               /*!< configures the DMA2D foreground alpha mode.
 125                                                  This parameter can be one value of @ref DMA2D_FGPFC_ALPHA_MODE */
 126
 127   uint32_t DMA2D_FGPFC_ALPHA_VALUE;              /*!< Specifies the DMA2D foreground alpha value
 128                                                  must be range from 0x00 to 0xFF. */
 129
 130   uint32_t DMA2D_FGC_BLUE;                       /*!< Specifies the DMA2D foreground blue value
 131                                                  must be range from 0x00 to 0xFF. */
 132
 133   uint32_t DMA2D_FGC_GREEN;                      /*!< Specifies the DMA2D foreground green value
 134                                                  must be range from 0x00 to 0xFF. */
 135
 136   uint32_t DMA2D_FGC_RED;                        /*!< Specifies the DMA2D foreground red value
 137                                                  must be range from 0x00 to 0xFF. */
 138
 139   uint32_t DMA2D_FGCMAR;                         /*!< Configures the DMA2D foreground CLUT memory address.
 140                                                  This parameter must range from 0x00000000 to 0xFFFFFFFF. */
 141 } DMA2D_FG_InitTypeDef;
 142
 143
 144 typedef struct
 145 {
 146   uint32_t DMA2D_BGMA;                           /*!< configures the DMA2D background memory address.
 147                                                  This parameter must be range from 0x00000000 to 0xFFFFFFFF. */
 148
 149   uint32_t DMA2D_BGO;                            /*!< configures the DMA2D background offset.
 150                                                  This parameter must be range from 0x0000 to 0x3FFF. */
 151
 152   uint32_t DMA2D_BGCM;                           /*!< configures the DMA2D background color mode .
 153                                                  This parameter can be one value of @ref DMA2D_FGCM */
 154
 155   uint32_t DMA2D_BG_CLUT_CM;                     /*!< configures the DMA2D background CLUT color mode.
 156                                                  This parameter can be one value of @ref DMA2D_FG_CLUT_CM */
 157
 158   uint32_t DMA2D_BG_CLUT_SIZE;                   /*!< configures the DMA2D background CLUT size.
 159                                                  This parameter must range from 0x00 to 0xFF. */
 160
 161   uint32_t DMA2D_BGPFC_ALPHA_MODE;               /*!< configures the DMA2D background alpha mode.
 162                                                  This parameter can be one value of @ref DMA2D_FGPFC_ALPHA_MODE */
 163
 164   uint32_t DMA2D_BGPFC_ALPHA_VALUE;              /*!< Specifies the DMA2D background alpha value
 165                                                  must be range from 0x00 to 0xFF. */
 166
 167   uint32_t DMA2D_BGC_BLUE;                       /*!< Specifies the DMA2D background blue value
 168                                                  must be range from 0x00 to 0xFF. */
 169
 170   uint32_t DMA2D_BGC_GREEN;                      /*!< Specifies the DMA2D background green value
 171                                                  must be range from 0x00 to 0xFF. */
 172
 173   uint32_t DMA2D_BGC_RED;                        /*!< Specifies the DMA2D background red value
 174                                                  must be range from 0x00 to 0xFF. */
 175
 176   uint32_t DMA2D_BGCMAR;                         /*!< Configures the DMA2D background CLUT memory address.
 177                                                  This parameter must range from 0x00000000 to 0xFFFFFFFF. */
 178 } DMA2D_BG_InitTypeDef;
 179
 180
 181
 182 /* Exported constants --------------------------------------------------------*/
 183
 184 /** @defgroup DMA2D_Exported_Constants
 185   * @{
 186   */
 187
 188 /** @defgroup DMA2D_MODE
 189   * @{
 190   */
 191
 192
 193 #define DMA2D_M2M                            ((uint32_t)0x00000000)
 194 #define DMA2D_M2M_PFC                        ((uint32_t)0x00010000)
 195 #define DMA2D_M2M_BLEND                      ((uint32_t)0x00020000)
 196 #define DMA2D_R2M                            ((uint32_t)0x00030000)
 197
 198 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_PFC) || \
 199                              ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
 200
 201
 202 /**
 203   * @}
 204   */
 205
 206 /** @defgroup DMA2D_CMODE
 207   * @{
 208   */
 209 #define DMA2D_ARGB8888                       ((uint32_t)0x00000000)
 210 #define DMA2D_RGB888                         ((uint32_t)0x00000001)
 211 #define DMA2D_RGB565                         ((uint32_t)0x00000002)
 212 #define DMA2D_ARGB1555                       ((uint32_t)0x00000003)
 213 #define DMA2D_ARGB4444                       ((uint32_t)0x00000004)
 214
 215 #define IS_DMA2D_CMODE(MODE_ARGB) (((MODE_ARGB) == DMA2D_ARGB8888) || ((MODE_ARGB) == DMA2D_RGB888) || \
 216                                    ((MODE_ARGB) == DMA2D_RGB565) || ((MODE_ARGB) == DMA2D_ARGB1555) || \
 217                                    ((MODE_ARGB) == DMA2D_ARGB4444))
 218
 219
 220 /**
 221   * @}
 222   */
 223
 224 /** @defgroup DMA2D_OUTPUT_COLOR
 225   * @{
 226   */
 227 #define DMA2D_Output_Color                 ((uint32_t)0x000000FF)
 228
 229 #define IS_DMA2D_OGREEN(OGREEN) ((OGREEN) <= DMA2D_Output_Color)
 230 #define IS_DMA2D_ORED(ORED)     ((ORED) <= DMA2D_Output_Color)
 231 #define IS_DMA2D_OBLUE(OBLUE)   ((OBLUE) <= DMA2D_Output_Color)
 232 #define IS_DMA2D_OALPHA(OALPHA) ((OALPHA) <= DMA2D_Output_Color)
 233
 234 /**
 235   * @}
 236   */
 237
 238 /** @defgroup DMA2D_OUTPUT_OFFSET
 239   * @{
 240   */
 241 #define DMA2D_OUTPUT_OFFSET      ((uint32_t)0x00003FFF)
 242
 243 #define IS_DMA2D_OUTPUT_OFFSET(OOFFSET) ((OOFFSET) <= DMA2D_OUTPUT_OFFSET)
 244
 245
 246 /**
 247   * @}
 248   */
 249
 250 /** @defgroup DMA2D_SIZE
 251   * @{
 252   */
 253
 254 #define DMA2D_pixel          ((uint32_t)0x00003FFF)
 255 #define DMA2D_Line           ((uint32_t)0x0000FFFF)
 256
 257 #define IS_DMA2D_LINE(LINE)  ((LINE) <= DMA2D_Line)
 258 #define IS_DMA2D_PIXEL(PIXEL) ((PIXEL) <= DMA2D_pixel)
 259
 260
 261 /**
 262   * @}
 263   */
 264
 265 /** @defgroup DMA2D_OFFSET
 266   * @{
 267   */
 268 #define OFFSET               ((uint32_t)0x00003FFF)
 269
 270 #define IS_DMA2D_FGO(FGO)  ((FGO) <= OFFSET)
 271
 272 #define IS_DMA2D_BGO(BGO)  ((BGO) <= OFFSET)
 273
 274 /**
 275   * @}
 276   */
 277
 278
 279 /** @defgroup DMA2D_FGCM
 280   * @{
 281   */
 282
 283 #define CM_ARGB8888        ((uint32_t)0x00000000)
 284 #define CM_RGB888          ((uint32_t)0x00000001)
 285 #define CM_RGB565          ((uint32_t)0x00000002)
 286 #define CM_ARGB1555        ((uint32_t)0x00000003)
 287 #define CM_ARGB4444        ((uint32_t)0x00000004)
 288 #define CM_L8              ((uint32_t)0x00000005)
 289 #define CM_AL44            ((uint32_t)0x00000006)
 290 #define CM_AL88            ((uint32_t)0x00000007)
 291 #define CM_L4              ((uint32_t)0x00000008)
 292 #define CM_A8              ((uint32_t)0x00000009)
 293 #define CM_A4              ((uint32_t)0x0000000A)
 294
 295 #define IS_DMA2D_FGCM(FGCM) (((FGCM) == CM_ARGB8888) || ((FGCM) == CM_RGB888) || \
 296                              ((FGCM) == CM_RGB565) || ((FGCM) == CM_ARGB1555) || \
 297                              ((FGCM) == CM_ARGB4444) || ((FGCM) == CM_L8) || \
 298                              ((FGCM) == CM_AL44) || ((FGCM) == CM_AL88) || \
 299                              ((FGCM) == CM_L4) || ((FGCM) == CM_A8) || \
 300                              ((FGCM) == CM_A4))
 301
 302 #define IS_DMA2D_BGCM(BGCM) (((BGCM) == CM_ARGB8888) || ((BGCM) == CM_RGB888) || \
 303                              ((BGCM) == CM_RGB565) || ((BGCM) == CM_ARGB1555) || \
 304                              ((BGCM) == CM_ARGB4444) || ((BGCM) == CM_L8) || \
 305                              ((BGCM) == CM_AL44) || ((BGCM) == CM_AL88) || \
 306                              ((BGCM) == CM_L4) || ((BGCM) == CM_A8) || \
 307                              ((BGCM) == CM_A4))
 308
 309 /**
 310   * @}
 311   */
 312
 313 /** @defgroup DMA2D_FG_CLUT_CM
 314   * @{
 315   */
 316
 317 #define CLUT_CM_ARGB8888        ((uint32_t)0x00000000)
 318 #define CLUT_CM_RGB888          ((uint32_t)0x00000001)
 319
 320 #define IS_DMA2D_FG_CLUT_CM(FG_CLUT_CM) (((FG_CLUT_CM) == CLUT_CM_ARGB8888) || ((FG_CLUT_CM) == CLUT_CM_RGB888))
 321
 322 #define IS_DMA2D_BG_CLUT_CM(BG_CLUT_CM) (((BG_CLUT_CM) == CLUT_CM_ARGB8888) || ((BG_CLUT_CM) == CLUT_CM_RGB888))
 323
 324 /**
 325   * @}
 326   */
 327
 328 /** @defgroup DMA2D_FG_COLOR_VALUE
 329   * @{
 330   */
 331
 332 #define COLOR_VALUE             ((uint32_t)0x000000FF)
 333
 334 #define IS_DMA2D_FG_CLUT_SIZE(FG_CLUT_SIZE) ((FG_CLUT_SIZE) <= COLOR_VALUE)
 335
 336 #define IS_DMA2D_FG_ALPHA_VALUE(FG_ALPHA_VALUE) ((FG_ALPHA_VALUE) <= COLOR_VALUE)
 337 #define IS_DMA2D_FGC_BLUE(FGC_BLUE) ((FGC_BLUE) <= COLOR_VALUE)
 338 #define IS_DMA2D_FGC_GREEN(FGC_GREEN) ((FGC_GREEN) <= COLOR_VALUE)
 339 #define IS_DMA2D_FGC_RED(FGC_RED) ((FGC_RED) <= COLOR_VALUE)
 340
 341 #define IS_DMA2D_BG_CLUT_SIZE(BG_CLUT_SIZE) ((BG_CLUT_SIZE) <= COLOR_VALUE)
 342
 343 #define IS_DMA2D_BG_ALPHA_VALUE(BG_ALPHA_VALUE) ((BG_ALPHA_VALUE) <= COLOR_VALUE)
 344 #define IS_DMA2D_BGC_BLUE(BGC_BLUE) ((BGC_BLUE) <= COLOR_VALUE)
 345 #define IS_DMA2D_BGC_GREEN(BGC_GREEN) ((BGC_GREEN) <= COLOR_VALUE)
 346 #define IS_DMA2D_BGC_RED(BGC_RED) ((BGC_RED) <= COLOR_VALUE)
 347
 348 /**
 349   * @}
 350   */
 351
 352 /** DMA2D_FGPFC_ALPHA_MODE
 353   * @{
 354   */
 355
 356 #define NO_MODIF_ALPHA_VALUE       ((uint32_t)0x00000000)
 357 #define REPLACE_ALPHA_VALUE        ((uint32_t)0x00000001)
 358 #define COMBINE_ALPHA_VALUE        ((uint32_t)0x00000002)
 359
 360 #define IS_DMA2D_FG_ALPHA_MODE(FG_ALPHA_MODE) (((FG_ALPHA_MODE) ==  NO_MODIF_ALPHA_VALUE) || \
 361                                               ((FG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
 362                                               ((FG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
 363
 364 #define IS_DMA2D_BG_ALPHA_MODE(BG_ALPHA_MODE) (((BG_ALPHA_MODE) ==  NO_MODIF_ALPHA_VALUE) || \
 365                                               ((BG_ALPHA_MODE) == REPLACE_ALPHA_VALUE) || \
 366                                               ((BG_ALPHA_MODE) == COMBINE_ALPHA_VALUE))
 367
 368 /**
 369   * @}
 370   */
 371
 372 /** @defgroup DMA2D_Interrupts
 373   * @{
 374   */
 375
 376 #define DMA2D_IT_CE                      DMA2D_CR_CEIE
 377 #define DMA2D_IT_CTC                     DMA2D_CR_CTCIE
 378 #define DMA2D_IT_CAE                     DMA2D_CR_CAEIE
 379 #define DMA2D_IT_TW                      DMA2D_CR_TWIE
 380 #define DMA2D_IT_TC                      DMA2D_CR_TCIE
 381 #define DMA2D_IT_TE                      DMA2D_CR_TEIE
 382
 383 #define IS_DMA2D_IT(IT) (((IT) == DMA2D_IT_CTC) || ((IT) == DMA2D_IT_CAE) || \
 384                         ((IT) == DMA2D_IT_TW) || ((IT) == DMA2D_IT_TC) || \
 385                         ((IT) == DMA2D_IT_TE) || ((IT) == DMA2D_IT_CE))
 386
 387 /**
 388   * @}
 389   */
 390
 391 /** @defgroup DMA2D_Flag
 392   * @{
 393   */
 394
 395 #define DMA2D_FLAG_CE                      DMA2D_ISR_CEIF
 396 #define DMA2D_FLAG_CTC                     DMA2D_ISR_CTCIF
 397 #define DMA2D_FLAG_CAE                     DMA2D_ISR_CAEIF
 398 #define DMA2D_FLAG_TW                      DMA2D_ISR_TWIF
 399 #define DMA2D_FLAG_TC                      DMA2D_ISR_TCIF
 400 #define DMA2D_FLAG_TE                      DMA2D_ISR_TEIF
 401
 402
 403 #define IS_DMA2D_GET_FLAG(FLAG) (((FLAG) == DMA2D_FLAG_CTC) || ((FLAG) == DMA2D_FLAG_CAE) || \
 404                                 ((FLAG) == DMA2D_FLAG_TW) || ((FLAG) == DMA2D_FLAG_TC) || \
 405                                 ((FLAG) == DMA2D_FLAG_TE) || ((FLAG) == DMA2D_FLAG_CE))
 406
 407
 408 /**
 409   * @}
 410   */
 411
 412 /** @defgroup DMA2D_DeadTime
 413   * @{
 414   */
 415
 416 #define DEADTIME                  ((uint32_t)0x000000FF)
 417
 418 #define IS_DMA2D_DEAD_TIME(DEAD_TIME) ((DEAD_TIME) <= DEADTIME)
 419
 420
 421 #define LINE_WATERMARK            DMA2D_LWR_LW
 422
 423 #define IS_DMA2D_LineWatermark(LineWatermark) ((LineWatermark) <= LINE_WATERMARK)
 424
 425 /**
 426   * @}
 427   */
 428
 429 /**
 430   * @}
 431   */
 432
 433 /* Exported macro ------------------------------------------------------------*/
 434 /* Exported functions ------------------------------------------------------- */
 435
 436 /*  Function used to set the DMA2D configuration to the default reset state *****/
 437 void DMA2D_DeInit(void);
 438
 439 /* Initialization and Configuration functions *********************************/
 440 void DMA2D_Init(DMA2D_InitTypeDef* DMA2D_InitStruct);
 441 void DMA2D_StructInit(DMA2D_InitTypeDef* DMA2D_InitStruct);
 442 void DMA2D_StartTransfer(void);
 443 void DMA2D_AbortTransfer(void);
 444 void DMA2D_Suspend(FunctionalState NewState);
 445 void DMA2D_FGConfig(DMA2D_FG_InitTypeDef* DMA2D_FG_InitStruct);
 446 void DMA2D_FG_StructInit(DMA2D_FG_InitTypeDef* DMA2D_FG_InitStruct);
 447 void DMA2D_BGConfig(DMA2D_BG_InitTypeDef* DMA2D_BG_InitStruct);
 448 void DMA2D_BG_StructInit(DMA2D_BG_InitTypeDef* DMA2D_BG_InitStruct);
 449 void DMA2D_FGStart(FunctionalState NewState);
 450 void DMA2D_BGStart(FunctionalState NewState);
 451 void DMA2D_DeadTimeConfig(uint32_t DMA2D_DeadTime, FunctionalState NewState);
 452 void DMA2D_LineWatermarkConfig(uint32_t DMA2D_LWatermarkConfig);
 453
 454 /* Interrupts and flags management functions **********************************/
 455 void DMA2D_ITConfig(uint32_t DMA2D_IT, FunctionalState NewState);
 456 FlagStatus DMA2D_GetFlagStatus(uint32_t DMA2D_FLAG);
 457 void DMA2D_ClearFlag(uint32_t DMA2D_FLAG);
 458 ITStatus DMA2D_GetITStatus(uint32_t DMA2D_IT);
 459 void DMA2D_ClearITPendingBit(uint32_t DMA2D_IT);
 460
 461 #ifdef __cplusplus
 462 }
 463 #endif
 464
 465 #endif /* __STM32F4xx_DMA2D_H */
 466
 467 /**
 468   * @}
 469   */
 470
 471 /**
 472   * @}
 473   */
 474
 475 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/