Move telemetry displayport init and cms device registering
[betaflight.git] / lib / main / STM32F4 / Drivers / STM32F4xx_StdPeriph_Driver / inc / stm32f4xx_flash.h
blob856280e53af1b2a382a5ec7b7398b6fea91c82c8
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_flash.h
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 20-May-2016
7 * @brief This file contains all the functions prototypes for the FLASH
8 * firmware library.
9 ******************************************************************************
10 * @attention
12 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 * You may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at:
18 * http://www.st.com/software_license_agreement_liberty_v2
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
26 ******************************************************************************
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F4xx_FLASH_H
31 #define __STM32F4xx_FLASH_H
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f4xx.h"
40 /** @addtogroup STM32F4xx_StdPeriph_Driver
41 * @{
44 /** @addtogroup FLASH
45 * @{
46 */
48 /* Exported types ------------------------------------------------------------*/
49 /**
50 * @brief FLASH Status
51 */
52 typedef enum
54 FLASH_BUSY = 1,
55 FLASH_ERROR_RD,
56 FLASH_ERROR_PGS,
57 FLASH_ERROR_PGP,
58 FLASH_ERROR_PGA,
59 FLASH_ERROR_WRP,
60 FLASH_ERROR_PROGRAM,
61 FLASH_ERROR_OPERATION,
62 FLASH_COMPLETE
63 }FLASH_Status;
65 /* Exported constants --------------------------------------------------------*/
67 /** @defgroup FLASH_Exported_Constants
68 * @{
69 */
71 /** @defgroup Flash_Latency
72 * @{
73 */
74 #define FLASH_Latency_0 ((uint8_t)0x0000) /*!< FLASH Zero Latency cycle */
75 #define FLASH_Latency_1 ((uint8_t)0x0001) /*!< FLASH One Latency cycle */
76 #define FLASH_Latency_2 ((uint8_t)0x0002) /*!< FLASH Two Latency cycles */
77 #define FLASH_Latency_3 ((uint8_t)0x0003) /*!< FLASH Three Latency cycles */
78 #define FLASH_Latency_4 ((uint8_t)0x0004) /*!< FLASH Four Latency cycles */
79 #define FLASH_Latency_5 ((uint8_t)0x0005) /*!< FLASH Five Latency cycles */
80 #define FLASH_Latency_6 ((uint8_t)0x0006) /*!< FLASH Six Latency cycles */
81 #define FLASH_Latency_7 ((uint8_t)0x0007) /*!< FLASH Seven Latency cycles */
82 #define FLASH_Latency_8 ((uint8_t)0x0008) /*!< FLASH Eight Latency cycles */
83 #define FLASH_Latency_9 ((uint8_t)0x0009) /*!< FLASH Nine Latency cycles */
84 #define FLASH_Latency_10 ((uint8_t)0x000A) /*!< FLASH Ten Latency cycles */
85 #define FLASH_Latency_11 ((uint8_t)0x000B) /*!< FLASH Eleven Latency cycles */
86 #define FLASH_Latency_12 ((uint8_t)0x000C) /*!< FLASH Twelve Latency cycles */
87 #define FLASH_Latency_13 ((uint8_t)0x000D) /*!< FLASH Thirteen Latency cycles */
88 #define FLASH_Latency_14 ((uint8_t)0x000E) /*!< FLASH Fourteen Latency cycles */
89 #define FLASH_Latency_15 ((uint8_t)0x000F) /*!< FLASH Fifteen Latency cycles */
92 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_Latency_0) || \
93 ((LATENCY) == FLASH_Latency_1) || \
94 ((LATENCY) == FLASH_Latency_2) || \
95 ((LATENCY) == FLASH_Latency_3) || \
96 ((LATENCY) == FLASH_Latency_4) || \
97 ((LATENCY) == FLASH_Latency_5) || \
98 ((LATENCY) == FLASH_Latency_6) || \
99 ((LATENCY) == FLASH_Latency_7) || \
100 ((LATENCY) == FLASH_Latency_8) || \
101 ((LATENCY) == FLASH_Latency_9) || \
102 ((LATENCY) == FLASH_Latency_10) || \
103 ((LATENCY) == FLASH_Latency_11) || \
104 ((LATENCY) == FLASH_Latency_12) || \
105 ((LATENCY) == FLASH_Latency_13) || \
106 ((LATENCY) == FLASH_Latency_14) || \
107 ((LATENCY) == FLASH_Latency_15))
109 * @}
112 /** @defgroup FLASH_Voltage_Range
113 * @{
115 #define VoltageRange_1 ((uint8_t)0x00) /*!< Device operating range: 1.8V to 2.1V */
116 #define VoltageRange_2 ((uint8_t)0x01) /*!<Device operating range: 2.1V to 2.7V */
117 #define VoltageRange_3 ((uint8_t)0x02) /*!<Device operating range: 2.7V to 3.6V */
118 #define VoltageRange_4 ((uint8_t)0x03) /*!<Device operating range: 2.7V to 3.6V + External Vpp */
120 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == VoltageRange_1) || \
121 ((RANGE) == VoltageRange_2) || \
122 ((RANGE) == VoltageRange_3) || \
123 ((RANGE) == VoltageRange_4))
125 * @}
128 /** @defgroup FLASH_Sectors
129 * @{
131 #define FLASH_Sector_0 ((uint16_t)0x0000) /*!< Sector Number 0 */
132 #define FLASH_Sector_1 ((uint16_t)0x0008) /*!< Sector Number 1 */
133 #define FLASH_Sector_2 ((uint16_t)0x0010) /*!< Sector Number 2 */
134 #define FLASH_Sector_3 ((uint16_t)0x0018) /*!< Sector Number 3 */
135 #define FLASH_Sector_4 ((uint16_t)0x0020) /*!< Sector Number 4 */
136 #define FLASH_Sector_5 ((uint16_t)0x0028) /*!< Sector Number 5 */
137 #define FLASH_Sector_6 ((uint16_t)0x0030) /*!< Sector Number 6 */
138 #define FLASH_Sector_7 ((uint16_t)0x0038) /*!< Sector Number 7 */
139 #define FLASH_Sector_8 ((uint16_t)0x0040) /*!< Sector Number 8 */
140 #define FLASH_Sector_9 ((uint16_t)0x0048) /*!< Sector Number 9 */
141 #define FLASH_Sector_10 ((uint16_t)0x0050) /*!< Sector Number 10 */
142 #define FLASH_Sector_11 ((uint16_t)0x0058) /*!< Sector Number 11 */
143 #define FLASH_Sector_12 ((uint16_t)0x0080) /*!< Sector Number 12 */
144 #define FLASH_Sector_13 ((uint16_t)0x0088) /*!< Sector Number 13 */
145 #define FLASH_Sector_14 ((uint16_t)0x0090) /*!< Sector Number 14 */
146 #define FLASH_Sector_15 ((uint16_t)0x0098) /*!< Sector Number 15 */
147 #define FLASH_Sector_16 ((uint16_t)0x00A0) /*!< Sector Number 16 */
148 #define FLASH_Sector_17 ((uint16_t)0x00A8) /*!< Sector Number 17 */
149 #define FLASH_Sector_18 ((uint16_t)0x00B0) /*!< Sector Number 18 */
150 #define FLASH_Sector_19 ((uint16_t)0x00B8) /*!< Sector Number 19 */
151 #define FLASH_Sector_20 ((uint16_t)0x00C0) /*!< Sector Number 20 */
152 #define FLASH_Sector_21 ((uint16_t)0x00C8) /*!< Sector Number 21 */
153 #define FLASH_Sector_22 ((uint16_t)0x00D0) /*!< Sector Number 22 */
154 #define FLASH_Sector_23 ((uint16_t)0x00D8) /*!< Sector Number 23 */
156 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_Sector_0) || ((SECTOR) == FLASH_Sector_1) ||\
157 ((SECTOR) == FLASH_Sector_2) || ((SECTOR) == FLASH_Sector_3) ||\
158 ((SECTOR) == FLASH_Sector_4) || ((SECTOR) == FLASH_Sector_5) ||\
159 ((SECTOR) == FLASH_Sector_6) || ((SECTOR) == FLASH_Sector_7) ||\
160 ((SECTOR) == FLASH_Sector_8) || ((SECTOR) == FLASH_Sector_9) ||\
161 ((SECTOR) == FLASH_Sector_10) || ((SECTOR) == FLASH_Sector_11) ||\
162 ((SECTOR) == FLASH_Sector_12) || ((SECTOR) == FLASH_Sector_13) ||\
163 ((SECTOR) == FLASH_Sector_14) || ((SECTOR) == FLASH_Sector_15) ||\
164 ((SECTOR) == FLASH_Sector_16) || ((SECTOR) == FLASH_Sector_17) ||\
165 ((SECTOR) == FLASH_Sector_18) || ((SECTOR) == FLASH_Sector_19) ||\
166 ((SECTOR) == FLASH_Sector_20) || ((SECTOR) == FLASH_Sector_21) ||\
167 ((SECTOR) == FLASH_Sector_22) || ((SECTOR) == FLASH_Sector_23))
169 #if defined (STM32F427_437xx) || defined (STM32F429_439xx) || defined (STM32F469_479xx)
170 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x081FFFFF)) ||\
171 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
172 #endif /* STM32F427_437xx || STM32F429_439xx || STM32F469_479xx */
174 #if defined (STM32F40_41xxx) || defined(STM32F412xG)
175 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x080FFFFF)) ||\
176 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
177 #endif /* STM32F40_41xxx || STM32F412xG */
179 #if defined (STM32F401xx)
180 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0803FFFF)) ||\
181 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
182 #endif /* STM32F401xx */
184 #if defined (STM32F411xE) || defined (STM32F446xx)
185 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0807FFFF)) ||\
186 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
187 #endif /* STM32F411xE || STM32F446xx */
189 #if defined (STM32F410xx)
190 #define IS_FLASH_ADDRESS(ADDRESS) ((((ADDRESS) >= 0x08000000) && ((ADDRESS) <= 0x0801FFFF)) ||\
191 (((ADDRESS) >= 0x1FFF7800) && ((ADDRESS) <= 0x1FFF7A0F)))
192 #endif /* STM32F410xx */
195 * @}
198 /** @defgroup Option_Bytes_Write_Protection
199 * @{
201 #define OB_WRP_Sector_0 ((uint32_t)0x00000001) /*!< Write protection of Sector0 */
202 #define OB_WRP_Sector_1 ((uint32_t)0x00000002) /*!< Write protection of Sector1 */
203 #define OB_WRP_Sector_2 ((uint32_t)0x00000004) /*!< Write protection of Sector2 */
204 #define OB_WRP_Sector_3 ((uint32_t)0x00000008) /*!< Write protection of Sector3 */
205 #define OB_WRP_Sector_4 ((uint32_t)0x00000010) /*!< Write protection of Sector4 */
206 #define OB_WRP_Sector_5 ((uint32_t)0x00000020) /*!< Write protection of Sector5 */
207 #define OB_WRP_Sector_6 ((uint32_t)0x00000040) /*!< Write protection of Sector6 */
208 #define OB_WRP_Sector_7 ((uint32_t)0x00000080) /*!< Write protection of Sector7 */
209 #define OB_WRP_Sector_8 ((uint32_t)0x00000100) /*!< Write protection of Sector8 */
210 #define OB_WRP_Sector_9 ((uint32_t)0x00000200) /*!< Write protection of Sector9 */
211 #define OB_WRP_Sector_10 ((uint32_t)0x00000400) /*!< Write protection of Sector10 */
212 #define OB_WRP_Sector_11 ((uint32_t)0x00000800) /*!< Write protection of Sector11 */
213 #define OB_WRP_Sector_12 ((uint32_t)0x00000001) /*!< Write protection of Sector12 */
214 #define OB_WRP_Sector_13 ((uint32_t)0x00000002) /*!< Write protection of Sector13 */
215 #define OB_WRP_Sector_14 ((uint32_t)0x00000004) /*!< Write protection of Sector14 */
216 #define OB_WRP_Sector_15 ((uint32_t)0x00000008) /*!< Write protection of Sector15 */
217 #define OB_WRP_Sector_16 ((uint32_t)0x00000010) /*!< Write protection of Sector16 */
218 #define OB_WRP_Sector_17 ((uint32_t)0x00000020) /*!< Write protection of Sector17 */
219 #define OB_WRP_Sector_18 ((uint32_t)0x00000040) /*!< Write protection of Sector18 */
220 #define OB_WRP_Sector_19 ((uint32_t)0x00000080) /*!< Write protection of Sector19 */
221 #define OB_WRP_Sector_20 ((uint32_t)0x00000100) /*!< Write protection of Sector20 */
222 #define OB_WRP_Sector_21 ((uint32_t)0x00000200) /*!< Write protection of Sector21 */
223 #define OB_WRP_Sector_22 ((uint32_t)0x00000400) /*!< Write protection of Sector22 */
224 #define OB_WRP_Sector_23 ((uint32_t)0x00000800) /*!< Write protection of Sector23 */
225 #define OB_WRP_Sector_All ((uint32_t)0x00000FFF) /*!< Write protection of all Sectors */
227 #define IS_OB_WRP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
229 * @}
232 /** @defgroup Selection_Protection_Mode
233 * @{
235 #define OB_PcROP_Disable ((uint8_t)0x00) /*!< Disabled PcROP, nWPRi bits used for Write Protection on sector i */
236 #define OB_PcROP_Enable ((uint8_t)0x80) /*!< Enable PcROP, nWPRi bits used for PCRoP Protection on sector i */
237 #define IS_OB_PCROP_SELECT(PCROP) (((PCROP) == OB_PcROP_Disable) || ((PCROP) == OB_PcROP_Enable))
239 * @}
242 /** @defgroup Option_Bytes_PC_ReadWrite_Protection
243 * @{
245 #define OB_PCROP_Sector_0 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector0 */
246 #define OB_PCROP_Sector_1 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector1 */
247 #define OB_PCROP_Sector_2 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector2 */
248 #define OB_PCROP_Sector_3 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector3 */
249 #define OB_PCROP_Sector_4 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector4 */
250 #define OB_PCROP_Sector_5 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector5 */
251 #define OB_PCROP_Sector_6 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector6 */
252 #define OB_PCROP_Sector_7 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector7 */
253 #define OB_PCROP_Sector_8 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector8 */
254 #define OB_PCROP_Sector_9 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector9 */
255 #define OB_PCROP_Sector_10 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector10 */
256 #define OB_PCROP_Sector_11 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector11 */
257 #define OB_PCROP_Sector_12 ((uint32_t)0x00000001) /*!< PC Read/Write protection of Sector12 */
258 #define OB_PCROP_Sector_13 ((uint32_t)0x00000002) /*!< PC Read/Write protection of Sector13 */
259 #define OB_PCROP_Sector_14 ((uint32_t)0x00000004) /*!< PC Read/Write protection of Sector14 */
260 #define OB_PCROP_Sector_15 ((uint32_t)0x00000008) /*!< PC Read/Write protection of Sector15 */
261 #define OB_PCROP_Sector_16 ((uint32_t)0x00000010) /*!< PC Read/Write protection of Sector16 */
262 #define OB_PCROP_Sector_17 ((uint32_t)0x00000020) /*!< PC Read/Write protection of Sector17 */
263 #define OB_PCROP_Sector_18 ((uint32_t)0x00000040) /*!< PC Read/Write protection of Sector18 */
264 #define OB_PCROP_Sector_19 ((uint32_t)0x00000080) /*!< PC Read/Write protection of Sector19 */
265 #define OB_PCROP_Sector_20 ((uint32_t)0x00000100) /*!< PC Read/Write protection of Sector20 */
266 #define OB_PCROP_Sector_21 ((uint32_t)0x00000200) /*!< PC Read/Write protection of Sector21 */
267 #define OB_PCROP_Sector_22 ((uint32_t)0x00000400) /*!< PC Read/Write protection of Sector22 */
268 #define OB_PCROP_Sector_23 ((uint32_t)0x00000800) /*!< PC Read/Write protection of Sector23 */
269 #define OB_PCROP_Sector_All ((uint32_t)0x00000FFF) /*!< PC Read/Write protection of all Sectors */
271 #define IS_OB_PCROP(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000) == 0x00000000) && ((SECTOR) != 0x00000000))
273 * @}
276 /** @defgroup FLASH_Option_Bytes_Read_Protection
277 * @{
279 #define OB_RDP_Level_0 ((uint8_t)0xAA)
280 #define OB_RDP_Level_1 ((uint8_t)0x55)
281 /*#define OB_RDP_Level_2 ((uint8_t)0xCC)*/ /*!< Warning: When enabling read protection level 2
282 it's no more possible to go back to level 1 or 0 */
283 #define IS_OB_RDP(LEVEL) (((LEVEL) == OB_RDP_Level_0)||\
284 ((LEVEL) == OB_RDP_Level_1))/*||\
285 ((LEVEL) == OB_RDP_Level_2))*/
287 * @}
290 /** @defgroup FLASH_Option_Bytes_IWatchdog
291 * @{
293 #define OB_IWDG_SW ((uint8_t)0x20) /*!< Software IWDG selected */
294 #define OB_IWDG_HW ((uint8_t)0x00) /*!< Hardware IWDG selected */
295 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
297 * @}
300 /** @defgroup FLASH_Option_Bytes_nRST_STOP
301 * @{
303 #define OB_STOP_NoRST ((uint8_t)0x40) /*!< No reset generated when entering in STOP */
304 #define OB_STOP_RST ((uint8_t)0x00) /*!< Reset generated when entering in STOP */
305 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NoRST) || ((SOURCE) == OB_STOP_RST))
307 * @}
311 /** @defgroup FLASH_Option_Bytes_nRST_STDBY
312 * @{
314 #define OB_STDBY_NoRST ((uint8_t)0x80) /*!< No reset generated when entering in STANDBY */
315 #define OB_STDBY_RST ((uint8_t)0x00) /*!< Reset generated when entering in STANDBY */
316 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NoRST) || ((SOURCE) == OB_STDBY_RST))
318 * @}
321 /** @defgroup FLASH_BOR_Reset_Level
322 * @{
324 #define OB_BOR_LEVEL3 ((uint8_t)0x00) /*!< Supply voltage ranges from 2.70 to 3.60 V */
325 #define OB_BOR_LEVEL2 ((uint8_t)0x04) /*!< Supply voltage ranges from 2.40 to 2.70 V */
326 #define OB_BOR_LEVEL1 ((uint8_t)0x08) /*!< Supply voltage ranges from 2.10 to 2.40 V */
327 #define OB_BOR_OFF ((uint8_t)0x0C) /*!< Supply voltage ranges from 1.62 to 2.10 V */
328 #define IS_OB_BOR(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
329 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
331 * @}
334 /** @defgroup FLASH_Dual_Boot
335 * @{
337 #define OB_Dual_BootEnabled ((uint8_t)0x10) /*!< Dual Bank Boot Enable */
338 #define OB_Dual_BootDisabled ((uint8_t)0x00) /*!< Dual Bank Boot Disable, always boot on User Flash */
339 #define IS_OB_BOOT(BOOT) (((BOOT) == OB_Dual_BootEnabled) || ((BOOT) == OB_Dual_BootDisabled))
341 * @}
344 /** @defgroup FLASH_Interrupts
345 * @{
347 #define FLASH_IT_EOP ((uint32_t)0x01000000) /*!< End of FLASH Operation Interrupt source */
348 #define FLASH_IT_ERR ((uint32_t)0x02000000) /*!< Error Interrupt source */
349 #define IS_FLASH_IT(IT) ((((IT) & (uint32_t)0xFCFFFFFF) == 0x00000000) && ((IT) != 0x00000000))
351 * @}
354 /** @defgroup FLASH_Flags
355 * @{
357 #define FLASH_FLAG_EOP ((uint32_t)0x00000001) /*!< FLASH End of Operation flag */
358 #define FLASH_FLAG_OPERR ((uint32_t)0x00000002) /*!< FLASH operation Error flag */
359 #define FLASH_FLAG_WRPERR ((uint32_t)0x00000010) /*!< FLASH Write protected error flag */
360 #define FLASH_FLAG_PGAERR ((uint32_t)0x00000020) /*!< FLASH Programming Alignment error flag */
361 #define FLASH_FLAG_PGPERR ((uint32_t)0x00000040) /*!< FLASH Programming Parallelism error flag */
362 #define FLASH_FLAG_PGSERR ((uint32_t)0x00000080) /*!< FLASH Programming Sequence error flag */
363 #define FLASH_FLAG_RDERR ((uint32_t)0x00000100) /*!< Read Protection error flag (PCROP) */
364 #define FLASH_FLAG_BSY ((uint32_t)0x00010000) /*!< FLASH Busy flag */
365 #define IS_FLASH_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFE0C) == 0x00000000) && ((FLAG) != 0x00000000))
366 #define IS_FLASH_GET_FLAG(FLAG) (((FLAG) == FLASH_FLAG_EOP) || ((FLAG) == FLASH_FLAG_OPERR) || \
367 ((FLAG) == FLASH_FLAG_WRPERR) || ((FLAG) == FLASH_FLAG_PGAERR) || \
368 ((FLAG) == FLASH_FLAG_PGPERR) || ((FLAG) == FLASH_FLAG_PGSERR) || \
369 ((FLAG) == FLASH_FLAG_BSY) || ((FLAG) == FLASH_FLAG_RDERR))
371 * @}
374 /** @defgroup FLASH_Program_Parallelism
375 * @{
377 #define FLASH_PSIZE_BYTE ((uint32_t)0x00000000)
378 #define FLASH_PSIZE_HALF_WORD ((uint32_t)0x00000100)
379 #define FLASH_PSIZE_WORD ((uint32_t)0x00000200)
380 #define FLASH_PSIZE_DOUBLE_WORD ((uint32_t)0x00000300)
381 #define CR_PSIZE_MASK ((uint32_t)0xFFFFFCFF)
383 * @}
386 /** @defgroup FLASH_Keys
387 * @{
389 #define RDP_KEY ((uint16_t)0x00A5)
390 #define FLASH_KEY1 ((uint32_t)0x45670123)
391 #define FLASH_KEY2 ((uint32_t)0xCDEF89AB)
392 #define FLASH_OPT_KEY1 ((uint32_t)0x08192A3B)
393 #define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7F)
395 * @}
398 /**
399 * @brief ACR register byte 0 (Bits[7:0]) base address
401 #define ACR_BYTE0_ADDRESS ((uint32_t)0x40023C00)
402 /**
403 * @brief OPTCR register byte 0 (Bits[7:0]) base address
405 #define OPTCR_BYTE0_ADDRESS ((uint32_t)0x40023C14)
406 /**
407 * @brief OPTCR register byte 1 (Bits[15:8]) base address
409 #define OPTCR_BYTE1_ADDRESS ((uint32_t)0x40023C15)
410 /**
411 * @brief OPTCR register byte 2 (Bits[23:16]) base address
413 #define OPTCR_BYTE2_ADDRESS ((uint32_t)0x40023C16)
414 /**
415 * @brief OPTCR register byte 3 (Bits[31:24]) base address
417 #define OPTCR_BYTE3_ADDRESS ((uint32_t)0x40023C17)
419 /**
420 * @brief OPTCR1 register byte 0 (Bits[7:0]) base address
422 #define OPTCR1_BYTE2_ADDRESS ((uint32_t)0x40023C1A)
425 * @}
428 /* Exported macro ------------------------------------------------------------*/
429 /* Exported functions --------------------------------------------------------*/
431 /* FLASH Interface configuration functions ************************************/
432 void FLASH_SetLatency(uint32_t FLASH_Latency);
433 void FLASH_PrefetchBufferCmd(FunctionalState NewState);
434 void FLASH_InstructionCacheCmd(FunctionalState NewState);
435 void FLASH_DataCacheCmd(FunctionalState NewState);
436 void FLASH_InstructionCacheReset(void);
437 void FLASH_DataCacheReset(void);
439 /* FLASH Memory Programming functions *****************************************/
440 void FLASH_Unlock(void);
441 void FLASH_Lock(void);
442 FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange);
443 FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange);
444 FLASH_Status FLASH_EraseAllBank1Sectors(uint8_t VoltageRange);
445 FLASH_Status FLASH_EraseAllBank2Sectors(uint8_t VoltageRange);
446 FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data);
447 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data);
448 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data);
449 FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data);
451 /* Option Bytes Programming functions *****************************************/
452 void FLASH_OB_Unlock(void);
453 void FLASH_OB_Lock(void);
454 void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState);
455 void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState);
456 void FLASH_OB_PCROPSelectionConfig(uint8_t OB_PcROP);
457 void FLASH_OB_PCROPConfig(uint32_t OB_PCROP, FunctionalState NewState);
458 void FLASH_OB_PCROP1Config(uint32_t OB_PCROP, FunctionalState NewState);
459 void FLASH_OB_RDPConfig(uint8_t OB_RDP);
460 void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY);
461 void FLASH_OB_BORConfig(uint8_t OB_BOR);
462 void FLASH_OB_BootConfig(uint8_t OB_BOOT);
463 FLASH_Status FLASH_OB_Launch(void);
464 uint8_t FLASH_OB_GetUser(void);
465 uint16_t FLASH_OB_GetWRP(void);
466 uint16_t FLASH_OB_GetWRP1(void);
467 uint16_t FLASH_OB_GetPCROP(void);
468 uint16_t FLASH_OB_GetPCROP1(void);
469 FlagStatus FLASH_OB_GetRDP(void);
470 uint8_t FLASH_OB_GetBOR(void);
472 /* Interrupts and flags management functions **********************************/
473 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState);
474 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG);
475 void FLASH_ClearFlag(uint32_t FLASH_FLAG);
476 FLASH_Status FLASH_GetStatus(void);
477 FLASH_Status FLASH_WaitForLastOperation(void);
479 #ifdef __cplusplus
481 #endif
483 #endif /* __STM32F4xx_FLASH_H */
486 * @}
490 * @}
493 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/