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Move telemetry displayport init and cms device registering
[betaflight.git] / lib / main / STM32F4 / Drivers / STM32F4xx_StdPeriph_Driver / inc / stm32f4xx_i2c.h
blobdce42043cbbad6ff2a72b0d9140ad13532787d94
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_i2c.h
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 20-May-2016
7 * @brief This file contains all the functions prototypes for the I2C firmware
8 * library.
9 ******************************************************************************
10 * @attention
11 *
12 * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
13 *
14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
15 * You may not use this file except in compliance with the License.
16 * You may obtain a copy of the License at:
17 *
18 * http://www.st.com/software_license_agreement_liberty_v2
19 *
20 * Unless required by applicable law or agreed to in writing, software
21 * distributed under the License is distributed on an "AS IS" BASIS,
22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
23 * See the License for the specific language governing permissions and
24 * limitations under the License.
25 *
26 ******************************************************************************
27 */
28
29 /* Define to prevent recursive inclusion -------------------------------------*/
30 #ifndef __STM32F4xx_I2C_H
31 #define __STM32F4xx_I2C_H
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 /* Includes ------------------------------------------------------------------*/
38 #include "stm32f4xx.h"
39
40 /** @addtogroup STM32F4xx_StdPeriph_Driver
41 * @{
42 */
43
44 /** @addtogroup I2C
45 * @{
46 */
47
48 /* Exported types ------------------------------------------------------------*/
49
50 /**
51 * @brief I2C Init structure definition
52 */
53
54 typedef struct
55 {
56 uint32_t I2C_ClockSpeed; /*!< Specifies the clock frequency.
57 This parameter must be set to a value lower than 400kHz */
58
59 uint16_t I2C_Mode; /*!< Specifies the I2C mode.
60 This parameter can be a value of @ref I2C_mode */
61
62 uint16_t I2C_DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
63 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
64
65 uint16_t I2C_OwnAddress1; /*!< Specifies the first device own address.
66 This parameter can be a 7-bit or 10-bit address. */
67
68 uint16_t I2C_Ack; /*!< Enables or disables the acknowledgement.
69 This parameter can be a value of @ref I2C_acknowledgement */
70
71 uint16_t I2C_AcknowledgedAddress; /*!< Specifies if 7-bit or 10-bit address is acknowledged.
72 This parameter can be a value of @ref I2C_acknowledged_address */
73 }I2C_InitTypeDef;
74
75 /* Exported constants --------------------------------------------------------*/
76
77
78 /** @defgroup I2C_Exported_Constants
79 * @{
80 */
81 #define IS_I2C_ALL_PERIPH(PERIPH) (((PERIPH) == I2C1) || \
82 ((PERIPH) == I2C2) || \
83 ((PERIPH) == I2C3))
84 /** @defgroup I2C_Digital_Filter
85 * @{
86 */
87
88 #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000F)
89 /**
90 * @}
91 */
92
93
94 /** @defgroup I2C_mode
95 * @{
96 */
97
98 #define I2C_Mode_I2C ((uint16_t)0x0000)
99 #define I2C_Mode_SMBusDevice ((uint16_t)0x0002)
100 #define I2C_Mode_SMBusHost ((uint16_t)0x000A)
101 #define IS_I2C_MODE(MODE) (((MODE) == I2C_Mode_I2C) || \
102 ((MODE) == I2C_Mode_SMBusDevice) || \
103 ((MODE) == I2C_Mode_SMBusHost))
104 /**
105 * @}
106 */
107
108 /** @defgroup I2C_duty_cycle_in_fast_mode
109 * @{
110 */
111
112 #define I2C_DutyCycle_16_9 ((uint16_t)0x4000) /*!< I2C fast mode Tlow/Thigh = 16/9 */
113 #define I2C_DutyCycle_2 ((uint16_t)0xBFFF) /*!< I2C fast mode Tlow/Thigh = 2 */
114 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DutyCycle_16_9) || \
115 ((CYCLE) == I2C_DutyCycle_2))
116 /**
117 * @}
118 */
119
120 /** @defgroup I2C_acknowledgement
121 * @{
122 */
123
124 #define I2C_Ack_Enable ((uint16_t)0x0400)
125 #define I2C_Ack_Disable ((uint16_t)0x0000)
126 #define IS_I2C_ACK_STATE(STATE) (((STATE) == I2C_Ack_Enable) || \
127 ((STATE) == I2C_Ack_Disable))
128 /**
129 * @}
130 */
131
132 /** @defgroup I2C_transfer_direction
133 * @{
134 */
135
136 #define I2C_Direction_Transmitter ((uint8_t)0x00)
137 #define I2C_Direction_Receiver ((uint8_t)0x01)
138 #define IS_I2C_DIRECTION(DIRECTION) (((DIRECTION) == I2C_Direction_Transmitter) || \
139 ((DIRECTION) == I2C_Direction_Receiver))
140 /**
141 * @}
142 */
143
144 /** @defgroup I2C_acknowledged_address
145 * @{
146 */
147
148 #define I2C_AcknowledgedAddress_7bit ((uint16_t)0x4000)
149 #define I2C_AcknowledgedAddress_10bit ((uint16_t)0xC000)
150 #define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) (((ADDRESS) == I2C_AcknowledgedAddress_7bit) || \
151 ((ADDRESS) == I2C_AcknowledgedAddress_10bit))
152 /**
153 * @}
154 */
155
156 /** @defgroup I2C_registers
157 * @{
158 */
159
160 #define I2C_Register_CR1 ((uint8_t)0x00)
161 #define I2C_Register_CR2 ((uint8_t)0x04)
162 #define I2C_Register_OAR1 ((uint8_t)0x08)
163 #define I2C_Register_OAR2 ((uint8_t)0x0C)
164 #define I2C_Register_DR ((uint8_t)0x10)
165 #define I2C_Register_SR1 ((uint8_t)0x14)
166 #define I2C_Register_SR2 ((uint8_t)0x18)
167 #define I2C_Register_CCR ((uint8_t)0x1C)
168 #define I2C_Register_TRISE ((uint8_t)0x20)
169 #define IS_I2C_REGISTER(REGISTER) (((REGISTER) == I2C_Register_CR1) || \
170 ((REGISTER) == I2C_Register_CR2) || \
171 ((REGISTER) == I2C_Register_OAR1) || \
172 ((REGISTER) == I2C_Register_OAR2) || \
173 ((REGISTER) == I2C_Register_DR) || \
174 ((REGISTER) == I2C_Register_SR1) || \
175 ((REGISTER) == I2C_Register_SR2) || \
176 ((REGISTER) == I2C_Register_CCR) || \
177 ((REGISTER) == I2C_Register_TRISE))
178 /**
179 * @}
180 */
181
182 /** @defgroup I2C_NACK_position
183 * @{
184 */
185
186 #define I2C_NACKPosition_Next ((uint16_t)0x0800)
187 #define I2C_NACKPosition_Current ((uint16_t)0xF7FF)
188 #define IS_I2C_NACK_POSITION(POSITION) (((POSITION) == I2C_NACKPosition_Next) || \
189 ((POSITION) == I2C_NACKPosition_Current))
190 /**
191 * @}
192 */
193
194 /** @defgroup I2C_SMBus_alert_pin_level
195 * @{
196 */
197
198 #define I2C_SMBusAlert_Low ((uint16_t)0x2000)
199 #define I2C_SMBusAlert_High ((uint16_t)0xDFFF)
200 #define IS_I2C_SMBUS_ALERT(ALERT) (((ALERT) == I2C_SMBusAlert_Low) || \
201 ((ALERT) == I2C_SMBusAlert_High))
202 /**
203 * @}
204 */
205
206 /** @defgroup I2C_PEC_position
207 * @{
208 */
209
210 #define I2C_PECPosition_Next ((uint16_t)0x0800)
211 #define I2C_PECPosition_Current ((uint16_t)0xF7FF)
212 #define IS_I2C_PEC_POSITION(POSITION) (((POSITION) == I2C_PECPosition_Next) || \
213 ((POSITION) == I2C_PECPosition_Current))
214 /**
215 * @}
216 */
217
218 /** @defgroup I2C_interrupts_definition
219 * @{
220 */
221
222 #define I2C_IT_BUF ((uint16_t)0x0400)
223 #define I2C_IT_EVT ((uint16_t)0x0200)
224 #define I2C_IT_ERR ((uint16_t)0x0100)
225 #define IS_I2C_CONFIG_IT(IT) ((((IT) & (uint16_t)0xF8FF) == 0x00) && ((IT) != 0x00))
226 /**
227 * @}
228 */
229
230 /** @defgroup I2C_interrupts_definition
231 * @{
232 */
233
234 #define I2C_IT_SMBALERT ((uint32_t)0x01008000)
235 #define I2C_IT_TIMEOUT ((uint32_t)0x01004000)
236 #define I2C_IT_PECERR ((uint32_t)0x01001000)
237 #define I2C_IT_OVR ((uint32_t)0x01000800)
238 #define I2C_IT_AF ((uint32_t)0x01000400)
239 #define I2C_IT_ARLO ((uint32_t)0x01000200)
240 #define I2C_IT_BERR ((uint32_t)0x01000100)
241 #define I2C_IT_TXE ((uint32_t)0x06000080)
242 #define I2C_IT_RXNE ((uint32_t)0x06000040)
243 #define I2C_IT_STOPF ((uint32_t)0x02000010)
244 #define I2C_IT_ADD10 ((uint32_t)0x02000008)
245 #define I2C_IT_BTF ((uint32_t)0x02000004)
246 #define I2C_IT_ADDR ((uint32_t)0x02000002)
247 #define I2C_IT_SB ((uint32_t)0x02000001)
248
249 #define IS_I2C_CLEAR_IT(IT) ((((IT) & (uint16_t)0x20FF) == 0x00) && ((IT) != (uint16_t)0x00))
250
251 #define IS_I2C_GET_IT(IT) (((IT) == I2C_IT_SMBALERT) || ((IT) == I2C_IT_TIMEOUT) || \
252 ((IT) == I2C_IT_PECERR) || ((IT) == I2C_IT_OVR) || \
253 ((IT) == I2C_IT_AF) || ((IT) == I2C_IT_ARLO) || \
254 ((IT) == I2C_IT_BERR) || ((IT) == I2C_IT_TXE) || \
255 ((IT) == I2C_IT_RXNE) || ((IT) == I2C_IT_STOPF) || \
256 ((IT) == I2C_IT_ADD10) || ((IT) == I2C_IT_BTF) || \
257 ((IT) == I2C_IT_ADDR) || ((IT) == I2C_IT_SB))
258 /**
259 * @}
260 */
261
262 /** @defgroup I2C_flags_definition
263 * @{
264 */
265
266 /**
267 * @brief SR2 register flags
268 */
269
270 #define I2C_FLAG_DUALF ((uint32_t)0x00800000)
271 #define I2C_FLAG_SMBHOST ((uint32_t)0x00400000)
272 #define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000)
273 #define I2C_FLAG_GENCALL ((uint32_t)0x00100000)
274 #define I2C_FLAG_TRA ((uint32_t)0x00040000)
275 #define I2C_FLAG_BUSY ((uint32_t)0x00020000)
276 #define I2C_FLAG_MSL ((uint32_t)0x00010000)
277
278 /**
279 * @brief SR1 register flags
280 */
281
282 #define I2C_FLAG_SMBALERT ((uint32_t)0x10008000)
283 #define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000)
284 #define I2C_FLAG_PECERR ((uint32_t)0x10001000)
285 #define I2C_FLAG_OVR ((uint32_t)0x10000800)
286 #define I2C_FLAG_AF ((uint32_t)0x10000400)
287 #define I2C_FLAG_ARLO ((uint32_t)0x10000200)
288 #define I2C_FLAG_BERR ((uint32_t)0x10000100)
289 #define I2C_FLAG_TXE ((uint32_t)0x10000080)
290 #define I2C_FLAG_RXNE ((uint32_t)0x10000040)
291 #define I2C_FLAG_STOPF ((uint32_t)0x10000010)
292 #define I2C_FLAG_ADD10 ((uint32_t)0x10000008)
293 #define I2C_FLAG_BTF ((uint32_t)0x10000004)
294 #define I2C_FLAG_ADDR ((uint32_t)0x10000002)
295 #define I2C_FLAG_SB ((uint32_t)0x10000001)
296
297 #define IS_I2C_CLEAR_FLAG(FLAG) ((((FLAG) & (uint16_t)0x20FF) == 0x00) && ((FLAG) != (uint16_t)0x00))
298
299 #define IS_I2C_GET_FLAG(FLAG) (((FLAG) == I2C_FLAG_DUALF) || ((FLAG) == I2C_FLAG_SMBHOST) || \
300 ((FLAG) == I2C_FLAG_SMBDEFAULT) || ((FLAG) == I2C_FLAG_GENCALL) || \
301 ((FLAG) == I2C_FLAG_TRA) || ((FLAG) == I2C_FLAG_BUSY) || \
302 ((FLAG) == I2C_FLAG_MSL) || ((FLAG) == I2C_FLAG_SMBALERT) || \
303 ((FLAG) == I2C_FLAG_TIMEOUT) || ((FLAG) == I2C_FLAG_PECERR) || \
304 ((FLAG) == I2C_FLAG_OVR) || ((FLAG) == I2C_FLAG_AF) || \
305 ((FLAG) == I2C_FLAG_ARLO) || ((FLAG) == I2C_FLAG_BERR) || \
306 ((FLAG) == I2C_FLAG_TXE) || ((FLAG) == I2C_FLAG_RXNE) || \
307 ((FLAG) == I2C_FLAG_STOPF) || ((FLAG) == I2C_FLAG_ADD10) || \
308 ((FLAG) == I2C_FLAG_BTF) || ((FLAG) == I2C_FLAG_ADDR) || \
309 ((FLAG) == I2C_FLAG_SB))
310 /**
311 * @}
312 */
313
314 /** @defgroup I2C_Events
315 * @{
316 */
317
318 /**
319 ===============================================================================
320 I2C Master Events (Events grouped in order of communication)
321 ===============================================================================
322 */
323
324 /**
325 * @brief Communication start
326 *
327 * After sending the START condition (I2C_GenerateSTART() function) the master
328 * has to wait for this event. It means that the Start condition has been correctly
329 * released on the I2C bus (the bus is free, no other devices is communicating).
330 *
331 */
332 /* --EV5 */
333 #define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */
334
335 /**
336 * @brief Address Acknowledge
337 *
338 * After checking on EV5 (start condition correctly released on the bus), the
339 * master sends the address of the slave(s) with which it will communicate
340 * (I2C_Send7bitAddress() function, it also determines the direction of the communication:
341 * Master transmitter or Receiver). Then the master has to wait that a slave acknowledges
342 * his address. If an acknowledge is sent on the bus, one of the following events will
343 * be set:
344 *
345 * 1) In case of Master Receiver (7-bit addressing): the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED
346 * event is set.
347 *
348 * 2) In case of Master Transmitter (7-bit addressing): the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED
349 * is set
350 *
351 * 3) In case of 10-Bit addressing mode, the master (just after generating the START
352 * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData()
353 * function). Then master should wait on EV9. It means that the 10-bit addressing
354 * header has been correctly sent on the bus. Then master should send the second part of
355 * the 10-bit address (LSB) using the function I2C_Send7bitAddress(). Then master
356 * should wait for event EV6.
357 *
358 */
359
360 /* --EV6 */
361 #define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */
362 #define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */
363 /* --EV9 */
364 #define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */
365
366 /**
367 * @brief Communication events
368 *
369 * If a communication is established (START condition generated and slave address
370 * acknowledged) then the master has to check on one of the following events for
371 * communication procedures:
372 *
373 * 1) Master Receiver mode: The master has to wait on the event EV7 then to read
374 * the data received from the slave (I2C_ReceiveData() function).
375 *
376 * 2) Master Transmitter mode: The master has to send data (I2C_SendData()
377 * function) then to wait on event EV8 or EV8_2.
378 * These two events are similar:
379 * - EV8 means that the data has been written in the data register and is
380 * being shifted out.
381 * - EV8_2 means that the data has been physically shifted out and output
382 * on the bus.
383 * In most cases, using EV8 is sufficient for the application.
384 * Using EV8_2 leads to a slower communication but ensure more reliable test.
385 * EV8_2 is also more suitable than EV8 for testing on the last data transmission
386 * (before Stop condition generation).
387 *
388 * @note In case the user software does not guarantee that this event EV7 is
389 * managed before the current byte end of transfer, then user may check on EV7
390 * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)).
391 * In this case the communication may be slower.
392 *
393 */
394
395 /* Master RECEIVER mode -----------------------------*/
396 /* --EV7 */
397 #define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */
398
399 /* Master TRANSMITTER mode --------------------------*/
400 /* --EV8 */
401 #define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */
402 /* --EV8_2 */
403 #define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */
404
405
406 /**
407 ===============================================================================
408 I2C Slave Events (Events grouped in order of communication)
409 ===============================================================================
410 */
411
412
413 /**
414 * @brief Communication start events
415 *
416 * Wait on one of these events at the start of the communication. It means that
417 * the I2C peripheral detected a Start condition on the bus (generated by master
418 * device) followed by the peripheral address. The peripheral generates an ACK
419 * condition on the bus (if the acknowledge feature is enabled through function
420 * I2C_AcknowledgeConfig()) and the events listed above are set :
421 *
422 * 1) In normal case (only one address managed by the slave), when the address
423 * sent by the master matches the own address of the peripheral (configured by
424 * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set
425 * (where XXX could be TRANSMITTER or RECEIVER).
426 *
427 * 2) In case the address sent by the master matches the second address of the
428 * peripheral (configured by the function I2C_OwnAddress2Config() and enabled
429 * by the function I2C_DualAddressCmd()) the events I2C_EVENT_SLAVE_XXX_SECONDADDRESS_MATCHED
430 * (where XXX could be TRANSMITTER or RECEIVER) are set.
431 *
432 * 3) In case the address sent by the master is General Call (address 0x00) and
433 * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd())
434 * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED.
435 *
436 */
437
438 /* --EV1 (all the events below are variants of EV1) */
439 /* 1) Case of One Single Address managed by the slave */
440 #define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */
441 #define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
442
443 /* 2) Case of Dual address managed by the slave */
444 #define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */
445 #define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */
446
447 /* 3) Case of General Call enabled for the slave */
448 #define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */
449
450 /**
451 * @brief Communication events
452 *
453 * Wait on one of these events when EV1 has already been checked and:
454 *
455 * - Slave RECEIVER mode:
456 * - EV2: When the application is expecting a data byte to be received.
457 * - EV4: When the application is expecting the end of the communication: master
458 * sends a stop condition and data transmission is stopped.
459 *
460 * - Slave Transmitter mode:
461 * - EV3: When a byte has been transmitted by the slave and the application is expecting
462 * the end of the byte transmission. The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and
463 * I2C_EVENT_SLAVE_BYTE_TRANSMITTING are similar. The second one can optionally be
464 * used when the user software doesn't guarantee the EV3 is managed before the
465 * current byte end of transfer.
466 * - EV3_2: When the master sends a NACK in order to tell slave that data transmission
467 * shall end (before sending the STOP condition). In this case slave has to stop sending
468 * data bytes and expect a Stop condition on the bus.
469 *
470 * @note In case the user software does not guarantee that the event EV2 is
471 * managed before the current byte end of transfer, then user may check on EV2
472 * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)).
473 * In this case the communication may be slower.
474 *
475 */
476
477 /* Slave RECEIVER mode --------------------------*/
478 /* --EV2 */
479 #define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */
480 /* --EV4 */
481 #define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */
482
483 /* Slave TRANSMITTER mode -----------------------*/
484 /* --EV3 */
485 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */
486 #define I2C_EVENT_SLAVE_BYTE_TRANSMITTING ((uint32_t)0x00060080) /* TRA, BUSY and TXE flags */
487 /* --EV3_2 */
488 #define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */
489
490 /*
491 ===============================================================================
492 End of Events Description
493 ===============================================================================
494 */
495
496 #define IS_I2C_EVENT(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
497 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
498 ((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
499 ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
500 ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
501 ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
502 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_DUALF)) || \
503 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_GENCALL)) || \
504 ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
505 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_DUALF)) || \
506 ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | I2C_FLAG_GENCALL)) || \
507 ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \
508 ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \
509 ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
510 ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
511 ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
512 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
513 ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \
514 ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
515 ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE))
516 /**
517 * @}
518 */
519
520 /** @defgroup I2C_own_address1
521 * @{
522 */
523
524 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x3FF)
525 /**
526 * @}
527 */
528
529 /** @defgroup I2C_clock_speed
530 * @{
531 */
532
533 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) >= 0x1) && ((SPEED) <= 400000))
534 /**
535 * @}
536 */
537
538 /**
539 * @}
540 */
541
542 /* Exported macro ------------------------------------------------------------*/
543 /* Exported functions --------------------------------------------------------*/
544
545 /* Function used to set the I2C configuration to the default reset state *****/
546 void I2C_DeInit(I2C_TypeDef* I2Cx);
547
548 /* Initialization and Configuration functions *********************************/
549 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
550 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
551 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
552 void I2C_DigitalFilterConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DigitalFilter);
553 void I2C_AnalogFilterCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
554 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
555 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
556 void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, uint8_t Address, uint8_t I2C_Direction);
557 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
558 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint8_t Address);
559 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
560 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
561 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
562 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
563 void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, uint16_t I2C_DutyCycle);
564 void I2C_NACKPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_NACKPosition);
565 void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, uint16_t I2C_SMBusAlert);
566 void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
567
568 /* Data transfers functions ***************************************************/
569 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data);
570 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx);
571
572 /* PEC management functions ***************************************************/
573 void I2C_TransmitPEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
574 void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, uint16_t I2C_PECPosition);
575 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
576 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx);
577
578 /* DMA transfers management functions *****************************************/
579 void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
580 void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
581
582 /* Interrupts, events and flags management functions **************************/
583 uint16_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register);
584 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint16_t I2C_IT, FunctionalState NewState);
585
586 /*
587 ===============================================================================
588 I2C State Monitoring Functions
589 ===============================================================================
590 This I2C driver provides three different ways for I2C state monitoring
591 depending on the application requirements and constraints:
592
593
594 1. Basic state monitoring (Using I2C_CheckEvent() function)
595 -----------------------------------------------------------
596 It compares the status registers (SR1 and SR2) content to a given event
597 (can be the combination of one or more flags).
598 It returns SUCCESS if the current status includes the given flags
599 and returns ERROR if one or more flags are missing in the current status.
600
601 - When to use
602 - This function is suitable for most applications as well as for startup
603 activity since the events are fully described in the product reference
604 manual (RM0090).
605 - It is also suitable for users who need to define their own events.
606
607 - Limitations
608 - If an error occurs (ie. error flags are set besides to the monitored
609 flags), the I2C_CheckEvent() function may return SUCCESS despite
610 the communication hold or corrupted real state.
611 In this case, it is advised to use error interrupts to monitor
612 the error events and handle them in the interrupt IRQ handler.
613
614 Note
615 For error management, it is advised to use the following functions:
616 - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR).
617 - I2Cx_ER_IRQHandler() which is called when the error interrupt occurs.
618 Where x is the peripheral instance (I2C1, I2C2 ...)
619 - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the
620 I2Cx_ER_IRQHandler() function in order to determine which error occurred.
621 - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd()
622 and/or I2C_GenerateStop() in order to clear the error flag and source
623 and return to correct communication status.
624
625
626 2. Advanced state monitoring (Using the function I2C_GetLastEvent())
627 --------------------------------------------------------------------
628 Using the function I2C_GetLastEvent() which returns the image of both status
629 registers in a single word (uint32_t) (Status Register 2 value is shifted left
630 by 16 bits and concatenated to Status Register 1).
631
632 - When to use
633 - This function is suitable for the same applications above but it
634 allows to overcome the mentioned limitation of I2C_GetFlagStatus()
635 function.
636 - The returned value could be compared to events already defined in
637 this file or to custom values defined by user.
638 This function is suitable when multiple flags are monitored at the
639 same time.
640 - At the opposite of I2C_CheckEvent() function, this function allows
641 user to choose when an event is accepted (when all events flags are
642 set and no other flags are set or just when the needed flags are set
643 like I2C_CheckEvent() function.
644
645 - Limitations
646 - User may need to define his own events.
647 - Same remark concerning the error management is applicable for this
648 function if user decides to check only regular communication flags
649 (and ignores error flags).
650
651
652 3. Flag-based state monitoring (Using the function I2C_GetFlagStatus())
653 -----------------------------------------------------------------------
654
655 Using the function I2C_GetFlagStatus() which simply returns the status of
656 one single flag (ie. I2C_FLAG_RXNE ...).
657
658 - When to use
659 - This function could be used for specific applications or in debug
660 phase.
661 - It is suitable when only one flag checking is needed (most I2C
662 events are monitored through multiple flags).
663 - Limitations:
664 - When calling this function, the Status register is accessed.
665 Some flags are cleared when the status register is accessed.
666 So checking the status of one Flag, may clear other ones.
667 - Function may need to be called twice or more in order to monitor
668 one single event.
669 */
670
671 /*
672 ===============================================================================
673 1. Basic state monitoring
674 ===============================================================================
675 */
676 ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, uint32_t I2C_EVENT);
677 /*
678 ===============================================================================
679 2. Advanced state monitoring
680 ===============================================================================
681 */
682 uint32_t I2C_GetLastEvent(I2C_TypeDef* I2Cx);
683 /*
684 ===============================================================================
685 3. Flag-based state monitoring
686 ===============================================================================
687 */
688 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
689
690
691 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG);
692 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
693 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT);
694
695 #ifdef __cplusplus
696 }
697 #endif
698
699 #endif /*__STM32F4xx_I2C_H */
700
701 /**
702 * @}
703 */
704
705 /**
706 * @}
707 */
708
709 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/