lib/main/STM32F4/Drivers/STM32F4xx_StdPeriph_Driver/src/misc.c

   1 /**
   2   ******************************************************************************
   3   * @file    misc.c
   4   * @author  MCD Application Team
   5   * @version V1.7.1
   6   * @date    20-May-2016
   7   * @brief   This file provides all the miscellaneous firmware functions (add-on
   8   *          to CMSIS functions).
   9   *
  10   *  @verbatim
  11   *
  12   *          ===================================================================
  13   *                        How to configure Interrupts using driver
  14   *          ===================================================================
  15   *
  16   *            This section provide functions allowing to configure the NVIC interrupts (IRQ).
  17   *            The Cortex-M4 exceptions are managed by CMSIS functions.
  18   *
  19   *            1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
  20   *                function according to the following table.
  21
  22   *  The table below gives the allowed values of the pre-emption priority and subpriority according
  23   *  to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
  24   *    ==========================================================================================================================
  25   *      NVIC_PriorityGroup   | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority  |       Description
  26   *    ==========================================================================================================================
  27   *     NVIC_PriorityGroup_0  |                0                  |            0-15             | 0 bits for pre-emption priority
  28   *                           |                                   |                             | 4 bits for subpriority
  29   *    --------------------------------------------------------------------------------------------------------------------------
  30   *     NVIC_PriorityGroup_1  |                0-1                |            0-7              | 1 bits for pre-emption priority
  31   *                           |                                   |                             | 3 bits for subpriority
  32   *    --------------------------------------------------------------------------------------------------------------------------
  33   *     NVIC_PriorityGroup_2  |                0-3                |            0-3              | 2 bits for pre-emption priority
  34   *                           |                                   |                             | 2 bits for subpriority
  35   *    --------------------------------------------------------------------------------------------------------------------------
  36   *     NVIC_PriorityGroup_3  |                0-7                |            0-1              | 3 bits for pre-emption priority
  37   *                           |                                   |                             | 1 bits for subpriority
  38   *    --------------------------------------------------------------------------------------------------------------------------
  39   *     NVIC_PriorityGroup_4  |                0-15               |            0                | 4 bits for pre-emption priority
  40   *                           |                                   |                             | 0 bits for subpriority
  41   *    ==========================================================================================================================
  42   *
  43   *            2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init()
  44   *
  45   * @note  When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
  46   *        The pending IRQ priority will be managed only by the subpriority.
  47   *
  48   * @note  IRQ priority order (sorted by highest to lowest priority):
  49   *         - Lowest pre-emption priority
  50   *         - Lowest subpriority
  51   *         - Lowest hardware priority (IRQ number)
  52   *
  53   *  @endverbatim
  54   *
  55   ******************************************************************************
  56   * @attention
  57   *
  58   * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
  59   *
  60   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  61   * You may not use this file except in compliance with the License.
  62   * You may obtain a copy of the License at:
  63   *
  64   *        http://www.st.com/software_license_agreement_liberty_v2
  65   *
  66   * Unless required by applicable law or agreed to in writing, software
  67   * distributed under the License is distributed on an "AS IS" BASIS,
  68   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  69   * See the License for the specific language governing permissions and
  70   * limitations under the License.
  71   *
  72   ******************************************************************************
  73   */
  74
  75 /* Includes ------------------------------------------------------------------*/
  76 #include "misc.h"
  77
  78 /** @addtogroup STM32F4xx_StdPeriph_Driver
  79   * @{
  80   */
  81
  82 /** @defgroup MISC
  83   * @brief MISC driver modules
  84   * @{
  85   */
  86
  87 /* Private typedef -----------------------------------------------------------*/
  88 /* Private define ------------------------------------------------------------*/
  89 #define AIRCR_VECTKEY_MASK    ((uint32_t)0x05FA0000)
  90
  91 /* Private macro -------------------------------------------------------------*/
  92 /* Private variables ---------------------------------------------------------*/
  93 /* Private function prototypes -----------------------------------------------*/
  94 /* Private functions ---------------------------------------------------------*/
  95
  96 /** @defgroup MISC_Private_Functions
  97   * @{
  98   */
  99
 100 /**
 101   * @brief  Configures the priority grouping: pre-emption priority and subpriority.
 102   * @param  NVIC_PriorityGroup: specifies the priority grouping bits length.
 103   *   This parameter can be one of the following values:
 104   *     @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
 105   *                                4 bits for subpriority
 106   *     @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
 107   *                                3 bits for subpriority
 108   *     @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
 109   *                                2 bits for subpriority
 110   *     @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
 111   *                                1 bits for subpriority
 112   *     @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
 113   *                                0 bits for subpriority
 114   * @note   When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
 115   *         The pending IRQ priority will be managed only by the subpriority.
 116   * @retval None
 117   */
 118 void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
 119 {
 120   /* Check the parameters */
 121   assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
 122
 123   /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
 124   SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
 125 }
 126
 127 /**
 128   * @brief  Initializes the NVIC peripheral according to the specified
 129   *         parameters in the NVIC_InitStruct.
 130   * @note   To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
 131   *         function should be called before.
 132   * @param  NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
 133   *         the configuration information for the specified NVIC peripheral.
 134   * @retval None
 135   */
 136 void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
 137 {
 138   uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
 139
 140   /* Check the parameters */
 141   assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd));
 142   assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
 143   assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
 144
 145   if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
 146   {
 147     /* Compute the Corresponding IRQ Priority --------------------------------*/
 148     tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
 149     tmppre = (0x4 - tmppriority);
 150     tmpsub = tmpsub >> tmppriority;
 151
 152     tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
 153     tmppriority |=  (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub);
 154
 155     tmppriority = tmppriority << 0x04;
 156
 157     NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
 158
 159     /* Enable the Selected IRQ Channels --------------------------------------*/
 160     NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
 161       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
 162   }
 163   else
 164   {
 165     /* Disable the Selected IRQ Channels -------------------------------------*/
 166     NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
 167       (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
 168   }
 169 }
 170
 171 /**
 172   * @brief  Sets the vector table location and Offset.
 173   * @param  NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
 174   *   This parameter can be one of the following values:
 175   *     @arg NVIC_VectTab_RAM: Vector Table in internal SRAM.
 176   *     @arg NVIC_VectTab_FLASH: Vector Table in internal FLASH.
 177   * @param  Offset: Vector Table base offset field. This value must be a multiple of 0x200.
 178   * @retval None
 179   */
 180 void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
 181 {
 182   /* Check the parameters */
 183   assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
 184   assert_param(IS_NVIC_OFFSET(Offset));
 185
 186   SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
 187 }
 188
 189 /**
 190   * @brief  Selects the condition for the system to enter low power mode.
 191   * @param  LowPowerMode: Specifies the new mode for the system to enter low power mode.
 192   *   This parameter can be one of the following values:
 193   *     @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
 194   *     @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
 195   *     @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
 196   * @param  NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
 197   * @retval None
 198   */
 199 void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
 200 {
 201   /* Check the parameters */
 202   assert_param(IS_NVIC_LP(LowPowerMode));
 203   assert_param(IS_FUNCTIONAL_STATE(NewState));
 204
 205   if (NewState != DISABLE)
 206   {
 207     SCB->SCR |= LowPowerMode;
 208   }
 209   else
 210   {
 211     SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
 212   }
 213 }
 214
 215 /**
 216   * @brief  Configures the SysTick clock source.
 217   * @param  SysTick_CLKSource: specifies the SysTick clock source.
 218   *   This parameter can be one of the following values:
 219   *     @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
 220   *     @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
 221   * @retval None
 222   */
 223 void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
 224 {
 225   /* Check the parameters */
 226   assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource));
 227   if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
 228   {
 229     SysTick->CTRL |= SysTick_CLKSource_HCLK;
 230   }
 231   else
 232   {
 233     SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8;
 234   }
 235 }
 236
 237 /**
 238   * @}
 239   */
 240
 241 /**
 242   * @}
 243   */
 244
 245 /**
 246   * @}
 247   */
 248
 249 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/