Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.
[binutils-gdb.git] / ld / testsuite / ld-tic6x / pcrel-reloc-global-rel.d
blobcf564e96e9a6168ef78ebe1e98088d5f5fecf860
1 #name: C6X PC-relative relocations, global symbols, REL
2 #as: -mlittle-endian -mgenerate-rel
3 #ld: -melf32_tic6x_le -Tgeneric.ld --defsym s7a=0x0fffff00 --defsym s7b=0x100000fc --defsym s10a=0x0ffff800 --defsym s10b=0x100007fc --defsym s12a=0x0fffe000 --defsym s12b=0x10001ffc --defsym s21a=0x0fc00000 --defsym s21b=0x103ffffc
4 #source: pcrel-reloc-global.s
5 #objdump: -dr
7 .*: *file format elf32-tic6x-le
10 Disassembly of section \.text:
12 10000000 <[^>]*>:
13 10000000:[ \t]+00c00162[ \t]+addkpc \.S2 fffff00 <[^>]*>,b1,0
14 10000004:[ \t]+00bf0162[ \t]+addkpc \.S2 100000fc <[^>]*>,b1,0
15 10000008:[ \t]+08000012[ \t]+b \.S2 fc00000 <[^>]*>
16 1000000c:[ \t]+07ffff92[ \t]+b \.S2 103ffffc <[^>]*>
17 10000010:[ \t]+00c01022[ \t]+bdec \.S2 ffff800 <[^>]*>,b1
18 10000014:[ \t]+00bff022[ \t]+bdec \.S2 100007fc <[^>]*>,b1
19 10000018:[ \t]+08000122[ \t]+bnop \.S2 fffe000 <[^>]*>,0
20 1000001c:[ \t]+07ff0122[ \t]+bnop \.S2 10001ffc <[^>]*>,0