Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.
[binutils-gdb.git] / ld / testsuite / ld-x86-64 / mpx4.dd
blob0cf0f75898b6875d6cc4d52626492484293a6699
1 .*: +file format .*
4 Disassembly of section .plt:
6 0+400260 <.plt>:
7 [       ]*[a-f0-9]+:    ff 35 42 01 20 00       pushq  0x200142\(%rip\)        # 6003a8 <_GLOBAL_OFFSET_TABLE_\+0x8>
8 [       ]*[a-f0-9]+:    f2 ff 25 43 01 20 00    bnd jmpq \*0x200143\(%rip\)        # 6003b0 <_GLOBAL_OFFSET_TABLE_\+0x10>
9 [       ]*[a-f0-9]+:    0f 1f 00                nopl   \(%rax\)
10 [       ]*[a-f0-9]+:    68 00 00 00 00          pushq  \$0x0
11 [       ]*[a-f0-9]+:    f2 e9 e5 ff ff ff       bnd jmpq 400260 <call1@plt-0x20>
12 [       ]*[a-f0-9]+:    0f 1f 44 00 00          nopl   0x0\(%rax,%rax,1\)
14 Disassembly of section .plt.bnd:
16 0+400280 <call1@plt>:
17 [       ]*[a-f0-9]+:    f2 ff 25 31 01 20 00    bnd jmpq \*0x200131\(%rip\)        # 6003b8 <_GLOBAL_OFFSET_TABLE_\+0x18>
18 [       ]*[a-f0-9]+:    90                      nop
20 Disassembly of section .text:
22 0+400288 <_start>:
23 [       ]*[a-f0-9]+:    bf 80 02 40 00          mov    \$0x400280,%edi
24 [       ]*[a-f0-9]+:    f2 ff d7                bnd callq \*%rdi