| blob | 8a359628ccef985732eb5e15930e0addcf934fcc |
1 start-sanitize-tx3904
3 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
4 interrupt level number to match changed SignalExceptionInterrupt
5 macro.
7 end-sanitize-tx3904
8 start-sanitize-sky
9 Thu Oct 29 12:47:46 1998 Frank Ch. Eigler <fche@cygnus.com>
11 * sim-main.c (tlb_try_match): Include physical address in
12 scratchpad non-mapping warning.
14 end-sanitize-sky
15 start-sanitize-r5900
16 Thu Oct 29 11:06:30 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
18 * r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
19 as per customer patch.
21 end-sanitize-r5900
22 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
24 * interp.c: #include "itable.h" if WITH_IGEN.
25 (get_insn_name): New function.
26 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
27 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
29 start-sanitize-sky
30 Tue Sep 22 10:35:37 1998 Frank Ch. Eigler <fche@cygnus.com>
32 * sim-main.c (tlb_try_match): Specially match virtual
33 pages mapped to scratchpad RAM, an unimplemented feature.
35 end-sanitize-sky
36 start-sanitize-r5900
37 Fri Sep 18 11:31:16 1998 Frank Ch. Eigler <fche@cygnus.com>
39 * r5900.igen (prot3w): Correct rotation sequence; patch
40 from customer.
42 end-sanitize-r5900
43 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
45 * configure: Rebuilt to inhale new common/aclocal.m4.
47 start-sanitize-r5900
48 Thu Sep 10 11:50:54 1998 Doug Evans <devans@canuck.cygnus.com>
50 * r5900.igen (plzcw): Make `i' signed.
52 Wed Sep 9 15:02:10 1998 Doug Evans <devans@canuck.cygnus.com>
54 * sim-main.h (COP0_COUNT,COP0_COMPARE,status_IM7): New macros.
55 * sky-engine.c (cpu_issue): Increment COP0_COUNT and signal an
56 interrupt if == COP0_COMPARE and interrupt masks/enables allow it.
57 * interp.c (signal_exception, sky version): Handle INT 2.
59 Wed Sep 9 11:28:20 1998 Ron Unrau <runrau@cygnus.com>
61 * sim-main.h: track COP0 registers
62 * interp.c (sim_{fetch,store}_register): read/write COP0 registers
64 Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com>
66 * r5900.igen (mtsab): Correct typo in input register.
68 * sim-main.h (TMP_*): New macros for accessing local 128-bit
69 temporary for multimedia instructions.
70 * r5900.igen (*): Convert most instructions to use new TMP
71 macros to store output result during computation.
73 end-sanitize-r5900
74 start-sanitize-tx3904
75 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
77 * dv-tx3904sio.c: Include sim-assert.h.
79 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
81 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
82 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
83 Reorganize target-specific sim-hardware checks.
84 * configure: rebuilt.
85 * interp.c (sim_open): For tx39 target boards, set
86 OPERATING_ENVIRONMENT, add tx3904sio devices.
87 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
88 ROM executables. Install dv-sockser into sim-modules list.
90 * dv-tx3904irc.c: Compiler warning clean-up.
91 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
92 frequent hw-trace messages.
94 end-sanitize-tx3904
95 start-sanitize-sky
96 Tue Aug 11 13:52:16 1998 Frank Ch. Eigler <fche@cygnus.com>
98 * interp.c (signal_exception): Set IP3 bit in CAUSE on
99 sky interrupt.
101 end-sanitize-sky
102 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
104 * vr.igen (MulAcc): Identify as a vr4100 specific function.
106 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
108 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
110 * vr.igen: New file.
111 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
112 * mips.igen: Define vr4100 model. Include vr.igen.
113 start-sanitize-cygnus
114 * vr5400.igen: Move instructions to vr.igen
115 * Makefile.in (IGEN_INCLUDE): Remove vr5400.igen.
116 end-sanitize-cygnus
117 start-sanitize-vr4320
118 * vr4320.igen: Move instructions to vr.igen.
119 * Makefile.in (IGEN_INCLUDE): Remove vr5320.igen.
121 end-sanitize-vr4320
122 start-sanitize-sky
123 Fri Jul 24 16:01:03 1998 Ian Carmichael <iancarm@cygnus.com>
125 * interp.c (MONITOR_SIZE): Make 1MB monitor for SKY.
126 * mips.igen (BREAK): Fix 0xffff2 monitor call. Slightly less
127 confusing message if not enough --load-next options appear.
129 * sky-pke.h (VUx_MEMx_SRCADDR_START): Move to 0x19800000 range.
130 * sim-main.c (GDB_COMM_AREA): Move to 0x19810000.
131 * sky-gdb.c (init_fifo_bp_cache): Use VIO_BASE when reading GDB area.
132 (resume_handler): Same.
133 (suspend_handler): Same.
135 Wed Jul 22 13:04:13 1998 Frank Ch. Eigler <fche@cygnus.com>
137 * mips.igen (break): Implement LOAD_INSTRUCTION ("break 0xffff1")
138 to trigger multi-phase load.
140 * sim-main.c: Include sim-assert.h for ASSERT macro.
141 * sim-main.h (PRINTF_INSTRUCTION): Correct bit pattern for
142 "break 0xffff2".
144 Tue Jul 21 18:37:36 1998 Ian Carmichael <iancarm@cygnus.com>
146 MMU support.
147 * interp.c (sim_open): Initialize TLB.
148 * interp.c (signal_exceptions): New 5900 handling.
149 * r5900.igen (TLBWR, TLBWI, TLBR, TLBP): Make these work.
150 * sim-main.c (tlb_try_match, tlb_lookup): New functions.
151 (address_translation): Use the TLB.
152 * sim-main.h (r4000_tlb_entry_t): New type.
153 (TLB_*): New constants.
154 (COP0_*): New register names.
156 Sky character I/O device.
157 * sky-psio.c: New file.
158 * sky-psio.h: New file.
159 * Makefile.in: Add sky-psio.o.
161 end-sanitize-sky
162 start-sanitize-r5900
163 Tue Jul 14 16:10:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
165 * r5900.igen (r59fp_overflow): Replace argument ANS with argument
166 SIGN_P.
167 (r59fp_zero): Ditto.
168 (r59fp_store): Update calls.
169 (DIV.S): Compute 0/0 sign from inputs. Ditto for X/0.
171 end-sanitize-r5900
172 start-sanitize-branchbug4011
173 Mon Jun 29 09:31:27 1998 Gavin Koch <gavin@cygnus.com>
175 * interp.c (OPTION_BRANCH_BUG_4011): Add.
176 (mips_option_handler): Handle OPTION_BRANCH_BUG_4011.
177 (mips_options): Define the option.
178 * mips.igen (check_4011_branch_bug): New.
179 (mark_4011_branch_bug): New.
180 (all branch insn): Call mark_branch_bug, and check_branch_bug.
181 * sim-main.h (branchbug4011_option, branchbug4011_last_target,
182 branchbug4011_last_cia, BRANCHBUG4011_OPTION,
183 BRANCHBUG4011_LAST_TARGET, BRANCHBUG4011_LAST_CIA,
184 check_branch_bug, mark_branch_bug): Define.
186 end-sanitize-branchbug4011
187 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
189 * mips.igen (check_mf_hilo): Correct check.
191 start-sanitize-r5900
192 Fri Jun 19 14:44:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
194 * sim-main.h (NR_COP0_GPR, COP0_GPR, cop0_gpr, NR_COP0_BP,
195 COP0_BP, cop0_bp, NR_COP0_P, COP0_P, cop0_p): Add 32 COP0 general
196 purpose registers, add 8 COP0 break-point registers, add 64 COP0
197 performance registers.
199 * interp.c (decode_coproc): Accept any MTC0/MFC0, MTBP/MFBP, MTP*
200 MFP* instructions. Just transfer value to/from corresponding
201 register.
203 * r5900.igen (BC0F, BC0FL, BC0T, BC0TL): Implement, assume COP0
204 status is always true.
205 (CACHE, TLBP, TPGWI, TLBWR): Treat as NOP.
206 (EI, DI): Set/clear Status-EIE bit.
208 end-sanitize-r5900
209 start-sanitize-sky
210 Fri Jun 19 14:44:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
212 * mips.igen (BC0F, BC0FL, BC0T, BC0TL): Move to sky code to
213 r5900.igen.
215 end-sanitize-sky
216 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
218 start-sanitize-sky
219 * sky-vu.c (vu0_read_cop2_register, vu0_write_cop2_register): Call
220 ASSERT not assert.
221 * sky-gdb.c: Include "sim-assert.h".
223 end-sanitize-sky
224 * sim-main.h (interrupt_event): Add prototype.
226 start-sanitize-tx3904
227 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
228 register_ptr, register_value.
229 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
231 end-sanitize-tx3904
232 * sim-main.h (tracefh): Make extern.
234 start-sanitize-tx3904
235 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
237 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
238 Reduce unnecessarily high timer event frequency.
239 * dv-tx3904cpu.c: Ditto for interrupt event.
241 end-sanitize-tx3904
242 start-sanitize-sky
243 Tue Jun 16 14:12:09 1998 Frank Ch. Eigler <fche@cygnus.com>
245 * interp.c (decode_coproc): Removed COP2 branches.
246 * r5900.igen: Moved COP2 branch instructions here.
247 * mips.igen: Restricted COPz == COP2 bit pattern to
248 exclude COP2 branches.
250 end-sanitize-sky
251 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
253 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
254 to allay warnings.
255 (interrupt_event): Made non-static.
256 start-sanitize-tx3904
258 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
259 interchange of configuration values for external vs. internal
260 clock dividers.
261 end-sanitize-tx3904
263 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
265 * mips.igen (BREAK): Moved code to here for
266 simulator-reserved break instructions.
267 * gencode.c (build_instruction): Ditto.
268 * interp.c (signal_exception): Code moved from here. Non-
269 reserved instructions now use exception vector, rather
270 than halting sim.
271 * sim-main.h: Moved magic constants to here.
273 start-sanitize-tx3904
274 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
276 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
277 register upon non-zero interrupt event level, clear upon zero
278 event value.
279 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
280 by passing zero event value.
281 (*_io_{read,write}_buffer): Endianness fixes.
282 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
283 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
285 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
286 serial I/O and timer module at base address 0xFFFF0000.
288 end-sanitize-tx3904
289 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
291 * mips.igen (SWC1) : Correct the handling of ReverseEndian
292 and BigEndianCPU.
294 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
296 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
297 parts.
298 * configure: Update.
300 start-sanitize-tx3904
301 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
303 * dv-tx3904tmr.c: New file - implements tx3904 timer.
304 * dv-tx3904{irc,cpu}.c: Mild reformatting.
305 * configure.in: Include tx3904tmr in hw_device list.
306 * configure: Rebuilt.
307 * interp.c (sim_open): Instantiate three timer instances.
308 Fix address typo of tx3904irc instance.
310 end-sanitize-tx3904
311 start-sanitize-r5900
312 Thu Jun 4 16:47:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
314 * mips.igen (check_mt_hilo): 2.1 of r5900 spec stalls for HILO.
315 Select corresponding check_mt_hilo function.
316 (check_mult_hilo, check_div_hilo, check_mf_hilo, check_mt_hilo):
317 Ditto.
319 * r5900.igen (check_mult_hilo_hi1lo1, check_div_hilo_hi1lo1): Mark
320 as r5900 specific.
322 end-sanitize-r5900
323 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
325 * interp.c (signal_exception): SystemCall exception now uses
326 the exception vector.
328 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
330 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
331 to allay warnings.
333 start-sanitize-r5900
334 Mon Jun 1 10:28:25 1998 Jeffrey A Law (law@cygnus.com)
336 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
337 (sqrt.s): Likewise.
339 end-sanitize-r5900
340 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
342 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
344 start-sanitize-tx3904
345 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
347 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
349 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
350 sim-main.h. Declare a struct hw_descriptor instead of struct
351 hw_device_descriptor.
353 end-sanitize-tx3904
354 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
356 * mips.igen (do_store_left, do_load_left): Compute nr of left and
357 right bits and then re-align left hand bytes to correct byte
358 lanes. Fix incorrect computation in do_store_left when loading
359 bytes from second word.
361 start-sanitize-tx3904
362 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
364 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
365 * interp.c (sim_open): Only create a device tree when HW is
366 enabled.
368 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
369 * interp.c (signal_exception): Ditto.
371 end-sanitize-tx3904
372 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
374 * gencode.c: Mark BEGEZALL as LIKELY.
376 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
378 * sim-main.h (ALU32_END): Sign extend 32 bit results.
379 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
381 start-sanitize-r5900
382 Thu May 21 17:15:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
384 * interp.c (sim_fetch_register): Convert internal r5900 regs to
385 target byte order
387 end-sanitize-r5900
388 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
390 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
391 modules. Recognize TX39 target with "mips*tx39" pattern.
392 * configure: Rebuilt.
393 * sim-main.h (*): Added many macros defining bits in
394 TX39 control registers.
395 (SignalInterrupt): Send actual PC instead of NULL.
396 (SignalNMIReset): New exception type.
397 * interp.c (board): New variable for future use to identify
398 a particular board being simulated.
399 (mips_option_handler,mips_options): Added "--board" option.
400 (interrupt_event): Send actual PC.
401 (sim_open): Make memory layout conditional on board setting.
402 (signal_exception): Initial implementation of hardware interrupt
403 handling. Accept another break instruction variant for simulator
404 exit.
405 (decode_coproc): Implement RFE instruction for TX39.
406 (mips.igen): Decode RFE instruction as such.
407 start-sanitize-tx3904
408 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
409 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
410 bbegin to implement memory map.
411 * dv-tx3904cpu.c: New file.
412 * dv-tx3904irc.c: New file.
413 end-sanitize-tx3904
415 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
417 * mips.igen (check_mt_hilo): Create a separate r3900 version.
419 start-sanitize-r5900
420 Wed May 13 14:27:53 1998 Gavin Koch <gavin@cygnus.com>
422 * r5900.igen: Replace the calls and the definition of the
423 function check_op_hilo_hi1lo1 with the pair
424 check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
426 end-sanitize-r5900
427 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
429 * tx.igen (madd,maddu): Replace calls to check_op_hilo
430 with calls to check_div_hilo.
432 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
434 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
435 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
436 Add special r3900 version of do_mult_hilo.
437 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
438 with calls to check_mult_hilo.
439 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
440 with calls to check_div_hilo.
442 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
444 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
445 Document a replacement.
447 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
449 * interp.c (sim_monitor): Make mon_printf work.
451 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
453 * sim-main.h (INSN_NAME): New arg `cpu'.
455 start-sanitize-sky
456 Thu Apr 30 18:51:26 1998 Andrew Cagney <cagney@b1.cygnus.com>
458 * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
459 r59fp_mula.
461 end-sanitize-sky
462 start-sanitize-r5900
463 Wed Apr 29 22:54:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
465 * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
466 * r5900.igen (r59fp_overflow): Use.
468 * r5900.igen (r59fp_op3): Rename to
469 (r59fp_mula): This, delete opm argument.
470 (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
471 (r59fp_mula): Overflowing product propogates through to result.
472 (r59fp_mula): ACC to the MAX propogates to result.
473 (r59fp_mula): Underflow during multiply only sets SU.
475 end-sanitize-r5900
476 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
478 * configure: Regenerated to track ../common/aclocal.m4 changes.
480 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
482 * configure: Regenerated to track ../common/aclocal.m4 changes.
483 * config.in: Ditto.
485 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
487 * acconfig.h: New file.
488 * configure.in: Reverted change of Apr 24; use sinclude again.
490 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
492 * configure: Regenerated to track ../common/aclocal.m4 changes.
493 * config.in: Ditto.
495 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
497 * configure.in: Don't call sinclude.
499 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
501 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
503 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
505 * mips.igen (ERET): Implement.
507 * interp.c (decode_coproc): Return sign-extended EPC.
509 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
511 * interp.c (signal_exception): Do not ignore Trap.
512 (signal_exception): On TRAP, restart at exception address.
513 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
514 (signal_exception): Update.
515 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
516 so that TRAP instructions are caught.
518 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
520 * sim-main.h (struct hilo_access, struct hilo_history): Define,
521 contains HI/LO access history.
522 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
523 (HIACCESS, LOACCESS): Delete, replace with
524 (HIHISTORY, LOHISTORY): New macros.
525 (start-sanitize-r5900):
526 (struct sim_5900_cpu): Make hi1access, lo1access of type
527 hilo_access.
528 (HI1ACCESS, LO1ACCESS): Delete, replace with
529 (HI1HISTORY, LO1HISTORY): New macros.
530 (end-sanitize-r5900):
531 (CHECKHILO): Delete all, moved to mips.igen
533 * gencode.c (build_instruction): Do not generate checks for
534 correct HI/LO register usage.
536 * interp.c (old_engine_run): Delete checks for correct HI/LO
537 register usage.
539 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
540 check_mf_cycles): New functions.
541 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
542 do_divu, domultx, do_mult, do_multu): Use.
544 * tx.igen ("madd", "maddu"): Use.
545 (start-sanitize-r5900):
547 r5900.igen: Update all HI/LO checks.
548 ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
549 "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
550 ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
551 "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
552 "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
553 Check HI/LO op.
554 (end-sanitize-r5900):
556 start-sanitize-sky
557 Mon Apr 20 18:39:47 1998 Frank Ch. Eigler <fche@cygnus.com>
559 * interp.c (decode_coproc): Correct CMFC2/QMTC2
560 GPR access.
562 * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
563 instead of a single 128-bit access.
565 end-sanitize-sky
566 start-sanitize-sky
567 Fri Apr 17 14:50:39 1998 Frank Ch. Eigler <fche@cygnus.com>
569 * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
570 * interp.c (cop_[ls]q): Fixes corresponding to above.
572 end-sanitize-sky
573 start-sanitize-sky
574 Thu Apr 16 15:24:14 1998 Frank Ch. Eigler <fche@cygnus.com>
576 * interp.c (decode_coproc): Adapt COP2 micro interlock to
577 clarified specs. Reset "M" bit; exit also on "E" bit.
579 end-sanitize-sky
580 start-sanitize-r5900
581 Thu Apr 16 10:40:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
583 * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
584 * mips.igen (CFC1, CTC1): R5900 des not use generic version.
586 * r5900.igen (r59fp_unpack): New function.
587 (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
588 RSQRT.S, SQRT.S): Use.
589 (r59fp_zero): New function.
590 (r59fp_overflow): Generate r5900 specific overflow value.
591 (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
592 to zero.
593 (CVT.S.W, CVT.W.S): Exchange implementations.
595 * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
597 end-sanitize-r5900
598 start-sanitize-tx19
599 Thu Apr 16 09:14:44 1998 Andrew Cagney <cagney@b1.cygnus.com>
601 * configure.in (tx19, sim_use_gen): Switch to igen.
602 * configure: Re-build.
604 end-sanitize-tx19
605 start-sanitize-sky
606 Wed Apr 15 12:41:18 1998 Frank Ch. Eigler <fche@cygnus.com>
608 * interp.c (decode_coproc): Make COP2 branch code compile after
609 igen signature changes.
611 end-sanitize-sky
612 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
614 * mips.igen (DSRAV): Use function do_dsrav.
615 (SRAV): Use new function do_srav.
617 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
618 (B): Sign extend 11 bit immediate.
619 (EXT-B*): Shift 16 bit immediate left by 1.
620 (ADDIU*): Don't sign extend immediate value.
622 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
624 * m16run.c (sim_engine_run): Restore CIA after handling an event.
626 start-sanitize-tx19
627 * mips.igen (mtc0): Valid tx19 instruction.
629 end-sanitize-tx19
630 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
631 functions.
633 * mips.igen (delayslot32, nullify_next_insn): New functions.
634 (m16.igen): Always include.
635 (do_*): Add more tracing.
637 * m16.igen (delayslot16): Add NIA argument, could be called by a
638 32 bit MIPS16 instruction.
640 * interp.c (ifetch16): Move function from here.
641 * sim-main.c (ifetch16): To here.
643 * sim-main.c (ifetch16, ifetch32): Update to match current
644 implementations of LH, LW.
645 (signal_exception): Don't print out incorrect hex value of illegal
646 instruction.
648 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
650 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
651 instruction.
653 * m16.igen: Implement MIPS16 instructions.
655 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
656 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
657 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
658 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
659 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
660 bodies of corresponding code from 32 bit insn to these. Also used
661 by MIPS16 versions of functions.
663 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
664 (IMEM16): Drop NR argument from macro.
666 start-sanitize-sky
667 Mon Apr 13 16:28:52 1998 Frank Ch. Eigler <fche@cygnus.com>
669 * interp.c (decode_coproc): Add proper 1000000 bit-string at top
670 of VU lower instruction.
672 end-sanitize-sky
673 start-sanitize-sky
674 Thu Apr 9 16:38:23 1998 Frank Ch. Eigler <fche@cygnus.com>
676 * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
677 instead of QUADWORD.
679 * sim-main.h: Removed attempt at allowing 128-bit access.
681 end-sanitize-sky
682 start-sanitize-sky
683 Wed Apr 8 18:12:13 1998 Frank Ch. Eigler <fche@cygnus.com>
685 * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
687 * interp.c (decode_coproc): Refer to VU CIA as a "special"
688 register, not as a "misc" register. Aha. Add activity
689 assertions after VCALLMS* instructions.
691 end-sanitize-sky
692 start-sanitize-sky
693 Tue Apr 7 18:32:49 1998 Frank Ch. Eigler <fche@cygnus.com>
695 * interp.c (decode_coproc): Do not apply superfluous E (end) flag
696 to upper code of generated VU instruction.
698 end-sanitize-sky
699 start-sanitize-sky
700 Mon Apr 6 19:55:56 1998 Frank Ch. Eigler <fche@cygnus.com>
702 * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
704 * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
705 for TARGET_SKY.
707 * r5900.igen (SQC2): Thinko.
709 end-sanitize-sky
710 start-sanitize-sky
711 Sun Apr 5 12:05:44 1998 Frank Ch. Eigler <fche@cygnus.com>
713 * interp.c (*): Adapt code to merged VU device & state structs.
714 (decode_coproc): Execute COP2 each macroinstruction without
715 pipelining, by stepping VU to completion state. Adapted to
716 read_vu_*_reg style of register access.
718 * mips.igen ([SL]QC2): Removed these COP2 instructions.
720 * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
722 * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
724 end-sanitize-sky
725 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
727 * Makefile.in (SIM_OBJS): Add sim-main.o.
729 * sim-main.h (address_translation, load_memory, store_memory,
730 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
731 as INLINE_SIM_MAIN.
732 (pr_addr, pr_uword64): Declare.
733 (sim-main.c): Include when H_REVEALS_MODULE_P.
735 * interp.c (address_translation, load_memory, store_memory,
736 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
737 from here.
738 * sim-main.c: To here. Fix compilation problems.
740 * configure.in: Enable inlining.
741 * configure: Re-config.
743 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
745 * configure: Regenerated to track ../common/aclocal.m4 changes.
747 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
749 * mips.igen: Include tx.igen.
750 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
751 * tx.igen: New file, contains MADD and MADDU.
753 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
754 the hardwired constant `7'.
755 (store_memory): Ditto.
756 (LOADDRMASK): Move definition to sim-main.h.
758 mips.igen (MTC0): Enable for r3900.
759 (ADDU): Add trace.
761 mips.igen (do_load_byte): Delete.
762 (do_load, do_store, do_load_left, do_load_write, do_store_left,
763 do_store_right): New functions.
764 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
766 configure.in: Let the tx39 use igen again.
767 configure: Update.
769 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
771 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
772 not an address sized quantity. Return zero for cache sizes.
774 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
776 * mips.igen (r3900): r3900 does not support 64 bit integer
777 operations.
779 start-sanitize-sky
780 Wed Apr 1 08:20:31 1998 Frank Ch. Eigler <fche@cygnus.com>
782 * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
784 end-sanitize-sky
785 start-sanitize-sky
786 Mon Mar 30 18:41:43 1998 Frank Ch. Eigler <fche@cygnus.com>
788 * interp.c (decode_coproc): Continuing COP2 work.
789 (cop_[ls]q): Make sky-target-only.
791 * sim-main.h (COP_[LS]Q): Make sky-target-only.
792 end-sanitize-sky
793 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
795 * configure.in (mipstx39*-*-*): Use gencode simulator rather
796 than igen one.
797 * configure : Rebuild.
799 start-sanitize-sky
800 Sun Mar 29 17:50:11 Frank Ch. Eigler <fche@cygnus.com>
802 * interp.c (decode_coproc): Added a missing TARGET_SKY check
803 around COP2 implementation skeleton.
805 end-sanitize-sky
806 start-sanitize-sky
807 Fri Mar 27 16:19:29 1998 Frank Ch. Eigler <fche@cygnus.com>
809 * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
811 * interp.c (sim_{load,store}_register): Use new vu[01]_device
812 static to access VU registers.
813 (decode_coproc): Added skeleton of sky COP2 (VU) instruction
814 decoding. Work in progress.
816 * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
817 overlapping/redundant bit pattern.
818 (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in
819 progress.
821 * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
822 status register.
824 * interp.c (cop_lq, cop_sq): New functions for future 128-bit
825 access to coprocessor registers.
827 * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
828 end-sanitize-sky
829 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
831 * configure: Regenerated to track ../common/aclocal.m4 changes.
833 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
835 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
837 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
839 * configure: Regenerated to track ../common/aclocal.m4 changes.
840 * config.in: Regenerated to track ../common/aclocal.m4 changes.
842 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
844 * configure: Regenerated to track ../common/aclocal.m4 changes.
846 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
848 * interp.c (Max, Min): Comment out functions. Not yet used.
850 start-sanitize-vr4320
851 Wed Mar 25 10:04:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
853 * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
855 end-sanitize-vr4320
856 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
858 * configure: Regenerated to track ../common/aclocal.m4 changes.
860 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
862 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
863 configurable settings for stand-alone simulator.
865 start-sanitize-sky
866 * configure.in: Added --with-sim-gpu2 option to specify path of
867 sky GPU2 library. Triggers -DSKY_GPU2 for sky-gpuif.c, and
868 links/compiles stand-alone simulator with this library.
870 * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
871 end-sanitize-sky
872 * configure.in: Added X11 search, just in case.
874 * configure: Regenerated.
876 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
878 * interp.c (sim_write, sim_read, load_memory, store_memory):
879 Replace sim_core_*_map with read_map, write_map, exec_map resp.
881 start-sanitize-vr4320
882 Tue Mar 10 10:32:22 1998 Gavin Koch <gavin@cygnus.com>
884 * vr4320.igen (clz,dclz) : Added.
885 (dmac): Replaced 99, with LO.
887 end-sanitize-vr4320
888 start-sanitize-cygnus
889 Fri Mar 6 08:30:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
891 * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
893 end-sanitize-cygnus
894 start-sanitize-vr4320
895 Tue Mar 3 11:56:29 1998 Gavin Koch <gavin@cygnus.com>
897 * vr4320.igen: New file.
898 * Makefile.in (vr4320.igen) : Added.
899 * configure.in (mips64vr4320-*-*): Added.
900 * configure : Rebuilt.
901 * mips.igen : Correct the bfd-names in the mips-ISA model entries.
902 Add the vr4320 model entry and mark the vr4320 insn as necessary.
904 end-sanitize-vr4320
905 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
907 * sim-main.h (GETFCC): Return an unsigned value.
909 start-sanitize-r5900
910 * r5900.igen: Use an unsigned array index variable `i'.
911 (QFSRV): Ditto for variable bytes.
913 end-sanitize-r5900
914 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
916 * mips.igen (DIV): Fix check for -1 / MIN_INT.
917 (DADD): Result destination is RD not RT.
919 start-sanitize-r5900
920 * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
921 (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
922 divide.
924 end-sanitize-r5900
925 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
927 * sim-main.h (HIACCESS, LOACCESS): Always define.
929 * mdmx.igen (Maxi, Mini): Rename Max, Min.
931 * interp.c (sim_info): Delete.
933 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
935 * interp.c (DECLARE_OPTION_HANDLER): Use it.
936 (mips_option_handler): New argument `cpu'.
937 (sim_open): Update call to sim_add_option_table.
939 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
941 * mips.igen (CxC1): Add tracing.
943 start-sanitize-r5900
944 Wed Feb 25 13:59:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
946 * r5900.igen (StoreFP): Delete.
947 (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
948 New functions.
949 (rsqrt.s, sqrt.s): Implement.
950 (r59cond): New function.
951 (C.COND.S): Call r59cond in assembler line.
952 (cvt.w.s, cvt.s.w): Implement.
954 * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
955 instruction set.
957 * sim-main.h: Define an enum of r5900 FCSR bit fields.
959 end-sanitize-r5900
960 start-sanitize-r5900
961 Tue Feb 24 14:44:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
963 * r5900.igen: Add tracing to all p* instructions.
965 Tue Feb 24 02:47:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
967 * interp.c (sim_store_register, sim_fetch_register): Pull swifty
968 to get gdb talking to re-aranged sim_cpu register structure.
970 end-sanitize-r5900
971 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
973 * sim-main.h (Max, Min): Declare.
975 * interp.c (Max, Min): New functions.
977 * mips.igen (BC1): Add tracing.
979 start-sanitize-cygnus
980 Fri Feb 20 16:27:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
982 * mdmx.igen: Tag all functions as requiring either with mdmx or
983 vr5400 processor.
985 end-sanitize-cygnus
986 start-sanitize-r5900
987 Fri Feb 20 15:55:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
989 * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
990 to 32.
991 (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
993 * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
995 * r5900.igen: Rewrite.
997 * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
998 struct.
999 (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
1000 Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
1002 end-sanitize-r5900
1003 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1005 * interp.c Added memory map for stack in vr4100
1007 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1009 * interp.c (load_memory): Add missing "break"'s.
1011 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1013 * interp.c (sim_store_register, sim_fetch_register): Pass in
1014 length parameter. Return -1.
1016 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1018 * interp.c: Added hardware init hook, fixed warnings.
1020 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1022 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1024 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1026 * interp.c (ifetch16): New function.
1028 * sim-main.h (IMEM32): Rename IMEM.
1029 (IMEM16_IMMED): Define.
1030 (IMEM16): Define.
1031 (DELAY_SLOT): Update.
1033 * m16run.c (sim_engine_run): New file.
1035 * m16.igen: All instructions except LB.
1036 (LB): Call do_load_byte.
1037 * mips.igen (do_load_byte): New function.
1038 (LB): Call do_load_byte.
1040 * mips.igen: Move spec for insn bit size and high bit from here.
1041 * Makefile.in (tmp-igen, tmp-m16): To here.
1043 * m16.dc: New file, decode mips16 instructions.
1045 * Makefile.in (SIM_NO_ALL): Define.
1046 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1048 start-sanitize-tx19
1049 * m16.igen: Mark all mips16 insns as being part of the tx19 insn
1050 set.
1052 end-sanitize-tx19
1053 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1055 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1056 point unit to 32 bit registers.
1057 * configure: Re-generate.
1059 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1061 * configure.in (sim_use_gen): Make IGEN the default simulator
1062 generator for generic 32 and 64 bit mips targets.
1063 * configure: Re-generate.
1065 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1067 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1068 bitsize.
1070 * interp.c (sim_fetch_register, sim_store_register): Read/write
1071 FGR from correct location.
1072 (sim_open): Set size of FGR's according to
1073 WITH_TARGET_FLOATING_POINT_BITSIZE.
1075 * sim-main.h (FGR): Store floating point registers in a separate
1076 array.
1078 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1080 * configure: Regenerated to track ../common/aclocal.m4 changes.
1082 start-sanitize-cygnus
1083 * mdmx.igen: Mark all instructions as 64bit/fp specific.
1085 end-sanitize-cygnus
1086 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1088 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1090 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1092 * interp.c (pending_tick): New function. Deliver pending writes.
1094 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1095 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1096 it can handle mixed sized quantites and single bits.
1098 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1100 * interp.c (oengine.h): Do not include when building with IGEN.
1101 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1102 (sim_info): Ditto for PROCESSOR_64BIT.
1103 (sim_monitor): Replace ut_reg with unsigned_word.
1104 (*): Ditto for t_reg.
1105 (LOADDRMASK): Define.
1106 (sim_open): Remove defunct check that host FP is IEEE compliant,
1107 using software to emulate floating point.
1108 (value_fpr, ...): Always compile, was conditional on HASFPU.
1110 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1112 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1113 size.
1115 * interp.c (SD, CPU): Define.
1116 (mips_option_handler): Set flags in each CPU.
1117 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1118 (sim_close): Do not clear STATE, deleted anyway.
1119 (sim_write, sim_read): Assume CPU zero's vm should be used for
1120 data transfers.
1121 (sim_create_inferior): Set the PC for all processors.
1122 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1123 argument.
1124 (mips16_entry): Pass correct nr of args to store_word, load_word.
1125 (ColdReset): Cold reset all cpu's.
1126 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1127 (sim_monitor, load_memory, store_memory, signal_exception): Use
1128 `CPU' instead of STATE_CPU.
1131 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1132 SD or CPU_.
1134 * sim-main.h (signal_exception): Add sim_cpu arg.
1135 (SignalException*): Pass both SD and CPU to signal_exception.
1136 * interp.c (signal_exception): Update.
1138 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1139 Ditto
1140 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1141 address_translation): Ditto
1142 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1144 start-sanitize-cygnus
1145 * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
1146 `sd'.
1147 (ByteAlign): Use StoreFPR, pass args in correct order.
1149 end-sanitize-cygnus
1150 start-sanitize-r5900
1151 Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1153 * configure.in (sim_igen_filter): For r5900, configure as SMP.
1155 end-sanitize-r5900
1156 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1158 * configure: Regenerated to track ../common/aclocal.m4 changes.
1160 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1162 start-sanitize-r5900
1163 * configure.in (sim_igen_filter): For r5900, use igen.
1164 * configure: Re-generate.
1166 end-sanitize-r5900
1167 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1169 * mips.igen (model): Map processor names onto BFD name.
1171 * sim-main.h (CPU_CIA): Delete.
1172 (SET_CIA, GET_CIA): Define
1174 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1176 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1177 regiser.
1179 * configure.in (default_endian): Configure a big-endian simulator
1180 by default.
1181 * configure: Re-generate.
1183 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1185 * configure: Regenerated to track ../common/aclocal.m4 changes.
1187 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1189 * interp.c (sim_monitor): Handle Densan monitor outbyte
1190 and inbyte functions.
1192 1997-12-29 Felix Lee <flee@cygnus.com>
1194 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1196 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1198 * Makefile.in (tmp-igen): Arrange for $zero to always be
1199 reset to zero after every instruction.
1201 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1203 * configure: Regenerated to track ../common/aclocal.m4 changes.
1204 * config.in: Ditto.
1206 start-sanitize-cygnus
1207 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1209 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
1210 bit values.
1212 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
1214 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
1215 vr5400 with the vr5000 as the default.
1217 end-sanitize-cygnus
1218 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1220 * mips.igen (MSUB): Fix to work like MADD.
1221 * gencode.c (MSUB): Similarly.
1223 start-sanitize-cygnus
1224 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
1226 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
1227 vr5400.
1229 end-sanitize-cygnus
1230 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1232 * configure: Regenerated to track ../common/aclocal.m4 changes.
1234 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1236 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1238 start-sanitize-cygnus
1239 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
1240 (value_cc, store_cc): Implement.
1242 * sim-main.h: Add 8*3*8 bit accumulator.
1244 * vr5400.igen: Move mdmx instructins from here
1245 * mdmx.igen: To here - new file. Add/fix missing instructions.
1246 * mips.igen: Include mdmx.igen.
1247 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1249 end-sanitize-cygnus
1250 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1252 * sim-main.h (sim-fpu.h): Include.
1254 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1255 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1256 using host independant sim_fpu module.
1258 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1260 * interp.c (signal_exception): Report internal errors with SIGABRT
1261 not SIGQUIT.
1263 * sim-main.h (C0_CONFIG): New register.
1264 (signal.h): No longer include.
1266 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1268 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1270 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1272 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1274 * mips.igen: Tag vr5000 instructions.
1275 (ANDI): Was missing mipsIV model, fix assembler syntax.
1276 (do_c_cond_fmt): New function.
1277 (C.cond.fmt): Handle mips I-III which do not support CC field
1278 separatly.
1279 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1280 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1281 in IV3.2 spec.
1282 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1283 vr5000 which saves LO in a GPR separatly.
1285 * configure.in (enable-sim-igen): For vr5000, select vr5000
1286 specific instructions.
1287 * configure: Re-generate.
1289 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1291 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1293 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1294 fmt_uninterpreted_64 bit cases to switch. Convert to
1295 fmt_formatted,
1297 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1299 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1300 as specified in IV3.2 spec.
1301 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1303 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1305 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1306 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1307 (start-sanitize-r5900):
1308 (LWXC1, SWXC1): Delete from r5900 instruction set.
1309 (end-sanitize-r5900):
1310 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1311 PENDING_FILL versions of instructions. Simplify.
1312 (X): New function.
1313 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1314 instructions.
1315 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1316 a signed value.
1317 (MTHI, MFHI): Disable code checking HI-LO.
1319 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1320 global.
1321 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1323 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1325 * gencode.c (build_mips16_operands): Replace IPC with cia.
1327 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1328 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1329 IPC to `cia'.
1330 (UndefinedResult): Replace function with macro/function
1331 combination.
1332 (sim_engine_run): Don't save PC in IPC.
1334 * sim-main.h (IPC): Delete.
1336 start-sanitize-cygnus
1337 * vr5400.igen (vr): Add missing cia argument to value_fpr.
1338 (do_select): Rename function select.
1339 end-sanitize-cygnus
1341 * interp.c (signal_exception, store_word, load_word,
1342 address_translation, load_memory, store_memory, cache_op,
1343 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1344 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1345 current instruction address - cia - argument.
1346 (sim_read, sim_write): Call address_translation directly.
1347 (sim_engine_run): Rename variable vaddr to cia.
1348 (signal_exception): Pass cia to sim_monitor
1350 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1351 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1352 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1354 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1355 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1356 SIM_ASSERT.
1358 * interp.c (signal_exception): Pass restart address to
1359 sim_engine_restart.
1361 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1362 idecode.o): Add dependency.
1364 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1365 Delete definitions
1366 (DELAY_SLOT): Update NIA not PC with branch address.
1367 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1369 * mips.igen: Use CIA not PC in branch calculations.
1370 (illegal): Call SignalException.
1371 (BEQ, ADDIU): Fix assembler.
1373 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1375 * m16.igen (JALX): Was missing.
1377 * configure.in (enable-sim-igen): New configuration option.
1378 * configure: Re-generate.
1380 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1382 * interp.c (load_memory, store_memory): Delete parameter RAW.
1383 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1384 bypassing {load,store}_memory.
1386 * sim-main.h (ByteSwapMem): Delete definition.
1388 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1390 * interp.c (sim_do_command, sim_commands): Delete mips specific
1391 commands. Handled by module sim-options.
1393 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1394 (WITH_MODULO_MEMORY): Define.
1396 * interp.c (sim_info): Delete code printing memory size.
1398 * interp.c (mips_size): Nee sim_size, delete function.
1399 (power2): Delete.
1400 (monitor, monitor_base, monitor_size): Delete global variables.
1401 (sim_open, sim_close): Delete code creating monitor and other
1402 memory regions. Use sim-memopts module, via sim_do_commandf, to
1403 manage memory regions.
1404 (load_memory, store_memory): Use sim-core for memory model.
1406 * interp.c (address_translation): Delete all memory map code
1407 except line forcing 32 bit addresses.
1409 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1411 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1412 trace options.
1414 * interp.c (logfh, logfile): Delete globals.
1415 (sim_open, sim_close): Delete code opening & closing log file.
1416 (mips_option_handler): Delete -l and -n options.
1417 (OPTION mips_options): Ditto.
1419 * interp.c (OPTION mips_options): Rename option trace to dinero.
1420 (mips_option_handler): Update.
1422 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1424 * interp.c (fetch_str): New function.
1425 (sim_monitor): Rewrite using sim_read & sim_write.
1426 (sim_open): Check magic number.
1427 (sim_open): Write monitor vectors into memory using sim_write.
1428 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1429 (sim_read, sim_write): Simplify - transfer data one byte at a
1430 time.
1431 (load_memory, store_memory): Clarify meaning of parameter RAW.
1433 * sim-main.h (isHOST): Defete definition.
1434 (isTARGET): Mark as depreciated.
1435 (address_translation): Delete parameter HOST.
1437 * interp.c (address_translation): Delete parameter HOST.
1439 start-sanitize-tx49
1440 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
1442 * gencode.c: Add tx49 configury and insns.
1443 * configure.in: Add tx49 configury.
1444 * configure: Update.
1446 end-sanitize-tx49
1447 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1449 * mips.igen:
1451 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1452 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1454 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1456 * mips.igen: Add model filter field to records.
1458 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1460 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1462 interp.c (sim_engine_run): Do not compile function sim_engine_run
1463 when WITH_IGEN == 1.
1465 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1466 target architecture.
1468 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1469 igen. Replace with configuration variables sim_igen_flags /
1470 sim_m16_flags.
1472 start-sanitize-r5900
1473 * r5900.igen: New file. Copy r5900 insns here.
1474 end-sanitize-r5900
1475 start-sanitize-cygnus
1476 * vr5400.igen: New file.
1477 end-sanitize-cygnus
1478 * m16.igen: New file. Copy mips16 insns here.
1479 * mips.igen: From here.
1481 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1483 start-sanitize-cygnus
1484 * mips.igen: Tag all mipsIV instructions with vr5400 model.
1486 * configure.in: Add mips64vr5400 target.
1487 * configure: Re-generate.
1489 end-sanitize-cygnus
1490 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1491 to top.
1492 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1494 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1496 * gencode.c (build_instruction): Follow sim_write's lead in using
1497 BigEndianMem instead of !ByteSwapMem.
1499 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1501 * configure.in (sim_gen): Dependent on target, select type of
1502 generator. Always select old style generator.
1504 configure: Re-generate.
1506 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1507 targets.
1508 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1509 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1510 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1511 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1512 SIM_@sim_gen@_*, set by autoconf.
1514 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1516 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1518 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1519 CURRENT_FLOATING_POINT instead.
1521 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1522 (address_translation): Raise exception InstructionFetch when
1523 translation fails and isINSTRUCTION.
1525 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1526 sim_engine_run): Change type of of vaddr and paddr to
1527 address_word.
1528 (address_translation, prefetch, load_memory, store_memory,
1529 cache_op): Change type of vAddr and pAddr to address_word.
1531 * gencode.c (build_instruction): Change type of vaddr and paddr to
1532 address_word.
1534 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1536 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1537 macro to obtain result of ALU op.
1539 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1541 * interp.c (sim_info): Call profile_print.
1543 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1545 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1547 * sim-main.h (WITH_PROFILE): Do not define, defined in
1548 common/sim-config.h. Use sim-profile module.
1549 (simPROFILE): Delete defintion.
1551 * interp.c (PROFILE): Delete definition.
1552 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1553 (sim_close): Delete code writing profile histogram.
1554 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1555 Delete.
1556 (sim_engine_run): Delete code profiling the PC.
1558 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1560 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1562 * interp.c (sim_monitor): Make register pointers of type
1563 unsigned_word*.
1565 * sim-main.h: Make registers of type unsigned_word not
1566 signed_word.
1568 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1570 start-sanitize-r5900
1571 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1572 ...): Move to sim-main.h
1574 end-sanitize-r5900
1575 * interp.c (sync_operation): Rename from SyncOperation, make
1576 global, add SD argument.
1577 (prefetch): Rename from Prefetch, make global, add SD argument.
1578 (decode_coproc): Make global.
1580 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1582 * gencode.c (build_instruction): Generate DecodeCoproc not
1583 decode_coproc calls.
1585 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1586 (SizeFGR): Move to sim-main.h
1587 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1588 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1589 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1590 sim-main.h.
1591 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1592 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1593 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1594 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1595 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1596 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1598 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1599 exception.
1600 (sim-alu.h): Include.
1601 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1602 (sim_cia): Typedef to instruction_address.
1604 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1606 * Makefile.in (interp.o): Rename generated file engine.c to
1607 oengine.c.
1609 * interp.c: Update.
1611 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1613 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1615 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1617 * gencode.c (build_instruction): For "FPSQRT", output correct
1618 number of arguments to Recip.
1620 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1622 * Makefile.in (interp.o): Depends on sim-main.h
1624 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1626 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1627 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1628 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1629 STATE, DSSTATE): Define
1630 (GPR, FGRIDX, ..): Define.
1632 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1633 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1634 (GPR, FGRIDX, ...): Delete macros.
1636 * interp.c: Update names to match defines from sim-main.h
1638 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1640 * interp.c (sim_monitor): Add SD argument.
1641 (sim_warning): Delete. Replace calls with calls to
1642 sim_io_eprintf.
1643 (sim_error): Delete. Replace calls with sim_io_error.
1644 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1645 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1646 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1647 argument.
1648 (mips_size): Rename from sim_size. Add SD argument.
1650 * interp.c (simulator): Delete global variable.
1651 (callback): Delete global variable.
1652 (mips_option_handler, sim_open, sim_write, sim_read,
1653 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1654 sim_size,sim_monitor): Use sim_io_* not callback->*.
1655 (sim_open): ZALLOC simulator struct.
1656 (PROFILE): Do not define.
1658 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1660 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1661 support.h with corresponding code.
1663 * sim-main.h (word64, uword64), support.h: Move definition to
1664 sim-main.h.
1665 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1667 * support.h: Delete
1668 * Makefile.in: Update dependencies
1669 * interp.c: Do not include.
1671 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1673 * interp.c (address_translation, load_memory, store_memory,
1674 cache_op): Rename to from AddressTranslation et.al., make global,
1675 add SD argument
1677 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1678 CacheOp): Define.
1680 * interp.c (SignalException): Rename to signal_exception, make
1681 global.
1683 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1685 * sim-main.h (SignalException, SignalExceptionInterrupt,
1686 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1687 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1688 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1689 Define.
1691 * interp.c, support.h: Use.
1693 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1695 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1696 to value_fpr / store_fpr. Add SD argument.
1697 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1698 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1700 * sim-main.h (ValueFPR, StoreFPR): Define.
1702 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1704 * interp.c (sim_engine_run): Check consistency between configure
1705 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1706 and HASFPU.
1708 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1709 (mips_fpu): Configure WITH_FLOATING_POINT.
1710 (mips_endian): Configure WITH_TARGET_ENDIAN.
1711 * configure: Update.
1713 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1715 * configure: Regenerated to track ../common/aclocal.m4 changes.
1717 start-sanitize-r5900
1718 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1720 * interp.c (MAX_REG): Allow up-to 128 registers.
1721 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1722 (REGISTER_SA): Ditto.
1723 (sim_open): Initialize register_widths for r5900 specific
1724 registers.
1725 (sim_fetch_register, sim_store_register): Check for request of
1726 r5900 specific SA register. Check for request for hi 64 bits of
1727 r5900 specific registers.
1729 end-sanitize-r5900
1730 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1732 * configure: Regenerated.
1734 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1736 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1738 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1740 * gencode.c (print_igen_insn_models): Assume certain architectures
1741 include all mips* instructions.
1742 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1743 instruction.
1745 * Makefile.in (tmp.igen): Add target. Generate igen input from
1746 gencode file.
1748 * gencode.c (FEATURE_IGEN): Define.
1749 (main): Add --igen option. Generate output in igen format.
1750 (process_instructions): Format output according to igen option.
1751 (print_igen_insn_format): New function.
1752 (print_igen_insn_models): New function.
1753 (process_instructions): Only issue warnings and ignore
1754 instructions when no FEATURE_IGEN.
1756 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1758 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1759 MIPS targets.
1761 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1763 * configure: Regenerated to track ../common/aclocal.m4 changes.
1765 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1767 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1768 SIM_RESERVED_BITS): Delete, moved to common.
1769 (SIM_EXTRA_CFLAGS): Update.
1771 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1773 * configure.in: Configure non-strict memory alignment.
1774 * configure: Regenerated to track ../common/aclocal.m4 changes.
1776 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1778 * configure: Regenerated to track ../common/aclocal.m4 changes.
1780 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1782 * gencode.c (SDBBP,DERET): Added (3900) insns.
1783 (RFE): Turn on for 3900.
1784 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1785 (dsstate): Made global.
1786 (SUBTARGET_R3900): Added.
1787 (CANCELDELAYSLOT): New.
1788 (SignalException): Ignore SystemCall rather than ignore and
1789 terminate. Add DebugBreakPoint handling.
1790 (decode_coproc): New insns RFE, DERET; and new registers Debug
1791 and DEPC protected by SUBTARGET_R3900.
1792 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1793 bits explicitly.
1794 * Makefile.in,configure.in: Add mips subtarget option.
1795 * configure: Update.
1797 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1799 * gencode.c: Add r3900 (tx39).
1801 start-sanitize-tx19
1802 * gencode.c: Fix some configuration problems by improving
1803 the relationship between tx19 and tx39.
1804 end-sanitize-tx19
1806 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1808 * gencode.c (build_instruction): Don't need to subtract 4 for
1809 JALR, just 2.
1811 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1813 * interp.c: Correct some HASFPU problems.
1815 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1817 * configure: Regenerated to track ../common/aclocal.m4 changes.
1819 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1821 * interp.c (mips_options): Fix samples option short form, should
1822 be `x'.
1824 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1826 * interp.c (sim_info): Enable info code. Was just returning.
1828 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1830 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1831 MFC0.
1833 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1835 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1836 constants.
1837 (build_instruction): Ditto for LL.
1839 start-sanitize-tx19
1840 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
1842 * mips/configure.in, mips/gencode: Add tx19/r1900.
1844 end-sanitize-tx19
1845 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1847 * configure: Regenerated to track ../common/aclocal.m4 changes.
1849 start-sanitize-r5900
1850 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
1852 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1853 for overflow due to ABS of MININT, set result to MAXINT.
1854 (build_instruction): For "psrlvw", signextend bit 31.
1856 end-sanitize-r5900
1857 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1859 * configure: Regenerated to track ../common/aclocal.m4 changes.
1860 * config.in: Ditto.
1862 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1864 * interp.c (sim_open): Add call to sim_analyze_program, update
1865 call to sim_config.
1867 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1869 * interp.c (sim_kill): Delete.
1870 (sim_create_inferior): Add ABFD argument. Set PC from same.
1871 (sim_load): Move code initializing trap handlers from here.
1872 (sim_open): To here.
1873 (sim_load): Delete, use sim-hload.c.
1875 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1877 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1879 * configure: Regenerated to track ../common/aclocal.m4 changes.
1880 * config.in: Ditto.
1882 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1884 * interp.c (sim_open): Add ABFD argument.
1885 (sim_load): Move call to sim_config from here.
1886 (sim_open): To here. Check return status.
1888 start-sanitize-r5900
1889 * gencode.c (build_instruction): Do not define x8000000000000000,
1890 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1892 end-sanitize-r5900
1893 start-sanitize-r5900
1894 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1896 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1897 "pdivuw" check for overflow due to signed divide by -1.
1899 end-sanitize-r5900
1900 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1902 * gencode.c (build_instruction): Two arg MADD should
1903 not assign result to $0.
1905 start-sanitize-r5900
1906 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1908 * gencode.c (build_instruction): For "ppac5" use unsigned
1909 arrithmetic so that the sign bit doesn't smear when right shifted.
1910 (build_instruction): For "pdiv" perform sign extension when
1911 storing results in HI and LO.
1912 (build_instructions): For "pdiv" and "pdivbw" check for
1913 divide-by-zero.
1914 (build_instruction): For "pmfhl.slw" update hi part of dest
1915 register as well as low part.
1916 (build_instruction): For "pmfhl" portably handle long long values.
1917 (build_instruction): For "pmfhl.sh" correctly negative values.
1918 Store half words 2 and three in the correct place.
1919 (build_instruction): For "psllvw", sign extend value after shift.
1921 end-sanitize-r5900
1922 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1924 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1925 * sim/mips/configure.in: Regenerate.
1927 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1929 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1930 signed8, unsigned8 et.al. types.
1932 start-sanitize-r5900
1933 * gencode.c (build_instruction): For PMULTU* do not sign extend
1934 registers. Make generated code easier to debug.
1936 end-sanitize-r5900
1937 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1938 hosts when selecting subreg.
1940 start-sanitize-r5900
1941 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
1943 * gencode.c (type_for_data_len): For 32bit operations concerned
1944 with overflow, perform op using 64bits.
1945 (build_instruction): For PADD, always compute operation using type
1946 returned by type_for_data_len.
1947 (build_instruction): For PSUBU, when overflow, saturate to zero as
1948 actually underflow.
1950 end-sanitize-r5900
1951 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1953 start-sanitize-r5900
1954 * gencode.c (build_instruction): Handle "pext5" according to
1955 version 1.95 of the r5900 ISA.
1957 * gencode.c (build_instruction): Handle "ppac5" according to
1958 version 1.95 of the r5900 ISA.
1960 end-sanitize-r5900
1961 * interp.c (sim_engine_run): Reset the ZERO register to zero
1962 regardless of FEATURE_WARN_ZERO.
1963 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1965 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1967 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1968 (SignalException): For BreakPoints ignore any mode bits and just
1969 save the PC.
1970 (SignalException): Always set the CAUSE register.
1972 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1974 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1975 exception has been taken.
1977 * interp.c: Implement the ERET and mt/f sr instructions.
1979 start-sanitize-r5900
1980 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
1982 * gencode.c (build_instruction): For paddu, extract unsigned
1983 sub-fields.
1985 * gencode.c (build_instruction): Saturate padds instead of padd
1986 instructions.
1988 end-sanitize-r5900
1989 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1991 * interp.c (SignalException): Don't bother restarting an
1992 interrupt.
1994 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1996 * interp.c (SignalException): Really take an interrupt.
1997 (interrupt_event): Only deliver interrupts when enabled.
1999 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2001 * interp.c (sim_info): Only print info when verbose.
2002 (sim_info) Use sim_io_printf for output.
2004 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2006 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2007 mips architectures.
2009 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2011 * interp.c (sim_do_command): Check for common commands if a
2012 simulator specific command fails.
2014 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2016 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2017 and simBE when DEBUG is defined.
2019 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2021 * interp.c (interrupt_event): New function. Pass exception event
2022 onto exception handler.
2024 * configure.in: Check for stdlib.h.
2025 * configure: Regenerate.
2027 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2028 variable declaration.
2029 (build_instruction): Initialize memval1.
2030 (build_instruction): Add UNUSED attribute to byte, bigend,
2031 reverse.
2032 (build_operands): Ditto.
2034 * interp.c: Fix GCC warnings.
2035 (sim_get_quit_code): Delete.
2037 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2038 * Makefile.in: Ditto.
2039 * configure: Re-generate.
2041 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2043 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2045 * interp.c (mips_option_handler): New function parse argumes using
2046 sim-options.
2047 (myname): Replace with STATE_MY_NAME.
2048 (sim_open): Delete check for host endianness - performed by
2049 sim_config.
2050 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2051 (sim_open): Move much of the initialization from here.
2052 (sim_load): To here. After the image has been loaded and
2053 endianness set.
2054 (sim_open): Move ColdReset from here.
2055 (sim_create_inferior): To here.
2056 (sim_open): Make FP check less dependant on host endianness.
2058 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2059 run.
2060 * interp.c (sim_set_callbacks): Delete.
2062 * interp.c (membank, membank_base, membank_size): Replace with
2063 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2064 (sim_open): Remove call to callback->init. gdb/run do this.
2066 * interp.c: Update
2068 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2070 * interp.c (big_endian_p): Delete, replaced by
2071 current_target_byte_order.
2073 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2075 * interp.c (host_read_long, host_read_word, host_swap_word,
2076 host_swap_long): Delete. Using common sim-endian.
2077 (sim_fetch_register, sim_store_register): Use H2T.
2078 (pipeline_ticks): Delete. Handled by sim-events.
2079 (sim_info): Update.
2080 (sim_engine_run): Update.
2082 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2084 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2085 reason from here.
2086 (SignalException): To here. Signal using sim_engine_halt.
2087 (sim_stop_reason): Delete, moved to common.
2089 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2091 * interp.c (sim_open): Add callback argument.
2092 (sim_set_callbacks): Delete SIM_DESC argument.
2093 (sim_size): Ditto.
2095 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2097 * Makefile.in (SIM_OBJS): Add common modules.
2099 * interp.c (sim_set_callbacks): Also set SD callback.
2100 (set_endianness, xfer_*, swap_*): Delete.
2101 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2102 Change to functions using sim-endian macros.
2103 (control_c, sim_stop): Delete, use common version.
2104 (simulate): Convert into.
2105 (sim_engine_run): This function.
2106 (sim_resume): Delete.
2108 * interp.c (simulation): New variable - the simulator object.
2109 (sim_kind): Delete global - merged into simulation.
2110 (sim_load): Cleanup. Move PC assignment from here.
2111 (sim_create_inferior): To here.
2113 * sim-main.h: New file.
2114 * interp.c (sim-main.h): Include.
2116 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2118 * configure: Regenerated to track ../common/aclocal.m4 changes.
2120 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2122 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2124 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2126 * gencode.c (build_instruction): DIV instructions: check
2127 for division by zero and integer overflow before using
2128 host's division operation.
2130 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2132 * Makefile.in (SIM_OBJS): Add sim-load.o.
2133 * interp.c: #include bfd.h.
2134 (target_byte_order): Delete.
2135 (sim_kind, myname, big_endian_p): New static locals.
2136 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2137 after argument parsing. Recognize -E arg, set endianness accordingly.
2138 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2139 load file into simulator. Set PC from bfd.
2140 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2141 (set_endianness): Use big_endian_p instead of target_byte_order.
2143 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2145 * interp.c (sim_size): Delete prototype - conflicts with
2146 definition in remote-sim.h. Correct definition.
2148 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2150 * configure: Regenerated to track ../common/aclocal.m4 changes.
2151 * config.in: Ditto.
2153 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2155 * interp.c (sim_open): New arg `kind'.
2157 * configure: Regenerated to track ../common/aclocal.m4 changes.
2159 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2161 * configure: Regenerated to track ../common/aclocal.m4 changes.
2163 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2165 * interp.c (sim_open): Set optind to 0 before calling getopt.
2167 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2169 * configure: Regenerated to track ../common/aclocal.m4 changes.
2171 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2173 * interp.c : Replace uses of pr_addr with pr_uword64
2174 where the bit length is always 64 independent of SIM_ADDR.
2175 (pr_uword64) : added.
2177 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2179 * configure: Re-generate.
2181 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2183 * configure: Regenerate to track ../common/aclocal.m4 changes.
2185 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2187 * interp.c (sim_open): New SIM_DESC result. Argument is now
2188 in argv form.
2189 (other sim_*): New SIM_DESC argument.
2191 start-sanitize-r5900
2192 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
2194 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
2195 Change values to avoid overloading DOUBLEWORD which is tested
2196 for all insns.
2197 * gencode.c: reinstate "offending code".
2199 end-sanitize-r5900
2200 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2202 * interp.c: Fix printing of addresses for non-64-bit targets.
2203 (pr_addr): Add function to print address based on size.
2204 start-sanitize-r5900
2205 * gencode.c: #ifdef out offending code until a permanent fix
2206 can be added. Code is causing build errors for non-5900 mips targets.
2207 end-sanitize-r5900
2209 start-sanitize-r5900
2210 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
2212 * gencode.c (process_instructions): Correct test for ISA dependent
2213 architecture bits in isa field of MIPS_DECODE.
2215 end-sanitize-r5900
2216 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2218 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2220 start-sanitize-r5900
2221 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2223 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
2224 PMADDUW.
2226 end-sanitize-r5900
2227 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2229 * gencode.c (build_mips16_operands): Correct computation of base
2230 address for extended PC relative instruction.
2232 start-sanitize-r5900
2233 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2235 * Makefile.in, configure, configure.in, gencode.c,
2236 interp.c, support.h: add r5900.
2238 end-sanitize-r5900
2239 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2241 * interp.c (mips16_entry): Add support for floating point cases.
2242 (SignalException): Pass floating point cases to mips16_entry.
2243 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2244 registers.
2245 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2246 or fmt_word.
2247 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2248 and then set the state to fmt_uninterpreted.
2249 (COP_SW): Temporarily set the state to fmt_word while calling
2250 ValueFPR.
2252 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2254 * gencode.c (build_instruction): The high order may be set in the
2255 comparison flags at any ISA level, not just ISA 4.
2257 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2259 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2260 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2261 * configure.in: sinclude ../common/aclocal.m4.
2262 * configure: Regenerated.
2264 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2266 * configure: Rebuild after change to aclocal.m4.
2268 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2270 * configure configure.in Makefile.in: Update to new configure
2271 scheme which is more compatible with WinGDB builds.
2272 * configure.in: Improve comment on how to run autoconf.
2273 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2274 * Makefile.in: Use autoconf substitution to install common
2275 makefile fragment.
2277 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2279 * gencode.c (build_instruction): Use BigEndianCPU instead of
2280 ByteSwapMem.
2282 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2284 * interp.c (sim_monitor): Make output to stdout visible in
2285 wingdb's I/O log window.
2287 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2289 * support.h: Undo previous change to SIGTRAP
2290 and SIGQUIT values.
2292 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2294 * interp.c (store_word, load_word): New static functions.
2295 (mips16_entry): New static function.
2296 (SignalException): Look for mips16 entry and exit instructions.
2297 (simulate): Use the correct index when setting fpr_state after
2298 doing a pending move.
2300 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2302 * interp.c: Fix byte-swapping code throughout to work on
2303 both little- and big-endian hosts.
2305 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2307 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2308 with gdb/config/i386/xm-windows.h.
2310 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2312 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2313 that messes up arithmetic shifts.
2315 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2317 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2318 SIGTRAP and SIGQUIT for _WIN32.
2320 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2322 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2323 force a 64 bit multiplication.
2324 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2325 destination register is 0, since that is the default mips16 nop
2326 instruction.
2328 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2330 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2331 (build_endian_shift): Don't check proc64.
2332 (build_instruction): Always set memval to uword64. Cast op2 to
2333 uword64 when shifting it left in memory instructions. Always use
2334 the same code for stores--don't special case proc64.
2336 * gencode.c (build_mips16_operands): Fix base PC value for PC
2337 relative operands.
2338 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2339 jal instruction.
2340 * interp.c (simJALDELAYSLOT): Define.
2341 (JALDELAYSLOT): Define.
2342 (INDELAYSLOT, INJALDELAYSLOT): Define.
2343 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2345 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2347 * interp.c (sim_open): add flush_cache as a PMON routine
2348 (sim_monitor): handle flush_cache by ignoring it
2350 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2352 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2353 BigEndianMem.
2354 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2355 (BigEndianMem): Rename to ByteSwapMem and change sense.
2356 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2357 BigEndianMem references to !ByteSwapMem.
2358 (set_endianness): New function, with prototype.
2359 (sim_open): Call set_endianness.
2360 (sim_info): Use simBE instead of BigEndianMem.
2361 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2362 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2363 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2364 ifdefs, keeping the prototype declaration.
2365 (swap_word): Rewrite correctly.
2366 (ColdReset): Delete references to CONFIG. Delete endianness related
2367 code; moved to set_endianness.
2369 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2371 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2372 * interp.c (CHECKHILO): Define away.
2373 (simSIGINT): New macro.
2374 (membank_size): Increase from 1MB to 2MB.
2375 (control_c): New function.
2376 (sim_resume): Rename parameter signal to signal_number. Add local
2377 variable prev. Call signal before and after simulate.
2378 (sim_stop_reason): Add simSIGINT support.
2379 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2380 functions always.
2381 (sim_warning): Delete call to SignalException. Do call printf_filtered
2382 if logfh is NULL.
2383 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2384 a call to sim_warning.
2386 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2388 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2389 16 bit instructions.
2391 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2393 Add support for mips16 (16 bit MIPS implementation):
2394 * gencode.c (inst_type): Add mips16 instruction encoding types.
2395 (GETDATASIZEINSN): Define.
2396 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2397 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2398 mtlo.
2399 (MIPS16_DECODE): New table, for mips16 instructions.
2400 (bitmap_val): New static function.
2401 (struct mips16_op): Define.
2402 (mips16_op_table): New table, for mips16 operands.
2403 (build_mips16_operands): New static function.
2404 (process_instructions): If PC is odd, decode a mips16
2405 instruction. Break out instruction handling into new
2406 build_instruction function.
2407 (build_instruction): New static function, broken out of
2408 process_instructions. Check modifiers rather than flags for SHIFT
2409 bit count and m[ft]{hi,lo} direction.
2410 (usage): Pass program name to fprintf.
2411 (main): Remove unused variable this_option_optind. Change
2412 ``*loptarg++'' to ``loptarg++''.
2413 (my_strtoul): Parenthesize && within ||.
2414 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2415 (simulate): If PC is odd, fetch a 16 bit instruction, and
2416 increment PC by 2 rather than 4.
2417 * configure.in: Add case for mips16*-*-*.
2418 * configure: Rebuild.
2420 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2422 * interp.c: Allow -t to enable tracing in standalone simulator.
2423 Fix garbage output in trace file and error messages.
2425 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2427 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2428 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2429 * configure.in: Simplify using macros in ../common/aclocal.m4.
2430 * configure: Regenerated.
2431 * tconfig.in: New file.
2433 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2435 * interp.c: Fix bugs in 64-bit port.
2436 Use ansi function declarations for msvc compiler.
2437 Initialize and test file pointer in trace code.
2438 Prevent duplicate definition of LAST_EMED_REGNUM.
2440 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2442 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2444 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2446 * interp.c (SignalException): Check for explicit terminating
2447 breakpoint value.
2448 * gencode.c: Pass instruction value through SignalException()
2449 calls for Trap, Breakpoint and Syscall.
2451 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2453 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2454 only used on those hosts that provide it.
2455 * configure.in: Add sqrt() to list of functions to be checked for.
2456 * config.in: Re-generated.
2457 * configure: Re-generated.
2459 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2461 * gencode.c (process_instructions): Call build_endian_shift when
2462 expanding STORE RIGHT, to fix swr.
2463 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2464 clear the high bits.
2465 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2466 Fix float to int conversions to produce signed values.
2468 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2470 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2471 (process_instructions): Correct handling of nor instruction.
2472 Correct shift count for 32 bit shift instructions. Correct sign
2473 extension for arithmetic shifts to not shift the number of bits in
2474 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2475 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2476 Fix madd.
2477 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2478 It's OK to have a mult follow a mult. What's not OK is to have a
2479 mult follow an mfhi.
2480 (Convert): Comment out incorrect rounding code.
2482 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2484 * interp.c (sim_monitor): Improved monitor printf
2485 simulation. Tidied up simulator warnings, and added "--log" option
2486 for directing warning message output.
2487 * gencode.c: Use sim_warning() rather than WARNING macro.
2489 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2491 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2492 getopt1.o, rather than on gencode.c. Link objects together.
2493 Don't link against -liberty.
2494 (gencode.o, getopt.o, getopt1.o): New targets.
2495 * gencode.c: Include <ctype.h> and "ansidecl.h".
2496 (AND): Undefine after including "ansidecl.h".
2497 (ULONG_MAX): Define if not defined.
2498 (OP_*): Don't define macros; now defined in opcode/mips.h.
2499 (main): Call my_strtoul rather than strtoul.
2500 (my_strtoul): New static function.
2502 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2504 * gencode.c (process_instructions): Generate word64 and uword64
2505 instead of `long long' and `unsigned long long' data types.
2506 * interp.c: #include sysdep.h to get signals, and define default
2507 for SIGBUS.
2508 * (Convert): Work around for Visual-C++ compiler bug with type
2509 conversion.
2510 * support.h: Make things compile under Visual-C++ by using
2511 __int64 instead of `long long'. Change many refs to long long
2512 into word64/uword64 typedefs.
2514 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2516 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2517 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2518 (docdir): Removed.
2519 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2520 (AC_PROG_INSTALL): Added.
2521 (AC_PROG_CC): Moved to before configure.host call.
2522 * configure: Rebuilt.
2524 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2526 * configure.in: Define @SIMCONF@ depending on mips target.
2527 * configure: Rebuild.
2528 * Makefile.in (run): Add @SIMCONF@ to control simulator
2529 construction.
2530 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2531 * interp.c: Remove some debugging, provide more detailed error
2532 messages, update memory accesses to use LOADDRMASK.
2534 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2536 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2537 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2538 stamp-h.
2539 * configure: Rebuild.
2540 * config.in: New file, generated by autoheader.
2541 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2542 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2543 HAVE_ANINT and HAVE_AINT, as appropriate.
2544 * Makefile.in (run): Use @LIBS@ rather than -lm.
2545 (interp.o): Depend upon config.h.
2546 (Makefile): Just rebuild Makefile.
2547 (clean): Remove stamp-h.
2548 (mostlyclean): Make the same as clean, not as distclean.
2549 (config.h, stamp-h): New targets.
2551 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2553 * interp.c (ColdReset): Fix boolean test. Make all simulator
2554 globals static.
2556 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2558 * interp.c (xfer_direct_word, xfer_direct_long,
2559 swap_direct_word, swap_direct_long, xfer_big_word,
2560 xfer_big_long, xfer_little_word, xfer_little_long,
2561 swap_word,swap_long): Added.
2562 * interp.c (ColdReset): Provide function indirection to
2563 host<->simulated_target transfer routines.
2564 * interp.c (sim_store_register, sim_fetch_register): Updated to
2565 make use of indirected transfer routines.
2567 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2569 * gencode.c (process_instructions): Ensure FP ABS instruction
2570 recognised.
2571 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2572 system call support.
2574 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2576 * interp.c (sim_do_command): Complain if callback structure not
2577 initialised.
2579 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2581 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2582 support for Sun hosts.
2583 * Makefile.in (gencode): Ensure the host compiler and libraries
2584 used for cross-hosted build.
2586 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2588 * interp.c, gencode.c: Some more (TODO) tidying.
2590 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2592 * gencode.c, interp.c: Replaced explicit long long references with
2593 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2594 * support.h (SET64LO, SET64HI): Macros added.
2596 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2598 * configure: Regenerate with autoconf 2.7.
2600 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2602 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2603 * support.h: Remove superfluous "1" from #if.
2604 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2606 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2608 * interp.c (StoreFPR): Control UndefinedResult() call on
2609 WARN_RESULT manifest.
2611 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2613 * gencode.c: Tidied instruction decoding, and added FP instruction
2614 support.
2616 * interp.c: Added dineroIII, and BSD profiling support. Also
2617 run-time FP handling.
2619 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2621 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2622 gencode.c, interp.c, support.h: created.