[PATCH 30/57][Arm][GAS] Add support for MVE instructions: vqmovnt, vqmovnb, vqmovunt...
[binutils-gdb.git] / gdb / nds32-tdep.h
blobab1f6f20f31ccf3b81854babceeb54b6f9ab95a5
1 /* Target-dependent code for the NDS32 architecture, for GDB.
3 Copyright (C) 2013-2019 Free Software Foundation, Inc.
4 Contributed by Andes Technology Corporation.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #ifndef NDS32_TDEP_H
22 #define NDS32_TDEP_H
24 enum nds32_regnum
26 /* General purpose registers. */
27 NDS32_R0_REGNUM = 0,
28 NDS32_R5_REGNUM = 5,
29 NDS32_TA_REGNUM = 15, /* Temporary register. */
30 NDS32_FP_REGNUM = 28, /* Frame pointer. */
31 NDS32_GP_REGNUM = 29, /* Global pointer. */
32 NDS32_LP_REGNUM = 30, /* Link pointer. */
33 NDS32_SP_REGNUM = 31, /* Stack pointer. */
35 NDS32_PC_REGNUM = 32, /* Program counter. */
37 NDS32_NUM_REGS,
39 /* The first double precision floating-point register. */
40 NDS32_FD0_REGNUM = NDS32_NUM_REGS,
43 struct gdbarch_tdep
45 /* The guessed FPU configuration. */
46 int fpu_freg;
47 /* FSRs are defined as pseudo registers. */
48 int use_pseudo_fsrs;
49 /* Cached regnum of the first FSR (FS0). */
50 int fs0_regnum;
51 /* ELF ABI info. */
52 int elf_abi;
54 #endif /* NDS32_TDEP_H */