arm: Support pac_key_* register operand for MRS/MSR in Armv8.1-M Mainline
[binutils-gdb.git] / gdbsupport / x86-xstate.h
blobb9a9b6cd3424caf957371529a39f7b61b5fedf9d
1 /* Common code for x86 XSAVE extended state.
3 Copyright (C) 2010-2024 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #ifndef COMMON_X86_XSTATE_H
21 #define COMMON_X86_XSTATE_H
23 /* The extended state feature IDs in the state component bitmap. */
24 #define X86_XSTATE_X87_ID 0
25 #define X86_XSTATE_SSE_ID 1
26 #define X86_XSTATE_AVX_ID 2
27 #define X86_XSTATE_K_ID 5
28 #define X86_XSTATE_ZMM_H_ID 6
29 #define X86_XSTATE_ZMM_ID 7
30 #define X86_XSTATE_PKRU_ID 9
32 /* The extended state feature bits. */
33 #define X86_XSTATE_X87 (1ULL << X86_XSTATE_X87_ID)
34 #define X86_XSTATE_SSE (1ULL << X86_XSTATE_SSE_ID)
35 #define X86_XSTATE_AVX (1ULL << X86_XSTATE_AVX_ID)
37 /* AVX 512 adds three feature bits. All three must be enabled. */
38 #define X86_XSTATE_K (1ULL << X86_XSTATE_K_ID)
39 #define X86_XSTATE_ZMM_H (1ULL << X86_XSTATE_ZMM_H_ID)
40 #define X86_XSTATE_ZMM (1ULL << X86_XSTATE_ZMM_ID)
41 #define X86_XSTATE_AVX512 (X86_XSTATE_K | X86_XSTATE_ZMM_H \
42 | X86_XSTATE_ZMM)
44 #define X86_XSTATE_PKRU (1ULL << X86_XSTATE_PKRU_ID)
46 /* Total size of the XSAVE area extended region and offsets of
47 register states within the region. Offsets are set to 0 to
48 indicate the absence of the associated registers. */
50 struct x86_xsave_layout
52 int sizeof_xsave = 0;
53 int avx_offset = 0;
54 int k_offset = 0;
55 int zmm_h_offset = 0;
56 int zmm_offset = 0;
57 int pkru_offset = 0;
60 constexpr bool operator== (const x86_xsave_layout &lhs,
61 const x86_xsave_layout &rhs)
63 return lhs.sizeof_xsave == rhs.sizeof_xsave
64 && lhs.avx_offset == rhs.avx_offset
65 && lhs.k_offset == rhs.k_offset
66 && lhs.zmm_h_offset == rhs.zmm_h_offset
67 && lhs.zmm_offset == rhs.zmm_offset
68 && lhs.pkru_offset == rhs.pkru_offset;
71 constexpr bool operator!= (const x86_xsave_layout &lhs,
72 const x86_xsave_layout &rhs)
74 return !(lhs == rhs);
78 /* Supported mask and size of the extended state. */
79 #define X86_XSTATE_X87_MASK X86_XSTATE_X87
80 #define X86_XSTATE_SSE_MASK (X86_XSTATE_X87 | X86_XSTATE_SSE)
81 #define X86_XSTATE_AVX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_AVX)
82 #define X86_XSTATE_AVX_AVX512_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512)
83 #define X86_XSTATE_AVX_AVX512_PKU_MASK (X86_XSTATE_AVX_MASK\
84 | X86_XSTATE_AVX512 | X86_XSTATE_PKRU)
86 #define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_AVX512_PKU_MASK)
89 #define X86_XSTATE_SSE_SIZE 576
90 #define X86_XSTATE_AVX_SIZE 832
93 #define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0)
94 #define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0)
95 #define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0)
97 /* Initial value for fctrl register, as defined in the X86 manual, and
98 confirmed in the (Linux) kernel source. When the x87 floating point
99 feature is not enabled in an inferior we use this as the value of the
100 fcrtl register. */
102 #define I387_FCTRL_INIT_VAL 0x037f
104 /* Initial value for mxcsr register. When the avx and sse floating point
105 features are not enabled in an inferior we use this as the value of the
106 mxcsr register. */
108 #define I387_MXCSR_INIT_VAL 0x1f80
110 /* Format of XSAVE extended state is:
111 struct
113 fxsave_bytes[0..463]
114 sw_usable_bytes[464..511]
115 xstate_hdr_bytes[512..575]
116 extended state regions (AVX, MPX, AVX512, PKRU, etc.)
119 Same memory layout will be used for the coredump NT_X86_XSTATE
120 representing the XSAVE extended state registers.
122 The first 8 bytes of the sw_usable_bytes[464..467] is the OS enabled
123 extended state mask, which is the same as the extended control register
124 0 (the XFEATURE_ENABLED_MASK register), XCR0. We can use this mask
125 together with the mask saved in the xstate_hdr_bytes to determine what
126 states the processor/OS supports and what state, used or initialized,
127 the process/thread is in. */
128 #define I386_LINUX_XSAVE_XCR0_OFFSET 464
130 #endif /* COMMON_X86_XSTATE_H */