sim/lm32/sem.c

   1 /* Simulator instruction semantics for lm32bf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996-2024 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, write to the Free Software Foundation, Inc.,
  21    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 */
  24
  25 #define WANT_CPU lm32bf
  26 #define WANT_CPU_LM32BF
  27
  28 #include "sim-main.h"
  29 #include "cgen-mem.h"
  30 #include "cgen-ops.h"
  31
  32 #undef GET_ATTR
  33 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
  34
  35 /* This is used so that we can compile two copies of the semantic code,
  36    one with full feature support and one without that runs fast(er).
  37    FAST_P, when desired, is defined on the command line, -DFAST_P=1.  */
  38 #if FAST_P
  39 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
  40 #undef CGEN_TRACE_RESULT
  41 #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val)
  42 #else
  43 #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
  44 #endif
  45
  46 /* x-invalid: --invalid-- */
  47
  48 static SEM_PC
  49 SEM_FN_NAME (lm32bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
  50 {
  51 #define FLD(f) abuf->fields.sfmt_empty.f
  52   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  53   int UNUSED written = 0;
  54   IADDR UNUSED pc = abuf->addr;
  55   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  56
  57   {
  58     /* Update the recorded pc in the cpu state struct.
  59        Only necessary for WITH_SCACHE case, but to avoid the
  60        conditional compilation ....  */
  61     SET_H_PC (pc);
  62     /* Virtual insns have zero size.  Overwrite vpc with address of next insn
  63        using the default-insn-bitsize spec.  When executing insns in parallel
  64        we may want to queue the fault and continue execution.  */
  65     vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
  66     vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
  67   }
  68
  69   return vpc;
  70 #undef FLD
  71 }
  72
  73 /* x-after: --after-- */
  74
  75 static SEM_PC
  76 SEM_FN_NAME (lm32bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
  77 {
  78 #define FLD(f) abuf->fields.sfmt_empty.f
  79   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  80   int UNUSED written = 0;
  81   IADDR UNUSED pc = abuf->addr;
  82   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
  83
  84   {
  85 #if WITH_SCACHE_PBB_LM32BF
  86     lm32bf_pbb_after (current_cpu, sem_arg);
  87 #endif
  88   }
  89
  90   return vpc;
  91 #undef FLD
  92 }
  93
  94 /* x-before: --before-- */
  95
  96 static SEM_PC
  97 SEM_FN_NAME (lm32bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
  98 {
  99 #define FLD(f) abuf->fields.sfmt_empty.f
 100   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 101   int UNUSED written = 0;
 102   IADDR UNUSED pc = abuf->addr;
 103   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 104
 105   {
 106 #if WITH_SCACHE_PBB_LM32BF
 107     lm32bf_pbb_before (current_cpu, sem_arg);
 108 #endif
 109   }
 110
 111   return vpc;
 112 #undef FLD
 113 }
 114
 115 /* x-cti-chain: --cti-chain-- */
 116
 117 static SEM_PC
 118 SEM_FN_NAME (lm32bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 119 {
 120 #define FLD(f) abuf->fields.sfmt_empty.f
 121   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 122   int UNUSED written = 0;
 123   IADDR UNUSED pc = abuf->addr;
 124   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 125
 126   {
 127 #if WITH_SCACHE_PBB_LM32BF
 128 #ifdef DEFINE_SWITCH
 129     vpc = lm32bf_pbb_cti_chain (current_cpu, sem_arg,
 130                                pbb_br_type, pbb_br_npc);
 131     BREAK (sem);
 132 #else
 133     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 134     vpc = lm32bf_pbb_cti_chain (current_cpu, sem_arg,
 135                                CPU_PBB_BR_TYPE (current_cpu),
 136                                CPU_PBB_BR_NPC (current_cpu));
 137 #endif
 138 #endif
 139   }
 140
 141   return vpc;
 142 #undef FLD
 143 }
 144
 145 /* x-chain: --chain-- */
 146
 147 static SEM_PC
 148 SEM_FN_NAME (lm32bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 149 {
 150 #define FLD(f) abuf->fields.sfmt_empty.f
 151   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 152   int UNUSED written = 0;
 153   IADDR UNUSED pc = abuf->addr;
 154   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 155
 156   {
 157 #if WITH_SCACHE_PBB_LM32BF
 158     vpc = lm32bf_pbb_chain (current_cpu, sem_arg);
 159 #ifdef DEFINE_SWITCH
 160     BREAK (sem);
 161 #endif
 162 #endif
 163   }
 164
 165   return vpc;
 166 #undef FLD
 167 }
 168
 169 /* x-begin: --begin-- */
 170
 171 static SEM_PC
 172 SEM_FN_NAME (lm32bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 173 {
 174 #define FLD(f) abuf->fields.sfmt_empty.f
 175   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 176   int UNUSED written = 0;
 177   IADDR UNUSED pc = abuf->addr;
 178   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 179
 180   {
 181 #if WITH_SCACHE_PBB_LM32BF
 182 #if defined DEFINE_SWITCH || defined FAST_P
 183     /* In the switch case FAST_P is a constant, allowing several optimizations
 184        in any called inline functions.  */
 185     vpc = lm32bf_pbb_begin (current_cpu, FAST_P);
 186 #else
 187 #if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
 188     vpc = lm32bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 189 #else
 190     vpc = lm32bf_pbb_begin (current_cpu, 0);
 191 #endif
 192 #endif
 193 #endif
 194   }
 195
 196   return vpc;
 197 #undef FLD
 198 }
 199
 200 /* add: add $r2,$r0,$r1 */
 201
 202 static SEM_PC
 203 SEM_FN_NAME (lm32bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 204 {
 205 #define FLD(f) abuf->fields.sfmt_user.f
 206   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 207   int UNUSED written = 0;
 208   IADDR UNUSED pc = abuf->addr;
 209   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 210
 211   {
 212     SI opval = ADDSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 213     CPU (h_gr[FLD (f_r2)]) = opval;
 214     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 215   }
 216
 217   return vpc;
 218 #undef FLD
 219 }
 220
 221 /* addi: addi $r1,$r0,$imm */
 222
 223 static SEM_PC
 224 SEM_FN_NAME (lm32bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 225 {
 226 #define FLD(f) abuf->fields.sfmt_addi.f
 227   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 228   int UNUSED written = 0;
 229   IADDR UNUSED pc = abuf->addr;
 230   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 231
 232   {
 233     SI opval = ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))));
 234     CPU (h_gr[FLD (f_r1)]) = opval;
 235     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 236   }
 237
 238   return vpc;
 239 #undef FLD
 240 }
 241
 242 /* and: and $r2,$r0,$r1 */
 243
 244 static SEM_PC
 245 SEM_FN_NAME (lm32bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 246 {
 247 #define FLD(f) abuf->fields.sfmt_user.f
 248   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 249   int UNUSED written = 0;
 250   IADDR UNUSED pc = abuf->addr;
 251   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 252
 253   {
 254     SI opval = ANDSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 255     CPU (h_gr[FLD (f_r2)]) = opval;
 256     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 257   }
 258
 259   return vpc;
 260 #undef FLD
 261 }
 262
 263 /* andi: andi $r1,$r0,$uimm */
 264
 265 static SEM_PC
 266 SEM_FN_NAME (lm32bf,andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 267 {
 268 #define FLD(f) abuf->fields.sfmt_andi.f
 269   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 270   int UNUSED written = 0;
 271   IADDR UNUSED pc = abuf->addr;
 272   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 273
 274   {
 275     SI opval = ANDSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)));
 276     CPU (h_gr[FLD (f_r1)]) = opval;
 277     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 278   }
 279
 280   return vpc;
 281 #undef FLD
 282 }
 283
 284 /* andhii: andhi $r1,$r0,$hi16 */
 285
 286 static SEM_PC
 287 SEM_FN_NAME (lm32bf,andhii) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 288 {
 289 #define FLD(f) abuf->fields.sfmt_andi.f
 290   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 291   int UNUSED written = 0;
 292   IADDR UNUSED pc = abuf->addr;
 293   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 294
 295   {
 296     SI opval = ANDSI (CPU (h_gr[FLD (f_r0)]), SLLSI (FLD (f_uimm), 16));
 297     CPU (h_gr[FLD (f_r1)]) = opval;
 298     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 299   }
 300
 301   return vpc;
 302 #undef FLD
 303 }
 304
 305 /* b: b $r0 */
 306
 307 static SEM_PC
 308 SEM_FN_NAME (lm32bf,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 309 {
 310 #define FLD(f) abuf->fields.sfmt_be.f
 311   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 312   int UNUSED written = 0;
 313   IADDR UNUSED pc = abuf->addr;
 314   SEM_BRANCH_INIT
 315   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 316
 317   {
 318     USI opval = lm32bf_b_insn (current_cpu, CPU (h_gr[FLD (f_r0)]), FLD (f_r0));
 319     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 320     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 321   }
 322
 323   SEM_BRANCH_FINI (vpc);
 324   return vpc;
 325 #undef FLD
 326 }
 327
 328 /* bi: bi $call */
 329
 330 static SEM_PC
 331 SEM_FN_NAME (lm32bf,bi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 332 {
 333 #define FLD(f) abuf->fields.sfmt_bi.f
 334   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 335   int UNUSED written = 0;
 336   IADDR UNUSED pc = abuf->addr;
 337   SEM_BRANCH_INIT
 338   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 339
 340   {
 341     USI opval = EXTSISI (FLD (i_call));
 342     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 343     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 344   }
 345
 346   SEM_BRANCH_FINI (vpc);
 347   return vpc;
 348 #undef FLD
 349 }
 350
 351 /* be: be $r0,$r1,$branch */
 352
 353 static SEM_PC
 354 SEM_FN_NAME (lm32bf,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 355 {
 356 #define FLD(f) abuf->fields.sfmt_be.f
 357   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 358   int UNUSED written = 0;
 359   IADDR UNUSED pc = abuf->addr;
 360   SEM_BRANCH_INIT
 361   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 362
 363 if (EQSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) {
 364   {
 365     USI opval = FLD (i_branch);
 366     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 367     written |= (1 << 3);
 368     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 369   }
 370 }
 371
 372   abuf->written = written;
 373   SEM_BRANCH_FINI (vpc);
 374   return vpc;
 375 #undef FLD
 376 }
 377
 378 /* bg: bg $r0,$r1,$branch */
 379
 380 static SEM_PC
 381 SEM_FN_NAME (lm32bf,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 382 {
 383 #define FLD(f) abuf->fields.sfmt_be.f
 384   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 385   int UNUSED written = 0;
 386   IADDR UNUSED pc = abuf->addr;
 387   SEM_BRANCH_INIT
 388   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 389
 390 if (GTSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) {
 391   {
 392     USI opval = FLD (i_branch);
 393     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 394     written |= (1 << 3);
 395     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 396   }
 397 }
 398
 399   abuf->written = written;
 400   SEM_BRANCH_FINI (vpc);
 401   return vpc;
 402 #undef FLD
 403 }
 404
 405 /* bge: bge $r0,$r1,$branch */
 406
 407 static SEM_PC
 408 SEM_FN_NAME (lm32bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 409 {
 410 #define FLD(f) abuf->fields.sfmt_be.f
 411   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 412   int UNUSED written = 0;
 413   IADDR UNUSED pc = abuf->addr;
 414   SEM_BRANCH_INIT
 415   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 416
 417 if (GESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) {
 418   {
 419     USI opval = FLD (i_branch);
 420     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 421     written |= (1 << 3);
 422     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 423   }
 424 }
 425
 426   abuf->written = written;
 427   SEM_BRANCH_FINI (vpc);
 428   return vpc;
 429 #undef FLD
 430 }
 431
 432 /* bgeu: bgeu $r0,$r1,$branch */
 433
 434 static SEM_PC
 435 SEM_FN_NAME (lm32bf,bgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 436 {
 437 #define FLD(f) abuf->fields.sfmt_be.f
 438   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 439   int UNUSED written = 0;
 440   IADDR UNUSED pc = abuf->addr;
 441   SEM_BRANCH_INIT
 442   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 443
 444 if (GEUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) {
 445   {
 446     USI opval = FLD (i_branch);
 447     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 448     written |= (1 << 3);
 449     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 450   }
 451 }
 452
 453   abuf->written = written;
 454   SEM_BRANCH_FINI (vpc);
 455   return vpc;
 456 #undef FLD
 457 }
 458
 459 /* bgu: bgu $r0,$r1,$branch */
 460
 461 static SEM_PC
 462 SEM_FN_NAME (lm32bf,bgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 463 {
 464 #define FLD(f) abuf->fields.sfmt_be.f
 465   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 466   int UNUSED written = 0;
 467   IADDR UNUSED pc = abuf->addr;
 468   SEM_BRANCH_INIT
 469   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 470
 471 if (GTUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) {
 472   {
 473     USI opval = FLD (i_branch);
 474     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 475     written |= (1 << 3);
 476     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 477   }
 478 }
 479
 480   abuf->written = written;
 481   SEM_BRANCH_FINI (vpc);
 482   return vpc;
 483 #undef FLD
 484 }
 485
 486 /* bne: bne $r0,$r1,$branch */
 487
 488 static SEM_PC
 489 SEM_FN_NAME (lm32bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 490 {
 491 #define FLD(f) abuf->fields.sfmt_be.f
 492   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 493   int UNUSED written = 0;
 494   IADDR UNUSED pc = abuf->addr;
 495   SEM_BRANCH_INIT
 496   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 497
 498 if (NESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) {
 499   {
 500     USI opval = FLD (i_branch);
 501     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 502     written |= (1 << 3);
 503     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 504   }
 505 }
 506
 507   abuf->written = written;
 508   SEM_BRANCH_FINI (vpc);
 509   return vpc;
 510 #undef FLD
 511 }
 512
 513 /* call: call $r0 */
 514
 515 static SEM_PC
 516 SEM_FN_NAME (lm32bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 517 {
 518 #define FLD(f) abuf->fields.sfmt_be.f
 519   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 520   int UNUSED written = 0;
 521   IADDR UNUSED pc = abuf->addr;
 522   SEM_BRANCH_INIT
 523   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 524
 525 {
 526   {
 527     SI opval = ADDSI (pc, 4);
 528     CPU (h_gr[((UINT) 29)]) = opval;
 529     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 530   }
 531   {
 532     USI opval = CPU (h_gr[FLD (f_r0)]);
 533     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 534     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 535   }
 536 }
 537
 538   SEM_BRANCH_FINI (vpc);
 539   return vpc;
 540 #undef FLD
 541 }
 542
 543 /* calli: calli $call */
 544
 545 static SEM_PC
 546 SEM_FN_NAME (lm32bf,calli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 547 {
 548 #define FLD(f) abuf->fields.sfmt_bi.f
 549   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 550   int UNUSED written = 0;
 551   IADDR UNUSED pc = abuf->addr;
 552   SEM_BRANCH_INIT
 553   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 554
 555 {
 556   {
 557     SI opval = ADDSI (pc, 4);
 558     CPU (h_gr[((UINT) 29)]) = opval;
 559     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 560   }
 561   {
 562     USI opval = EXTSISI (FLD (i_call));
 563     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 564     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 565   }
 566 }
 567
 568   SEM_BRANCH_FINI (vpc);
 569   return vpc;
 570 #undef FLD
 571 }
 572
 573 /* cmpe: cmpe $r2,$r0,$r1 */
 574
 575 static SEM_PC
 576 SEM_FN_NAME (lm32bf,cmpe) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 577 {
 578 #define FLD(f) abuf->fields.sfmt_user.f
 579   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 580   int UNUSED written = 0;
 581   IADDR UNUSED pc = abuf->addr;
 582   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 583
 584   {
 585     SI opval = EQSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 586     CPU (h_gr[FLD (f_r2)]) = opval;
 587     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 588   }
 589
 590   return vpc;
 591 #undef FLD
 592 }
 593
 594 /* cmpei: cmpei $r1,$r0,$imm */
 595
 596 static SEM_PC
 597 SEM_FN_NAME (lm32bf,cmpei) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 598 {
 599 #define FLD(f) abuf->fields.sfmt_addi.f
 600   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 601   int UNUSED written = 0;
 602   IADDR UNUSED pc = abuf->addr;
 603   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 604
 605   {
 606     SI opval = EQSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))));
 607     CPU (h_gr[FLD (f_r1)]) = opval;
 608     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 609   }
 610
 611   return vpc;
 612 #undef FLD
 613 }
 614
 615 /* cmpg: cmpg $r2,$r0,$r1 */
 616
 617 static SEM_PC
 618 SEM_FN_NAME (lm32bf,cmpg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 619 {
 620 #define FLD(f) abuf->fields.sfmt_user.f
 621   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 622   int UNUSED written = 0;
 623   IADDR UNUSED pc = abuf->addr;
 624   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 625
 626   {
 627     SI opval = GTSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 628     CPU (h_gr[FLD (f_r2)]) = opval;
 629     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 630   }
 631
 632   return vpc;
 633 #undef FLD
 634 }
 635
 636 /* cmpgi: cmpgi $r1,$r0,$imm */
 637
 638 static SEM_PC
 639 SEM_FN_NAME (lm32bf,cmpgi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 640 {
 641 #define FLD(f) abuf->fields.sfmt_addi.f
 642   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 643   int UNUSED written = 0;
 644   IADDR UNUSED pc = abuf->addr;
 645   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 646
 647   {
 648     SI opval = GTSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))));
 649     CPU (h_gr[FLD (f_r1)]) = opval;
 650     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 651   }
 652
 653   return vpc;
 654 #undef FLD
 655 }
 656
 657 /* cmpge: cmpge $r2,$r0,$r1 */
 658
 659 static SEM_PC
 660 SEM_FN_NAME (lm32bf,cmpge) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 661 {
 662 #define FLD(f) abuf->fields.sfmt_user.f
 663   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 664   int UNUSED written = 0;
 665   IADDR UNUSED pc = abuf->addr;
 666   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 667
 668   {
 669     SI opval = GESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 670     CPU (h_gr[FLD (f_r2)]) = opval;
 671     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 672   }
 673
 674   return vpc;
 675 #undef FLD
 676 }
 677
 678 /* cmpgei: cmpgei $r1,$r0,$imm */
 679
 680 static SEM_PC
 681 SEM_FN_NAME (lm32bf,cmpgei) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 682 {
 683 #define FLD(f) abuf->fields.sfmt_addi.f
 684   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 685   int UNUSED written = 0;
 686   IADDR UNUSED pc = abuf->addr;
 687   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 688
 689   {
 690     SI opval = GESI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))));
 691     CPU (h_gr[FLD (f_r1)]) = opval;
 692     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 693   }
 694
 695   return vpc;
 696 #undef FLD
 697 }
 698
 699 /* cmpgeu: cmpgeu $r2,$r0,$r1 */
 700
 701 static SEM_PC
 702 SEM_FN_NAME (lm32bf,cmpgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 703 {
 704 #define FLD(f) abuf->fields.sfmt_user.f
 705   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 706   int UNUSED written = 0;
 707   IADDR UNUSED pc = abuf->addr;
 708   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 709
 710   {
 711     SI opval = GEUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 712     CPU (h_gr[FLD (f_r2)]) = opval;
 713     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 714   }
 715
 716   return vpc;
 717 #undef FLD
 718 }
 719
 720 /* cmpgeui: cmpgeui $r1,$r0,$uimm */
 721
 722 static SEM_PC
 723 SEM_FN_NAME (lm32bf,cmpgeui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 724 {
 725 #define FLD(f) abuf->fields.sfmt_andi.f
 726   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 727   int UNUSED written = 0;
 728   IADDR UNUSED pc = abuf->addr;
 729   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 730
 731   {
 732     SI opval = GEUSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)));
 733     CPU (h_gr[FLD (f_r1)]) = opval;
 734     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 735   }
 736
 737   return vpc;
 738 #undef FLD
 739 }
 740
 741 /* cmpgu: cmpgu $r2,$r0,$r1 */
 742
 743 static SEM_PC
 744 SEM_FN_NAME (lm32bf,cmpgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 745 {
 746 #define FLD(f) abuf->fields.sfmt_user.f
 747   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 748   int UNUSED written = 0;
 749   IADDR UNUSED pc = abuf->addr;
 750   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 751
 752   {
 753     SI opval = GTUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 754     CPU (h_gr[FLD (f_r2)]) = opval;
 755     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 756   }
 757
 758   return vpc;
 759 #undef FLD
 760 }
 761
 762 /* cmpgui: cmpgui $r1,$r0,$uimm */
 763
 764 static SEM_PC
 765 SEM_FN_NAME (lm32bf,cmpgui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 766 {
 767 #define FLD(f) abuf->fields.sfmt_andi.f
 768   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 769   int UNUSED written = 0;
 770   IADDR UNUSED pc = abuf->addr;
 771   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 772
 773   {
 774     SI opval = GTUSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)));
 775     CPU (h_gr[FLD (f_r1)]) = opval;
 776     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 777   }
 778
 779   return vpc;
 780 #undef FLD
 781 }
 782
 783 /* cmpne: cmpne $r2,$r0,$r1 */
 784
 785 static SEM_PC
 786 SEM_FN_NAME (lm32bf,cmpne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 787 {
 788 #define FLD(f) abuf->fields.sfmt_user.f
 789   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 790   int UNUSED written = 0;
 791   IADDR UNUSED pc = abuf->addr;
 792   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 793
 794   {
 795     SI opval = NESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 796     CPU (h_gr[FLD (f_r2)]) = opval;
 797     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 798   }
 799
 800   return vpc;
 801 #undef FLD
 802 }
 803
 804 /* cmpnei: cmpnei $r1,$r0,$imm */
 805
 806 static SEM_PC
 807 SEM_FN_NAME (lm32bf,cmpnei) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 808 {
 809 #define FLD(f) abuf->fields.sfmt_addi.f
 810   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 811   int UNUSED written = 0;
 812   IADDR UNUSED pc = abuf->addr;
 813   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 814
 815   {
 816     SI opval = NESI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))));
 817     CPU (h_gr[FLD (f_r1)]) = opval;
 818     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 819   }
 820
 821   return vpc;
 822 #undef FLD
 823 }
 824
 825 /* divu: divu $r2,$r0,$r1 */
 826
 827 static SEM_PC
 828 SEM_FN_NAME (lm32bf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 829 {
 830 #define FLD(f) abuf->fields.sfmt_user.f
 831   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 832   int UNUSED written = 0;
 833   IADDR UNUSED pc = abuf->addr;
 834   SEM_BRANCH_INIT
 835   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 836
 837   {
 838     USI opval = lm32bf_divu_insn (current_cpu, pc, FLD (f_r0), FLD (f_r1), FLD (f_r2));
 839     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 840     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 841   }
 842
 843   SEM_BRANCH_FINI (vpc);
 844   return vpc;
 845 #undef FLD
 846 }
 847
 848 /* lb: lb $r1,($r0+$imm) */
 849
 850 static SEM_PC
 851 SEM_FN_NAME (lm32bf,lb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 852 {
 853 #define FLD(f) abuf->fields.sfmt_addi.f
 854   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 855   int UNUSED written = 0;
 856   IADDR UNUSED pc = abuf->addr;
 857   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 858
 859   {
 860     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
 861     CPU (h_gr[FLD (f_r1)]) = opval;
 862     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 863   }
 864
 865   return vpc;
 866 #undef FLD
 867 }
 868
 869 /* lbu: lbu $r1,($r0+$imm) */
 870
 871 static SEM_PC
 872 SEM_FN_NAME (lm32bf,lbu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 873 {
 874 #define FLD(f) abuf->fields.sfmt_addi.f
 875   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 876   int UNUSED written = 0;
 877   IADDR UNUSED pc = abuf->addr;
 878   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 879
 880   {
 881     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
 882     CPU (h_gr[FLD (f_r1)]) = opval;
 883     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 884   }
 885
 886   return vpc;
 887 #undef FLD
 888 }
 889
 890 /* lh: lh $r1,($r0+$imm) */
 891
 892 static SEM_PC
 893 SEM_FN_NAME (lm32bf,lh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 894 {
 895 #define FLD(f) abuf->fields.sfmt_addi.f
 896   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 897   int UNUSED written = 0;
 898   IADDR UNUSED pc = abuf->addr;
 899   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 900
 901   {
 902     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
 903     CPU (h_gr[FLD (f_r1)]) = opval;
 904     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 905   }
 906
 907   return vpc;
 908 #undef FLD
 909 }
 910
 911 /* lhu: lhu $r1,($r0+$imm) */
 912
 913 static SEM_PC
 914 SEM_FN_NAME (lm32bf,lhu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 915 {
 916 #define FLD(f) abuf->fields.sfmt_addi.f
 917   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 918   int UNUSED written = 0;
 919   IADDR UNUSED pc = abuf->addr;
 920   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 921
 922   {
 923     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))))));
 924     CPU (h_gr[FLD (f_r1)]) = opval;
 925     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 926   }
 927
 928   return vpc;
 929 #undef FLD
 930 }
 931
 932 /* lw: lw $r1,($r0+$imm) */
 933
 934 static SEM_PC
 935 SEM_FN_NAME (lm32bf,lw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 936 {
 937 #define FLD(f) abuf->fields.sfmt_addi.f
 938   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 939   int UNUSED written = 0;
 940   IADDR UNUSED pc = abuf->addr;
 941   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 942
 943   {
 944     SI opval = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))));
 945     CPU (h_gr[FLD (f_r1)]) = opval;
 946     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 947   }
 948
 949   return vpc;
 950 #undef FLD
 951 }
 952
 953 /* modu: modu $r2,$r0,$r1 */
 954
 955 static SEM_PC
 956 SEM_FN_NAME (lm32bf,modu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 957 {
 958 #define FLD(f) abuf->fields.sfmt_user.f
 959   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 960   int UNUSED written = 0;
 961   IADDR UNUSED pc = abuf->addr;
 962   SEM_BRANCH_INIT
 963   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 964
 965   {
 966     USI opval = lm32bf_modu_insn (current_cpu, pc, FLD (f_r0), FLD (f_r1), FLD (f_r2));
 967     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
 968     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 969   }
 970
 971   SEM_BRANCH_FINI (vpc);
 972   return vpc;
 973 #undef FLD
 974 }
 975
 976 /* mul: mul $r2,$r0,$r1 */
 977
 978 static SEM_PC
 979 SEM_FN_NAME (lm32bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
 980 {
 981 #define FLD(f) abuf->fields.sfmt_user.f
 982   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 983   int UNUSED written = 0;
 984   IADDR UNUSED pc = abuf->addr;
 985   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 986
 987   {
 988     SI opval = MULSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
 989     CPU (h_gr[FLD (f_r2)]) = opval;
 990     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 991   }
 992
 993   return vpc;
 994 #undef FLD
 995 }
 996
 997 /* muli: muli $r1,$r0,$imm */
 998
 999 static SEM_PC
1000 SEM_FN_NAME (lm32bf,muli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1001 {
1002 #define FLD(f) abuf->fields.sfmt_addi.f
1003   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1004   int UNUSED written = 0;
1005   IADDR UNUSED pc = abuf->addr;
1006   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1007
1008   {
1009     SI opval = MULSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))));
1010     CPU (h_gr[FLD (f_r1)]) = opval;
1011     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1012   }
1013
1014   return vpc;
1015 #undef FLD
1016 }
1017
1018 /* nor: nor $r2,$r0,$r1 */
1019
1020 static SEM_PC
1021 SEM_FN_NAME (lm32bf,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1022 {
1023 #define FLD(f) abuf->fields.sfmt_user.f
1024   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1025   int UNUSED written = 0;
1026   IADDR UNUSED pc = abuf->addr;
1027   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1028
1029   {
1030     SI opval = INVSI (ORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])));
1031     CPU (h_gr[FLD (f_r2)]) = opval;
1032     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1033   }
1034
1035   return vpc;
1036 #undef FLD
1037 }
1038
1039 /* nori: nori $r1,$r0,$uimm */
1040
1041 static SEM_PC
1042 SEM_FN_NAME (lm32bf,nori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1043 {
1044 #define FLD(f) abuf->fields.sfmt_andi.f
1045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1046   int UNUSED written = 0;
1047   IADDR UNUSED pc = abuf->addr;
1048   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1049
1050   {
1051     SI opval = INVSI (ORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))));
1052     CPU (h_gr[FLD (f_r1)]) = opval;
1053     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1054   }
1055
1056   return vpc;
1057 #undef FLD
1058 }
1059
1060 /* or: or $r2,$r0,$r1 */
1061
1062 static SEM_PC
1063 SEM_FN_NAME (lm32bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1064 {
1065 #define FLD(f) abuf->fields.sfmt_user.f
1066   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1067   int UNUSED written = 0;
1068   IADDR UNUSED pc = abuf->addr;
1069   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1070
1071   {
1072     SI opval = ORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
1073     CPU (h_gr[FLD (f_r2)]) = opval;
1074     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1075   }
1076
1077   return vpc;
1078 #undef FLD
1079 }
1080
1081 /* ori: ori $r1,$r0,$lo16 */
1082
1083 static SEM_PC
1084 SEM_FN_NAME (lm32bf,ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1085 {
1086 #define FLD(f) abuf->fields.sfmt_andi.f
1087   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1088   int UNUSED written = 0;
1089   IADDR UNUSED pc = abuf->addr;
1090   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1091
1092   {
1093     SI opval = ORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)));
1094     CPU (h_gr[FLD (f_r1)]) = opval;
1095     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1096   }
1097
1098   return vpc;
1099 #undef FLD
1100 }
1101
1102 /* orhii: orhi $r1,$r0,$hi16 */
1103
1104 static SEM_PC
1105 SEM_FN_NAME (lm32bf,orhii) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1106 {
1107 #define FLD(f) abuf->fields.sfmt_andi.f
1108   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1109   int UNUSED written = 0;
1110   IADDR UNUSED pc = abuf->addr;
1111   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1112
1113   {
1114     SI opval = ORSI (CPU (h_gr[FLD (f_r0)]), SLLSI (FLD (f_uimm), 16));
1115     CPU (h_gr[FLD (f_r1)]) = opval;
1116     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1117   }
1118
1119   return vpc;
1120 #undef FLD
1121 }
1122
1123 /* rcsr: rcsr $r2,$csr */
1124
1125 static SEM_PC
1126 SEM_FN_NAME (lm32bf,rcsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1127 {
1128 #define FLD(f) abuf->fields.sfmt_rcsr.f
1129   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1130   int UNUSED written = 0;
1131   IADDR UNUSED pc = abuf->addr;
1132   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1133
1134   {
1135     SI opval = CPU (h_csr[FLD (f_csr)]);
1136     CPU (h_gr[FLD (f_r2)]) = opval;
1137     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1138   }
1139
1140   return vpc;
1141 #undef FLD
1142 }
1143
1144 /* sb: sb ($r0+$imm),$r1 */
1145
1146 static SEM_PC
1147 SEM_FN_NAME (lm32bf,sb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1148 {
1149 #define FLD(f) abuf->fields.sfmt_addi.f
1150   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1151   int UNUSED written = 0;
1152   IADDR UNUSED pc = abuf->addr;
1153   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1154
1155   {
1156     QI opval = CPU (h_gr[FLD (f_r1)]);
1157     SETMEMQI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval);
1158     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1159   }
1160
1161   return vpc;
1162 #undef FLD
1163 }
1164
1165 /* sextb: sextb $r2,$r0 */
1166
1167 static SEM_PC
1168 SEM_FN_NAME (lm32bf,sextb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1169 {
1170 #define FLD(f) abuf->fields.sfmt_user.f
1171   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1172   int UNUSED written = 0;
1173   IADDR UNUSED pc = abuf->addr;
1174   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1175
1176   {
1177     SI opval = EXTQISI (TRUNCSIQI (CPU (h_gr[FLD (f_r0)])));
1178     CPU (h_gr[FLD (f_r2)]) = opval;
1179     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1180   }
1181
1182   return vpc;
1183 #undef FLD
1184 }
1185
1186 /* sexth: sexth $r2,$r0 */
1187
1188 static SEM_PC
1189 SEM_FN_NAME (lm32bf,sexth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1190 {
1191 #define FLD(f) abuf->fields.sfmt_user.f
1192   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1193   int UNUSED written = 0;
1194   IADDR UNUSED pc = abuf->addr;
1195   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1196
1197   {
1198     SI opval = EXTHISI (TRUNCSIHI (CPU (h_gr[FLD (f_r0)])));
1199     CPU (h_gr[FLD (f_r2)]) = opval;
1200     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1201   }
1202
1203   return vpc;
1204 #undef FLD
1205 }
1206
1207 /* sh: sh ($r0+$imm),$r1 */
1208
1209 static SEM_PC
1210 SEM_FN_NAME (lm32bf,sh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1211 {
1212 #define FLD(f) abuf->fields.sfmt_addi.f
1213   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1214   int UNUSED written = 0;
1215   IADDR UNUSED pc = abuf->addr;
1216   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1217
1218   {
1219     HI opval = CPU (h_gr[FLD (f_r1)]);
1220     SETMEMHI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval);
1221     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1222   }
1223
1224   return vpc;
1225 #undef FLD
1226 }
1227
1228 /* sl: sl $r2,$r0,$r1 */
1229
1230 static SEM_PC
1231 SEM_FN_NAME (lm32bf,sl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1232 {
1233 #define FLD(f) abuf->fields.sfmt_user.f
1234   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1235   int UNUSED written = 0;
1236   IADDR UNUSED pc = abuf->addr;
1237   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1238
1239   {
1240     SI opval = SLLSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
1241     CPU (h_gr[FLD (f_r2)]) = opval;
1242     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1243   }
1244
1245   return vpc;
1246 #undef FLD
1247 }
1248
1249 /* sli: sli $r1,$r0,$imm */
1250
1251 static SEM_PC
1252 SEM_FN_NAME (lm32bf,sli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1253 {
1254 #define FLD(f) abuf->fields.sfmt_addi.f
1255   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1256   int UNUSED written = 0;
1257   IADDR UNUSED pc = abuf->addr;
1258   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1259
1260   {
1261     SI opval = SLLSI (CPU (h_gr[FLD (f_r0)]), FLD (f_imm));
1262     CPU (h_gr[FLD (f_r1)]) = opval;
1263     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1264   }
1265
1266   return vpc;
1267 #undef FLD
1268 }
1269
1270 /* sr: sr $r2,$r0,$r1 */
1271
1272 static SEM_PC
1273 SEM_FN_NAME (lm32bf,sr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1274 {
1275 #define FLD(f) abuf->fields.sfmt_user.f
1276   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1277   int UNUSED written = 0;
1278   IADDR UNUSED pc = abuf->addr;
1279   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1280
1281   {
1282     SI opval = SRASI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
1283     CPU (h_gr[FLD (f_r2)]) = opval;
1284     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1285   }
1286
1287   return vpc;
1288 #undef FLD
1289 }
1290
1291 /* sri: sri $r1,$r0,$imm */
1292
1293 static SEM_PC
1294 SEM_FN_NAME (lm32bf,sri) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1295 {
1296 #define FLD(f) abuf->fields.sfmt_addi.f
1297   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1298   int UNUSED written = 0;
1299   IADDR UNUSED pc = abuf->addr;
1300   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1301
1302   {
1303     SI opval = SRASI (CPU (h_gr[FLD (f_r0)]), FLD (f_imm));
1304     CPU (h_gr[FLD (f_r1)]) = opval;
1305     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1306   }
1307
1308   return vpc;
1309 #undef FLD
1310 }
1311
1312 /* sru: sru $r2,$r0,$r1 */
1313
1314 static SEM_PC
1315 SEM_FN_NAME (lm32bf,sru) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1316 {
1317 #define FLD(f) abuf->fields.sfmt_user.f
1318   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1319   int UNUSED written = 0;
1320   IADDR UNUSED pc = abuf->addr;
1321   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1322
1323   {
1324     SI opval = SRLSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
1325     CPU (h_gr[FLD (f_r2)]) = opval;
1326     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1327   }
1328
1329   return vpc;
1330 #undef FLD
1331 }
1332
1333 /* srui: srui $r1,$r0,$imm */
1334
1335 static SEM_PC
1336 SEM_FN_NAME (lm32bf,srui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1337 {
1338 #define FLD(f) abuf->fields.sfmt_addi.f
1339   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1340   int UNUSED written = 0;
1341   IADDR UNUSED pc = abuf->addr;
1342   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1343
1344   {
1345     SI opval = SRLSI (CPU (h_gr[FLD (f_r0)]), FLD (f_imm));
1346     CPU (h_gr[FLD (f_r1)]) = opval;
1347     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1348   }
1349
1350   return vpc;
1351 #undef FLD
1352 }
1353
1354 /* sub: sub $r2,$r0,$r1 */
1355
1356 static SEM_PC
1357 SEM_FN_NAME (lm32bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1358 {
1359 #define FLD(f) abuf->fields.sfmt_user.f
1360   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1361   int UNUSED written = 0;
1362   IADDR UNUSED pc = abuf->addr;
1363   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1364
1365   {
1366     SI opval = SUBSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
1367     CPU (h_gr[FLD (f_r2)]) = opval;
1368     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1369   }
1370
1371   return vpc;
1372 #undef FLD
1373 }
1374
1375 /* sw: sw ($r0+$imm),$r1 */
1376
1377 static SEM_PC
1378 SEM_FN_NAME (lm32bf,sw) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1379 {
1380 #define FLD(f) abuf->fields.sfmt_addi.f
1381   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1382   int UNUSED written = 0;
1383   IADDR UNUSED pc = abuf->addr;
1384   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1385
1386   {
1387     SI opval = CPU (h_gr[FLD (f_r1)]);
1388     SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval);
1389     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1390   }
1391
1392   return vpc;
1393 #undef FLD
1394 }
1395
1396 /* user: user $r2,$r0,$r1,$user */
1397
1398 static SEM_PC
1399 SEM_FN_NAME (lm32bf,user) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1400 {
1401 #define FLD(f) abuf->fields.sfmt_user.f
1402   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1403   int UNUSED written = 0;
1404   IADDR UNUSED pc = abuf->addr;
1405   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1406
1407   {
1408     SI opval = lm32bf_user_insn (current_cpu, CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]), FLD (f_user));
1409     CPU (h_gr[FLD (f_r2)]) = opval;
1410     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1411   }
1412
1413   return vpc;
1414 #undef FLD
1415 }
1416
1417 /* wcsr: wcsr $csr,$r1 */
1418
1419 static SEM_PC
1420 SEM_FN_NAME (lm32bf,wcsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1421 {
1422 #define FLD(f) abuf->fields.sfmt_wcsr.f
1423   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1424   int UNUSED written = 0;
1425   IADDR UNUSED pc = abuf->addr;
1426   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1427
1428 lm32bf_wcsr_insn (current_cpu, FLD (f_csr), CPU (h_gr[FLD (f_r1)]));
1429
1430   return vpc;
1431 #undef FLD
1432 }
1433
1434 /* xor: xor $r2,$r0,$r1 */
1435
1436 static SEM_PC
1437 SEM_FN_NAME (lm32bf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1438 {
1439 #define FLD(f) abuf->fields.sfmt_user.f
1440   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1441   int UNUSED written = 0;
1442   IADDR UNUSED pc = abuf->addr;
1443   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1444
1445   {
1446     SI opval = XORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]));
1447     CPU (h_gr[FLD (f_r2)]) = opval;
1448     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1449   }
1450
1451   return vpc;
1452 #undef FLD
1453 }
1454
1455 /* xori: xori $r1,$r0,$uimm */
1456
1457 static SEM_PC
1458 SEM_FN_NAME (lm32bf,xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1459 {
1460 #define FLD(f) abuf->fields.sfmt_andi.f
1461   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1462   int UNUSED written = 0;
1463   IADDR UNUSED pc = abuf->addr;
1464   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1465
1466   {
1467     SI opval = XORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)));
1468     CPU (h_gr[FLD (f_r1)]) = opval;
1469     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1470   }
1471
1472   return vpc;
1473 #undef FLD
1474 }
1475
1476 /* xnor: xnor $r2,$r0,$r1 */
1477
1478 static SEM_PC
1479 SEM_FN_NAME (lm32bf,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1480 {
1481 #define FLD(f) abuf->fields.sfmt_user.f
1482   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1483   int UNUSED written = 0;
1484   IADDR UNUSED pc = abuf->addr;
1485   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1486
1487   {
1488     SI opval = INVSI (XORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])));
1489     CPU (h_gr[FLD (f_r2)]) = opval;
1490     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1491   }
1492
1493   return vpc;
1494 #undef FLD
1495 }
1496
1497 /* xnori: xnori $r1,$r0,$uimm */
1498
1499 static SEM_PC
1500 SEM_FN_NAME (lm32bf,xnori) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1501 {
1502 #define FLD(f) abuf->fields.sfmt_andi.f
1503   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1504   int UNUSED written = 0;
1505   IADDR UNUSED pc = abuf->addr;
1506   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1507
1508   {
1509     SI opval = INVSI (XORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))));
1510     CPU (h_gr[FLD (f_r1)]) = opval;
1511     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1512   }
1513
1514   return vpc;
1515 #undef FLD
1516 }
1517
1518 /* break: break */
1519
1520 static SEM_PC
1521 SEM_FN_NAME (lm32bf,break) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1522 {
1523 #define FLD(f) abuf->fields.sfmt_empty.f
1524   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1525   int UNUSED written = 0;
1526   IADDR UNUSED pc = abuf->addr;
1527   SEM_BRANCH_INIT
1528   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1529
1530   {
1531     USI opval = lm32bf_break_insn (current_cpu, pc);
1532     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1533     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1534   }
1535
1536   SEM_BRANCH_FINI (vpc);
1537   return vpc;
1538 #undef FLD
1539 }
1540
1541 /* scall: scall */
1542
1543 static SEM_PC
1544 SEM_FN_NAME (lm32bf,scall) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1545 {
1546 #define FLD(f) abuf->fields.sfmt_empty.f
1547   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1548   int UNUSED written = 0;
1549   IADDR UNUSED pc = abuf->addr;
1550   SEM_BRANCH_INIT
1551   SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1552
1553   {
1554     USI opval = lm32bf_scall_insn (current_cpu, pc);
1555     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1556     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1557   }
1558
1559   SEM_BRANCH_FINI (vpc);
1560   return vpc;
1561 #undef FLD
1562 }
1563
1564 /* Table of all semantic fns.  */
1565
1566 static const struct sem_fn_desc sem_fns[] = {
1567   { LM32BF_INSN_X_INVALID, SEM_FN_NAME (lm32bf,x_invalid) },
1568   { LM32BF_INSN_X_AFTER, SEM_FN_NAME (lm32bf,x_after) },
1569   { LM32BF_INSN_X_BEFORE, SEM_FN_NAME (lm32bf,x_before) },
1570   { LM32BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (lm32bf,x_cti_chain) },
1571   { LM32BF_INSN_X_CHAIN, SEM_FN_NAME (lm32bf,x_chain) },
1572   { LM32BF_INSN_X_BEGIN, SEM_FN_NAME (lm32bf,x_begin) },
1573   { LM32BF_INSN_ADD, SEM_FN_NAME (lm32bf,add) },
1574   { LM32BF_INSN_ADDI, SEM_FN_NAME (lm32bf,addi) },
1575   { LM32BF_INSN_AND, SEM_FN_NAME (lm32bf,and) },
1576   { LM32BF_INSN_ANDI, SEM_FN_NAME (lm32bf,andi) },
1577   { LM32BF_INSN_ANDHII, SEM_FN_NAME (lm32bf,andhii) },
1578   { LM32BF_INSN_B, SEM_FN_NAME (lm32bf,b) },
1579   { LM32BF_INSN_BI, SEM_FN_NAME (lm32bf,bi) },
1580   { LM32BF_INSN_BE, SEM_FN_NAME (lm32bf,be) },
1581   { LM32BF_INSN_BG, SEM_FN_NAME (lm32bf,bg) },
1582   { LM32BF_INSN_BGE, SEM_FN_NAME (lm32bf,bge) },
1583   { LM32BF_INSN_BGEU, SEM_FN_NAME (lm32bf,bgeu) },
1584   { LM32BF_INSN_BGU, SEM_FN_NAME (lm32bf,bgu) },
1585   { LM32BF_INSN_BNE, SEM_FN_NAME (lm32bf,bne) },
1586   { LM32BF_INSN_CALL, SEM_FN_NAME (lm32bf,call) },
1587   { LM32BF_INSN_CALLI, SEM_FN_NAME (lm32bf,calli) },
1588   { LM32BF_INSN_CMPE, SEM_FN_NAME (lm32bf,cmpe) },
1589   { LM32BF_INSN_CMPEI, SEM_FN_NAME (lm32bf,cmpei) },
1590   { LM32BF_INSN_CMPG, SEM_FN_NAME (lm32bf,cmpg) },
1591   { LM32BF_INSN_CMPGI, SEM_FN_NAME (lm32bf,cmpgi) },
1592   { LM32BF_INSN_CMPGE, SEM_FN_NAME (lm32bf,cmpge) },
1593   { LM32BF_INSN_CMPGEI, SEM_FN_NAME (lm32bf,cmpgei) },
1594   { LM32BF_INSN_CMPGEU, SEM_FN_NAME (lm32bf,cmpgeu) },
1595   { LM32BF_INSN_CMPGEUI, SEM_FN_NAME (lm32bf,cmpgeui) },
1596   { LM32BF_INSN_CMPGU, SEM_FN_NAME (lm32bf,cmpgu) },
1597   { LM32BF_INSN_CMPGUI, SEM_FN_NAME (lm32bf,cmpgui) },
1598   { LM32BF_INSN_CMPNE, SEM_FN_NAME (lm32bf,cmpne) },
1599   { LM32BF_INSN_CMPNEI, SEM_FN_NAME (lm32bf,cmpnei) },
1600   { LM32BF_INSN_DIVU, SEM_FN_NAME (lm32bf,divu) },
1601   { LM32BF_INSN_LB, SEM_FN_NAME (lm32bf,lb) },
1602   { LM32BF_INSN_LBU, SEM_FN_NAME (lm32bf,lbu) },
1603   { LM32BF_INSN_LH, SEM_FN_NAME (lm32bf,lh) },
1604   { LM32BF_INSN_LHU, SEM_FN_NAME (lm32bf,lhu) },
1605   { LM32BF_INSN_LW, SEM_FN_NAME (lm32bf,lw) },
1606   { LM32BF_INSN_MODU, SEM_FN_NAME (lm32bf,modu) },
1607   { LM32BF_INSN_MUL, SEM_FN_NAME (lm32bf,mul) },
1608   { LM32BF_INSN_MULI, SEM_FN_NAME (lm32bf,muli) },
1609   { LM32BF_INSN_NOR, SEM_FN_NAME (lm32bf,nor) },
1610   { LM32BF_INSN_NORI, SEM_FN_NAME (lm32bf,nori) },
1611   { LM32BF_INSN_OR, SEM_FN_NAME (lm32bf,or) },
1612   { LM32BF_INSN_ORI, SEM_FN_NAME (lm32bf,ori) },
1613   { LM32BF_INSN_ORHII, SEM_FN_NAME (lm32bf,orhii) },
1614   { LM32BF_INSN_RCSR, SEM_FN_NAME (lm32bf,rcsr) },
1615   { LM32BF_INSN_SB, SEM_FN_NAME (lm32bf,sb) },
1616   { LM32BF_INSN_SEXTB, SEM_FN_NAME (lm32bf,sextb) },
1617   { LM32BF_INSN_SEXTH, SEM_FN_NAME (lm32bf,sexth) },
1618   { LM32BF_INSN_SH, SEM_FN_NAME (lm32bf,sh) },
1619   { LM32BF_INSN_SL, SEM_FN_NAME (lm32bf,sl) },
1620   { LM32BF_INSN_SLI, SEM_FN_NAME (lm32bf,sli) },
1621   { LM32BF_INSN_SR, SEM_FN_NAME (lm32bf,sr) },
1622   { LM32BF_INSN_SRI, SEM_FN_NAME (lm32bf,sri) },
1623   { LM32BF_INSN_SRU, SEM_FN_NAME (lm32bf,sru) },
1624   { LM32BF_INSN_SRUI, SEM_FN_NAME (lm32bf,srui) },
1625   { LM32BF_INSN_SUB, SEM_FN_NAME (lm32bf,sub) },
1626   { LM32BF_INSN_SW, SEM_FN_NAME (lm32bf,sw) },
1627   { LM32BF_INSN_USER, SEM_FN_NAME (lm32bf,user) },
1628   { LM32BF_INSN_WCSR, SEM_FN_NAME (lm32bf,wcsr) },
1629   { LM32BF_INSN_XOR, SEM_FN_NAME (lm32bf,xor) },
1630   { LM32BF_INSN_XORI, SEM_FN_NAME (lm32bf,xori) },
1631   { LM32BF_INSN_XNOR, SEM_FN_NAME (lm32bf,xnor) },
1632   { LM32BF_INSN_XNORI, SEM_FN_NAME (lm32bf,xnori) },
1633   { LM32BF_INSN_BREAK, SEM_FN_NAME (lm32bf,break) },
1634   { LM32BF_INSN_SCALL, SEM_FN_NAME (lm32bf,scall) },
1635   { 0, 0 }
1636 };
1637
1638 /* Add the semantic fns to IDESC_TABLE.  */
1639
1640 void
1641 SEM_FN_NAME (lm32bf,init_idesc_table) (SIM_CPU *current_cpu)
1642 {
1643   IDESC *idesc_table = CPU_IDESC (current_cpu);
1644   const struct sem_fn_desc *sf;
1645   int mach_num = MACH_NUM (CPU_MACH (current_cpu));
1646
1647   for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
1648     {
1649       const CGEN_INSN *insn = idesc_table[sf->index].idata;
1650       int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
1651                      || CGEN_INSN_MACH_HAS_P (insn, mach_num));
1652 #if FAST_P
1653       if (valid_p)
1654         idesc_table[sf->index].sem_fast = sf->fn;
1655       else
1656         idesc_table[sf->index].sem_fast = SEM_FN_NAME (lm32bf,x_invalid);
1657 #else
1658       if (valid_p)
1659         idesc_table[sf->index].sem_full = sf->fn;
1660       else
1661         idesc_table[sf->index].sem_full = SEM_FN_NAME (lm32bf,x_invalid);
1662 #endif
1663     }
1664 }
1665