arm: Support pac_key_* register operand for MRS/MSR in Armv8.1-M Mainline
[binutils-gdb.git] / sim / m32r / cpu.c
blob8605cf798e028fd3bc5bf38a716f040c8d5208a3
1 /* Misc. support for CPU family m32rbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996-2024 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #define WANT_CPU m32rbf
26 #define WANT_CPU_M32RBF
28 #include "sim-main.h"
29 #include "cgen-ops.h"
31 /* Get the value of h-pc. */
33 USI
34 m32rbf_h_pc_get (SIM_CPU *current_cpu)
36 return CPU (h_pc);
39 /* Set a value for h-pc. */
41 void
42 m32rbf_h_pc_set (SIM_CPU *current_cpu, USI newval)
44 CPU (h_pc) = newval;
47 /* Get the value of h-gr. */
50 m32rbf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
52 return CPU (h_gr[regno]);
55 /* Set a value for h-gr. */
57 void
58 m32rbf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
60 CPU (h_gr[regno]) = newval;
63 /* Get the value of h-cr. */
65 USI
66 m32rbf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
68 return GET_H_CR (regno);
71 /* Set a value for h-cr. */
73 void
74 m32rbf_h_cr_set (SIM_CPU *current_cpu, UINT regno, USI newval)
76 SET_H_CR (regno, newval);
79 /* Get the value of h-accum. */
82 m32rbf_h_accum_get (SIM_CPU *current_cpu)
84 return GET_H_ACCUM ();
87 /* Set a value for h-accum. */
89 void
90 m32rbf_h_accum_set (SIM_CPU *current_cpu, DI newval)
92 SET_H_ACCUM (newval);
95 /* Get the value of h-cond. */
98 m32rbf_h_cond_get (SIM_CPU *current_cpu)
100 return CPU (h_cond);
103 /* Set a value for h-cond. */
105 void
106 m32rbf_h_cond_set (SIM_CPU *current_cpu, BI newval)
108 CPU (h_cond) = newval;
111 /* Get the value of h-psw. */
114 m32rbf_h_psw_get (SIM_CPU *current_cpu)
116 return GET_H_PSW ();
119 /* Set a value for h-psw. */
121 void
122 m32rbf_h_psw_set (SIM_CPU *current_cpu, UQI newval)
124 SET_H_PSW (newval);
127 /* Get the value of h-bpsw. */
130 m32rbf_h_bpsw_get (SIM_CPU *current_cpu)
132 return CPU (h_bpsw);
135 /* Set a value for h-bpsw. */
137 void
138 m32rbf_h_bpsw_set (SIM_CPU *current_cpu, UQI newval)
140 CPU (h_bpsw) = newval;
143 /* Get the value of h-bbpsw. */
146 m32rbf_h_bbpsw_get (SIM_CPU *current_cpu)
148 return CPU (h_bbpsw);
151 /* Set a value for h-bbpsw. */
153 void
154 m32rbf_h_bbpsw_set (SIM_CPU *current_cpu, UQI newval)
156 CPU (h_bbpsw) = newval;
159 /* Get the value of h-lock. */
162 m32rbf_h_lock_get (SIM_CPU *current_cpu)
164 return CPU (h_lock);
167 /* Set a value for h-lock. */
169 void
170 m32rbf_h_lock_set (SIM_CPU *current_cpu, BI newval)
172 CPU (h_lock) = newval;