arm: Support pac_key_* register operand for MRS/MSR in Armv8.1-M Mainline
[binutils-gdb.git] / sim / m32r / local.mk
blob4318255b102f52cc9766de2e959311bb1ea45679
1 ## See sim/Makefile.am
2 ##
3 ## Copyright (C) 1996-2024 Free Software Foundation, Inc.
4 ## Contributed by Cygnus Support.
5 ##
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 3 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program. If not, see <http://www.gnu.org/licenses/>.
19 nodist_%C%_libsim_a_SOURCES = \
20 %D%/modules.c
21 %C%_libsim_a_SOURCES = \
22 $(common_libcommon_a_SOURCES)
23 %C%_libsim_a_LIBADD = \
24 $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \
25 $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \
26 $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \
28 %D%/cgen-run.o \
29 %D%/cgen-scache.o \
30 %D%/cgen-trace.o \
31 %D%/cgen-utils.o \
33 %D%/arch.o \
35 %D%/m32r.o \
36 %D%/cpu.o \
37 %D%/decode.o \
38 %D%/sem.o \
39 %D%/model.o \
40 %D%/mloop.o \
42 %D%/m32rx.o \
43 %D%/cpux.o \
44 %D%/decodex.o \
45 %D%/modelx.o \
46 %D%/mloopx.o \
48 %D%/m32r2.o \
49 %D%/cpu2.o \
50 %D%/decode2.o \
51 %D%/model2.o \
52 %D%/mloop2.o \
54 %D%/sim-if.o \
55 %D%/traps.o
56 $(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h
58 noinst_LIBRARIES += %D%/libsim.a
60 ## Override wildcards that trigger common/modules.c to be (incorrectly) used.
61 %D%/modules.o: %D%/modules.c
63 %D%/%.o: common/%.c ; $(SIM_COMPILE)
64 -@am__include@ %D%/$(DEPDIR)/*.Po
66 %C%_run_SOURCES =
67 %C%_run_LDADD = \
68 %D%/nrun.o \
69 %D%/libsim.a \
70 $(SIM_COMMON_LIBS)
72 noinst_PROGRAMS += %D%/run
74 %C%_SIM_EXTRA_HW_DEVICES = m32r_cache m32r_uart
76 ## List all generated headers to help Automake dependency tracking.
77 BUILT_SOURCES += \
78 %D%/eng.h \
79 %D%/engx.h \
80 %D%/eng2.h
81 %C%_BUILD_OUTPUTS = \
82 %D%/mloop.c \
83 %D%/stamp-mloop \
84 %D%/mloopx.c \
85 %D%/stamp-mloop-x \
86 %D%/mloop2.c \
87 %D%/stamp-mloop-2
89 ## Generating modules.c requires all sources to scan.
90 %D%/modules.c: | $(%C%_BUILD_OUTPUTS)
92 ## FIXME: Use of `mono' is wip.
93 %D%/mloop.c %D%/eng.h: %D%/stamp-mloop ; @true
94 %D%/stamp-mloop: %D%/mloop.in $(srccom)/genmloop.sh
95 $(AM_V_GEN)$(CGEN_GEN_MLOOP) \
96 -mono -fast -pbb -switch sem-switch.c \
97 -cpu m32rbf
98 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change %D%/eng.hin %D%/eng.h
99 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change %D%/mloop.cin %D%/mloop.c
100 $(AM_V_at)touch $@
102 ## FIXME: Use of `mono' is wip.
103 %D%/mloopx.c %D%/engx.h: %D%/stamp-mloop-x ; @true
104 %D%/stamp-mloop-x: %D%/mloopx.in $(srccom)/genmloop.sh
105 $(AM_V_GEN)$(CGEN_GEN_MLOOP) \
106 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
107 -cpu m32rxf -outfile-suffix x
108 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change %D%/engx.hin %D%/engx.h
109 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change %D%/mloopx.cin %D%/mloopx.c
110 $(AM_V_at)touch $@
112 ## FIXME: Use of `mono' is wip.
113 %D%/mloop2.c %D%/eng2.h: %D%/stamp-mloop-2 ; @true
114 %D%/stamp-mloop-2: %D%/mloop2.in $(srccom)/genmloop.sh
115 $(AM_V_GEN)$(CGEN_GEN_MLOOP) \
116 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
117 -cpu m32r2f -outfile-suffix 2
118 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change %D%/eng2.hin %D%/eng2.h
119 $(AM_V_at)$(SHELL) $(srcroot)/move-if-change %D%/mloop2.cin %D%/mloop2.c
120 $(AM_V_at)touch $@
122 CLEANFILES += %D%/eng.h %D%/engx.h %D%/eng2.h
123 MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
125 ## Target that triggers all cgen targets that works when --disable-cgen-maint.
126 %D%/cgen: %D%/cgen-arch %D%/cgen-cpu-decode %D%/cgen-cpu-decode-x %D%/cgen-cpu-decode-2
128 %D%/cgen-arch:
129 $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
130 $(srcdir)/%D%/arch.h $(srcdir)/%D%/arch.c $(srcdir)/%D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
132 %D%/cgen-cpu-decode:
133 $(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
134 $(srcdir)/%D%/cpu.h $(srcdir)/%D%/sem.c $(srcdir)/%D%/sem-switch.c $(srcdir)/%D%/model.c $(srcdir)/%D%/decode.c $(srcdir)/%D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
136 %D%/cgen-cpu-decode-x:
137 $(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
138 $(srcdir)/%D%/cpux.h $(srcdir)/%D%/semx-switch.c $(srcdir)/%D%/modelx.c $(srcdir)/%D%/decodex.c $(srcdir)/%D%/decodex.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-x
140 %D%/cgen-cpu-decode-2:
141 $(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
142 $(srcdir)/%D%/cpu2.h $(srcdir)/%D%/sem2-switch.c $(srcdir)/%D%/model2.c $(srcdir)/%D%/decode2.c $(srcdir)/%D%/decode2.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-2