arm: Support pac_key_* register operand for MRS/MSR in Armv8.1-M Mainline
[binutils-gdb.git] / sim / testsuite / sh / fsqrt.s
blobcb61bcf40856eb30b14346a9b5ce4f1f424198c8
1 # sh testcase for fsqrt
2 # mach: sh
3 # as(sh): -defsym sim_cpu=0
5 .include "testutils.inc"
7 start
8 fsqrt_single:
9 set_grs_a5a5
10 set_fprs_a5a5
11 # sqrt(0.0) = 0.0.
12 fldi0 fr0
13 fsqrt fr0
14 fldi0 fr1
15 fcmp/eq fr0, fr1
16 bt .L0
17 fail
18 .L0:
19 # sqrt(1.0) = 1.0.
20 fldi1 fr0
21 fsqrt fr0
22 fldi1 fr1
23 fcmp/eq fr0, fr1
24 bt .L1
25 fail
26 .L1:
27 # sqrt(4.0) = 2.0
28 fldi1 fr0
29 # Double it.
30 fadd fr0, fr0
31 # Double it again.
32 fadd fr0, fr0
33 fsqrt fr0
34 fldi1 fr1
35 # Double it.
36 fadd fr1, fr1
37 fcmp/eq fr0, fr1
38 bt .L2
39 fail
40 .L2:
41 test_grs_a5a5
42 assert_fpreg_i 2, fr0
43 assert_fpreg_i 2, fr1
44 test_fpr_a5a5 fr2
45 test_fpr_a5a5 fr3
46 test_fpr_a5a5 fr4
47 test_fpr_a5a5 fr5
48 test_fpr_a5a5 fr6
49 test_fpr_a5a5 fr7
50 test_fpr_a5a5 fr8
51 test_fpr_a5a5 fr9
52 test_fpr_a5a5 fr10
53 test_fpr_a5a5 fr11
54 test_fpr_a5a5 fr12
55 test_fpr_a5a5 fr13
56 test_fpr_a5a5 fr14
57 test_fpr_a5a5 fr15
59 fsqrt_double:
60 double_prec
61 set_grs_a5a5
62 set_fprs_a5a5
63 # sqrt(0.0) = 0.0.
64 fldi0 fr0
65 _s2d fr0, dr0
66 fsqrt dr0
67 fldi0 fr2
68 _s2d fr2, dr2
69 fcmp/eq dr0, dr2
70 bt .L10
71 fail
72 .L10:
73 # sqrt(1.0) = 1.0.
74 fldi1 fr0
75 _s2d fr0, dr0
76 fsqrt dr0
77 fldi1 fr2
78 _s2d fr2, dr2
79 fcmp/eq dr0, dr2
80 bt .L11
81 fail
82 .L11:
83 # sqrt(4.0) = 2.0.
84 fldi1 fr0
85 # Double it.
86 single_prec
87 fadd fr0, fr0
88 # Double it again.
89 fadd fr0, fr0
90 double_prec
91 _s2d fr0, dr0
92 fsqrt dr0
93 fldi1 fr2
94 # Double it.
95 single_prec
96 fadd fr2, fr2
97 double_prec
98 _s2d fr2, dr2
99 fcmp/eq dr0, dr2
100 bt .L12
101 fail
102 .L12:
103 test_grs_a5a5
104 assert_dpreg_i 2, dr0
105 assert_dpreg_i 2, dr2
106 test_fpr_a5a5 fr4
107 test_fpr_a5a5 fr5
108 test_fpr_a5a5 fr6
109 test_fpr_a5a5 fr7
110 test_fpr_a5a5 fr8
111 test_fpr_a5a5 fr9
112 test_fpr_a5a5 fr10
113 test_fpr_a5a5 fr11
114 test_fpr_a5a5 fr12
115 test_fpr_a5a5 fr13
116 test_fpr_a5a5 fr14
117 test_fpr_a5a5 fr15
119 pass
120 exit 0