sim/testsuite/sh/fsrra.s

   1 # sh testcase for fsrra
   2 # mach: sh
   3 # as(sh):       -defsym sim_cpu=0
   4 # xerror: test hasn't been run in a long time
   5
   6         .include "testutils.inc"
   7
   8         start
   9 fsrra_single:
  10         set_grs_a5a5
  11         set_fprs_a5a5
  12         # 1/sqrt(0.0) = +infinity.
  13         fldi0   fr0
  14         fsrra   fr0
  15         assert_fpreg_x  0x7f800000, fr0
  16
  17         # 1/sqrt(1.0) = 1.0.
  18         fldi1   fr0
  19         fsrra   fr0
  20         assert_fpreg_i  1, fr0
  21
  22         # 1/sqrt(4.0) = 1/2.0
  23         fldi1   fr0
  24         # Double it.
  25         fadd    fr0, fr0
  26         # Double it again.
  27         fadd    fr0, fr0
  28         fsrra   fr0
  29         fldi1   fr2
  30         # Double it.
  31         fadd    fr2, fr2
  32         fldi1   fr1
  33         # Divide
  34         fdiv    fr2, fr1
  35         fcmp/eq fr0, fr1
  36         bt      .L2
  37         fail
  38 .L2:
  39         # Double-check (pun intended)
  40         fadd    fr0, fr0
  41         assert_fpreg_i  1, fr0
  42         fadd    fr1, fr1
  43         assert_fpreg_i  1, fr1
  44
  45         # And make sure the rest of the regs are un-affected.
  46         assert_fpreg_i  2, fr2
  47         test_fpr_a5a5   fr3
  48         test_fpr_a5a5   fr4
  49         test_fpr_a5a5   fr5
  50         test_fpr_a5a5   fr6
  51         test_fpr_a5a5   fr7
  52         test_fpr_a5a5   fr8
  53         test_fpr_a5a5   fr9
  54         test_fpr_a5a5   fr10
  55         test_fpr_a5a5   fr11
  56         test_fpr_a5a5   fr12
  57         test_fpr_a5a5   fr13
  58         test_fpr_a5a5   fr14
  59         test_fpr_a5a5   fr15
  60         test_grs_a5a5
  61
  62         pass
  63         exit 0