3 ## Copyright (C) 1995-2023 Free Software Foundation, Inc.
4 ## Written by Cygnus Support.
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 3 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program. If not, see <http://www.gnu.org/licenses/>.
25 noinst_PROGRAMS
+= %D
%/run
27 %C
%_SIM_EXTRA_HW_DEVICES
= tx3904cpu tx3904irc tx3904tmr tx3904sio
28 AM_MAKEFLAGS
+= %C
%_SIM_EXTRA_HW_DEVICES
="$(%C%_SIM_EXTRA_HW_DEVICES)"
30 %C
%_BUILT_SRC_FROM_IGEN_ITABLE
= \
33 %C
%_BUILT_SRC_FROM_GEN_MODE_SINGLE
= \
47 %C
%_BUILT_SRC_FROM_GEN_MODE_M16_M16
= \
58 %C
%_BUILT_SRC_FROM_GEN_MODE_M16_M32
= \
70 $(%C
%_BUILT_SRC_FROM_IGEN_ITABLE
) \
72 if SIM_MIPS_GEN_MODE_SINGLE
73 %C
%_BUILD_OUTPUTS
+= \
74 $(%C
%_BUILT_SRC_FROM_GEN_MODE_SINGLE
) \
75 %D
%/stamp-gen-mode-single
77 if SIM_MIPS_GEN_MODE_M16
78 %C
%_BUILD_OUTPUTS
+= \
79 $(%C
%_BUILT_SRC_FROM_GEN_MODE_M16_M16
) \
80 $(%C
%_BUILT_SRC_FROM_GEN_MODE_M16_M32
) \
81 %D
%/stamp-gen-mode-m16-m16 \
82 %D
%/stamp-gen-mode-m16-m32
84 if SIM_MIPS_GEN_MODE_MULTI
85 %C
%_BUILD_OUTPUTS
+= \
86 $(SIM_MIPS_MULTI_SRC
) \
87 %D
%/stamp-gen-mode-multi-igen \
88 %D
%/stamp-gen-mode-multi-run
91 ## This makes sure build tools are available before building the arch-subdirs.
92 SIM_ALL_RECURSIVE_DEPS
+= $(%C
%_BUILD_OUTPUTS
)
94 $(%C
%_BUILT_SRC_FROM_IGEN_ITABLE
): %D
%/stamp-igen-itable
95 $(%C
%_BUILT_SRC_FROM_GEN_MODE_SINGLE
): %D
%/stamp-gen-mode-single
96 $(%C
%_BUILT_SRC_FROM_GEN_MODE_M16_M16
): %D
%/stamp-gen-mode-m16-m16
97 $(%C
%_BUILT_SRC_FROM_GEN_MODE_M16_M32
): %D
%/stamp-gen-mode-m16-m32
98 $(SIM_MIPS_MULTI_SRC
): %D
%/stamp-gen-mode-multi-igen
%D
%/stamp-gen-mode-multi-run
100 %C
%_IGEN_TRACE
= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
101 %C
%_IGEN_INSN
= $(srcdir)/%D
%/mips.igen
102 %C
%_IGEN_INSN_INC
= \
108 %D
%/micromipsdsp.igen \
110 %D
%/mips3264r2.igen \
111 %D
%/mips3264r6.igen \
116 %C
%_IGEN_DC
= $(srcdir)/%D
%/mips.dc
117 %C
%_M16_DC
= $(srcdir)/%D
%/m16.dc
118 %C
%_MICROMIPS32_DC
= $(srcdir)/%D
%/micromips.dc
119 %C
%_MICROMIPS16_DC
= $(srcdir)/%D
%/micromips16.dc
121 ## NB: Since these can be built by a number of generators, care
122 ## must be taken to ensure that they are only dependant on
123 ## one of those generators.
124 %D
%/stamp-igen-itable
: $(%C
%_IGEN_INSN
) $(%C
%_IGEN_INSN_INC
) $(IGEN
)
125 $(AM_V_GEN
)$(IGEN_RUN
) \
132 $(SIM_MIPS_IGEN_ITABLE_FLAGS
) \
133 -G gen-direct-access \
135 -i
$(%C
%_IGEN_INSN
) \
136 -n itable.h
-ht
%D
%/itable.h \
137 -n itable.c
-t
%D
%/itable.c
140 %D
%/stamp-gen-mode-single
: $(%C
%_IGEN_INSN
) $(%C
%_IGEN_INSN_INC
) $(%C
%_IGEN_DC
) $(IGEN
)
141 $(AM_V_GEN
)$(IGEN_RUN
) \
146 $(SIM_MIPS_SINGLE_FLAGS
) \
147 -G gen-direct-access \
151 -i
$(%C
%_IGEN_INSN
) \
154 -n icache.h
-hc
%D
%/icache.h \
155 -n icache.c
-c
%D
%/icache.c \
156 -n semantics.h
-hs
%D
%/semantics.h \
157 -n semantics.c
-s
%D
%/semantics.c \
158 -n idecode.h
-hd
%D
%/idecode.h \
159 -n idecode.c
-d
%D
%/idecode.c \
160 -n model.h
-hm
%D
%/model.h \
161 -n model.c
-m
%D
%/model.c \
162 -n support.h
-hf
%D
%/support.h \
163 -n support.c
-f
%D
%/support.c \
164 -n engine.h
-he
%D
%/engine.h \
165 -n engine.c
-e
%D
%/engine.c \
166 -n irun.c
-r
%D
%/irun.c
169 %D
%/stamp-gen-mode-m16-m16
: $(%C
%_IGEN_INSN
) $(%C
%_IGEN_INSN_INC
) $(%C
%_M16_DC
) $(IGEN
)
170 $(AM_V_GEN
)$(IGEN_RUN
) \
175 $(SIM_MIPS_M16_FLAGS
) \
176 -G gen-direct-access \
180 -i
$(%C
%_IGEN_INSN
) \
184 -n m16_icache.h
-hc
%D
%/m16_icache.h \
185 -n m16_icache.c
-c
%D
%/m16_icache.c \
186 -n m16_semantics.h
-hs
%D
%/m16_semantics.h \
187 -n m16_semantics.c
-s
%D
%/m16_semantics.c \
188 -n m16_idecode.h
-hd
%D
%/m16_idecode.h \
189 -n m16_idecode.c
-d
%D
%/m16_idecode.c \
190 -n m16_model.h
-hm
%D
%/m16_model.h \
191 -n m16_model.c
-m
%D
%/m16_model.c \
192 -n m16_support.h
-hf
%D
%/m16_support.h \
193 -n m16_support.c
-f
%D
%/m16_support.c
196 %D
%/stamp-gen-mode-m16-m32
: $(%C
%_IGEN_INSN
) $(%C
%_IGEN_INSN_INC
) $(%C
%_IGEN_DC
) $(IGEN
)
197 $(AM_V_GEN
)$(IGEN_RUN
) \
202 $(SIM_MIPS_SINGLE_FLAGS
) \
203 -G gen-direct-access \
207 -i
$(%C
%_IGEN_INSN
) \
211 -n m32_icache.h
-hc
%D
%/m32_icache.h \
212 -n m32_icache.c
-c
%D
%/m32_icache.c \
213 -n m32_semantics.h
-hs
%D
%/m32_semantics.h \
214 -n m32_semantics.c
-s
%D
%/m32_semantics.c \
215 -n m32_idecode.h
-hd
%D
%/m32_idecode.h \
216 -n m32_idecode.c
-d
%D
%/m32_idecode.c \
217 -n m32_model.h
-hm
%D
%/m32_model.h \
218 -n m32_model.c
-m
%D
%/m32_model.c \
219 -n m32_support.h
-hf
%D
%/m32_support.h \
220 -n m32_support.c
-f
%D
%/m32_support.c
223 %D
%/stamp-gen-mode-multi-igen
: $(%C
%_IGEN_INSN
) $(%C
%_IGEN_INSN_INC
) $(%C
%_IGEN_DC
) $(%C
%_M16_DC
) $(%C
%_MICROMIPS32_DC
) $(%C
%_MICROMIPS16_DC
) $(IGEN
)
225 for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
226 p
=`echo $${t} | sed -e 's/:.*//'` ; \
227 m
=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
228 f
=`echo $${t} | sed -e 's/.*://'` ; \
231 e
="-B 16 -H 15 -o $(%C%_MICROMIPS16_DC) -F 16" ;; \
232 micromips32
* | micromips64
*) \
233 e
="-B 32 -H 31 -o $(%C%_MICROMIPS32_DC) -F $${f}" ;; \
235 e
="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
236 m
="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
238 e
="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
239 m
="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
241 e
="-B 16 -H 15 -o $(%C%_M16_DC) -F 16" ;; \
243 e
="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}" ;; \
252 -G gen-direct-access \
254 -i
$(%C
%_IGEN_INSN
) \
257 -n
$${p}_icache.h
-hc
%D
%/$${p}_icache.h \
258 -n
$${p}_icache.c
-c
%D
%/$${p}_icache.c \
259 -n
$${p}_semantics.h
-hs
%D
%/$${p}_semantics.h \
260 -n
$${p}_semantics.c
-s
%D
%/$${p}_semantics.c \
261 -n
$${p}_idecode.h
-hd
%D
%/$${p}_idecode.h \
262 -n
$${p}_idecode.c
-d
%D
%/$${p}_idecode.c \
263 -n
$${p}_model.h
-hm
%D
%/$${p}_model.h \
264 -n
$${p}_model.c
-m
%D
%/$${p}_model.c \
265 -n
$${p}_support.h
-hf
%D
%/$${p}_support.h \
266 -n
$${p}_support.c
-f
%D
%/$${p}_support.c \
267 -n
$${p}_engine.h
-he
%D
%/$${p}_engine.h \
268 -n
$${p}_engine.c
-e
%D
%/$${p}_engine.c \
273 %D
%/stamp-gen-mode-multi-run
: %D
%/m16run.c
%D
%/micromipsrun.c
275 for t in
$(SIM_MIPS_MULTI_IGEN_CONFIGS
); do \
278 m
=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
279 o
=%D
%/m16
$${m}_run.c
; \
280 sed
< $(srcdir)/%D
%/m16run.c
> $$o.tmp \
281 -e
"s/^sim_/m16$${m}_/" \
282 -e
"/include/s/sim-engine/m16$${m}_engine/" \
283 -e
"s/m16_/m16$${m}_/" \
284 -e
"s/m32_/m32$${m}_/" \
286 $(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
289 m
=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
290 o
=%D
%/micromips
$${m}_run.c
; \
291 sed
< $(srcdir)/%D
%/micromipsrun.c
> $$o.tmp \
292 -e
"s/^sim_/micromips32$${m}_/" \
293 -e
"/include/s/sim-engine/micromips32$${m}_engine/" \
294 -e
"s/micromips16_/micromips16$${m}_/" \
295 -e
"s/micromips32_/micromips32$${m}_/" \
296 -e
"s/m32_/m32$${m}_/" \
298 $(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
301 m
=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
302 o
=%D
%/micromips
$${m}_run.c
; \
303 sed
< $(srcdir)/%D
%/micromipsrun.c
> $$o.tmp \
304 -e
"s/^sim_/micromips64$${m}_/" \
305 -e
"/include/s/sim-engine/micromips64$${m}_engine/" \
306 -e
"s/micromips16_/micromips16$${m}_/" \
307 -e
"s/micromips32_/micromips64$${m}_/" \
308 -e
"s/m32_/m64$${m}_/" \
310 $(SHELL
) $(srcroot
)/move-if-change
$$o.tmp
$$o; \
316 MOSTLYCLEANFILES
+= $(%C
%_BUILD_OUTPUTS
)
317 ## These are created by mips/acinclude.m4 during configure time.
318 DISTCLEANFILES
+= %D
%/multi-include.h
%D
%/multi-run.c