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Update copyright year range in header of all files managed by GDB
[binutils-gdb.git] / sim / or1k / model.c
blob32442802ce1c81baa448b8b50f93eec14df78a82
1 /* Simulator model support for or1k32bf.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright (C) 1996-2023 Free Software Foundation, Inc.
6
7 This file is part of the GNU simulators.
8
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
23 */
24
25 #define WANT_CPU or1k32bf
26 #define WANT_CPU_OR1K32BF
27
28 #include "sim-main.h"
29
30 /* The profiling data is recorded here, but is accessed via the profiling
31 mechanism. After all, this is information for profiling. */
32
33 #if WITH_PROFILE_MODEL_P
34
35 /* Model handlers for each insn. */
36
37 static int
38 model_or1200_l_j (SIM_CPU *current_cpu, void *sem_arg)
39 {
40 #define FLD(f) abuf->fields.sfmt_l_j.f
41 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
42 const IDESC * UNUSED idesc = abuf->idesc;
43 int cycles = 0;
44 {
45 int referenced = 0;
46 int UNUSED insn_referenced = abuf->written;
47 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
48 }
49 return cycles;
50 #undef FLD
51 }
52
53 static int
54 model_or1200_l_adrp (SIM_CPU *current_cpu, void *sem_arg)
55 {
56 #define FLD(f) abuf->fields.sfmt_l_adrp.f
57 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
58 const IDESC * UNUSED idesc = abuf->idesc;
59 int cycles = 0;
60 {
61 int referenced = 0;
62 int UNUSED insn_referenced = abuf->written;
63 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
64 }
65 return cycles;
66 #undef FLD
67 }
68
69 static int
70 model_or1200_l_jal (SIM_CPU *current_cpu, void *sem_arg)
71 {
72 #define FLD(f) abuf->fields.sfmt_l_j.f
73 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
74 const IDESC * UNUSED idesc = abuf->idesc;
75 int cycles = 0;
76 {
77 int referenced = 0;
78 int UNUSED insn_referenced = abuf->written;
79 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
80 }
81 return cycles;
82 #undef FLD
83 }
84
85 static int
86 model_or1200_l_jr (SIM_CPU *current_cpu, void *sem_arg)
87 {
88 #define FLD(f) abuf->fields.sfmt_l_sll.f
89 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
90 const IDESC * UNUSED idesc = abuf->idesc;
91 int cycles = 0;
92 {
93 int referenced = 0;
94 int UNUSED insn_referenced = abuf->written;
95 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
96 }
97 return cycles;
98 #undef FLD
99 }
100
101 static int
102 model_or1200_l_jalr (SIM_CPU *current_cpu, void *sem_arg)
103 {
104 #define FLD(f) abuf->fields.sfmt_l_sll.f
105 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
106 const IDESC * UNUSED idesc = abuf->idesc;
107 int cycles = 0;
108 {
109 int referenced = 0;
110 int UNUSED insn_referenced = abuf->written;
111 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
112 }
113 return cycles;
114 #undef FLD
115 }
116
117 static int
118 model_or1200_l_bnf (SIM_CPU *current_cpu, void *sem_arg)
119 {
120 #define FLD(f) abuf->fields.sfmt_l_j.f
121 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
122 const IDESC * UNUSED idesc = abuf->idesc;
123 int cycles = 0;
124 {
125 int referenced = 0;
126 int UNUSED insn_referenced = abuf->written;
127 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
128 }
129 return cycles;
130 #undef FLD
131 }
132
133 static int
134 model_or1200_l_bf (SIM_CPU *current_cpu, void *sem_arg)
135 {
136 #define FLD(f) abuf->fields.sfmt_l_j.f
137 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
138 const IDESC * UNUSED idesc = abuf->idesc;
139 int cycles = 0;
140 {
141 int referenced = 0;
142 int UNUSED insn_referenced = abuf->written;
143 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
144 }
145 return cycles;
146 #undef FLD
147 }
148
149 static int
150 model_or1200_l_trap (SIM_CPU *current_cpu, void *sem_arg)
151 {
152 #define FLD(f) abuf->fields.sfmt_empty.f
153 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
154 const IDESC * UNUSED idesc = abuf->idesc;
155 int cycles = 0;
156 {
157 int referenced = 0;
158 int UNUSED insn_referenced = abuf->written;
159 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
160 }
161 return cycles;
162 #undef FLD
163 }
164
165 static int
166 model_or1200_l_sys (SIM_CPU *current_cpu, void *sem_arg)
167 {
168 #define FLD(f) abuf->fields.sfmt_empty.f
169 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
170 const IDESC * UNUSED idesc = abuf->idesc;
171 int cycles = 0;
172 {
173 int referenced = 0;
174 int UNUSED insn_referenced = abuf->written;
175 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
176 }
177 return cycles;
178 #undef FLD
179 }
180
181 static int
182 model_or1200_l_msync (SIM_CPU *current_cpu, void *sem_arg)
183 {
184 #define FLD(f) abuf->fields.sfmt_empty.f
185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
186 const IDESC * UNUSED idesc = abuf->idesc;
187 int cycles = 0;
188 {
189 int referenced = 0;
190 int UNUSED insn_referenced = abuf->written;
191 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
192 }
193 return cycles;
194 #undef FLD
195 }
196
197 static int
198 model_or1200_l_psync (SIM_CPU *current_cpu, void *sem_arg)
199 {
200 #define FLD(f) abuf->fields.sfmt_empty.f
201 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
202 const IDESC * UNUSED idesc = abuf->idesc;
203 int cycles = 0;
204 {
205 int referenced = 0;
206 int UNUSED insn_referenced = abuf->written;
207 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
208 }
209 return cycles;
210 #undef FLD
211 }
212
213 static int
214 model_or1200_l_csync (SIM_CPU *current_cpu, void *sem_arg)
215 {
216 #define FLD(f) abuf->fields.sfmt_empty.f
217 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
218 const IDESC * UNUSED idesc = abuf->idesc;
219 int cycles = 0;
220 {
221 int referenced = 0;
222 int UNUSED insn_referenced = abuf->written;
223 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
224 }
225 return cycles;
226 #undef FLD
227 }
228
229 static int
230 model_or1200_l_rfe (SIM_CPU *current_cpu, void *sem_arg)
231 {
232 #define FLD(f) abuf->fields.sfmt_empty.f
233 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
234 const IDESC * UNUSED idesc = abuf->idesc;
235 int cycles = 0;
236 {
237 int referenced = 0;
238 int UNUSED insn_referenced = abuf->written;
239 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
240 }
241 return cycles;
242 #undef FLD
243 }
244
245 static int
246 model_or1200_l_nop_imm (SIM_CPU *current_cpu, void *sem_arg)
247 {
248 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
249 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
250 const IDESC * UNUSED idesc = abuf->idesc;
251 int cycles = 0;
252 {
253 int referenced = 0;
254 int UNUSED insn_referenced = abuf->written;
255 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
256 }
257 return cycles;
258 #undef FLD
259 }
260
261 static int
262 model_or1200_l_movhi (SIM_CPU *current_cpu, void *sem_arg)
263 {
264 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
266 const IDESC * UNUSED idesc = abuf->idesc;
267 int cycles = 0;
268 {
269 int referenced = 0;
270 int UNUSED insn_referenced = abuf->written;
271 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
272 }
273 return cycles;
274 #undef FLD
275 }
276
277 static int
278 model_or1200_l_macrc (SIM_CPU *current_cpu, void *sem_arg)
279 {
280 #define FLD(f) abuf->fields.sfmt_l_adrp.f
281 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
282 const IDESC * UNUSED idesc = abuf->idesc;
283 int cycles = 0;
284 {
285 int referenced = 0;
286 int UNUSED insn_referenced = abuf->written;
287 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
288 }
289 return cycles;
290 #undef FLD
291 }
292
293 static int
294 model_or1200_l_mfspr (SIM_CPU *current_cpu, void *sem_arg)
295 {
296 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
297 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
298 const IDESC * UNUSED idesc = abuf->idesc;
299 int cycles = 0;
300 {
301 int referenced = 0;
302 int UNUSED insn_referenced = abuf->written;
303 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
304 }
305 return cycles;
306 #undef FLD
307 }
308
309 static int
310 model_or1200_l_mtspr (SIM_CPU *current_cpu, void *sem_arg)
311 {
312 #define FLD(f) abuf->fields.sfmt_l_mtspr.f
313 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
314 const IDESC * UNUSED idesc = abuf->idesc;
315 int cycles = 0;
316 {
317 int referenced = 0;
318 int UNUSED insn_referenced = abuf->written;
319 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
320 }
321 return cycles;
322 #undef FLD
323 }
324
325 static int
326 model_or1200_l_lwz (SIM_CPU *current_cpu, void *sem_arg)
327 {
328 #define FLD(f) abuf->fields.sfmt_l_lwz.f
329 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
330 const IDESC * UNUSED idesc = abuf->idesc;
331 int cycles = 0;
332 {
333 int referenced = 0;
334 int UNUSED insn_referenced = abuf->written;
335 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
336 }
337 return cycles;
338 #undef FLD
339 }
340
341 static int
342 model_or1200_l_lws (SIM_CPU *current_cpu, void *sem_arg)
343 {
344 #define FLD(f) abuf->fields.sfmt_l_lwz.f
345 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
346 const IDESC * UNUSED idesc = abuf->idesc;
347 int cycles = 0;
348 {
349 int referenced = 0;
350 int UNUSED insn_referenced = abuf->written;
351 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
352 }
353 return cycles;
354 #undef FLD
355 }
356
357 static int
358 model_or1200_l_lwa (SIM_CPU *current_cpu, void *sem_arg)
359 {
360 #define FLD(f) abuf->fields.sfmt_l_lwz.f
361 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
362 const IDESC * UNUSED idesc = abuf->idesc;
363 int cycles = 0;
364 {
365 int referenced = 0;
366 int UNUSED insn_referenced = abuf->written;
367 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
368 }
369 return cycles;
370 #undef FLD
371 }
372
373 static int
374 model_or1200_l_lbz (SIM_CPU *current_cpu, void *sem_arg)
375 {
376 #define FLD(f) abuf->fields.sfmt_l_lwz.f
377 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
378 const IDESC * UNUSED idesc = abuf->idesc;
379 int cycles = 0;
380 {
381 int referenced = 0;
382 int UNUSED insn_referenced = abuf->written;
383 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
384 }
385 return cycles;
386 #undef FLD
387 }
388
389 static int
390 model_or1200_l_lbs (SIM_CPU *current_cpu, void *sem_arg)
391 {
392 #define FLD(f) abuf->fields.sfmt_l_lwz.f
393 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
394 const IDESC * UNUSED idesc = abuf->idesc;
395 int cycles = 0;
396 {
397 int referenced = 0;
398 int UNUSED insn_referenced = abuf->written;
399 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
400 }
401 return cycles;
402 #undef FLD
403 }
404
405 static int
406 model_or1200_l_lhz (SIM_CPU *current_cpu, void *sem_arg)
407 {
408 #define FLD(f) abuf->fields.sfmt_l_lwz.f
409 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
410 const IDESC * UNUSED idesc = abuf->idesc;
411 int cycles = 0;
412 {
413 int referenced = 0;
414 int UNUSED insn_referenced = abuf->written;
415 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
416 }
417 return cycles;
418 #undef FLD
419 }
420
421 static int
422 model_or1200_l_lhs (SIM_CPU *current_cpu, void *sem_arg)
423 {
424 #define FLD(f) abuf->fields.sfmt_l_lwz.f
425 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
426 const IDESC * UNUSED idesc = abuf->idesc;
427 int cycles = 0;
428 {
429 int referenced = 0;
430 int UNUSED insn_referenced = abuf->written;
431 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
432 }
433 return cycles;
434 #undef FLD
435 }
436
437 static int
438 model_or1200_l_sw (SIM_CPU *current_cpu, void *sem_arg)
439 {
440 #define FLD(f) abuf->fields.sfmt_l_sw.f
441 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
442 const IDESC * UNUSED idesc = abuf->idesc;
443 int cycles = 0;
444 {
445 int referenced = 0;
446 int UNUSED insn_referenced = abuf->written;
447 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
448 }
449 return cycles;
450 #undef FLD
451 }
452
453 static int
454 model_or1200_l_sb (SIM_CPU *current_cpu, void *sem_arg)
455 {
456 #define FLD(f) abuf->fields.sfmt_l_sw.f
457 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
458 const IDESC * UNUSED idesc = abuf->idesc;
459 int cycles = 0;
460 {
461 int referenced = 0;
462 int UNUSED insn_referenced = abuf->written;
463 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
464 }
465 return cycles;
466 #undef FLD
467 }
468
469 static int
470 model_or1200_l_sh (SIM_CPU *current_cpu, void *sem_arg)
471 {
472 #define FLD(f) abuf->fields.sfmt_l_sw.f
473 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
474 const IDESC * UNUSED idesc = abuf->idesc;
475 int cycles = 0;
476 {
477 int referenced = 0;
478 int UNUSED insn_referenced = abuf->written;
479 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
480 }
481 return cycles;
482 #undef FLD
483 }
484
485 static int
486 model_or1200_l_swa (SIM_CPU *current_cpu, void *sem_arg)
487 {
488 #define FLD(f) abuf->fields.sfmt_l_sw.f
489 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
490 const IDESC * UNUSED idesc = abuf->idesc;
491 int cycles = 0;
492 {
493 int referenced = 0;
494 int UNUSED insn_referenced = abuf->written;
495 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
496 }
497 return cycles;
498 #undef FLD
499 }
500
501 static int
502 model_or1200_l_sll (SIM_CPU *current_cpu, void *sem_arg)
503 {
504 #define FLD(f) abuf->fields.sfmt_l_sll.f
505 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
506 const IDESC * UNUSED idesc = abuf->idesc;
507 int cycles = 0;
508 {
509 int referenced = 0;
510 int UNUSED insn_referenced = abuf->written;
511 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
512 }
513 return cycles;
514 #undef FLD
515 }
516
517 static int
518 model_or1200_l_slli (SIM_CPU *current_cpu, void *sem_arg)
519 {
520 #define FLD(f) abuf->fields.sfmt_l_slli.f
521 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
522 const IDESC * UNUSED idesc = abuf->idesc;
523 int cycles = 0;
524 {
525 int referenced = 0;
526 int UNUSED insn_referenced = abuf->written;
527 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
528 }
529 return cycles;
530 #undef FLD
531 }
532
533 static int
534 model_or1200_l_srl (SIM_CPU *current_cpu, void *sem_arg)
535 {
536 #define FLD(f) abuf->fields.sfmt_l_sll.f
537 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
538 const IDESC * UNUSED idesc = abuf->idesc;
539 int cycles = 0;
540 {
541 int referenced = 0;
542 int UNUSED insn_referenced = abuf->written;
543 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
544 }
545 return cycles;
546 #undef FLD
547 }
548
549 static int
550 model_or1200_l_srli (SIM_CPU *current_cpu, void *sem_arg)
551 {
552 #define FLD(f) abuf->fields.sfmt_l_slli.f
553 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
554 const IDESC * UNUSED idesc = abuf->idesc;
555 int cycles = 0;
556 {
557 int referenced = 0;
558 int UNUSED insn_referenced = abuf->written;
559 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
560 }
561 return cycles;
562 #undef FLD
563 }
564
565 static int
566 model_or1200_l_sra (SIM_CPU *current_cpu, void *sem_arg)
567 {
568 #define FLD(f) abuf->fields.sfmt_l_sll.f
569 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
570 const IDESC * UNUSED idesc = abuf->idesc;
571 int cycles = 0;
572 {
573 int referenced = 0;
574 int UNUSED insn_referenced = abuf->written;
575 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
576 }
577 return cycles;
578 #undef FLD
579 }
580
581 static int
582 model_or1200_l_srai (SIM_CPU *current_cpu, void *sem_arg)
583 {
584 #define FLD(f) abuf->fields.sfmt_l_slli.f
585 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
586 const IDESC * UNUSED idesc = abuf->idesc;
587 int cycles = 0;
588 {
589 int referenced = 0;
590 int UNUSED insn_referenced = abuf->written;
591 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
592 }
593 return cycles;
594 #undef FLD
595 }
596
597 static int
598 model_or1200_l_ror (SIM_CPU *current_cpu, void *sem_arg)
599 {
600 #define FLD(f) abuf->fields.sfmt_l_sll.f
601 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
602 const IDESC * UNUSED idesc = abuf->idesc;
603 int cycles = 0;
604 {
605 int referenced = 0;
606 int UNUSED insn_referenced = abuf->written;
607 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
608 }
609 return cycles;
610 #undef FLD
611 }
612
613 static int
614 model_or1200_l_rori (SIM_CPU *current_cpu, void *sem_arg)
615 {
616 #define FLD(f) abuf->fields.sfmt_l_slli.f
617 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
618 const IDESC * UNUSED idesc = abuf->idesc;
619 int cycles = 0;
620 {
621 int referenced = 0;
622 int UNUSED insn_referenced = abuf->written;
623 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
624 }
625 return cycles;
626 #undef FLD
627 }
628
629 static int
630 model_or1200_l_and (SIM_CPU *current_cpu, void *sem_arg)
631 {
632 #define FLD(f) abuf->fields.sfmt_l_sll.f
633 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
634 const IDESC * UNUSED idesc = abuf->idesc;
635 int cycles = 0;
636 {
637 int referenced = 0;
638 int UNUSED insn_referenced = abuf->written;
639 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
640 }
641 return cycles;
642 #undef FLD
643 }
644
645 static int
646 model_or1200_l_or (SIM_CPU *current_cpu, void *sem_arg)
647 {
648 #define FLD(f) abuf->fields.sfmt_l_sll.f
649 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
650 const IDESC * UNUSED idesc = abuf->idesc;
651 int cycles = 0;
652 {
653 int referenced = 0;
654 int UNUSED insn_referenced = abuf->written;
655 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
656 }
657 return cycles;
658 #undef FLD
659 }
660
661 static int
662 model_or1200_l_xor (SIM_CPU *current_cpu, void *sem_arg)
663 {
664 #define FLD(f) abuf->fields.sfmt_l_sll.f
665 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
666 const IDESC * UNUSED idesc = abuf->idesc;
667 int cycles = 0;
668 {
669 int referenced = 0;
670 int UNUSED insn_referenced = abuf->written;
671 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
672 }
673 return cycles;
674 #undef FLD
675 }
676
677 static int
678 model_or1200_l_add (SIM_CPU *current_cpu, void *sem_arg)
679 {
680 #define FLD(f) abuf->fields.sfmt_l_sll.f
681 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
682 const IDESC * UNUSED idesc = abuf->idesc;
683 int cycles = 0;
684 {
685 int referenced = 0;
686 int UNUSED insn_referenced = abuf->written;
687 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
688 }
689 return cycles;
690 #undef FLD
691 }
692
693 static int
694 model_or1200_l_sub (SIM_CPU *current_cpu, void *sem_arg)
695 {
696 #define FLD(f) abuf->fields.sfmt_l_sll.f
697 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
698 const IDESC * UNUSED idesc = abuf->idesc;
699 int cycles = 0;
700 {
701 int referenced = 0;
702 int UNUSED insn_referenced = abuf->written;
703 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
704 }
705 return cycles;
706 #undef FLD
707 }
708
709 static int
710 model_or1200_l_addc (SIM_CPU *current_cpu, void *sem_arg)
711 {
712 #define FLD(f) abuf->fields.sfmt_l_sll.f
713 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
714 const IDESC * UNUSED idesc = abuf->idesc;
715 int cycles = 0;
716 {
717 int referenced = 0;
718 int UNUSED insn_referenced = abuf->written;
719 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
720 }
721 return cycles;
722 #undef FLD
723 }
724
725 static int
726 model_or1200_l_mul (SIM_CPU *current_cpu, void *sem_arg)
727 {
728 #define FLD(f) abuf->fields.sfmt_l_sll.f
729 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
730 const IDESC * UNUSED idesc = abuf->idesc;
731 int cycles = 0;
732 {
733 int referenced = 0;
734 int UNUSED insn_referenced = abuf->written;
735 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
736 }
737 return cycles;
738 #undef FLD
739 }
740
741 static int
742 model_or1200_l_muld (SIM_CPU *current_cpu, void *sem_arg)
743 {
744 #define FLD(f) abuf->fields.sfmt_l_sll.f
745 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
746 const IDESC * UNUSED idesc = abuf->idesc;
747 int cycles = 0;
748 {
749 int referenced = 0;
750 int UNUSED insn_referenced = abuf->written;
751 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
752 }
753 return cycles;
754 #undef FLD
755 }
756
757 static int
758 model_or1200_l_mulu (SIM_CPU *current_cpu, void *sem_arg)
759 {
760 #define FLD(f) abuf->fields.sfmt_l_sll.f
761 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
762 const IDESC * UNUSED idesc = abuf->idesc;
763 int cycles = 0;
764 {
765 int referenced = 0;
766 int UNUSED insn_referenced = abuf->written;
767 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
768 }
769 return cycles;
770 #undef FLD
771 }
772
773 static int
774 model_or1200_l_muldu (SIM_CPU *current_cpu, void *sem_arg)
775 {
776 #define FLD(f) abuf->fields.sfmt_l_sll.f
777 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
778 const IDESC * UNUSED idesc = abuf->idesc;
779 int cycles = 0;
780 {
781 int referenced = 0;
782 int UNUSED insn_referenced = abuf->written;
783 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
784 }
785 return cycles;
786 #undef FLD
787 }
788
789 static int
790 model_or1200_l_div (SIM_CPU *current_cpu, void *sem_arg)
791 {
792 #define FLD(f) abuf->fields.sfmt_l_sll.f
793 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
794 const IDESC * UNUSED idesc = abuf->idesc;
795 int cycles = 0;
796 {
797 int referenced = 0;
798 int UNUSED insn_referenced = abuf->written;
799 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
800 }
801 return cycles;
802 #undef FLD
803 }
804
805 static int
806 model_or1200_l_divu (SIM_CPU *current_cpu, void *sem_arg)
807 {
808 #define FLD(f) abuf->fields.sfmt_l_sll.f
809 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
810 const IDESC * UNUSED idesc = abuf->idesc;
811 int cycles = 0;
812 {
813 int referenced = 0;
814 int UNUSED insn_referenced = abuf->written;
815 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
816 }
817 return cycles;
818 #undef FLD
819 }
820
821 static int
822 model_or1200_l_ff1 (SIM_CPU *current_cpu, void *sem_arg)
823 {
824 #define FLD(f) abuf->fields.sfmt_l_slli.f
825 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
826 const IDESC * UNUSED idesc = abuf->idesc;
827 int cycles = 0;
828 {
829 int referenced = 0;
830 int UNUSED insn_referenced = abuf->written;
831 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
832 }
833 return cycles;
834 #undef FLD
835 }
836
837 static int
838 model_or1200_l_fl1 (SIM_CPU *current_cpu, void *sem_arg)
839 {
840 #define FLD(f) abuf->fields.sfmt_l_slli.f
841 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
842 const IDESC * UNUSED idesc = abuf->idesc;
843 int cycles = 0;
844 {
845 int referenced = 0;
846 int UNUSED insn_referenced = abuf->written;
847 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
848 }
849 return cycles;
850 #undef FLD
851 }
852
853 static int
854 model_or1200_l_andi (SIM_CPU *current_cpu, void *sem_arg)
855 {
856 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
857 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
858 const IDESC * UNUSED idesc = abuf->idesc;
859 int cycles = 0;
860 {
861 int referenced = 0;
862 int UNUSED insn_referenced = abuf->written;
863 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
864 }
865 return cycles;
866 #undef FLD
867 }
868
869 static int
870 model_or1200_l_ori (SIM_CPU *current_cpu, void *sem_arg)
871 {
872 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
873 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
874 const IDESC * UNUSED idesc = abuf->idesc;
875 int cycles = 0;
876 {
877 int referenced = 0;
878 int UNUSED insn_referenced = abuf->written;
879 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
880 }
881 return cycles;
882 #undef FLD
883 }
884
885 static int
886 model_or1200_l_xori (SIM_CPU *current_cpu, void *sem_arg)
887 {
888 #define FLD(f) abuf->fields.sfmt_l_lwz.f
889 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
890 const IDESC * UNUSED idesc = abuf->idesc;
891 int cycles = 0;
892 {
893 int referenced = 0;
894 int UNUSED insn_referenced = abuf->written;
895 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
896 }
897 return cycles;
898 #undef FLD
899 }
900
901 static int
902 model_or1200_l_addi (SIM_CPU *current_cpu, void *sem_arg)
903 {
904 #define FLD(f) abuf->fields.sfmt_l_lwz.f
905 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
906 const IDESC * UNUSED idesc = abuf->idesc;
907 int cycles = 0;
908 {
909 int referenced = 0;
910 int UNUSED insn_referenced = abuf->written;
911 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
912 }
913 return cycles;
914 #undef FLD
915 }
916
917 static int
918 model_or1200_l_addic (SIM_CPU *current_cpu, void *sem_arg)
919 {
920 #define FLD(f) abuf->fields.sfmt_l_lwz.f
921 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
922 const IDESC * UNUSED idesc = abuf->idesc;
923 int cycles = 0;
924 {
925 int referenced = 0;
926 int UNUSED insn_referenced = abuf->written;
927 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
928 }
929 return cycles;
930 #undef FLD
931 }
932
933 static int
934 model_or1200_l_muli (SIM_CPU *current_cpu, void *sem_arg)
935 {
936 #define FLD(f) abuf->fields.sfmt_l_lwz.f
937 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
938 const IDESC * UNUSED idesc = abuf->idesc;
939 int cycles = 0;
940 {
941 int referenced = 0;
942 int UNUSED insn_referenced = abuf->written;
943 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
944 }
945 return cycles;
946 #undef FLD
947 }
948
949 static int
950 model_or1200_l_exths (SIM_CPU *current_cpu, void *sem_arg)
951 {
952 #define FLD(f) abuf->fields.sfmt_l_slli.f
953 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
954 const IDESC * UNUSED idesc = abuf->idesc;
955 int cycles = 0;
956 {
957 int referenced = 0;
958 int UNUSED insn_referenced = abuf->written;
959 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
960 }
961 return cycles;
962 #undef FLD
963 }
964
965 static int
966 model_or1200_l_extbs (SIM_CPU *current_cpu, void *sem_arg)
967 {
968 #define FLD(f) abuf->fields.sfmt_l_slli.f
969 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
970 const IDESC * UNUSED idesc = abuf->idesc;
971 int cycles = 0;
972 {
973 int referenced = 0;
974 int UNUSED insn_referenced = abuf->written;
975 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
976 }
977 return cycles;
978 #undef FLD
979 }
980
981 static int
982 model_or1200_l_exthz (SIM_CPU *current_cpu, void *sem_arg)
983 {
984 #define FLD(f) abuf->fields.sfmt_l_slli.f
985 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
986 const IDESC * UNUSED idesc = abuf->idesc;
987 int cycles = 0;
988 {
989 int referenced = 0;
990 int UNUSED insn_referenced = abuf->written;
991 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
992 }
993 return cycles;
994 #undef FLD
995 }
996
997 static int
998 model_or1200_l_extbz (SIM_CPU *current_cpu, void *sem_arg)
999 {
1000 #define FLD(f) abuf->fields.sfmt_l_slli.f
1001 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1002 const IDESC * UNUSED idesc = abuf->idesc;
1003 int cycles = 0;
1004 {
1005 int referenced = 0;
1006 int UNUSED insn_referenced = abuf->written;
1007 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1008 }
1009 return cycles;
1010 #undef FLD
1011 }
1012
1013 static int
1014 model_or1200_l_extws (SIM_CPU *current_cpu, void *sem_arg)
1015 {
1016 #define FLD(f) abuf->fields.sfmt_l_slli.f
1017 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1018 const IDESC * UNUSED idesc = abuf->idesc;
1019 int cycles = 0;
1020 {
1021 int referenced = 0;
1022 int UNUSED insn_referenced = abuf->written;
1023 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1024 }
1025 return cycles;
1026 #undef FLD
1027 }
1028
1029 static int
1030 model_or1200_l_extwz (SIM_CPU *current_cpu, void *sem_arg)
1031 {
1032 #define FLD(f) abuf->fields.sfmt_l_slli.f
1033 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1034 const IDESC * UNUSED idesc = abuf->idesc;
1035 int cycles = 0;
1036 {
1037 int referenced = 0;
1038 int UNUSED insn_referenced = abuf->written;
1039 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1040 }
1041 return cycles;
1042 #undef FLD
1043 }
1044
1045 static int
1046 model_or1200_l_cmov (SIM_CPU *current_cpu, void *sem_arg)
1047 {
1048 #define FLD(f) abuf->fields.sfmt_l_sll.f
1049 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1050 const IDESC * UNUSED idesc = abuf->idesc;
1051 int cycles = 0;
1052 {
1053 int referenced = 0;
1054 int UNUSED insn_referenced = abuf->written;
1055 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1056 }
1057 return cycles;
1058 #undef FLD
1059 }
1060
1061 static int
1062 model_or1200_l_sfgts (SIM_CPU *current_cpu, void *sem_arg)
1063 {
1064 #define FLD(f) abuf->fields.sfmt_l_sll.f
1065 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1066 const IDESC * UNUSED idesc = abuf->idesc;
1067 int cycles = 0;
1068 {
1069 int referenced = 0;
1070 int UNUSED insn_referenced = abuf->written;
1071 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1072 }
1073 return cycles;
1074 #undef FLD
1075 }
1076
1077 static int
1078 model_or1200_l_sfgtsi (SIM_CPU *current_cpu, void *sem_arg)
1079 {
1080 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1081 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1082 const IDESC * UNUSED idesc = abuf->idesc;
1083 int cycles = 0;
1084 {
1085 int referenced = 0;
1086 int UNUSED insn_referenced = abuf->written;
1087 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1088 }
1089 return cycles;
1090 #undef FLD
1091 }
1092
1093 static int
1094 model_or1200_l_sfgtu (SIM_CPU *current_cpu, void *sem_arg)
1095 {
1096 #define FLD(f) abuf->fields.sfmt_l_sll.f
1097 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1098 const IDESC * UNUSED idesc = abuf->idesc;
1099 int cycles = 0;
1100 {
1101 int referenced = 0;
1102 int UNUSED insn_referenced = abuf->written;
1103 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1104 }
1105 return cycles;
1106 #undef FLD
1107 }
1108
1109 static int
1110 model_or1200_l_sfgtui (SIM_CPU *current_cpu, void *sem_arg)
1111 {
1112 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1113 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1114 const IDESC * UNUSED idesc = abuf->idesc;
1115 int cycles = 0;
1116 {
1117 int referenced = 0;
1118 int UNUSED insn_referenced = abuf->written;
1119 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1120 }
1121 return cycles;
1122 #undef FLD
1123 }
1124
1125 static int
1126 model_or1200_l_sfges (SIM_CPU *current_cpu, void *sem_arg)
1127 {
1128 #define FLD(f) abuf->fields.sfmt_l_sll.f
1129 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1130 const IDESC * UNUSED idesc = abuf->idesc;
1131 int cycles = 0;
1132 {
1133 int referenced = 0;
1134 int UNUSED insn_referenced = abuf->written;
1135 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1136 }
1137 return cycles;
1138 #undef FLD
1139 }
1140
1141 static int
1142 model_or1200_l_sfgesi (SIM_CPU *current_cpu, void *sem_arg)
1143 {
1144 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1145 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1146 const IDESC * UNUSED idesc = abuf->idesc;
1147 int cycles = 0;
1148 {
1149 int referenced = 0;
1150 int UNUSED insn_referenced = abuf->written;
1151 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1152 }
1153 return cycles;
1154 #undef FLD
1155 }
1156
1157 static int
1158 model_or1200_l_sfgeu (SIM_CPU *current_cpu, void *sem_arg)
1159 {
1160 #define FLD(f) abuf->fields.sfmt_l_sll.f
1161 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1162 const IDESC * UNUSED idesc = abuf->idesc;
1163 int cycles = 0;
1164 {
1165 int referenced = 0;
1166 int UNUSED insn_referenced = abuf->written;
1167 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1168 }
1169 return cycles;
1170 #undef FLD
1171 }
1172
1173 static int
1174 model_or1200_l_sfgeui (SIM_CPU *current_cpu, void *sem_arg)
1175 {
1176 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1177 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1178 const IDESC * UNUSED idesc = abuf->idesc;
1179 int cycles = 0;
1180 {
1181 int referenced = 0;
1182 int UNUSED insn_referenced = abuf->written;
1183 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1184 }
1185 return cycles;
1186 #undef FLD
1187 }
1188
1189 static int
1190 model_or1200_l_sflts (SIM_CPU *current_cpu, void *sem_arg)
1191 {
1192 #define FLD(f) abuf->fields.sfmt_l_sll.f
1193 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1194 const IDESC * UNUSED idesc = abuf->idesc;
1195 int cycles = 0;
1196 {
1197 int referenced = 0;
1198 int UNUSED insn_referenced = abuf->written;
1199 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1200 }
1201 return cycles;
1202 #undef FLD
1203 }
1204
1205 static int
1206 model_or1200_l_sfltsi (SIM_CPU *current_cpu, void *sem_arg)
1207 {
1208 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1209 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1210 const IDESC * UNUSED idesc = abuf->idesc;
1211 int cycles = 0;
1212 {
1213 int referenced = 0;
1214 int UNUSED insn_referenced = abuf->written;
1215 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1216 }
1217 return cycles;
1218 #undef FLD
1219 }
1220
1221 static int
1222 model_or1200_l_sfltu (SIM_CPU *current_cpu, void *sem_arg)
1223 {
1224 #define FLD(f) abuf->fields.sfmt_l_sll.f
1225 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1226 const IDESC * UNUSED idesc = abuf->idesc;
1227 int cycles = 0;
1228 {
1229 int referenced = 0;
1230 int UNUSED insn_referenced = abuf->written;
1231 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1232 }
1233 return cycles;
1234 #undef FLD
1235 }
1236
1237 static int
1238 model_or1200_l_sfltui (SIM_CPU *current_cpu, void *sem_arg)
1239 {
1240 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1241 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1242 const IDESC * UNUSED idesc = abuf->idesc;
1243 int cycles = 0;
1244 {
1245 int referenced = 0;
1246 int UNUSED insn_referenced = abuf->written;
1247 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1248 }
1249 return cycles;
1250 #undef FLD
1251 }
1252
1253 static int
1254 model_or1200_l_sfles (SIM_CPU *current_cpu, void *sem_arg)
1255 {
1256 #define FLD(f) abuf->fields.sfmt_l_sll.f
1257 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1258 const IDESC * UNUSED idesc = abuf->idesc;
1259 int cycles = 0;
1260 {
1261 int referenced = 0;
1262 int UNUSED insn_referenced = abuf->written;
1263 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1264 }
1265 return cycles;
1266 #undef FLD
1267 }
1268
1269 static int
1270 model_or1200_l_sflesi (SIM_CPU *current_cpu, void *sem_arg)
1271 {
1272 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1273 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1274 const IDESC * UNUSED idesc = abuf->idesc;
1275 int cycles = 0;
1276 {
1277 int referenced = 0;
1278 int UNUSED insn_referenced = abuf->written;
1279 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1280 }
1281 return cycles;
1282 #undef FLD
1283 }
1284
1285 static int
1286 model_or1200_l_sfleu (SIM_CPU *current_cpu, void *sem_arg)
1287 {
1288 #define FLD(f) abuf->fields.sfmt_l_sll.f
1289 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1290 const IDESC * UNUSED idesc = abuf->idesc;
1291 int cycles = 0;
1292 {
1293 int referenced = 0;
1294 int UNUSED insn_referenced = abuf->written;
1295 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1296 }
1297 return cycles;
1298 #undef FLD
1299 }
1300
1301 static int
1302 model_or1200_l_sfleui (SIM_CPU *current_cpu, void *sem_arg)
1303 {
1304 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1305 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1306 const IDESC * UNUSED idesc = abuf->idesc;
1307 int cycles = 0;
1308 {
1309 int referenced = 0;
1310 int UNUSED insn_referenced = abuf->written;
1311 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1312 }
1313 return cycles;
1314 #undef FLD
1315 }
1316
1317 static int
1318 model_or1200_l_sfeq (SIM_CPU *current_cpu, void *sem_arg)
1319 {
1320 #define FLD(f) abuf->fields.sfmt_l_sll.f
1321 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1322 const IDESC * UNUSED idesc = abuf->idesc;
1323 int cycles = 0;
1324 {
1325 int referenced = 0;
1326 int UNUSED insn_referenced = abuf->written;
1327 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1328 }
1329 return cycles;
1330 #undef FLD
1331 }
1332
1333 static int
1334 model_or1200_l_sfeqi (SIM_CPU *current_cpu, void *sem_arg)
1335 {
1336 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1337 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1338 const IDESC * UNUSED idesc = abuf->idesc;
1339 int cycles = 0;
1340 {
1341 int referenced = 0;
1342 int UNUSED insn_referenced = abuf->written;
1343 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1344 }
1345 return cycles;
1346 #undef FLD
1347 }
1348
1349 static int
1350 model_or1200_l_sfne (SIM_CPU *current_cpu, void *sem_arg)
1351 {
1352 #define FLD(f) abuf->fields.sfmt_l_sll.f
1353 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1354 const IDESC * UNUSED idesc = abuf->idesc;
1355 int cycles = 0;
1356 {
1357 int referenced = 0;
1358 int UNUSED insn_referenced = abuf->written;
1359 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1360 }
1361 return cycles;
1362 #undef FLD
1363 }
1364
1365 static int
1366 model_or1200_l_sfnei (SIM_CPU *current_cpu, void *sem_arg)
1367 {
1368 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1369 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1370 const IDESC * UNUSED idesc = abuf->idesc;
1371 int cycles = 0;
1372 {
1373 int referenced = 0;
1374 int UNUSED insn_referenced = abuf->written;
1375 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1376 }
1377 return cycles;
1378 #undef FLD
1379 }
1380
1381 static int
1382 model_or1200_l_mac (SIM_CPU *current_cpu, void *sem_arg)
1383 {
1384 #define FLD(f) abuf->fields.sfmt_l_sll.f
1385 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1386 const IDESC * UNUSED idesc = abuf->idesc;
1387 int cycles = 0;
1388 {
1389 int referenced = 0;
1390 int UNUSED insn_referenced = abuf->written;
1391 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1392 }
1393 return cycles;
1394 #undef FLD
1395 }
1396
1397 static int
1398 model_or1200_l_maci (SIM_CPU *current_cpu, void *sem_arg)
1399 {
1400 #define FLD(f) abuf->fields.sfmt_l_lwz.f
1401 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1402 const IDESC * UNUSED idesc = abuf->idesc;
1403 int cycles = 0;
1404 {
1405 int referenced = 0;
1406 int UNUSED insn_referenced = abuf->written;
1407 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1408 }
1409 return cycles;
1410 #undef FLD
1411 }
1412
1413 static int
1414 model_or1200_l_macu (SIM_CPU *current_cpu, void *sem_arg)
1415 {
1416 #define FLD(f) abuf->fields.sfmt_l_sll.f
1417 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1418 const IDESC * UNUSED idesc = abuf->idesc;
1419 int cycles = 0;
1420 {
1421 int referenced = 0;
1422 int UNUSED insn_referenced = abuf->written;
1423 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1424 }
1425 return cycles;
1426 #undef FLD
1427 }
1428
1429 static int
1430 model_or1200_l_msb (SIM_CPU *current_cpu, void *sem_arg)
1431 {
1432 #define FLD(f) abuf->fields.sfmt_l_sll.f
1433 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1434 const IDESC * UNUSED idesc = abuf->idesc;
1435 int cycles = 0;
1436 {
1437 int referenced = 0;
1438 int UNUSED insn_referenced = abuf->written;
1439 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1440 }
1441 return cycles;
1442 #undef FLD
1443 }
1444
1445 static int
1446 model_or1200_l_msbu (SIM_CPU *current_cpu, void *sem_arg)
1447 {
1448 #define FLD(f) abuf->fields.sfmt_l_sll.f
1449 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1450 const IDESC * UNUSED idesc = abuf->idesc;
1451 int cycles = 0;
1452 {
1453 int referenced = 0;
1454 int UNUSED insn_referenced = abuf->written;
1455 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1456 }
1457 return cycles;
1458 #undef FLD
1459 }
1460
1461 static int
1462 model_or1200_l_cust1 (SIM_CPU *current_cpu, void *sem_arg)
1463 {
1464 #define FLD(f) abuf->fields.sfmt_empty.f
1465 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1466 const IDESC * UNUSED idesc = abuf->idesc;
1467 int cycles = 0;
1468 {
1469 int referenced = 0;
1470 int UNUSED insn_referenced = abuf->written;
1471 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1472 }
1473 return cycles;
1474 #undef FLD
1475 }
1476
1477 static int
1478 model_or1200_l_cust2 (SIM_CPU *current_cpu, void *sem_arg)
1479 {
1480 #define FLD(f) abuf->fields.sfmt_empty.f
1481 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1482 const IDESC * UNUSED idesc = abuf->idesc;
1483 int cycles = 0;
1484 {
1485 int referenced = 0;
1486 int UNUSED insn_referenced = abuf->written;
1487 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1488 }
1489 return cycles;
1490 #undef FLD
1491 }
1492
1493 static int
1494 model_or1200_l_cust3 (SIM_CPU *current_cpu, void *sem_arg)
1495 {
1496 #define FLD(f) abuf->fields.sfmt_empty.f
1497 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1498 const IDESC * UNUSED idesc = abuf->idesc;
1499 int cycles = 0;
1500 {
1501 int referenced = 0;
1502 int UNUSED insn_referenced = abuf->written;
1503 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1504 }
1505 return cycles;
1506 #undef FLD
1507 }
1508
1509 static int
1510 model_or1200_l_cust4 (SIM_CPU *current_cpu, void *sem_arg)
1511 {
1512 #define FLD(f) abuf->fields.sfmt_empty.f
1513 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1514 const IDESC * UNUSED idesc = abuf->idesc;
1515 int cycles = 0;
1516 {
1517 int referenced = 0;
1518 int UNUSED insn_referenced = abuf->written;
1519 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1520 }
1521 return cycles;
1522 #undef FLD
1523 }
1524
1525 static int
1526 model_or1200_l_cust5 (SIM_CPU *current_cpu, void *sem_arg)
1527 {
1528 #define FLD(f) abuf->fields.sfmt_empty.f
1529 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1530 const IDESC * UNUSED idesc = abuf->idesc;
1531 int cycles = 0;
1532 {
1533 int referenced = 0;
1534 int UNUSED insn_referenced = abuf->written;
1535 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1536 }
1537 return cycles;
1538 #undef FLD
1539 }
1540
1541 static int
1542 model_or1200_l_cust6 (SIM_CPU *current_cpu, void *sem_arg)
1543 {
1544 #define FLD(f) abuf->fields.sfmt_empty.f
1545 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1546 const IDESC * UNUSED idesc = abuf->idesc;
1547 int cycles = 0;
1548 {
1549 int referenced = 0;
1550 int UNUSED insn_referenced = abuf->written;
1551 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1552 }
1553 return cycles;
1554 #undef FLD
1555 }
1556
1557 static int
1558 model_or1200_l_cust7 (SIM_CPU *current_cpu, void *sem_arg)
1559 {
1560 #define FLD(f) abuf->fields.sfmt_empty.f
1561 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1562 const IDESC * UNUSED idesc = abuf->idesc;
1563 int cycles = 0;
1564 {
1565 int referenced = 0;
1566 int UNUSED insn_referenced = abuf->written;
1567 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1568 }
1569 return cycles;
1570 #undef FLD
1571 }
1572
1573 static int
1574 model_or1200_l_cust8 (SIM_CPU *current_cpu, void *sem_arg)
1575 {
1576 #define FLD(f) abuf->fields.sfmt_empty.f
1577 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1578 const IDESC * UNUSED idesc = abuf->idesc;
1579 int cycles = 0;
1580 {
1581 int referenced = 0;
1582 int UNUSED insn_referenced = abuf->written;
1583 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1584 }
1585 return cycles;
1586 #undef FLD
1587 }
1588
1589 static int
1590 model_or1200_lf_add_s (SIM_CPU *current_cpu, void *sem_arg)
1591 {
1592 #define FLD(f) abuf->fields.sfmt_l_sll.f
1593 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1594 const IDESC * UNUSED idesc = abuf->idesc;
1595 int cycles = 0;
1596 {
1597 int referenced = 0;
1598 int UNUSED insn_referenced = abuf->written;
1599 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1600 }
1601 return cycles;
1602 #undef FLD
1603 }
1604
1605 static int
1606 model_or1200_lf_add_d32 (SIM_CPU *current_cpu, void *sem_arg)
1607 {
1608 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1609 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1610 const IDESC * UNUSED idesc = abuf->idesc;
1611 int cycles = 0;
1612 {
1613 int referenced = 0;
1614 int UNUSED insn_referenced = abuf->written;
1615 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1616 }
1617 return cycles;
1618 #undef FLD
1619 }
1620
1621 static int
1622 model_or1200_lf_sub_s (SIM_CPU *current_cpu, void *sem_arg)
1623 {
1624 #define FLD(f) abuf->fields.sfmt_l_sll.f
1625 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1626 const IDESC * UNUSED idesc = abuf->idesc;
1627 int cycles = 0;
1628 {
1629 int referenced = 0;
1630 int UNUSED insn_referenced = abuf->written;
1631 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1632 }
1633 return cycles;
1634 #undef FLD
1635 }
1636
1637 static int
1638 model_or1200_lf_sub_d32 (SIM_CPU *current_cpu, void *sem_arg)
1639 {
1640 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1641 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1642 const IDESC * UNUSED idesc = abuf->idesc;
1643 int cycles = 0;
1644 {
1645 int referenced = 0;
1646 int UNUSED insn_referenced = abuf->written;
1647 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1648 }
1649 return cycles;
1650 #undef FLD
1651 }
1652
1653 static int
1654 model_or1200_lf_mul_s (SIM_CPU *current_cpu, void *sem_arg)
1655 {
1656 #define FLD(f) abuf->fields.sfmt_l_sll.f
1657 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1658 const IDESC * UNUSED idesc = abuf->idesc;
1659 int cycles = 0;
1660 {
1661 int referenced = 0;
1662 int UNUSED insn_referenced = abuf->written;
1663 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1664 }
1665 return cycles;
1666 #undef FLD
1667 }
1668
1669 static int
1670 model_or1200_lf_mul_d32 (SIM_CPU *current_cpu, void *sem_arg)
1671 {
1672 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1673 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1674 const IDESC * UNUSED idesc = abuf->idesc;
1675 int cycles = 0;
1676 {
1677 int referenced = 0;
1678 int UNUSED insn_referenced = abuf->written;
1679 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1680 }
1681 return cycles;
1682 #undef FLD
1683 }
1684
1685 static int
1686 model_or1200_lf_div_s (SIM_CPU *current_cpu, void *sem_arg)
1687 {
1688 #define FLD(f) abuf->fields.sfmt_l_sll.f
1689 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1690 const IDESC * UNUSED idesc = abuf->idesc;
1691 int cycles = 0;
1692 {
1693 int referenced = 0;
1694 int UNUSED insn_referenced = abuf->written;
1695 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1696 }
1697 return cycles;
1698 #undef FLD
1699 }
1700
1701 static int
1702 model_or1200_lf_div_d32 (SIM_CPU *current_cpu, void *sem_arg)
1703 {
1704 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1705 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1706 const IDESC * UNUSED idesc = abuf->idesc;
1707 int cycles = 0;
1708 {
1709 int referenced = 0;
1710 int UNUSED insn_referenced = abuf->written;
1711 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1712 }
1713 return cycles;
1714 #undef FLD
1715 }
1716
1717 static int
1718 model_or1200_lf_rem_s (SIM_CPU *current_cpu, void *sem_arg)
1719 {
1720 #define FLD(f) abuf->fields.sfmt_l_sll.f
1721 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1722 const IDESC * UNUSED idesc = abuf->idesc;
1723 int cycles = 0;
1724 {
1725 int referenced = 0;
1726 int UNUSED insn_referenced = abuf->written;
1727 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1728 }
1729 return cycles;
1730 #undef FLD
1731 }
1732
1733 static int
1734 model_or1200_lf_rem_d32 (SIM_CPU *current_cpu, void *sem_arg)
1735 {
1736 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1737 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1738 const IDESC * UNUSED idesc = abuf->idesc;
1739 int cycles = 0;
1740 {
1741 int referenced = 0;
1742 int UNUSED insn_referenced = abuf->written;
1743 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1744 }
1745 return cycles;
1746 #undef FLD
1747 }
1748
1749 static int
1750 model_or1200_lf_itof_s (SIM_CPU *current_cpu, void *sem_arg)
1751 {
1752 #define FLD(f) abuf->fields.sfmt_l_slli.f
1753 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1754 const IDESC * UNUSED idesc = abuf->idesc;
1755 int cycles = 0;
1756 {
1757 int referenced = 0;
1758 int UNUSED insn_referenced = abuf->written;
1759 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1760 }
1761 return cycles;
1762 #undef FLD
1763 }
1764
1765 static int
1766 model_or1200_lf_itof_d32 (SIM_CPU *current_cpu, void *sem_arg)
1767 {
1768 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1769 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1770 const IDESC * UNUSED idesc = abuf->idesc;
1771 int cycles = 0;
1772 {
1773 int referenced = 0;
1774 int UNUSED insn_referenced = abuf->written;
1775 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1776 }
1777 return cycles;
1778 #undef FLD
1779 }
1780
1781 static int
1782 model_or1200_lf_ftoi_s (SIM_CPU *current_cpu, void *sem_arg)
1783 {
1784 #define FLD(f) abuf->fields.sfmt_l_slli.f
1785 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1786 const IDESC * UNUSED idesc = abuf->idesc;
1787 int cycles = 0;
1788 {
1789 int referenced = 0;
1790 int UNUSED insn_referenced = abuf->written;
1791 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1792 }
1793 return cycles;
1794 #undef FLD
1795 }
1796
1797 static int
1798 model_or1200_lf_ftoi_d32 (SIM_CPU *current_cpu, void *sem_arg)
1799 {
1800 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1801 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1802 const IDESC * UNUSED idesc = abuf->idesc;
1803 int cycles = 0;
1804 {
1805 int referenced = 0;
1806 int UNUSED insn_referenced = abuf->written;
1807 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1808 }
1809 return cycles;
1810 #undef FLD
1811 }
1812
1813 static int
1814 model_or1200_lf_sfeq_s (SIM_CPU *current_cpu, void *sem_arg)
1815 {
1816 #define FLD(f) abuf->fields.sfmt_l_sll.f
1817 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1818 const IDESC * UNUSED idesc = abuf->idesc;
1819 int cycles = 0;
1820 {
1821 int referenced = 0;
1822 int UNUSED insn_referenced = abuf->written;
1823 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1824 }
1825 return cycles;
1826 #undef FLD
1827 }
1828
1829 static int
1830 model_or1200_lf_sfeq_d32 (SIM_CPU *current_cpu, void *sem_arg)
1831 {
1832 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1833 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1834 const IDESC * UNUSED idesc = abuf->idesc;
1835 int cycles = 0;
1836 {
1837 int referenced = 0;
1838 int UNUSED insn_referenced = abuf->written;
1839 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1840 }
1841 return cycles;
1842 #undef FLD
1843 }
1844
1845 static int
1846 model_or1200_lf_sfne_s (SIM_CPU *current_cpu, void *sem_arg)
1847 {
1848 #define FLD(f) abuf->fields.sfmt_l_sll.f
1849 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1850 const IDESC * UNUSED idesc = abuf->idesc;
1851 int cycles = 0;
1852 {
1853 int referenced = 0;
1854 int UNUSED insn_referenced = abuf->written;
1855 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1856 }
1857 return cycles;
1858 #undef FLD
1859 }
1860
1861 static int
1862 model_or1200_lf_sfne_d32 (SIM_CPU *current_cpu, void *sem_arg)
1863 {
1864 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1865 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1866 const IDESC * UNUSED idesc = abuf->idesc;
1867 int cycles = 0;
1868 {
1869 int referenced = 0;
1870 int UNUSED insn_referenced = abuf->written;
1871 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1872 }
1873 return cycles;
1874 #undef FLD
1875 }
1876
1877 static int
1878 model_or1200_lf_sfge_s (SIM_CPU *current_cpu, void *sem_arg)
1879 {
1880 #define FLD(f) abuf->fields.sfmt_l_sll.f
1881 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1882 const IDESC * UNUSED idesc = abuf->idesc;
1883 int cycles = 0;
1884 {
1885 int referenced = 0;
1886 int UNUSED insn_referenced = abuf->written;
1887 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1888 }
1889 return cycles;
1890 #undef FLD
1891 }
1892
1893 static int
1894 model_or1200_lf_sfge_d32 (SIM_CPU *current_cpu, void *sem_arg)
1895 {
1896 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1897 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1898 const IDESC * UNUSED idesc = abuf->idesc;
1899 int cycles = 0;
1900 {
1901 int referenced = 0;
1902 int UNUSED insn_referenced = abuf->written;
1903 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1904 }
1905 return cycles;
1906 #undef FLD
1907 }
1908
1909 static int
1910 model_or1200_lf_sfgt_s (SIM_CPU *current_cpu, void *sem_arg)
1911 {
1912 #define FLD(f) abuf->fields.sfmt_l_sll.f
1913 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1914 const IDESC * UNUSED idesc = abuf->idesc;
1915 int cycles = 0;
1916 {
1917 int referenced = 0;
1918 int UNUSED insn_referenced = abuf->written;
1919 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1920 }
1921 return cycles;
1922 #undef FLD
1923 }
1924
1925 static int
1926 model_or1200_lf_sfgt_d32 (SIM_CPU *current_cpu, void *sem_arg)
1927 {
1928 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1929 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1930 const IDESC * UNUSED idesc = abuf->idesc;
1931 int cycles = 0;
1932 {
1933 int referenced = 0;
1934 int UNUSED insn_referenced = abuf->written;
1935 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1936 }
1937 return cycles;
1938 #undef FLD
1939 }
1940
1941 static int
1942 model_or1200_lf_sflt_s (SIM_CPU *current_cpu, void *sem_arg)
1943 {
1944 #define FLD(f) abuf->fields.sfmt_l_sll.f
1945 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1946 const IDESC * UNUSED idesc = abuf->idesc;
1947 int cycles = 0;
1948 {
1949 int referenced = 0;
1950 int UNUSED insn_referenced = abuf->written;
1951 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1952 }
1953 return cycles;
1954 #undef FLD
1955 }
1956
1957 static int
1958 model_or1200_lf_sflt_d32 (SIM_CPU *current_cpu, void *sem_arg)
1959 {
1960 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1961 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1962 const IDESC * UNUSED idesc = abuf->idesc;
1963 int cycles = 0;
1964 {
1965 int referenced = 0;
1966 int UNUSED insn_referenced = abuf->written;
1967 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1968 }
1969 return cycles;
1970 #undef FLD
1971 }
1972
1973 static int
1974 model_or1200_lf_sfle_s (SIM_CPU *current_cpu, void *sem_arg)
1975 {
1976 #define FLD(f) abuf->fields.sfmt_l_sll.f
1977 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1978 const IDESC * UNUSED idesc = abuf->idesc;
1979 int cycles = 0;
1980 {
1981 int referenced = 0;
1982 int UNUSED insn_referenced = abuf->written;
1983 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
1984 }
1985 return cycles;
1986 #undef FLD
1987 }
1988
1989 static int
1990 model_or1200_lf_sfle_d32 (SIM_CPU *current_cpu, void *sem_arg)
1991 {
1992 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
1993 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1994 const IDESC * UNUSED idesc = abuf->idesc;
1995 int cycles = 0;
1996 {
1997 int referenced = 0;
1998 int UNUSED insn_referenced = abuf->written;
1999 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2000 }
2001 return cycles;
2002 #undef FLD
2003 }
2004
2005 static int
2006 model_or1200_lf_sfueq_s (SIM_CPU *current_cpu, void *sem_arg)
2007 {
2008 #define FLD(f) abuf->fields.sfmt_l_sll.f
2009 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2010 const IDESC * UNUSED idesc = abuf->idesc;
2011 int cycles = 0;
2012 {
2013 int referenced = 0;
2014 int UNUSED insn_referenced = abuf->written;
2015 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2016 }
2017 return cycles;
2018 #undef FLD
2019 }
2020
2021 static int
2022 model_or1200_lf_sfueq_d32 (SIM_CPU *current_cpu, void *sem_arg)
2023 {
2024 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2025 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2026 const IDESC * UNUSED idesc = abuf->idesc;
2027 int cycles = 0;
2028 {
2029 int referenced = 0;
2030 int UNUSED insn_referenced = abuf->written;
2031 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2032 }
2033 return cycles;
2034 #undef FLD
2035 }
2036
2037 static int
2038 model_or1200_lf_sfune_s (SIM_CPU *current_cpu, void *sem_arg)
2039 {
2040 #define FLD(f) abuf->fields.sfmt_l_sll.f
2041 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2042 const IDESC * UNUSED idesc = abuf->idesc;
2043 int cycles = 0;
2044 {
2045 int referenced = 0;
2046 int UNUSED insn_referenced = abuf->written;
2047 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2048 }
2049 return cycles;
2050 #undef FLD
2051 }
2052
2053 static int
2054 model_or1200_lf_sfune_d32 (SIM_CPU *current_cpu, void *sem_arg)
2055 {
2056 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2057 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2058 const IDESC * UNUSED idesc = abuf->idesc;
2059 int cycles = 0;
2060 {
2061 int referenced = 0;
2062 int UNUSED insn_referenced = abuf->written;
2063 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2064 }
2065 return cycles;
2066 #undef FLD
2067 }
2068
2069 static int
2070 model_or1200_lf_sfugt_s (SIM_CPU *current_cpu, void *sem_arg)
2071 {
2072 #define FLD(f) abuf->fields.sfmt_l_sll.f
2073 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2074 const IDESC * UNUSED idesc = abuf->idesc;
2075 int cycles = 0;
2076 {
2077 int referenced = 0;
2078 int UNUSED insn_referenced = abuf->written;
2079 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2080 }
2081 return cycles;
2082 #undef FLD
2083 }
2084
2085 static int
2086 model_or1200_lf_sfugt_d32 (SIM_CPU *current_cpu, void *sem_arg)
2087 {
2088 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2089 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2090 const IDESC * UNUSED idesc = abuf->idesc;
2091 int cycles = 0;
2092 {
2093 int referenced = 0;
2094 int UNUSED insn_referenced = abuf->written;
2095 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2096 }
2097 return cycles;
2098 #undef FLD
2099 }
2100
2101 static int
2102 model_or1200_lf_sfuge_s (SIM_CPU *current_cpu, void *sem_arg)
2103 {
2104 #define FLD(f) abuf->fields.sfmt_l_sll.f
2105 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2106 const IDESC * UNUSED idesc = abuf->idesc;
2107 int cycles = 0;
2108 {
2109 int referenced = 0;
2110 int UNUSED insn_referenced = abuf->written;
2111 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2112 }
2113 return cycles;
2114 #undef FLD
2115 }
2116
2117 static int
2118 model_or1200_lf_sfuge_d32 (SIM_CPU *current_cpu, void *sem_arg)
2119 {
2120 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2121 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2122 const IDESC * UNUSED idesc = abuf->idesc;
2123 int cycles = 0;
2124 {
2125 int referenced = 0;
2126 int UNUSED insn_referenced = abuf->written;
2127 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2128 }
2129 return cycles;
2130 #undef FLD
2131 }
2132
2133 static int
2134 model_or1200_lf_sfult_s (SIM_CPU *current_cpu, void *sem_arg)
2135 {
2136 #define FLD(f) abuf->fields.sfmt_l_sll.f
2137 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2138 const IDESC * UNUSED idesc = abuf->idesc;
2139 int cycles = 0;
2140 {
2141 int referenced = 0;
2142 int UNUSED insn_referenced = abuf->written;
2143 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2144 }
2145 return cycles;
2146 #undef FLD
2147 }
2148
2149 static int
2150 model_or1200_lf_sfult_d32 (SIM_CPU *current_cpu, void *sem_arg)
2151 {
2152 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2153 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2154 const IDESC * UNUSED idesc = abuf->idesc;
2155 int cycles = 0;
2156 {
2157 int referenced = 0;
2158 int UNUSED insn_referenced = abuf->written;
2159 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2160 }
2161 return cycles;
2162 #undef FLD
2163 }
2164
2165 static int
2166 model_or1200_lf_sfule_s (SIM_CPU *current_cpu, void *sem_arg)
2167 {
2168 #define FLD(f) abuf->fields.sfmt_l_sll.f
2169 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2170 const IDESC * UNUSED idesc = abuf->idesc;
2171 int cycles = 0;
2172 {
2173 int referenced = 0;
2174 int UNUSED insn_referenced = abuf->written;
2175 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2176 }
2177 return cycles;
2178 #undef FLD
2179 }
2180
2181 static int
2182 model_or1200_lf_sfule_d32 (SIM_CPU *current_cpu, void *sem_arg)
2183 {
2184 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2186 const IDESC * UNUSED idesc = abuf->idesc;
2187 int cycles = 0;
2188 {
2189 int referenced = 0;
2190 int UNUSED insn_referenced = abuf->written;
2191 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2192 }
2193 return cycles;
2194 #undef FLD
2195 }
2196
2197 static int
2198 model_or1200_lf_sfun_s (SIM_CPU *current_cpu, void *sem_arg)
2199 {
2200 #define FLD(f) abuf->fields.sfmt_l_sll.f
2201 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2202 const IDESC * UNUSED idesc = abuf->idesc;
2203 int cycles = 0;
2204 {
2205 int referenced = 0;
2206 int UNUSED insn_referenced = abuf->written;
2207 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2208 }
2209 return cycles;
2210 #undef FLD
2211 }
2212
2213 static int
2214 model_or1200_lf_sfun_d32 (SIM_CPU *current_cpu, void *sem_arg)
2215 {
2216 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2217 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2218 const IDESC * UNUSED idesc = abuf->idesc;
2219 int cycles = 0;
2220 {
2221 int referenced = 0;
2222 int UNUSED insn_referenced = abuf->written;
2223 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2224 }
2225 return cycles;
2226 #undef FLD
2227 }
2228
2229 static int
2230 model_or1200_lf_madd_s (SIM_CPU *current_cpu, void *sem_arg)
2231 {
2232 #define FLD(f) abuf->fields.sfmt_l_sll.f
2233 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2234 const IDESC * UNUSED idesc = abuf->idesc;
2235 int cycles = 0;
2236 {
2237 int referenced = 0;
2238 int UNUSED insn_referenced = abuf->written;
2239 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2240 }
2241 return cycles;
2242 #undef FLD
2243 }
2244
2245 static int
2246 model_or1200_lf_madd_d32 (SIM_CPU *current_cpu, void *sem_arg)
2247 {
2248 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
2249 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2250 const IDESC * UNUSED idesc = abuf->idesc;
2251 int cycles = 0;
2252 {
2253 int referenced = 0;
2254 int UNUSED insn_referenced = abuf->written;
2255 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2256 }
2257 return cycles;
2258 #undef FLD
2259 }
2260
2261 static int
2262 model_or1200_lf_cust1_s (SIM_CPU *current_cpu, void *sem_arg)
2263 {
2264 #define FLD(f) abuf->fields.sfmt_empty.f
2265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2266 const IDESC * UNUSED idesc = abuf->idesc;
2267 int cycles = 0;
2268 {
2269 int referenced = 0;
2270 int UNUSED insn_referenced = abuf->written;
2271 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2272 }
2273 return cycles;
2274 #undef FLD
2275 }
2276
2277 static int
2278 model_or1200_lf_cust1_d32 (SIM_CPU *current_cpu, void *sem_arg)
2279 {
2280 #define FLD(f) abuf->fields.sfmt_empty.f
2281 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2282 const IDESC * UNUSED idesc = abuf->idesc;
2283 int cycles = 0;
2284 {
2285 int referenced = 0;
2286 int UNUSED insn_referenced = abuf->written;
2287 cycles += or1k32bf_model_or1200_u_exec (current_cpu, idesc, 0, referenced);
2288 }
2289 return cycles;
2290 #undef FLD
2291 }
2292
2293 static int
2294 model_or1200nd_l_j (SIM_CPU *current_cpu, void *sem_arg)
2295 {
2296 #define FLD(f) abuf->fields.sfmt_l_j.f
2297 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2298 const IDESC * UNUSED idesc = abuf->idesc;
2299 int cycles = 0;
2300 {
2301 int referenced = 0;
2302 int UNUSED insn_referenced = abuf->written;
2303 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2304 }
2305 return cycles;
2306 #undef FLD
2307 }
2308
2309 static int
2310 model_or1200nd_l_adrp (SIM_CPU *current_cpu, void *sem_arg)
2311 {
2312 #define FLD(f) abuf->fields.sfmt_l_adrp.f
2313 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2314 const IDESC * UNUSED idesc = abuf->idesc;
2315 int cycles = 0;
2316 {
2317 int referenced = 0;
2318 int UNUSED insn_referenced = abuf->written;
2319 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2320 }
2321 return cycles;
2322 #undef FLD
2323 }
2324
2325 static int
2326 model_or1200nd_l_jal (SIM_CPU *current_cpu, void *sem_arg)
2327 {
2328 #define FLD(f) abuf->fields.sfmt_l_j.f
2329 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2330 const IDESC * UNUSED idesc = abuf->idesc;
2331 int cycles = 0;
2332 {
2333 int referenced = 0;
2334 int UNUSED insn_referenced = abuf->written;
2335 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2336 }
2337 return cycles;
2338 #undef FLD
2339 }
2340
2341 static int
2342 model_or1200nd_l_jr (SIM_CPU *current_cpu, void *sem_arg)
2343 {
2344 #define FLD(f) abuf->fields.sfmt_l_sll.f
2345 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2346 const IDESC * UNUSED idesc = abuf->idesc;
2347 int cycles = 0;
2348 {
2349 int referenced = 0;
2350 int UNUSED insn_referenced = abuf->written;
2351 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2352 }
2353 return cycles;
2354 #undef FLD
2355 }
2356
2357 static int
2358 model_or1200nd_l_jalr (SIM_CPU *current_cpu, void *sem_arg)
2359 {
2360 #define FLD(f) abuf->fields.sfmt_l_sll.f
2361 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2362 const IDESC * UNUSED idesc = abuf->idesc;
2363 int cycles = 0;
2364 {
2365 int referenced = 0;
2366 int UNUSED insn_referenced = abuf->written;
2367 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2368 }
2369 return cycles;
2370 #undef FLD
2371 }
2372
2373 static int
2374 model_or1200nd_l_bnf (SIM_CPU *current_cpu, void *sem_arg)
2375 {
2376 #define FLD(f) abuf->fields.sfmt_l_j.f
2377 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2378 const IDESC * UNUSED idesc = abuf->idesc;
2379 int cycles = 0;
2380 {
2381 int referenced = 0;
2382 int UNUSED insn_referenced = abuf->written;
2383 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2384 }
2385 return cycles;
2386 #undef FLD
2387 }
2388
2389 static int
2390 model_or1200nd_l_bf (SIM_CPU *current_cpu, void *sem_arg)
2391 {
2392 #define FLD(f) abuf->fields.sfmt_l_j.f
2393 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2394 const IDESC * UNUSED idesc = abuf->idesc;
2395 int cycles = 0;
2396 {
2397 int referenced = 0;
2398 int UNUSED insn_referenced = abuf->written;
2399 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2400 }
2401 return cycles;
2402 #undef FLD
2403 }
2404
2405 static int
2406 model_or1200nd_l_trap (SIM_CPU *current_cpu, void *sem_arg)
2407 {
2408 #define FLD(f) abuf->fields.sfmt_empty.f
2409 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2410 const IDESC * UNUSED idesc = abuf->idesc;
2411 int cycles = 0;
2412 {
2413 int referenced = 0;
2414 int UNUSED insn_referenced = abuf->written;
2415 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2416 }
2417 return cycles;
2418 #undef FLD
2419 }
2420
2421 static int
2422 model_or1200nd_l_sys (SIM_CPU *current_cpu, void *sem_arg)
2423 {
2424 #define FLD(f) abuf->fields.sfmt_empty.f
2425 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2426 const IDESC * UNUSED idesc = abuf->idesc;
2427 int cycles = 0;
2428 {
2429 int referenced = 0;
2430 int UNUSED insn_referenced = abuf->written;
2431 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2432 }
2433 return cycles;
2434 #undef FLD
2435 }
2436
2437 static int
2438 model_or1200nd_l_msync (SIM_CPU *current_cpu, void *sem_arg)
2439 {
2440 #define FLD(f) abuf->fields.sfmt_empty.f
2441 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2442 const IDESC * UNUSED idesc = abuf->idesc;
2443 int cycles = 0;
2444 {
2445 int referenced = 0;
2446 int UNUSED insn_referenced = abuf->written;
2447 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2448 }
2449 return cycles;
2450 #undef FLD
2451 }
2452
2453 static int
2454 model_or1200nd_l_psync (SIM_CPU *current_cpu, void *sem_arg)
2455 {
2456 #define FLD(f) abuf->fields.sfmt_empty.f
2457 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2458 const IDESC * UNUSED idesc = abuf->idesc;
2459 int cycles = 0;
2460 {
2461 int referenced = 0;
2462 int UNUSED insn_referenced = abuf->written;
2463 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2464 }
2465 return cycles;
2466 #undef FLD
2467 }
2468
2469 static int
2470 model_or1200nd_l_csync (SIM_CPU *current_cpu, void *sem_arg)
2471 {
2472 #define FLD(f) abuf->fields.sfmt_empty.f
2473 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2474 const IDESC * UNUSED idesc = abuf->idesc;
2475 int cycles = 0;
2476 {
2477 int referenced = 0;
2478 int UNUSED insn_referenced = abuf->written;
2479 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2480 }
2481 return cycles;
2482 #undef FLD
2483 }
2484
2485 static int
2486 model_or1200nd_l_rfe (SIM_CPU *current_cpu, void *sem_arg)
2487 {
2488 #define FLD(f) abuf->fields.sfmt_empty.f
2489 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2490 const IDESC * UNUSED idesc = abuf->idesc;
2491 int cycles = 0;
2492 {
2493 int referenced = 0;
2494 int UNUSED insn_referenced = abuf->written;
2495 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2496 }
2497 return cycles;
2498 #undef FLD
2499 }
2500
2501 static int
2502 model_or1200nd_l_nop_imm (SIM_CPU *current_cpu, void *sem_arg)
2503 {
2504 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
2505 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2506 const IDESC * UNUSED idesc = abuf->idesc;
2507 int cycles = 0;
2508 {
2509 int referenced = 0;
2510 int UNUSED insn_referenced = abuf->written;
2511 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2512 }
2513 return cycles;
2514 #undef FLD
2515 }
2516
2517 static int
2518 model_or1200nd_l_movhi (SIM_CPU *current_cpu, void *sem_arg)
2519 {
2520 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
2521 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2522 const IDESC * UNUSED idesc = abuf->idesc;
2523 int cycles = 0;
2524 {
2525 int referenced = 0;
2526 int UNUSED insn_referenced = abuf->written;
2527 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2528 }
2529 return cycles;
2530 #undef FLD
2531 }
2532
2533 static int
2534 model_or1200nd_l_macrc (SIM_CPU *current_cpu, void *sem_arg)
2535 {
2536 #define FLD(f) abuf->fields.sfmt_l_adrp.f
2537 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2538 const IDESC * UNUSED idesc = abuf->idesc;
2539 int cycles = 0;
2540 {
2541 int referenced = 0;
2542 int UNUSED insn_referenced = abuf->written;
2543 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2544 }
2545 return cycles;
2546 #undef FLD
2547 }
2548
2549 static int
2550 model_or1200nd_l_mfspr (SIM_CPU *current_cpu, void *sem_arg)
2551 {
2552 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
2553 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2554 const IDESC * UNUSED idesc = abuf->idesc;
2555 int cycles = 0;
2556 {
2557 int referenced = 0;
2558 int UNUSED insn_referenced = abuf->written;
2559 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2560 }
2561 return cycles;
2562 #undef FLD
2563 }
2564
2565 static int
2566 model_or1200nd_l_mtspr (SIM_CPU *current_cpu, void *sem_arg)
2567 {
2568 #define FLD(f) abuf->fields.sfmt_l_mtspr.f
2569 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2570 const IDESC * UNUSED idesc = abuf->idesc;
2571 int cycles = 0;
2572 {
2573 int referenced = 0;
2574 int UNUSED insn_referenced = abuf->written;
2575 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2576 }
2577 return cycles;
2578 #undef FLD
2579 }
2580
2581 static int
2582 model_or1200nd_l_lwz (SIM_CPU *current_cpu, void *sem_arg)
2583 {
2584 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2585 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2586 const IDESC * UNUSED idesc = abuf->idesc;
2587 int cycles = 0;
2588 {
2589 int referenced = 0;
2590 int UNUSED insn_referenced = abuf->written;
2591 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2592 }
2593 return cycles;
2594 #undef FLD
2595 }
2596
2597 static int
2598 model_or1200nd_l_lws (SIM_CPU *current_cpu, void *sem_arg)
2599 {
2600 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2601 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2602 const IDESC * UNUSED idesc = abuf->idesc;
2603 int cycles = 0;
2604 {
2605 int referenced = 0;
2606 int UNUSED insn_referenced = abuf->written;
2607 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2608 }
2609 return cycles;
2610 #undef FLD
2611 }
2612
2613 static int
2614 model_or1200nd_l_lwa (SIM_CPU *current_cpu, void *sem_arg)
2615 {
2616 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2617 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2618 const IDESC * UNUSED idesc = abuf->idesc;
2619 int cycles = 0;
2620 {
2621 int referenced = 0;
2622 int UNUSED insn_referenced = abuf->written;
2623 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2624 }
2625 return cycles;
2626 #undef FLD
2627 }
2628
2629 static int
2630 model_or1200nd_l_lbz (SIM_CPU *current_cpu, void *sem_arg)
2631 {
2632 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2633 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2634 const IDESC * UNUSED idesc = abuf->idesc;
2635 int cycles = 0;
2636 {
2637 int referenced = 0;
2638 int UNUSED insn_referenced = abuf->written;
2639 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2640 }
2641 return cycles;
2642 #undef FLD
2643 }
2644
2645 static int
2646 model_or1200nd_l_lbs (SIM_CPU *current_cpu, void *sem_arg)
2647 {
2648 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2649 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2650 const IDESC * UNUSED idesc = abuf->idesc;
2651 int cycles = 0;
2652 {
2653 int referenced = 0;
2654 int UNUSED insn_referenced = abuf->written;
2655 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2656 }
2657 return cycles;
2658 #undef FLD
2659 }
2660
2661 static int
2662 model_or1200nd_l_lhz (SIM_CPU *current_cpu, void *sem_arg)
2663 {
2664 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2665 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2666 const IDESC * UNUSED idesc = abuf->idesc;
2667 int cycles = 0;
2668 {
2669 int referenced = 0;
2670 int UNUSED insn_referenced = abuf->written;
2671 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2672 }
2673 return cycles;
2674 #undef FLD
2675 }
2676
2677 static int
2678 model_or1200nd_l_lhs (SIM_CPU *current_cpu, void *sem_arg)
2679 {
2680 #define FLD(f) abuf->fields.sfmt_l_lwz.f
2681 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2682 const IDESC * UNUSED idesc = abuf->idesc;
2683 int cycles = 0;
2684 {
2685 int referenced = 0;
2686 int UNUSED insn_referenced = abuf->written;
2687 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2688 }
2689 return cycles;
2690 #undef FLD
2691 }
2692
2693 static int
2694 model_or1200nd_l_sw (SIM_CPU *current_cpu, void *sem_arg)
2695 {
2696 #define FLD(f) abuf->fields.sfmt_l_sw.f
2697 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2698 const IDESC * UNUSED idesc = abuf->idesc;
2699 int cycles = 0;
2700 {
2701 int referenced = 0;
2702 int UNUSED insn_referenced = abuf->written;
2703 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2704 }
2705 return cycles;
2706 #undef FLD
2707 }
2708
2709 static int
2710 model_or1200nd_l_sb (SIM_CPU *current_cpu, void *sem_arg)
2711 {
2712 #define FLD(f) abuf->fields.sfmt_l_sw.f
2713 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2714 const IDESC * UNUSED idesc = abuf->idesc;
2715 int cycles = 0;
2716 {
2717 int referenced = 0;
2718 int UNUSED insn_referenced = abuf->written;
2719 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2720 }
2721 return cycles;
2722 #undef FLD
2723 }
2724
2725 static int
2726 model_or1200nd_l_sh (SIM_CPU *current_cpu, void *sem_arg)
2727 {
2728 #define FLD(f) abuf->fields.sfmt_l_sw.f
2729 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2730 const IDESC * UNUSED idesc = abuf->idesc;
2731 int cycles = 0;
2732 {
2733 int referenced = 0;
2734 int UNUSED insn_referenced = abuf->written;
2735 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2736 }
2737 return cycles;
2738 #undef FLD
2739 }
2740
2741 static int
2742 model_or1200nd_l_swa (SIM_CPU *current_cpu, void *sem_arg)
2743 {
2744 #define FLD(f) abuf->fields.sfmt_l_sw.f
2745 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2746 const IDESC * UNUSED idesc = abuf->idesc;
2747 int cycles = 0;
2748 {
2749 int referenced = 0;
2750 int UNUSED insn_referenced = abuf->written;
2751 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2752 }
2753 return cycles;
2754 #undef FLD
2755 }
2756
2757 static int
2758 model_or1200nd_l_sll (SIM_CPU *current_cpu, void *sem_arg)
2759 {
2760 #define FLD(f) abuf->fields.sfmt_l_sll.f
2761 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2762 const IDESC * UNUSED idesc = abuf->idesc;
2763 int cycles = 0;
2764 {
2765 int referenced = 0;
2766 int UNUSED insn_referenced = abuf->written;
2767 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2768 }
2769 return cycles;
2770 #undef FLD
2771 }
2772
2773 static int
2774 model_or1200nd_l_slli (SIM_CPU *current_cpu, void *sem_arg)
2775 {
2776 #define FLD(f) abuf->fields.sfmt_l_slli.f
2777 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2778 const IDESC * UNUSED idesc = abuf->idesc;
2779 int cycles = 0;
2780 {
2781 int referenced = 0;
2782 int UNUSED insn_referenced = abuf->written;
2783 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2784 }
2785 return cycles;
2786 #undef FLD
2787 }
2788
2789 static int
2790 model_or1200nd_l_srl (SIM_CPU *current_cpu, void *sem_arg)
2791 {
2792 #define FLD(f) abuf->fields.sfmt_l_sll.f
2793 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2794 const IDESC * UNUSED idesc = abuf->idesc;
2795 int cycles = 0;
2796 {
2797 int referenced = 0;
2798 int UNUSED insn_referenced = abuf->written;
2799 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2800 }
2801 return cycles;
2802 #undef FLD
2803 }
2804
2805 static int
2806 model_or1200nd_l_srli (SIM_CPU *current_cpu, void *sem_arg)
2807 {
2808 #define FLD(f) abuf->fields.sfmt_l_slli.f
2809 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2810 const IDESC * UNUSED idesc = abuf->idesc;
2811 int cycles = 0;
2812 {
2813 int referenced = 0;
2814 int UNUSED insn_referenced = abuf->written;
2815 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2816 }
2817 return cycles;
2818 #undef FLD
2819 }
2820
2821 static int
2822 model_or1200nd_l_sra (SIM_CPU *current_cpu, void *sem_arg)
2823 {
2824 #define FLD(f) abuf->fields.sfmt_l_sll.f
2825 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2826 const IDESC * UNUSED idesc = abuf->idesc;
2827 int cycles = 0;
2828 {
2829 int referenced = 0;
2830 int UNUSED insn_referenced = abuf->written;
2831 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2832 }
2833 return cycles;
2834 #undef FLD
2835 }
2836
2837 static int
2838 model_or1200nd_l_srai (SIM_CPU *current_cpu, void *sem_arg)
2839 {
2840 #define FLD(f) abuf->fields.sfmt_l_slli.f
2841 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2842 const IDESC * UNUSED idesc = abuf->idesc;
2843 int cycles = 0;
2844 {
2845 int referenced = 0;
2846 int UNUSED insn_referenced = abuf->written;
2847 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2848 }
2849 return cycles;
2850 #undef FLD
2851 }
2852
2853 static int
2854 model_or1200nd_l_ror (SIM_CPU *current_cpu, void *sem_arg)
2855 {
2856 #define FLD(f) abuf->fields.sfmt_l_sll.f
2857 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2858 const IDESC * UNUSED idesc = abuf->idesc;
2859 int cycles = 0;
2860 {
2861 int referenced = 0;
2862 int UNUSED insn_referenced = abuf->written;
2863 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2864 }
2865 return cycles;
2866 #undef FLD
2867 }
2868
2869 static int
2870 model_or1200nd_l_rori (SIM_CPU *current_cpu, void *sem_arg)
2871 {
2872 #define FLD(f) abuf->fields.sfmt_l_slli.f
2873 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2874 const IDESC * UNUSED idesc = abuf->idesc;
2875 int cycles = 0;
2876 {
2877 int referenced = 0;
2878 int UNUSED insn_referenced = abuf->written;
2879 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2880 }
2881 return cycles;
2882 #undef FLD
2883 }
2884
2885 static int
2886 model_or1200nd_l_and (SIM_CPU *current_cpu, void *sem_arg)
2887 {
2888 #define FLD(f) abuf->fields.sfmt_l_sll.f
2889 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2890 const IDESC * UNUSED idesc = abuf->idesc;
2891 int cycles = 0;
2892 {
2893 int referenced = 0;
2894 int UNUSED insn_referenced = abuf->written;
2895 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2896 }
2897 return cycles;
2898 #undef FLD
2899 }
2900
2901 static int
2902 model_or1200nd_l_or (SIM_CPU *current_cpu, void *sem_arg)
2903 {
2904 #define FLD(f) abuf->fields.sfmt_l_sll.f
2905 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2906 const IDESC * UNUSED idesc = abuf->idesc;
2907 int cycles = 0;
2908 {
2909 int referenced = 0;
2910 int UNUSED insn_referenced = abuf->written;
2911 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2912 }
2913 return cycles;
2914 #undef FLD
2915 }
2916
2917 static int
2918 model_or1200nd_l_xor (SIM_CPU *current_cpu, void *sem_arg)
2919 {
2920 #define FLD(f) abuf->fields.sfmt_l_sll.f
2921 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2922 const IDESC * UNUSED idesc = abuf->idesc;
2923 int cycles = 0;
2924 {
2925 int referenced = 0;
2926 int UNUSED insn_referenced = abuf->written;
2927 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2928 }
2929 return cycles;
2930 #undef FLD
2931 }
2932
2933 static int
2934 model_or1200nd_l_add (SIM_CPU *current_cpu, void *sem_arg)
2935 {
2936 #define FLD(f) abuf->fields.sfmt_l_sll.f
2937 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2938 const IDESC * UNUSED idesc = abuf->idesc;
2939 int cycles = 0;
2940 {
2941 int referenced = 0;
2942 int UNUSED insn_referenced = abuf->written;
2943 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2944 }
2945 return cycles;
2946 #undef FLD
2947 }
2948
2949 static int
2950 model_or1200nd_l_sub (SIM_CPU *current_cpu, void *sem_arg)
2951 {
2952 #define FLD(f) abuf->fields.sfmt_l_sll.f
2953 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2954 const IDESC * UNUSED idesc = abuf->idesc;
2955 int cycles = 0;
2956 {
2957 int referenced = 0;
2958 int UNUSED insn_referenced = abuf->written;
2959 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2960 }
2961 return cycles;
2962 #undef FLD
2963 }
2964
2965 static int
2966 model_or1200nd_l_addc (SIM_CPU *current_cpu, void *sem_arg)
2967 {
2968 #define FLD(f) abuf->fields.sfmt_l_sll.f
2969 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2970 const IDESC * UNUSED idesc = abuf->idesc;
2971 int cycles = 0;
2972 {
2973 int referenced = 0;
2974 int UNUSED insn_referenced = abuf->written;
2975 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2976 }
2977 return cycles;
2978 #undef FLD
2979 }
2980
2981 static int
2982 model_or1200nd_l_mul (SIM_CPU *current_cpu, void *sem_arg)
2983 {
2984 #define FLD(f) abuf->fields.sfmt_l_sll.f
2985 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2986 const IDESC * UNUSED idesc = abuf->idesc;
2987 int cycles = 0;
2988 {
2989 int referenced = 0;
2990 int UNUSED insn_referenced = abuf->written;
2991 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
2992 }
2993 return cycles;
2994 #undef FLD
2995 }
2996
2997 static int
2998 model_or1200nd_l_muld (SIM_CPU *current_cpu, void *sem_arg)
2999 {
3000 #define FLD(f) abuf->fields.sfmt_l_sll.f
3001 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3002 const IDESC * UNUSED idesc = abuf->idesc;
3003 int cycles = 0;
3004 {
3005 int referenced = 0;
3006 int UNUSED insn_referenced = abuf->written;
3007 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3008 }
3009 return cycles;
3010 #undef FLD
3011 }
3012
3013 static int
3014 model_or1200nd_l_mulu (SIM_CPU *current_cpu, void *sem_arg)
3015 {
3016 #define FLD(f) abuf->fields.sfmt_l_sll.f
3017 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3018 const IDESC * UNUSED idesc = abuf->idesc;
3019 int cycles = 0;
3020 {
3021 int referenced = 0;
3022 int UNUSED insn_referenced = abuf->written;
3023 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3024 }
3025 return cycles;
3026 #undef FLD
3027 }
3028
3029 static int
3030 model_or1200nd_l_muldu (SIM_CPU *current_cpu, void *sem_arg)
3031 {
3032 #define FLD(f) abuf->fields.sfmt_l_sll.f
3033 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3034 const IDESC * UNUSED idesc = abuf->idesc;
3035 int cycles = 0;
3036 {
3037 int referenced = 0;
3038 int UNUSED insn_referenced = abuf->written;
3039 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3040 }
3041 return cycles;
3042 #undef FLD
3043 }
3044
3045 static int
3046 model_or1200nd_l_div (SIM_CPU *current_cpu, void *sem_arg)
3047 {
3048 #define FLD(f) abuf->fields.sfmt_l_sll.f
3049 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3050 const IDESC * UNUSED idesc = abuf->idesc;
3051 int cycles = 0;
3052 {
3053 int referenced = 0;
3054 int UNUSED insn_referenced = abuf->written;
3055 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3056 }
3057 return cycles;
3058 #undef FLD
3059 }
3060
3061 static int
3062 model_or1200nd_l_divu (SIM_CPU *current_cpu, void *sem_arg)
3063 {
3064 #define FLD(f) abuf->fields.sfmt_l_sll.f
3065 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3066 const IDESC * UNUSED idesc = abuf->idesc;
3067 int cycles = 0;
3068 {
3069 int referenced = 0;
3070 int UNUSED insn_referenced = abuf->written;
3071 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3072 }
3073 return cycles;
3074 #undef FLD
3075 }
3076
3077 static int
3078 model_or1200nd_l_ff1 (SIM_CPU *current_cpu, void *sem_arg)
3079 {
3080 #define FLD(f) abuf->fields.sfmt_l_slli.f
3081 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3082 const IDESC * UNUSED idesc = abuf->idesc;
3083 int cycles = 0;
3084 {
3085 int referenced = 0;
3086 int UNUSED insn_referenced = abuf->written;
3087 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3088 }
3089 return cycles;
3090 #undef FLD
3091 }
3092
3093 static int
3094 model_or1200nd_l_fl1 (SIM_CPU *current_cpu, void *sem_arg)
3095 {
3096 #define FLD(f) abuf->fields.sfmt_l_slli.f
3097 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3098 const IDESC * UNUSED idesc = abuf->idesc;
3099 int cycles = 0;
3100 {
3101 int referenced = 0;
3102 int UNUSED insn_referenced = abuf->written;
3103 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3104 }
3105 return cycles;
3106 #undef FLD
3107 }
3108
3109 static int
3110 model_or1200nd_l_andi (SIM_CPU *current_cpu, void *sem_arg)
3111 {
3112 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
3113 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3114 const IDESC * UNUSED idesc = abuf->idesc;
3115 int cycles = 0;
3116 {
3117 int referenced = 0;
3118 int UNUSED insn_referenced = abuf->written;
3119 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3120 }
3121 return cycles;
3122 #undef FLD
3123 }
3124
3125 static int
3126 model_or1200nd_l_ori (SIM_CPU *current_cpu, void *sem_arg)
3127 {
3128 #define FLD(f) abuf->fields.sfmt_l_mfspr.f
3129 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3130 const IDESC * UNUSED idesc = abuf->idesc;
3131 int cycles = 0;
3132 {
3133 int referenced = 0;
3134 int UNUSED insn_referenced = abuf->written;
3135 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3136 }
3137 return cycles;
3138 #undef FLD
3139 }
3140
3141 static int
3142 model_or1200nd_l_xori (SIM_CPU *current_cpu, void *sem_arg)
3143 {
3144 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3145 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3146 const IDESC * UNUSED idesc = abuf->idesc;
3147 int cycles = 0;
3148 {
3149 int referenced = 0;
3150 int UNUSED insn_referenced = abuf->written;
3151 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3152 }
3153 return cycles;
3154 #undef FLD
3155 }
3156
3157 static int
3158 model_or1200nd_l_addi (SIM_CPU *current_cpu, void *sem_arg)
3159 {
3160 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3161 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3162 const IDESC * UNUSED idesc = abuf->idesc;
3163 int cycles = 0;
3164 {
3165 int referenced = 0;
3166 int UNUSED insn_referenced = abuf->written;
3167 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3168 }
3169 return cycles;
3170 #undef FLD
3171 }
3172
3173 static int
3174 model_or1200nd_l_addic (SIM_CPU *current_cpu, void *sem_arg)
3175 {
3176 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3177 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3178 const IDESC * UNUSED idesc = abuf->idesc;
3179 int cycles = 0;
3180 {
3181 int referenced = 0;
3182 int UNUSED insn_referenced = abuf->written;
3183 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3184 }
3185 return cycles;
3186 #undef FLD
3187 }
3188
3189 static int
3190 model_or1200nd_l_muli (SIM_CPU *current_cpu, void *sem_arg)
3191 {
3192 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3193 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3194 const IDESC * UNUSED idesc = abuf->idesc;
3195 int cycles = 0;
3196 {
3197 int referenced = 0;
3198 int UNUSED insn_referenced = abuf->written;
3199 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3200 }
3201 return cycles;
3202 #undef FLD
3203 }
3204
3205 static int
3206 model_or1200nd_l_exths (SIM_CPU *current_cpu, void *sem_arg)
3207 {
3208 #define FLD(f) abuf->fields.sfmt_l_slli.f
3209 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3210 const IDESC * UNUSED idesc = abuf->idesc;
3211 int cycles = 0;
3212 {
3213 int referenced = 0;
3214 int UNUSED insn_referenced = abuf->written;
3215 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3216 }
3217 return cycles;
3218 #undef FLD
3219 }
3220
3221 static int
3222 model_or1200nd_l_extbs (SIM_CPU *current_cpu, void *sem_arg)
3223 {
3224 #define FLD(f) abuf->fields.sfmt_l_slli.f
3225 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3226 const IDESC * UNUSED idesc = abuf->idesc;
3227 int cycles = 0;
3228 {
3229 int referenced = 0;
3230 int UNUSED insn_referenced = abuf->written;
3231 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3232 }
3233 return cycles;
3234 #undef FLD
3235 }
3236
3237 static int
3238 model_or1200nd_l_exthz (SIM_CPU *current_cpu, void *sem_arg)
3239 {
3240 #define FLD(f) abuf->fields.sfmt_l_slli.f
3241 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3242 const IDESC * UNUSED idesc = abuf->idesc;
3243 int cycles = 0;
3244 {
3245 int referenced = 0;
3246 int UNUSED insn_referenced = abuf->written;
3247 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3248 }
3249 return cycles;
3250 #undef FLD
3251 }
3252
3253 static int
3254 model_or1200nd_l_extbz (SIM_CPU *current_cpu, void *sem_arg)
3255 {
3256 #define FLD(f) abuf->fields.sfmt_l_slli.f
3257 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3258 const IDESC * UNUSED idesc = abuf->idesc;
3259 int cycles = 0;
3260 {
3261 int referenced = 0;
3262 int UNUSED insn_referenced = abuf->written;
3263 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3264 }
3265 return cycles;
3266 #undef FLD
3267 }
3268
3269 static int
3270 model_or1200nd_l_extws (SIM_CPU *current_cpu, void *sem_arg)
3271 {
3272 #define FLD(f) abuf->fields.sfmt_l_slli.f
3273 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3274 const IDESC * UNUSED idesc = abuf->idesc;
3275 int cycles = 0;
3276 {
3277 int referenced = 0;
3278 int UNUSED insn_referenced = abuf->written;
3279 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3280 }
3281 return cycles;
3282 #undef FLD
3283 }
3284
3285 static int
3286 model_or1200nd_l_extwz (SIM_CPU *current_cpu, void *sem_arg)
3287 {
3288 #define FLD(f) abuf->fields.sfmt_l_slli.f
3289 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3290 const IDESC * UNUSED idesc = abuf->idesc;
3291 int cycles = 0;
3292 {
3293 int referenced = 0;
3294 int UNUSED insn_referenced = abuf->written;
3295 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3296 }
3297 return cycles;
3298 #undef FLD
3299 }
3300
3301 static int
3302 model_or1200nd_l_cmov (SIM_CPU *current_cpu, void *sem_arg)
3303 {
3304 #define FLD(f) abuf->fields.sfmt_l_sll.f
3305 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3306 const IDESC * UNUSED idesc = abuf->idesc;
3307 int cycles = 0;
3308 {
3309 int referenced = 0;
3310 int UNUSED insn_referenced = abuf->written;
3311 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3312 }
3313 return cycles;
3314 #undef FLD
3315 }
3316
3317 static int
3318 model_or1200nd_l_sfgts (SIM_CPU *current_cpu, void *sem_arg)
3319 {
3320 #define FLD(f) abuf->fields.sfmt_l_sll.f
3321 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3322 const IDESC * UNUSED idesc = abuf->idesc;
3323 int cycles = 0;
3324 {
3325 int referenced = 0;
3326 int UNUSED insn_referenced = abuf->written;
3327 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3328 }
3329 return cycles;
3330 #undef FLD
3331 }
3332
3333 static int
3334 model_or1200nd_l_sfgtsi (SIM_CPU *current_cpu, void *sem_arg)
3335 {
3336 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3337 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3338 const IDESC * UNUSED idesc = abuf->idesc;
3339 int cycles = 0;
3340 {
3341 int referenced = 0;
3342 int UNUSED insn_referenced = abuf->written;
3343 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3344 }
3345 return cycles;
3346 #undef FLD
3347 }
3348
3349 static int
3350 model_or1200nd_l_sfgtu (SIM_CPU *current_cpu, void *sem_arg)
3351 {
3352 #define FLD(f) abuf->fields.sfmt_l_sll.f
3353 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3354 const IDESC * UNUSED idesc = abuf->idesc;
3355 int cycles = 0;
3356 {
3357 int referenced = 0;
3358 int UNUSED insn_referenced = abuf->written;
3359 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3360 }
3361 return cycles;
3362 #undef FLD
3363 }
3364
3365 static int
3366 model_or1200nd_l_sfgtui (SIM_CPU *current_cpu, void *sem_arg)
3367 {
3368 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3369 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3370 const IDESC * UNUSED idesc = abuf->idesc;
3371 int cycles = 0;
3372 {
3373 int referenced = 0;
3374 int UNUSED insn_referenced = abuf->written;
3375 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3376 }
3377 return cycles;
3378 #undef FLD
3379 }
3380
3381 static int
3382 model_or1200nd_l_sfges (SIM_CPU *current_cpu, void *sem_arg)
3383 {
3384 #define FLD(f) abuf->fields.sfmt_l_sll.f
3385 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3386 const IDESC * UNUSED idesc = abuf->idesc;
3387 int cycles = 0;
3388 {
3389 int referenced = 0;
3390 int UNUSED insn_referenced = abuf->written;
3391 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3392 }
3393 return cycles;
3394 #undef FLD
3395 }
3396
3397 static int
3398 model_or1200nd_l_sfgesi (SIM_CPU *current_cpu, void *sem_arg)
3399 {
3400 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3401 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3402 const IDESC * UNUSED idesc = abuf->idesc;
3403 int cycles = 0;
3404 {
3405 int referenced = 0;
3406 int UNUSED insn_referenced = abuf->written;
3407 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3408 }
3409 return cycles;
3410 #undef FLD
3411 }
3412
3413 static int
3414 model_or1200nd_l_sfgeu (SIM_CPU *current_cpu, void *sem_arg)
3415 {
3416 #define FLD(f) abuf->fields.sfmt_l_sll.f
3417 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3418 const IDESC * UNUSED idesc = abuf->idesc;
3419 int cycles = 0;
3420 {
3421 int referenced = 0;
3422 int UNUSED insn_referenced = abuf->written;
3423 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3424 }
3425 return cycles;
3426 #undef FLD
3427 }
3428
3429 static int
3430 model_or1200nd_l_sfgeui (SIM_CPU *current_cpu, void *sem_arg)
3431 {
3432 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3433 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3434 const IDESC * UNUSED idesc = abuf->idesc;
3435 int cycles = 0;
3436 {
3437 int referenced = 0;
3438 int UNUSED insn_referenced = abuf->written;
3439 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3440 }
3441 return cycles;
3442 #undef FLD
3443 }
3444
3445 static int
3446 model_or1200nd_l_sflts (SIM_CPU *current_cpu, void *sem_arg)
3447 {
3448 #define FLD(f) abuf->fields.sfmt_l_sll.f
3449 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3450 const IDESC * UNUSED idesc = abuf->idesc;
3451 int cycles = 0;
3452 {
3453 int referenced = 0;
3454 int UNUSED insn_referenced = abuf->written;
3455 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3456 }
3457 return cycles;
3458 #undef FLD
3459 }
3460
3461 static int
3462 model_or1200nd_l_sfltsi (SIM_CPU *current_cpu, void *sem_arg)
3463 {
3464 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3465 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3466 const IDESC * UNUSED idesc = abuf->idesc;
3467 int cycles = 0;
3468 {
3469 int referenced = 0;
3470 int UNUSED insn_referenced = abuf->written;
3471 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3472 }
3473 return cycles;
3474 #undef FLD
3475 }
3476
3477 static int
3478 model_or1200nd_l_sfltu (SIM_CPU *current_cpu, void *sem_arg)
3479 {
3480 #define FLD(f) abuf->fields.sfmt_l_sll.f
3481 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3482 const IDESC * UNUSED idesc = abuf->idesc;
3483 int cycles = 0;
3484 {
3485 int referenced = 0;
3486 int UNUSED insn_referenced = abuf->written;
3487 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3488 }
3489 return cycles;
3490 #undef FLD
3491 }
3492
3493 static int
3494 model_or1200nd_l_sfltui (SIM_CPU *current_cpu, void *sem_arg)
3495 {
3496 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3497 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3498 const IDESC * UNUSED idesc = abuf->idesc;
3499 int cycles = 0;
3500 {
3501 int referenced = 0;
3502 int UNUSED insn_referenced = abuf->written;
3503 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3504 }
3505 return cycles;
3506 #undef FLD
3507 }
3508
3509 static int
3510 model_or1200nd_l_sfles (SIM_CPU *current_cpu, void *sem_arg)
3511 {
3512 #define FLD(f) abuf->fields.sfmt_l_sll.f
3513 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3514 const IDESC * UNUSED idesc = abuf->idesc;
3515 int cycles = 0;
3516 {
3517 int referenced = 0;
3518 int UNUSED insn_referenced = abuf->written;
3519 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3520 }
3521 return cycles;
3522 #undef FLD
3523 }
3524
3525 static int
3526 model_or1200nd_l_sflesi (SIM_CPU *current_cpu, void *sem_arg)
3527 {
3528 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3529 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3530 const IDESC * UNUSED idesc = abuf->idesc;
3531 int cycles = 0;
3532 {
3533 int referenced = 0;
3534 int UNUSED insn_referenced = abuf->written;
3535 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3536 }
3537 return cycles;
3538 #undef FLD
3539 }
3540
3541 static int
3542 model_or1200nd_l_sfleu (SIM_CPU *current_cpu, void *sem_arg)
3543 {
3544 #define FLD(f) abuf->fields.sfmt_l_sll.f
3545 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3546 const IDESC * UNUSED idesc = abuf->idesc;
3547 int cycles = 0;
3548 {
3549 int referenced = 0;
3550 int UNUSED insn_referenced = abuf->written;
3551 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3552 }
3553 return cycles;
3554 #undef FLD
3555 }
3556
3557 static int
3558 model_or1200nd_l_sfleui (SIM_CPU *current_cpu, void *sem_arg)
3559 {
3560 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3561 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3562 const IDESC * UNUSED idesc = abuf->idesc;
3563 int cycles = 0;
3564 {
3565 int referenced = 0;
3566 int UNUSED insn_referenced = abuf->written;
3567 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3568 }
3569 return cycles;
3570 #undef FLD
3571 }
3572
3573 static int
3574 model_or1200nd_l_sfeq (SIM_CPU *current_cpu, void *sem_arg)
3575 {
3576 #define FLD(f) abuf->fields.sfmt_l_sll.f
3577 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3578 const IDESC * UNUSED idesc = abuf->idesc;
3579 int cycles = 0;
3580 {
3581 int referenced = 0;
3582 int UNUSED insn_referenced = abuf->written;
3583 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3584 }
3585 return cycles;
3586 #undef FLD
3587 }
3588
3589 static int
3590 model_or1200nd_l_sfeqi (SIM_CPU *current_cpu, void *sem_arg)
3591 {
3592 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3593 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3594 const IDESC * UNUSED idesc = abuf->idesc;
3595 int cycles = 0;
3596 {
3597 int referenced = 0;
3598 int UNUSED insn_referenced = abuf->written;
3599 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3600 }
3601 return cycles;
3602 #undef FLD
3603 }
3604
3605 static int
3606 model_or1200nd_l_sfne (SIM_CPU *current_cpu, void *sem_arg)
3607 {
3608 #define FLD(f) abuf->fields.sfmt_l_sll.f
3609 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3610 const IDESC * UNUSED idesc = abuf->idesc;
3611 int cycles = 0;
3612 {
3613 int referenced = 0;
3614 int UNUSED insn_referenced = abuf->written;
3615 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3616 }
3617 return cycles;
3618 #undef FLD
3619 }
3620
3621 static int
3622 model_or1200nd_l_sfnei (SIM_CPU *current_cpu, void *sem_arg)
3623 {
3624 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3625 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3626 const IDESC * UNUSED idesc = abuf->idesc;
3627 int cycles = 0;
3628 {
3629 int referenced = 0;
3630 int UNUSED insn_referenced = abuf->written;
3631 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3632 }
3633 return cycles;
3634 #undef FLD
3635 }
3636
3637 static int
3638 model_or1200nd_l_mac (SIM_CPU *current_cpu, void *sem_arg)
3639 {
3640 #define FLD(f) abuf->fields.sfmt_l_sll.f
3641 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3642 const IDESC * UNUSED idesc = abuf->idesc;
3643 int cycles = 0;
3644 {
3645 int referenced = 0;
3646 int UNUSED insn_referenced = abuf->written;
3647 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3648 }
3649 return cycles;
3650 #undef FLD
3651 }
3652
3653 static int
3654 model_or1200nd_l_maci (SIM_CPU *current_cpu, void *sem_arg)
3655 {
3656 #define FLD(f) abuf->fields.sfmt_l_lwz.f
3657 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3658 const IDESC * UNUSED idesc = abuf->idesc;
3659 int cycles = 0;
3660 {
3661 int referenced = 0;
3662 int UNUSED insn_referenced = abuf->written;
3663 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3664 }
3665 return cycles;
3666 #undef FLD
3667 }
3668
3669 static int
3670 model_or1200nd_l_macu (SIM_CPU *current_cpu, void *sem_arg)
3671 {
3672 #define FLD(f) abuf->fields.sfmt_l_sll.f
3673 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3674 const IDESC * UNUSED idesc = abuf->idesc;
3675 int cycles = 0;
3676 {
3677 int referenced = 0;
3678 int UNUSED insn_referenced = abuf->written;
3679 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3680 }
3681 return cycles;
3682 #undef FLD
3683 }
3684
3685 static int
3686 model_or1200nd_l_msb (SIM_CPU *current_cpu, void *sem_arg)
3687 {
3688 #define FLD(f) abuf->fields.sfmt_l_sll.f
3689 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3690 const IDESC * UNUSED idesc = abuf->idesc;
3691 int cycles = 0;
3692 {
3693 int referenced = 0;
3694 int UNUSED insn_referenced = abuf->written;
3695 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3696 }
3697 return cycles;
3698 #undef FLD
3699 }
3700
3701 static int
3702 model_or1200nd_l_msbu (SIM_CPU *current_cpu, void *sem_arg)
3703 {
3704 #define FLD(f) abuf->fields.sfmt_l_sll.f
3705 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3706 const IDESC * UNUSED idesc = abuf->idesc;
3707 int cycles = 0;
3708 {
3709 int referenced = 0;
3710 int UNUSED insn_referenced = abuf->written;
3711 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3712 }
3713 return cycles;
3714 #undef FLD
3715 }
3716
3717 static int
3718 model_or1200nd_l_cust1 (SIM_CPU *current_cpu, void *sem_arg)
3719 {
3720 #define FLD(f) abuf->fields.sfmt_empty.f
3721 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3722 const IDESC * UNUSED idesc = abuf->idesc;
3723 int cycles = 0;
3724 {
3725 int referenced = 0;
3726 int UNUSED insn_referenced = abuf->written;
3727 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3728 }
3729 return cycles;
3730 #undef FLD
3731 }
3732
3733 static int
3734 model_or1200nd_l_cust2 (SIM_CPU *current_cpu, void *sem_arg)
3735 {
3736 #define FLD(f) abuf->fields.sfmt_empty.f
3737 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3738 const IDESC * UNUSED idesc = abuf->idesc;
3739 int cycles = 0;
3740 {
3741 int referenced = 0;
3742 int UNUSED insn_referenced = abuf->written;
3743 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3744 }
3745 return cycles;
3746 #undef FLD
3747 }
3748
3749 static int
3750 model_or1200nd_l_cust3 (SIM_CPU *current_cpu, void *sem_arg)
3751 {
3752 #define FLD(f) abuf->fields.sfmt_empty.f
3753 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3754 const IDESC * UNUSED idesc = abuf->idesc;
3755 int cycles = 0;
3756 {
3757 int referenced = 0;
3758 int UNUSED insn_referenced = abuf->written;
3759 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3760 }
3761 return cycles;
3762 #undef FLD
3763 }
3764
3765 static int
3766 model_or1200nd_l_cust4 (SIM_CPU *current_cpu, void *sem_arg)
3767 {
3768 #define FLD(f) abuf->fields.sfmt_empty.f
3769 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3770 const IDESC * UNUSED idesc = abuf->idesc;
3771 int cycles = 0;
3772 {
3773 int referenced = 0;
3774 int UNUSED insn_referenced = abuf->written;
3775 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3776 }
3777 return cycles;
3778 #undef FLD
3779 }
3780
3781 static int
3782 model_or1200nd_l_cust5 (SIM_CPU *current_cpu, void *sem_arg)
3783 {
3784 #define FLD(f) abuf->fields.sfmt_empty.f
3785 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3786 const IDESC * UNUSED idesc = abuf->idesc;
3787 int cycles = 0;
3788 {
3789 int referenced = 0;
3790 int UNUSED insn_referenced = abuf->written;
3791 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3792 }
3793 return cycles;
3794 #undef FLD
3795 }
3796
3797 static int
3798 model_or1200nd_l_cust6 (SIM_CPU *current_cpu, void *sem_arg)
3799 {
3800 #define FLD(f) abuf->fields.sfmt_empty.f
3801 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3802 const IDESC * UNUSED idesc = abuf->idesc;
3803 int cycles = 0;
3804 {
3805 int referenced = 0;
3806 int UNUSED insn_referenced = abuf->written;
3807 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3808 }
3809 return cycles;
3810 #undef FLD
3811 }
3812
3813 static int
3814 model_or1200nd_l_cust7 (SIM_CPU *current_cpu, void *sem_arg)
3815 {
3816 #define FLD(f) abuf->fields.sfmt_empty.f
3817 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3818 const IDESC * UNUSED idesc = abuf->idesc;
3819 int cycles = 0;
3820 {
3821 int referenced = 0;
3822 int UNUSED insn_referenced = abuf->written;
3823 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3824 }
3825 return cycles;
3826 #undef FLD
3827 }
3828
3829 static int
3830 model_or1200nd_l_cust8 (SIM_CPU *current_cpu, void *sem_arg)
3831 {
3832 #define FLD(f) abuf->fields.sfmt_empty.f
3833 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3834 const IDESC * UNUSED idesc = abuf->idesc;
3835 int cycles = 0;
3836 {
3837 int referenced = 0;
3838 int UNUSED insn_referenced = abuf->written;
3839 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3840 }
3841 return cycles;
3842 #undef FLD
3843 }
3844
3845 static int
3846 model_or1200nd_lf_add_s (SIM_CPU *current_cpu, void *sem_arg)
3847 {
3848 #define FLD(f) abuf->fields.sfmt_l_sll.f
3849 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3850 const IDESC * UNUSED idesc = abuf->idesc;
3851 int cycles = 0;
3852 {
3853 int referenced = 0;
3854 int UNUSED insn_referenced = abuf->written;
3855 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3856 }
3857 return cycles;
3858 #undef FLD
3859 }
3860
3861 static int
3862 model_or1200nd_lf_add_d32 (SIM_CPU *current_cpu, void *sem_arg)
3863 {
3864 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
3865 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3866 const IDESC * UNUSED idesc = abuf->idesc;
3867 int cycles = 0;
3868 {
3869 int referenced = 0;
3870 int UNUSED insn_referenced = abuf->written;
3871 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3872 }
3873 return cycles;
3874 #undef FLD
3875 }
3876
3877 static int
3878 model_or1200nd_lf_sub_s (SIM_CPU *current_cpu, void *sem_arg)
3879 {
3880 #define FLD(f) abuf->fields.sfmt_l_sll.f
3881 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3882 const IDESC * UNUSED idesc = abuf->idesc;
3883 int cycles = 0;
3884 {
3885 int referenced = 0;
3886 int UNUSED insn_referenced = abuf->written;
3887 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3888 }
3889 return cycles;
3890 #undef FLD
3891 }
3892
3893 static int
3894 model_or1200nd_lf_sub_d32 (SIM_CPU *current_cpu, void *sem_arg)
3895 {
3896 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
3897 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3898 const IDESC * UNUSED idesc = abuf->idesc;
3899 int cycles = 0;
3900 {
3901 int referenced = 0;
3902 int UNUSED insn_referenced = abuf->written;
3903 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3904 }
3905 return cycles;
3906 #undef FLD
3907 }
3908
3909 static int
3910 model_or1200nd_lf_mul_s (SIM_CPU *current_cpu, void *sem_arg)
3911 {
3912 #define FLD(f) abuf->fields.sfmt_l_sll.f
3913 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3914 const IDESC * UNUSED idesc = abuf->idesc;
3915 int cycles = 0;
3916 {
3917 int referenced = 0;
3918 int UNUSED insn_referenced = abuf->written;
3919 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3920 }
3921 return cycles;
3922 #undef FLD
3923 }
3924
3925 static int
3926 model_or1200nd_lf_mul_d32 (SIM_CPU *current_cpu, void *sem_arg)
3927 {
3928 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
3929 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3930 const IDESC * UNUSED idesc = abuf->idesc;
3931 int cycles = 0;
3932 {
3933 int referenced = 0;
3934 int UNUSED insn_referenced = abuf->written;
3935 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3936 }
3937 return cycles;
3938 #undef FLD
3939 }
3940
3941 static int
3942 model_or1200nd_lf_div_s (SIM_CPU *current_cpu, void *sem_arg)
3943 {
3944 #define FLD(f) abuf->fields.sfmt_l_sll.f
3945 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3946 const IDESC * UNUSED idesc = abuf->idesc;
3947 int cycles = 0;
3948 {
3949 int referenced = 0;
3950 int UNUSED insn_referenced = abuf->written;
3951 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3952 }
3953 return cycles;
3954 #undef FLD
3955 }
3956
3957 static int
3958 model_or1200nd_lf_div_d32 (SIM_CPU *current_cpu, void *sem_arg)
3959 {
3960 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
3961 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3962 const IDESC * UNUSED idesc = abuf->idesc;
3963 int cycles = 0;
3964 {
3965 int referenced = 0;
3966 int UNUSED insn_referenced = abuf->written;
3967 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3968 }
3969 return cycles;
3970 #undef FLD
3971 }
3972
3973 static int
3974 model_or1200nd_lf_rem_s (SIM_CPU *current_cpu, void *sem_arg)
3975 {
3976 #define FLD(f) abuf->fields.sfmt_l_sll.f
3977 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3978 const IDESC * UNUSED idesc = abuf->idesc;
3979 int cycles = 0;
3980 {
3981 int referenced = 0;
3982 int UNUSED insn_referenced = abuf->written;
3983 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
3984 }
3985 return cycles;
3986 #undef FLD
3987 }
3988
3989 static int
3990 model_or1200nd_lf_rem_d32 (SIM_CPU *current_cpu, void *sem_arg)
3991 {
3992 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
3993 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3994 const IDESC * UNUSED idesc = abuf->idesc;
3995 int cycles = 0;
3996 {
3997 int referenced = 0;
3998 int UNUSED insn_referenced = abuf->written;
3999 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4000 }
4001 return cycles;
4002 #undef FLD
4003 }
4004
4005 static int
4006 model_or1200nd_lf_itof_s (SIM_CPU *current_cpu, void *sem_arg)
4007 {
4008 #define FLD(f) abuf->fields.sfmt_l_slli.f
4009 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4010 const IDESC * UNUSED idesc = abuf->idesc;
4011 int cycles = 0;
4012 {
4013 int referenced = 0;
4014 int UNUSED insn_referenced = abuf->written;
4015 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4016 }
4017 return cycles;
4018 #undef FLD
4019 }
4020
4021 static int
4022 model_or1200nd_lf_itof_d32 (SIM_CPU *current_cpu, void *sem_arg)
4023 {
4024 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4025 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4026 const IDESC * UNUSED idesc = abuf->idesc;
4027 int cycles = 0;
4028 {
4029 int referenced = 0;
4030 int UNUSED insn_referenced = abuf->written;
4031 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4032 }
4033 return cycles;
4034 #undef FLD
4035 }
4036
4037 static int
4038 model_or1200nd_lf_ftoi_s (SIM_CPU *current_cpu, void *sem_arg)
4039 {
4040 #define FLD(f) abuf->fields.sfmt_l_slli.f
4041 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4042 const IDESC * UNUSED idesc = abuf->idesc;
4043 int cycles = 0;
4044 {
4045 int referenced = 0;
4046 int UNUSED insn_referenced = abuf->written;
4047 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4048 }
4049 return cycles;
4050 #undef FLD
4051 }
4052
4053 static int
4054 model_or1200nd_lf_ftoi_d32 (SIM_CPU *current_cpu, void *sem_arg)
4055 {
4056 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4057 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4058 const IDESC * UNUSED idesc = abuf->idesc;
4059 int cycles = 0;
4060 {
4061 int referenced = 0;
4062 int UNUSED insn_referenced = abuf->written;
4063 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4064 }
4065 return cycles;
4066 #undef FLD
4067 }
4068
4069 static int
4070 model_or1200nd_lf_sfeq_s (SIM_CPU *current_cpu, void *sem_arg)
4071 {
4072 #define FLD(f) abuf->fields.sfmt_l_sll.f
4073 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4074 const IDESC * UNUSED idesc = abuf->idesc;
4075 int cycles = 0;
4076 {
4077 int referenced = 0;
4078 int UNUSED insn_referenced = abuf->written;
4079 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4080 }
4081 return cycles;
4082 #undef FLD
4083 }
4084
4085 static int
4086 model_or1200nd_lf_sfeq_d32 (SIM_CPU *current_cpu, void *sem_arg)
4087 {
4088 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4089 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4090 const IDESC * UNUSED idesc = abuf->idesc;
4091 int cycles = 0;
4092 {
4093 int referenced = 0;
4094 int UNUSED insn_referenced = abuf->written;
4095 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4096 }
4097 return cycles;
4098 #undef FLD
4099 }
4100
4101 static int
4102 model_or1200nd_lf_sfne_s (SIM_CPU *current_cpu, void *sem_arg)
4103 {
4104 #define FLD(f) abuf->fields.sfmt_l_sll.f
4105 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4106 const IDESC * UNUSED idesc = abuf->idesc;
4107 int cycles = 0;
4108 {
4109 int referenced = 0;
4110 int UNUSED insn_referenced = abuf->written;
4111 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4112 }
4113 return cycles;
4114 #undef FLD
4115 }
4116
4117 static int
4118 model_or1200nd_lf_sfne_d32 (SIM_CPU *current_cpu, void *sem_arg)
4119 {
4120 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4121 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4122 const IDESC * UNUSED idesc = abuf->idesc;
4123 int cycles = 0;
4124 {
4125 int referenced = 0;
4126 int UNUSED insn_referenced = abuf->written;
4127 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4128 }
4129 return cycles;
4130 #undef FLD
4131 }
4132
4133 static int
4134 model_or1200nd_lf_sfge_s (SIM_CPU *current_cpu, void *sem_arg)
4135 {
4136 #define FLD(f) abuf->fields.sfmt_l_sll.f
4137 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4138 const IDESC * UNUSED idesc = abuf->idesc;
4139 int cycles = 0;
4140 {
4141 int referenced = 0;
4142 int UNUSED insn_referenced = abuf->written;
4143 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4144 }
4145 return cycles;
4146 #undef FLD
4147 }
4148
4149 static int
4150 model_or1200nd_lf_sfge_d32 (SIM_CPU *current_cpu, void *sem_arg)
4151 {
4152 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4153 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4154 const IDESC * UNUSED idesc = abuf->idesc;
4155 int cycles = 0;
4156 {
4157 int referenced = 0;
4158 int UNUSED insn_referenced = abuf->written;
4159 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4160 }
4161 return cycles;
4162 #undef FLD
4163 }
4164
4165 static int
4166 model_or1200nd_lf_sfgt_s (SIM_CPU *current_cpu, void *sem_arg)
4167 {
4168 #define FLD(f) abuf->fields.sfmt_l_sll.f
4169 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4170 const IDESC * UNUSED idesc = abuf->idesc;
4171 int cycles = 0;
4172 {
4173 int referenced = 0;
4174 int UNUSED insn_referenced = abuf->written;
4175 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4176 }
4177 return cycles;
4178 #undef FLD
4179 }
4180
4181 static int
4182 model_or1200nd_lf_sfgt_d32 (SIM_CPU *current_cpu, void *sem_arg)
4183 {
4184 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4186 const IDESC * UNUSED idesc = abuf->idesc;
4187 int cycles = 0;
4188 {
4189 int referenced = 0;
4190 int UNUSED insn_referenced = abuf->written;
4191 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4192 }
4193 return cycles;
4194 #undef FLD
4195 }
4196
4197 static int
4198 model_or1200nd_lf_sflt_s (SIM_CPU *current_cpu, void *sem_arg)
4199 {
4200 #define FLD(f) abuf->fields.sfmt_l_sll.f
4201 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4202 const IDESC * UNUSED idesc = abuf->idesc;
4203 int cycles = 0;
4204 {
4205 int referenced = 0;
4206 int UNUSED insn_referenced = abuf->written;
4207 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4208 }
4209 return cycles;
4210 #undef FLD
4211 }
4212
4213 static int
4214 model_or1200nd_lf_sflt_d32 (SIM_CPU *current_cpu, void *sem_arg)
4215 {
4216 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4217 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4218 const IDESC * UNUSED idesc = abuf->idesc;
4219 int cycles = 0;
4220 {
4221 int referenced = 0;
4222 int UNUSED insn_referenced = abuf->written;
4223 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4224 }
4225 return cycles;
4226 #undef FLD
4227 }
4228
4229 static int
4230 model_or1200nd_lf_sfle_s (SIM_CPU *current_cpu, void *sem_arg)
4231 {
4232 #define FLD(f) abuf->fields.sfmt_l_sll.f
4233 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4234 const IDESC * UNUSED idesc = abuf->idesc;
4235 int cycles = 0;
4236 {
4237 int referenced = 0;
4238 int UNUSED insn_referenced = abuf->written;
4239 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4240 }
4241 return cycles;
4242 #undef FLD
4243 }
4244
4245 static int
4246 model_or1200nd_lf_sfle_d32 (SIM_CPU *current_cpu, void *sem_arg)
4247 {
4248 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4249 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4250 const IDESC * UNUSED idesc = abuf->idesc;
4251 int cycles = 0;
4252 {
4253 int referenced = 0;
4254 int UNUSED insn_referenced = abuf->written;
4255 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4256 }
4257 return cycles;
4258 #undef FLD
4259 }
4260
4261 static int
4262 model_or1200nd_lf_sfueq_s (SIM_CPU *current_cpu, void *sem_arg)
4263 {
4264 #define FLD(f) abuf->fields.sfmt_l_sll.f
4265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4266 const IDESC * UNUSED idesc = abuf->idesc;
4267 int cycles = 0;
4268 {
4269 int referenced = 0;
4270 int UNUSED insn_referenced = abuf->written;
4271 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4272 }
4273 return cycles;
4274 #undef FLD
4275 }
4276
4277 static int
4278 model_or1200nd_lf_sfueq_d32 (SIM_CPU *current_cpu, void *sem_arg)
4279 {
4280 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4281 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4282 const IDESC * UNUSED idesc = abuf->idesc;
4283 int cycles = 0;
4284 {
4285 int referenced = 0;
4286 int UNUSED insn_referenced = abuf->written;
4287 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4288 }
4289 return cycles;
4290 #undef FLD
4291 }
4292
4293 static int
4294 model_or1200nd_lf_sfune_s (SIM_CPU *current_cpu, void *sem_arg)
4295 {
4296 #define FLD(f) abuf->fields.sfmt_l_sll.f
4297 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4298 const IDESC * UNUSED idesc = abuf->idesc;
4299 int cycles = 0;
4300 {
4301 int referenced = 0;
4302 int UNUSED insn_referenced = abuf->written;
4303 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4304 }
4305 return cycles;
4306 #undef FLD
4307 }
4308
4309 static int
4310 model_or1200nd_lf_sfune_d32 (SIM_CPU *current_cpu, void *sem_arg)
4311 {
4312 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4313 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4314 const IDESC * UNUSED idesc = abuf->idesc;
4315 int cycles = 0;
4316 {
4317 int referenced = 0;
4318 int UNUSED insn_referenced = abuf->written;
4319 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4320 }
4321 return cycles;
4322 #undef FLD
4323 }
4324
4325 static int
4326 model_or1200nd_lf_sfugt_s (SIM_CPU *current_cpu, void *sem_arg)
4327 {
4328 #define FLD(f) abuf->fields.sfmt_l_sll.f
4329 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4330 const IDESC * UNUSED idesc = abuf->idesc;
4331 int cycles = 0;
4332 {
4333 int referenced = 0;
4334 int UNUSED insn_referenced = abuf->written;
4335 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4336 }
4337 return cycles;
4338 #undef FLD
4339 }
4340
4341 static int
4342 model_or1200nd_lf_sfugt_d32 (SIM_CPU *current_cpu, void *sem_arg)
4343 {
4344 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4345 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4346 const IDESC * UNUSED idesc = abuf->idesc;
4347 int cycles = 0;
4348 {
4349 int referenced = 0;
4350 int UNUSED insn_referenced = abuf->written;
4351 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4352 }
4353 return cycles;
4354 #undef FLD
4355 }
4356
4357 static int
4358 model_or1200nd_lf_sfuge_s (SIM_CPU *current_cpu, void *sem_arg)
4359 {
4360 #define FLD(f) abuf->fields.sfmt_l_sll.f
4361 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4362 const IDESC * UNUSED idesc = abuf->idesc;
4363 int cycles = 0;
4364 {
4365 int referenced = 0;
4366 int UNUSED insn_referenced = abuf->written;
4367 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4368 }
4369 return cycles;
4370 #undef FLD
4371 }
4372
4373 static int
4374 model_or1200nd_lf_sfuge_d32 (SIM_CPU *current_cpu, void *sem_arg)
4375 {
4376 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4377 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4378 const IDESC * UNUSED idesc = abuf->idesc;
4379 int cycles = 0;
4380 {
4381 int referenced = 0;
4382 int UNUSED insn_referenced = abuf->written;
4383 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4384 }
4385 return cycles;
4386 #undef FLD
4387 }
4388
4389 static int
4390 model_or1200nd_lf_sfult_s (SIM_CPU *current_cpu, void *sem_arg)
4391 {
4392 #define FLD(f) abuf->fields.sfmt_l_sll.f
4393 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4394 const IDESC * UNUSED idesc = abuf->idesc;
4395 int cycles = 0;
4396 {
4397 int referenced = 0;
4398 int UNUSED insn_referenced = abuf->written;
4399 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4400 }
4401 return cycles;
4402 #undef FLD
4403 }
4404
4405 static int
4406 model_or1200nd_lf_sfult_d32 (SIM_CPU *current_cpu, void *sem_arg)
4407 {
4408 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4409 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4410 const IDESC * UNUSED idesc = abuf->idesc;
4411 int cycles = 0;
4412 {
4413 int referenced = 0;
4414 int UNUSED insn_referenced = abuf->written;
4415 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4416 }
4417 return cycles;
4418 #undef FLD
4419 }
4420
4421 static int
4422 model_or1200nd_lf_sfule_s (SIM_CPU *current_cpu, void *sem_arg)
4423 {
4424 #define FLD(f) abuf->fields.sfmt_l_sll.f
4425 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4426 const IDESC * UNUSED idesc = abuf->idesc;
4427 int cycles = 0;
4428 {
4429 int referenced = 0;
4430 int UNUSED insn_referenced = abuf->written;
4431 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4432 }
4433 return cycles;
4434 #undef FLD
4435 }
4436
4437 static int
4438 model_or1200nd_lf_sfule_d32 (SIM_CPU *current_cpu, void *sem_arg)
4439 {
4440 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4441 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4442 const IDESC * UNUSED idesc = abuf->idesc;
4443 int cycles = 0;
4444 {
4445 int referenced = 0;
4446 int UNUSED insn_referenced = abuf->written;
4447 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4448 }
4449 return cycles;
4450 #undef FLD
4451 }
4452
4453 static int
4454 model_or1200nd_lf_sfun_s (SIM_CPU *current_cpu, void *sem_arg)
4455 {
4456 #define FLD(f) abuf->fields.sfmt_l_sll.f
4457 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4458 const IDESC * UNUSED idesc = abuf->idesc;
4459 int cycles = 0;
4460 {
4461 int referenced = 0;
4462 int UNUSED insn_referenced = abuf->written;
4463 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4464 }
4465 return cycles;
4466 #undef FLD
4467 }
4468
4469 static int
4470 model_or1200nd_lf_sfun_d32 (SIM_CPU *current_cpu, void *sem_arg)
4471 {
4472 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4473 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4474 const IDESC * UNUSED idesc = abuf->idesc;
4475 int cycles = 0;
4476 {
4477 int referenced = 0;
4478 int UNUSED insn_referenced = abuf->written;
4479 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4480 }
4481 return cycles;
4482 #undef FLD
4483 }
4484
4485 static int
4486 model_or1200nd_lf_madd_s (SIM_CPU *current_cpu, void *sem_arg)
4487 {
4488 #define FLD(f) abuf->fields.sfmt_l_sll.f
4489 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4490 const IDESC * UNUSED idesc = abuf->idesc;
4491 int cycles = 0;
4492 {
4493 int referenced = 0;
4494 int UNUSED insn_referenced = abuf->written;
4495 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4496 }
4497 return cycles;
4498 #undef FLD
4499 }
4500
4501 static int
4502 model_or1200nd_lf_madd_d32 (SIM_CPU *current_cpu, void *sem_arg)
4503 {
4504 #define FLD(f) abuf->fields.sfmt_lf_add_d32.f
4505 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4506 const IDESC * UNUSED idesc = abuf->idesc;
4507 int cycles = 0;
4508 {
4509 int referenced = 0;
4510 int UNUSED insn_referenced = abuf->written;
4511 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4512 }
4513 return cycles;
4514 #undef FLD
4515 }
4516
4517 static int
4518 model_or1200nd_lf_cust1_s (SIM_CPU *current_cpu, void *sem_arg)
4519 {
4520 #define FLD(f) abuf->fields.sfmt_empty.f
4521 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4522 const IDESC * UNUSED idesc = abuf->idesc;
4523 int cycles = 0;
4524 {
4525 int referenced = 0;
4526 int UNUSED insn_referenced = abuf->written;
4527 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4528 }
4529 return cycles;
4530 #undef FLD
4531 }
4532
4533 static int
4534 model_or1200nd_lf_cust1_d32 (SIM_CPU *current_cpu, void *sem_arg)
4535 {
4536 #define FLD(f) abuf->fields.sfmt_empty.f
4537 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4538 const IDESC * UNUSED idesc = abuf->idesc;
4539 int cycles = 0;
4540 {
4541 int referenced = 0;
4542 int UNUSED insn_referenced = abuf->written;
4543 cycles += or1k32bf_model_or1200nd_u_exec (current_cpu, idesc, 0, referenced);
4544 }
4545 return cycles;
4546 #undef FLD
4547 }
4548
4549 /* We assume UNIT_NONE == 0 because the tables don't always terminate
4550 entries with it. */
4551
4552 /* Model timing data for `or1200'. */
4553
4554 static const INSN_TIMING or1200_timing[] = {
4555 { OR1K32BF_INSN_X_INVALID, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4556 { OR1K32BF_INSN_X_AFTER, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4557 { OR1K32BF_INSN_X_BEFORE, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4558 { OR1K32BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4559 { OR1K32BF_INSN_X_CHAIN, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4560 { OR1K32BF_INSN_X_BEGIN, 0, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4561 { OR1K32BF_INSN_L_J, model_or1200_l_j, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4562 { OR1K32BF_INSN_L_ADRP, model_or1200_l_adrp, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4563 { OR1K32BF_INSN_L_JAL, model_or1200_l_jal, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4564 { OR1K32BF_INSN_L_JR, model_or1200_l_jr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4565 { OR1K32BF_INSN_L_JALR, model_or1200_l_jalr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4566 { OR1K32BF_INSN_L_BNF, model_or1200_l_bnf, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4567 { OR1K32BF_INSN_L_BF, model_or1200_l_bf, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4568 { OR1K32BF_INSN_L_TRAP, model_or1200_l_trap, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4569 { OR1K32BF_INSN_L_SYS, model_or1200_l_sys, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4570 { OR1K32BF_INSN_L_MSYNC, model_or1200_l_msync, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4571 { OR1K32BF_INSN_L_PSYNC, model_or1200_l_psync, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4572 { OR1K32BF_INSN_L_CSYNC, model_or1200_l_csync, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4573 { OR1K32BF_INSN_L_RFE, model_or1200_l_rfe, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4574 { OR1K32BF_INSN_L_NOP_IMM, model_or1200_l_nop_imm, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4575 { OR1K32BF_INSN_L_MOVHI, model_or1200_l_movhi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4576 { OR1K32BF_INSN_L_MACRC, model_or1200_l_macrc, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4577 { OR1K32BF_INSN_L_MFSPR, model_or1200_l_mfspr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4578 { OR1K32BF_INSN_L_MTSPR, model_or1200_l_mtspr, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4579 { OR1K32BF_INSN_L_LWZ, model_or1200_l_lwz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4580 { OR1K32BF_INSN_L_LWS, model_or1200_l_lws, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4581 { OR1K32BF_INSN_L_LWA, model_or1200_l_lwa, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4582 { OR1K32BF_INSN_L_LBZ, model_or1200_l_lbz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4583 { OR1K32BF_INSN_L_LBS, model_or1200_l_lbs, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4584 { OR1K32BF_INSN_L_LHZ, model_or1200_l_lhz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4585 { OR1K32BF_INSN_L_LHS, model_or1200_l_lhs, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4586 { OR1K32BF_INSN_L_SW, model_or1200_l_sw, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4587 { OR1K32BF_INSN_L_SB, model_or1200_l_sb, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4588 { OR1K32BF_INSN_L_SH, model_or1200_l_sh, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4589 { OR1K32BF_INSN_L_SWA, model_or1200_l_swa, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4590 { OR1K32BF_INSN_L_SLL, model_or1200_l_sll, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4591 { OR1K32BF_INSN_L_SLLI, model_or1200_l_slli, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4592 { OR1K32BF_INSN_L_SRL, model_or1200_l_srl, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4593 { OR1K32BF_INSN_L_SRLI, model_or1200_l_srli, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4594 { OR1K32BF_INSN_L_SRA, model_or1200_l_sra, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4595 { OR1K32BF_INSN_L_SRAI, model_or1200_l_srai, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4596 { OR1K32BF_INSN_L_ROR, model_or1200_l_ror, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4597 { OR1K32BF_INSN_L_RORI, model_or1200_l_rori, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4598 { OR1K32BF_INSN_L_AND, model_or1200_l_and, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4599 { OR1K32BF_INSN_L_OR, model_or1200_l_or, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4600 { OR1K32BF_INSN_L_XOR, model_or1200_l_xor, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4601 { OR1K32BF_INSN_L_ADD, model_or1200_l_add, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4602 { OR1K32BF_INSN_L_SUB, model_or1200_l_sub, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4603 { OR1K32BF_INSN_L_ADDC, model_or1200_l_addc, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4604 { OR1K32BF_INSN_L_MUL, model_or1200_l_mul, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4605 { OR1K32BF_INSN_L_MULD, model_or1200_l_muld, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4606 { OR1K32BF_INSN_L_MULU, model_or1200_l_mulu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4607 { OR1K32BF_INSN_L_MULDU, model_or1200_l_muldu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4608 { OR1K32BF_INSN_L_DIV, model_or1200_l_div, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4609 { OR1K32BF_INSN_L_DIVU, model_or1200_l_divu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4610 { OR1K32BF_INSN_L_FF1, model_or1200_l_ff1, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4611 { OR1K32BF_INSN_L_FL1, model_or1200_l_fl1, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4612 { OR1K32BF_INSN_L_ANDI, model_or1200_l_andi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4613 { OR1K32BF_INSN_L_ORI, model_or1200_l_ori, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4614 { OR1K32BF_INSN_L_XORI, model_or1200_l_xori, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4615 { OR1K32BF_INSN_L_ADDI, model_or1200_l_addi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4616 { OR1K32BF_INSN_L_ADDIC, model_or1200_l_addic, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4617 { OR1K32BF_INSN_L_MULI, model_or1200_l_muli, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4618 { OR1K32BF_INSN_L_EXTHS, model_or1200_l_exths, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4619 { OR1K32BF_INSN_L_EXTBS, model_or1200_l_extbs, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4620 { OR1K32BF_INSN_L_EXTHZ, model_or1200_l_exthz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4621 { OR1K32BF_INSN_L_EXTBZ, model_or1200_l_extbz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4622 { OR1K32BF_INSN_L_EXTWS, model_or1200_l_extws, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4623 { OR1K32BF_INSN_L_EXTWZ, model_or1200_l_extwz, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4624 { OR1K32BF_INSN_L_CMOV, model_or1200_l_cmov, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4625 { OR1K32BF_INSN_L_SFGTS, model_or1200_l_sfgts, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4626 { OR1K32BF_INSN_L_SFGTSI, model_or1200_l_sfgtsi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4627 { OR1K32BF_INSN_L_SFGTU, model_or1200_l_sfgtu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4628 { OR1K32BF_INSN_L_SFGTUI, model_or1200_l_sfgtui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4629 { OR1K32BF_INSN_L_SFGES, model_or1200_l_sfges, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4630 { OR1K32BF_INSN_L_SFGESI, model_or1200_l_sfgesi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4631 { OR1K32BF_INSN_L_SFGEU, model_or1200_l_sfgeu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4632 { OR1K32BF_INSN_L_SFGEUI, model_or1200_l_sfgeui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4633 { OR1K32BF_INSN_L_SFLTS, model_or1200_l_sflts, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4634 { OR1K32BF_INSN_L_SFLTSI, model_or1200_l_sfltsi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4635 { OR1K32BF_INSN_L_SFLTU, model_or1200_l_sfltu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4636 { OR1K32BF_INSN_L_SFLTUI, model_or1200_l_sfltui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4637 { OR1K32BF_INSN_L_SFLES, model_or1200_l_sfles, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4638 { OR1K32BF_INSN_L_SFLESI, model_or1200_l_sflesi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4639 { OR1K32BF_INSN_L_SFLEU, model_or1200_l_sfleu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4640 { OR1K32BF_INSN_L_SFLEUI, model_or1200_l_sfleui, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4641 { OR1K32BF_INSN_L_SFEQ, model_or1200_l_sfeq, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4642 { OR1K32BF_INSN_L_SFEQI, model_or1200_l_sfeqi, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4643 { OR1K32BF_INSN_L_SFNE, model_or1200_l_sfne, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4644 { OR1K32BF_INSN_L_SFNEI, model_or1200_l_sfnei, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4645 { OR1K32BF_INSN_L_MAC, model_or1200_l_mac, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4646 { OR1K32BF_INSN_L_MACI, model_or1200_l_maci, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4647 { OR1K32BF_INSN_L_MACU, model_or1200_l_macu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4648 { OR1K32BF_INSN_L_MSB, model_or1200_l_msb, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4649 { OR1K32BF_INSN_L_MSBU, model_or1200_l_msbu, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4650 { OR1K32BF_INSN_L_CUST1, model_or1200_l_cust1, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4651 { OR1K32BF_INSN_L_CUST2, model_or1200_l_cust2, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4652 { OR1K32BF_INSN_L_CUST3, model_or1200_l_cust3, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4653 { OR1K32BF_INSN_L_CUST4, model_or1200_l_cust4, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4654 { OR1K32BF_INSN_L_CUST5, model_or1200_l_cust5, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4655 { OR1K32BF_INSN_L_CUST6, model_or1200_l_cust6, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4656 { OR1K32BF_INSN_L_CUST7, model_or1200_l_cust7, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4657 { OR1K32BF_INSN_L_CUST8, model_or1200_l_cust8, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4658 { OR1K32BF_INSN_LF_ADD_S, model_or1200_lf_add_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4659 { OR1K32BF_INSN_LF_ADD_D32, model_or1200_lf_add_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4660 { OR1K32BF_INSN_LF_SUB_S, model_or1200_lf_sub_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4661 { OR1K32BF_INSN_LF_SUB_D32, model_or1200_lf_sub_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4662 { OR1K32BF_INSN_LF_MUL_S, model_or1200_lf_mul_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4663 { OR1K32BF_INSN_LF_MUL_D32, model_or1200_lf_mul_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4664 { OR1K32BF_INSN_LF_DIV_S, model_or1200_lf_div_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4665 { OR1K32BF_INSN_LF_DIV_D32, model_or1200_lf_div_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4666 { OR1K32BF_INSN_LF_REM_S, model_or1200_lf_rem_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4667 { OR1K32BF_INSN_LF_REM_D32, model_or1200_lf_rem_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4668 { OR1K32BF_INSN_LF_ITOF_S, model_or1200_lf_itof_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4669 { OR1K32BF_INSN_LF_ITOF_D32, model_or1200_lf_itof_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4670 { OR1K32BF_INSN_LF_FTOI_S, model_or1200_lf_ftoi_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4671 { OR1K32BF_INSN_LF_FTOI_D32, model_or1200_lf_ftoi_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4672 { OR1K32BF_INSN_LF_SFEQ_S, model_or1200_lf_sfeq_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4673 { OR1K32BF_INSN_LF_SFEQ_D32, model_or1200_lf_sfeq_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4674 { OR1K32BF_INSN_LF_SFNE_S, model_or1200_lf_sfne_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4675 { OR1K32BF_INSN_LF_SFNE_D32, model_or1200_lf_sfne_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4676 { OR1K32BF_INSN_LF_SFGE_S, model_or1200_lf_sfge_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4677 { OR1K32BF_INSN_LF_SFGE_D32, model_or1200_lf_sfge_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4678 { OR1K32BF_INSN_LF_SFGT_S, model_or1200_lf_sfgt_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4679 { OR1K32BF_INSN_LF_SFGT_D32, model_or1200_lf_sfgt_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4680 { OR1K32BF_INSN_LF_SFLT_S, model_or1200_lf_sflt_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4681 { OR1K32BF_INSN_LF_SFLT_D32, model_or1200_lf_sflt_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4682 { OR1K32BF_INSN_LF_SFLE_S, model_or1200_lf_sfle_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4683 { OR1K32BF_INSN_LF_SFLE_D32, model_or1200_lf_sfle_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4684 { OR1K32BF_INSN_LF_SFUEQ_S, model_or1200_lf_sfueq_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4685 { OR1K32BF_INSN_LF_SFUEQ_D32, model_or1200_lf_sfueq_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4686 { OR1K32BF_INSN_LF_SFUNE_S, model_or1200_lf_sfune_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4687 { OR1K32BF_INSN_LF_SFUNE_D32, model_or1200_lf_sfune_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4688 { OR1K32BF_INSN_LF_SFUGT_S, model_or1200_lf_sfugt_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4689 { OR1K32BF_INSN_LF_SFUGT_D32, model_or1200_lf_sfugt_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4690 { OR1K32BF_INSN_LF_SFUGE_S, model_or1200_lf_sfuge_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4691 { OR1K32BF_INSN_LF_SFUGE_D32, model_or1200_lf_sfuge_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4692 { OR1K32BF_INSN_LF_SFULT_S, model_or1200_lf_sfult_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4693 { OR1K32BF_INSN_LF_SFULT_D32, model_or1200_lf_sfult_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4694 { OR1K32BF_INSN_LF_SFULE_S, model_or1200_lf_sfule_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4695 { OR1K32BF_INSN_LF_SFULE_D32, model_or1200_lf_sfule_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4696 { OR1K32BF_INSN_LF_SFUN_S, model_or1200_lf_sfun_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4697 { OR1K32BF_INSN_LF_SFUN_D32, model_or1200_lf_sfun_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4698 { OR1K32BF_INSN_LF_MADD_S, model_or1200_lf_madd_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4699 { OR1K32BF_INSN_LF_MADD_D32, model_or1200_lf_madd_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4700 { OR1K32BF_INSN_LF_CUST1_S, model_or1200_lf_cust1_s, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4701 { OR1K32BF_INSN_LF_CUST1_D32, model_or1200_lf_cust1_d32, { { (int) UNIT_OR1200_U_EXEC, 1, 1 } } },
4702 };
4703
4704 /* Model timing data for `or1200nd'. */
4705
4706 static const INSN_TIMING or1200nd_timing[] = {
4707 { OR1K32BF_INSN_X_INVALID, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4708 { OR1K32BF_INSN_X_AFTER, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4709 { OR1K32BF_INSN_X_BEFORE, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4710 { OR1K32BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4711 { OR1K32BF_INSN_X_CHAIN, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4712 { OR1K32BF_INSN_X_BEGIN, 0, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4713 { OR1K32BF_INSN_L_J, model_or1200nd_l_j, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4714 { OR1K32BF_INSN_L_ADRP, model_or1200nd_l_adrp, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4715 { OR1K32BF_INSN_L_JAL, model_or1200nd_l_jal, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4716 { OR1K32BF_INSN_L_JR, model_or1200nd_l_jr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4717 { OR1K32BF_INSN_L_JALR, model_or1200nd_l_jalr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4718 { OR1K32BF_INSN_L_BNF, model_or1200nd_l_bnf, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4719 { OR1K32BF_INSN_L_BF, model_or1200nd_l_bf, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4720 { OR1K32BF_INSN_L_TRAP, model_or1200nd_l_trap, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4721 { OR1K32BF_INSN_L_SYS, model_or1200nd_l_sys, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4722 { OR1K32BF_INSN_L_MSYNC, model_or1200nd_l_msync, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4723 { OR1K32BF_INSN_L_PSYNC, model_or1200nd_l_psync, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4724 { OR1K32BF_INSN_L_CSYNC, model_or1200nd_l_csync, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4725 { OR1K32BF_INSN_L_RFE, model_or1200nd_l_rfe, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4726 { OR1K32BF_INSN_L_NOP_IMM, model_or1200nd_l_nop_imm, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4727 { OR1K32BF_INSN_L_MOVHI, model_or1200nd_l_movhi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4728 { OR1K32BF_INSN_L_MACRC, model_or1200nd_l_macrc, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4729 { OR1K32BF_INSN_L_MFSPR, model_or1200nd_l_mfspr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4730 { OR1K32BF_INSN_L_MTSPR, model_or1200nd_l_mtspr, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4731 { OR1K32BF_INSN_L_LWZ, model_or1200nd_l_lwz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4732 { OR1K32BF_INSN_L_LWS, model_or1200nd_l_lws, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4733 { OR1K32BF_INSN_L_LWA, model_or1200nd_l_lwa, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4734 { OR1K32BF_INSN_L_LBZ, model_or1200nd_l_lbz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4735 { OR1K32BF_INSN_L_LBS, model_or1200nd_l_lbs, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4736 { OR1K32BF_INSN_L_LHZ, model_or1200nd_l_lhz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4737 { OR1K32BF_INSN_L_LHS, model_or1200nd_l_lhs, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4738 { OR1K32BF_INSN_L_SW, model_or1200nd_l_sw, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4739 { OR1K32BF_INSN_L_SB, model_or1200nd_l_sb, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4740 { OR1K32BF_INSN_L_SH, model_or1200nd_l_sh, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4741 { OR1K32BF_INSN_L_SWA, model_or1200nd_l_swa, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4742 { OR1K32BF_INSN_L_SLL, model_or1200nd_l_sll, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4743 { OR1K32BF_INSN_L_SLLI, model_or1200nd_l_slli, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4744 { OR1K32BF_INSN_L_SRL, model_or1200nd_l_srl, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4745 { OR1K32BF_INSN_L_SRLI, model_or1200nd_l_srli, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4746 { OR1K32BF_INSN_L_SRA, model_or1200nd_l_sra, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4747 { OR1K32BF_INSN_L_SRAI, model_or1200nd_l_srai, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4748 { OR1K32BF_INSN_L_ROR, model_or1200nd_l_ror, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4749 { OR1K32BF_INSN_L_RORI, model_or1200nd_l_rori, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4750 { OR1K32BF_INSN_L_AND, model_or1200nd_l_and, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4751 { OR1K32BF_INSN_L_OR, model_or1200nd_l_or, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4752 { OR1K32BF_INSN_L_XOR, model_or1200nd_l_xor, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4753 { OR1K32BF_INSN_L_ADD, model_or1200nd_l_add, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4754 { OR1K32BF_INSN_L_SUB, model_or1200nd_l_sub, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4755 { OR1K32BF_INSN_L_ADDC, model_or1200nd_l_addc, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4756 { OR1K32BF_INSN_L_MUL, model_or1200nd_l_mul, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4757 { OR1K32BF_INSN_L_MULD, model_or1200nd_l_muld, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4758 { OR1K32BF_INSN_L_MULU, model_or1200nd_l_mulu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4759 { OR1K32BF_INSN_L_MULDU, model_or1200nd_l_muldu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4760 { OR1K32BF_INSN_L_DIV, model_or1200nd_l_div, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4761 { OR1K32BF_INSN_L_DIVU, model_or1200nd_l_divu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4762 { OR1K32BF_INSN_L_FF1, model_or1200nd_l_ff1, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4763 { OR1K32BF_INSN_L_FL1, model_or1200nd_l_fl1, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4764 { OR1K32BF_INSN_L_ANDI, model_or1200nd_l_andi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4765 { OR1K32BF_INSN_L_ORI, model_or1200nd_l_ori, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4766 { OR1K32BF_INSN_L_XORI, model_or1200nd_l_xori, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4767 { OR1K32BF_INSN_L_ADDI, model_or1200nd_l_addi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4768 { OR1K32BF_INSN_L_ADDIC, model_or1200nd_l_addic, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4769 { OR1K32BF_INSN_L_MULI, model_or1200nd_l_muli, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4770 { OR1K32BF_INSN_L_EXTHS, model_or1200nd_l_exths, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4771 { OR1K32BF_INSN_L_EXTBS, model_or1200nd_l_extbs, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4772 { OR1K32BF_INSN_L_EXTHZ, model_or1200nd_l_exthz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4773 { OR1K32BF_INSN_L_EXTBZ, model_or1200nd_l_extbz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4774 { OR1K32BF_INSN_L_EXTWS, model_or1200nd_l_extws, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4775 { OR1K32BF_INSN_L_EXTWZ, model_or1200nd_l_extwz, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4776 { OR1K32BF_INSN_L_CMOV, model_or1200nd_l_cmov, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4777 { OR1K32BF_INSN_L_SFGTS, model_or1200nd_l_sfgts, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4778 { OR1K32BF_INSN_L_SFGTSI, model_or1200nd_l_sfgtsi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4779 { OR1K32BF_INSN_L_SFGTU, model_or1200nd_l_sfgtu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4780 { OR1K32BF_INSN_L_SFGTUI, model_or1200nd_l_sfgtui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4781 { OR1K32BF_INSN_L_SFGES, model_or1200nd_l_sfges, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4782 { OR1K32BF_INSN_L_SFGESI, model_or1200nd_l_sfgesi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4783 { OR1K32BF_INSN_L_SFGEU, model_or1200nd_l_sfgeu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4784 { OR1K32BF_INSN_L_SFGEUI, model_or1200nd_l_sfgeui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4785 { OR1K32BF_INSN_L_SFLTS, model_or1200nd_l_sflts, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4786 { OR1K32BF_INSN_L_SFLTSI, model_or1200nd_l_sfltsi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4787 { OR1K32BF_INSN_L_SFLTU, model_or1200nd_l_sfltu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4788 { OR1K32BF_INSN_L_SFLTUI, model_or1200nd_l_sfltui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4789 { OR1K32BF_INSN_L_SFLES, model_or1200nd_l_sfles, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4790 { OR1K32BF_INSN_L_SFLESI, model_or1200nd_l_sflesi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4791 { OR1K32BF_INSN_L_SFLEU, model_or1200nd_l_sfleu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4792 { OR1K32BF_INSN_L_SFLEUI, model_or1200nd_l_sfleui, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4793 { OR1K32BF_INSN_L_SFEQ, model_or1200nd_l_sfeq, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4794 { OR1K32BF_INSN_L_SFEQI, model_or1200nd_l_sfeqi, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4795 { OR1K32BF_INSN_L_SFNE, model_or1200nd_l_sfne, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4796 { OR1K32BF_INSN_L_SFNEI, model_or1200nd_l_sfnei, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4797 { OR1K32BF_INSN_L_MAC, model_or1200nd_l_mac, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4798 { OR1K32BF_INSN_L_MACI, model_or1200nd_l_maci, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4799 { OR1K32BF_INSN_L_MACU, model_or1200nd_l_macu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4800 { OR1K32BF_INSN_L_MSB, model_or1200nd_l_msb, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4801 { OR1K32BF_INSN_L_MSBU, model_or1200nd_l_msbu, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4802 { OR1K32BF_INSN_L_CUST1, model_or1200nd_l_cust1, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4803 { OR1K32BF_INSN_L_CUST2, model_or1200nd_l_cust2, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4804 { OR1K32BF_INSN_L_CUST3, model_or1200nd_l_cust3, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4805 { OR1K32BF_INSN_L_CUST4, model_or1200nd_l_cust4, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4806 { OR1K32BF_INSN_L_CUST5, model_or1200nd_l_cust5, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4807 { OR1K32BF_INSN_L_CUST6, model_or1200nd_l_cust6, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4808 { OR1K32BF_INSN_L_CUST7, model_or1200nd_l_cust7, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4809 { OR1K32BF_INSN_L_CUST8, model_or1200nd_l_cust8, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4810 { OR1K32BF_INSN_LF_ADD_S, model_or1200nd_lf_add_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4811 { OR1K32BF_INSN_LF_ADD_D32, model_or1200nd_lf_add_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4812 { OR1K32BF_INSN_LF_SUB_S, model_or1200nd_lf_sub_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4813 { OR1K32BF_INSN_LF_SUB_D32, model_or1200nd_lf_sub_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4814 { OR1K32BF_INSN_LF_MUL_S, model_or1200nd_lf_mul_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4815 { OR1K32BF_INSN_LF_MUL_D32, model_or1200nd_lf_mul_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4816 { OR1K32BF_INSN_LF_DIV_S, model_or1200nd_lf_div_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4817 { OR1K32BF_INSN_LF_DIV_D32, model_or1200nd_lf_div_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4818 { OR1K32BF_INSN_LF_REM_S, model_or1200nd_lf_rem_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4819 { OR1K32BF_INSN_LF_REM_D32, model_or1200nd_lf_rem_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4820 { OR1K32BF_INSN_LF_ITOF_S, model_or1200nd_lf_itof_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4821 { OR1K32BF_INSN_LF_ITOF_D32, model_or1200nd_lf_itof_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4822 { OR1K32BF_INSN_LF_FTOI_S, model_or1200nd_lf_ftoi_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4823 { OR1K32BF_INSN_LF_FTOI_D32, model_or1200nd_lf_ftoi_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4824 { OR1K32BF_INSN_LF_SFEQ_S, model_or1200nd_lf_sfeq_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4825 { OR1K32BF_INSN_LF_SFEQ_D32, model_or1200nd_lf_sfeq_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4826 { OR1K32BF_INSN_LF_SFNE_S, model_or1200nd_lf_sfne_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4827 { OR1K32BF_INSN_LF_SFNE_D32, model_or1200nd_lf_sfne_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4828 { OR1K32BF_INSN_LF_SFGE_S, model_or1200nd_lf_sfge_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4829 { OR1K32BF_INSN_LF_SFGE_D32, model_or1200nd_lf_sfge_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4830 { OR1K32BF_INSN_LF_SFGT_S, model_or1200nd_lf_sfgt_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4831 { OR1K32BF_INSN_LF_SFGT_D32, model_or1200nd_lf_sfgt_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4832 { OR1K32BF_INSN_LF_SFLT_S, model_or1200nd_lf_sflt_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4833 { OR1K32BF_INSN_LF_SFLT_D32, model_or1200nd_lf_sflt_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4834 { OR1K32BF_INSN_LF_SFLE_S, model_or1200nd_lf_sfle_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4835 { OR1K32BF_INSN_LF_SFLE_D32, model_or1200nd_lf_sfle_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4836 { OR1K32BF_INSN_LF_SFUEQ_S, model_or1200nd_lf_sfueq_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4837 { OR1K32BF_INSN_LF_SFUEQ_D32, model_or1200nd_lf_sfueq_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4838 { OR1K32BF_INSN_LF_SFUNE_S, model_or1200nd_lf_sfune_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4839 { OR1K32BF_INSN_LF_SFUNE_D32, model_or1200nd_lf_sfune_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4840 { OR1K32BF_INSN_LF_SFUGT_S, model_or1200nd_lf_sfugt_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4841 { OR1K32BF_INSN_LF_SFUGT_D32, model_or1200nd_lf_sfugt_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4842 { OR1K32BF_INSN_LF_SFUGE_S, model_or1200nd_lf_sfuge_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4843 { OR1K32BF_INSN_LF_SFUGE_D32, model_or1200nd_lf_sfuge_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4844 { OR1K32BF_INSN_LF_SFULT_S, model_or1200nd_lf_sfult_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4845 { OR1K32BF_INSN_LF_SFULT_D32, model_or1200nd_lf_sfult_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4846 { OR1K32BF_INSN_LF_SFULE_S, model_or1200nd_lf_sfule_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4847 { OR1K32BF_INSN_LF_SFULE_D32, model_or1200nd_lf_sfule_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4848 { OR1K32BF_INSN_LF_SFUN_S, model_or1200nd_lf_sfun_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4849 { OR1K32BF_INSN_LF_SFUN_D32, model_or1200nd_lf_sfun_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4850 { OR1K32BF_INSN_LF_MADD_S, model_or1200nd_lf_madd_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4851 { OR1K32BF_INSN_LF_MADD_D32, model_or1200nd_lf_madd_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4852 { OR1K32BF_INSN_LF_CUST1_S, model_or1200nd_lf_cust1_s, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4853 { OR1K32BF_INSN_LF_CUST1_D32, model_or1200nd_lf_cust1_d32, { { (int) UNIT_OR1200ND_U_EXEC, 1, 1 } } },
4854 };
4855
4856 #endif /* WITH_PROFILE_MODEL_P */
4857
4858 static void
4859 or1200_model_init (SIM_CPU *cpu)
4860 {
4861 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_OR1200_DATA));
4862 }
4863
4864 static void
4865 or1200nd_model_init (SIM_CPU *cpu)
4866 {
4867 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_OR1200ND_DATA));
4868 }
4869
4870 #if WITH_PROFILE_MODEL_P
4871 #define TIMING_DATA(td) td
4872 #else
4873 #define TIMING_DATA(td) 0
4874 #endif
4875
4876 static const SIM_MODEL or32_models[] =
4877 {
4878 { "or1200", & or32_mach, MODEL_OR1200, TIMING_DATA (& or1200_timing[0]), or1200_model_init },
4879 { 0 }
4880 };
4881
4882 static const SIM_MODEL or32nd_models[] =
4883 {
4884 { "or1200nd", & or32nd_mach, MODEL_OR1200ND, TIMING_DATA (& or1200nd_timing[0]), or1200nd_model_init },
4885 { 0 }
4886 };
4887
4888 /* The properties of this cpu's implementation. */
4889
4890 static const SIM_MACH_IMP_PROPERTIES or1k32bf_imp_properties =
4891 {
4892 sizeof (SIM_CPU),
4893 #if WITH_SCACHE
4894 sizeof (SCACHE)
4895 #else
4896 0
4897 #endif
4898 };
4899
4900
4901 static void
4902 or1k32bf_prepare_run (SIM_CPU *cpu)
4903 {
4904 if (CPU_IDESC (cpu) == NULL)
4905 or1k32bf_init_idesc_table (cpu);
4906 }
4907
4908 static const CGEN_INSN *
4909 or1k32bf_get_idata (SIM_CPU *cpu, int inum)
4910 {
4911 return CPU_IDESC (cpu) [inum].idata;
4912 }
4913
4914 static void
4915 or32_init_cpu (SIM_CPU *cpu)
4916 {
4917 CPU_REG_FETCH (cpu) = or1k32bf_fetch_register;
4918 CPU_REG_STORE (cpu) = or1k32bf_store_register;
4919 CPU_PC_FETCH (cpu) = or1k32bf_h_pc_get;
4920 CPU_PC_STORE (cpu) = or1k32bf_h_pc_set;
4921 CPU_GET_IDATA (cpu) = or1k32bf_get_idata;
4922 CPU_MAX_INSNS (cpu) = OR1K32BF_INSN__MAX;
4923 CPU_INSN_NAME (cpu) = cgen_insn_name;
4924 CPU_FULL_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
4925 #if WITH_FAST
4926 CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_fast;
4927 #else
4928 CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
4929 #endif
4930 }
4931
4932 const SIM_MACH or32_mach =
4933 {
4934 "or32", "or1k", MACH_OR32,
4935 32, 32, & or32_models[0], & or1k32bf_imp_properties,
4936 or32_init_cpu,
4937 or1k32bf_prepare_run
4938 };
4939
4940 static void
4941 or32nd_init_cpu (SIM_CPU *cpu)
4942 {
4943 CPU_REG_FETCH (cpu) = or1k32bf_fetch_register;
4944 CPU_REG_STORE (cpu) = or1k32bf_store_register;
4945 CPU_PC_FETCH (cpu) = or1k32bf_h_pc_get;
4946 CPU_PC_STORE (cpu) = or1k32bf_h_pc_set;
4947 CPU_GET_IDATA (cpu) = or1k32bf_get_idata;
4948 CPU_MAX_INSNS (cpu) = OR1K32BF_INSN__MAX;
4949 CPU_INSN_NAME (cpu) = cgen_insn_name;
4950 CPU_FULL_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
4951 #if WITH_FAST
4952 CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_fast;
4953 #else
4954 CPU_FAST_ENGINE_FN (cpu) = or1k32bf_engine_run_full;
4955 #endif
4956 }
4957
4958 const SIM_MACH or32nd_mach =
4959 {
4960 "or32nd", "or1knd", MACH_OR32ND,
4961 32, 32, & or32nd_models[0], & or1k32bf_imp_properties,
4962 or32nd_init_cpu,
4963 or1k32bf_prepare_run
4964 };
4965
The GNU Binutils are a collection of binary tools.