* gas/cgen feature
[binutils-gdb.git] / gdb / m88k-tdep.c
blobafe1ca2d7e188673f8ea598fba89ae6d4dcd1fab
1 /* Target-machine dependent code for Motorola 88000 series, for GDB.
2 Copyright 1988, 1990, 1991, 1994, 1995 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 #include "defs.h"
22 #include "frame.h"
23 #include "inferior.h"
24 #include "value.h"
25 #include "gdbcore.h"
26 #include "symtab.h"
27 #include "setjmp.h"
28 #include "value.h"
30 /* Size of an instruction */
31 #define BYTES_PER_88K_INSN 4
33 void frame_find_saved_regs ();
35 /* Is this target an m88110? Otherwise assume m88100. This has
36 relevance for the ways in which we screw with instruction pointers. */
38 int target_is_m88110 = 0;
40 /* The m88k kernel aligns all instructions on 4-byte boundaries. The
41 kernel also uses the least significant two bits for its own hocus
42 pocus. When gdb receives an address from the kernel, it needs to
43 preserve those right-most two bits, but gdb also needs to be careful
44 to realize that those two bits are not really a part of the address
45 of an instruction. Shrug. */
47 CORE_ADDR
48 m88k_addr_bits_remove (CORE_ADDR addr)
50 return ((addr) & ~3);
54 /* Given a GDB frame, determine the address of the calling function's frame.
55 This will be used to create a new GDB frame struct, and then
56 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
58 For us, the frame address is its stack pointer value, so we look up
59 the function prologue to determine the caller's sp value, and return it. */
61 CORE_ADDR
62 frame_chain (struct frame_info *thisframe)
65 frame_find_saved_regs (thisframe, (struct frame_saved_regs *) 0);
66 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
67 the ADDRESS, of SP_REGNUM. It also depends on the cache of
68 frame_find_saved_regs results. */
69 if (thisframe->fsr->regs[SP_REGNUM])
70 return thisframe->fsr->regs[SP_REGNUM];
71 else
72 return thisframe->frame; /* Leaf fn -- next frame up has same SP. */
75 int
76 frameless_function_invocation (struct frame_info *frame)
79 frame_find_saved_regs (frame, (struct frame_saved_regs *) 0);
80 /* NOTE: this depends on frame_find_saved_regs returning the VALUE, not
81 the ADDRESS, of SP_REGNUM. It also depends on the cache of
82 frame_find_saved_regs results. */
83 if (frame->fsr->regs[SP_REGNUM])
84 return 0; /* Frameful -- return addr saved somewhere */
85 else
86 return 1; /* Frameless -- no saved return address */
89 void
90 init_extra_frame_info (int fromleaf, struct frame_info *frame)
92 frame->fsr = 0; /* Not yet allocated */
93 frame->args_pointer = 0; /* Unknown */
94 frame->locals_pointer = 0; /* Unknown */
97 /* Examine an m88k function prologue, recording the addresses at which
98 registers are saved explicitly by the prologue code, and returning
99 the address of the first instruction after the prologue (but not
100 after the instruction at address LIMIT, as explained below).
102 LIMIT places an upper bound on addresses of the instructions to be
103 examined. If the prologue code scan reaches LIMIT, the scan is
104 aborted and LIMIT is returned. This is used, when examining the
105 prologue for the current frame, to keep examine_prologue () from
106 claiming that a given register has been saved when in fact the
107 instruction that saves it has not yet been executed. LIMIT is used
108 at other times to stop the scan when we hit code after the true
109 function prologue (e.g. for the first source line) which might
110 otherwise be mistaken for function prologue.
112 The format of the function prologue matched by this routine is
113 derived from examination of the source to gcc 1.95, particularly
114 the routine output_prologue () in config/out-m88k.c.
116 subu r31,r31,n # stack pointer update
118 (st rn,r31,offset)? # save incoming regs
119 (st.d rn,r31,offset)?
121 (addu r30,r31,n)? # frame pointer update
123 (pic sequence)? # PIC code prologue
125 (or rn,rm,0)? # Move parameters to other regs
128 /* Macros for extracting fields from instructions. */
130 #define BITMASK(pos, width) (((0x1 << (width)) - 1) << (pos))
131 #define EXTRACT_FIELD(val, pos, width) ((val) >> (pos) & BITMASK (0, width))
132 #define SUBU_OFFSET(x) ((unsigned)(x & 0xFFFF))
133 #define ST_OFFSET(x) ((unsigned)((x) & 0xFFFF))
134 #define ST_SRC(x) EXTRACT_FIELD ((x), 21, 5)
135 #define ADDU_OFFSET(x) ((unsigned)(x & 0xFFFF))
138 * prologue_insn_tbl is a table of instructions which may comprise a
139 * function prologue. Associated with each table entry (corresponding
140 * to a single instruction or group of instructions), is an action.
141 * This action is used by examine_prologue (below) to determine
142 * the state of certain machine registers and where the stack frame lives.
145 enum prologue_insn_action
147 PIA_SKIP, /* don't care what the instruction does */
148 PIA_NOTE_ST, /* note register stored and where */
149 PIA_NOTE_STD, /* note pair of registers stored and where */
150 PIA_NOTE_SP_ADJUSTMENT, /* note stack pointer adjustment */
151 PIA_NOTE_FP_ASSIGNMENT, /* note frame pointer assignment */
152 PIA_NOTE_PROLOGUE_END, /* no more prologue */
155 struct prologue_insns
157 unsigned long insn;
158 unsigned long mask;
159 enum prologue_insn_action action;
162 struct prologue_insns prologue_insn_tbl[] =
164 /* Various register move instructions */
165 {0x58000000, 0xf800ffff, PIA_SKIP}, /* or/or.u with immed of 0 */
166 {0xf4005800, 0xfc1fffe0, PIA_SKIP}, /* or rd, r0, rs */
167 {0xf4005800, 0xfc00ffff, PIA_SKIP}, /* or rd, rs, r0 */
169 /* Stack pointer setup: "subu sp, sp, n" where n is a multiple of 8 */
170 {0x67ff0000, 0xffff0007, PIA_NOTE_SP_ADJUSTMENT},
172 /* Frame pointer assignment: "addu r30, r31, n" */
173 {0x63df0000, 0xffff0000, PIA_NOTE_FP_ASSIGNMENT},
175 /* Store to stack instructions; either "st rx, sp, n" or "st.d rx, sp, n" */
176 {0x241f0000, 0xfc1f0000, PIA_NOTE_ST}, /* st rx, sp, n */
177 {0x201f0000, 0xfc1f0000, PIA_NOTE_STD}, /* st.d rs, sp, n */
179 /* Instructions needed for setting up r25 for pic code. */
180 {0x5f200000, 0xffff0000, PIA_SKIP}, /* or.u r25, r0, offset_high */
181 {0xcc000002, 0xffffffff, PIA_SKIP}, /* bsr.n Lab */
182 {0x5b390000, 0xffff0000, PIA_SKIP}, /* or r25, r25, offset_low */
183 {0xf7396001, 0xffffffff, PIA_SKIP}, /* Lab: addu r25, r25, r1 */
185 /* Various branch or jump instructions which have a delay slot -- these
186 do not form part of the prologue, but the instruction in the delay
187 slot might be a store instruction which should be noted. */
188 {0xc4000000, 0xe4000000, PIA_NOTE_PROLOGUE_END},
189 /* br.n, bsr.n, bb0.n, or bb1.n */
190 {0xec000000, 0xfc000000, PIA_NOTE_PROLOGUE_END}, /* bcnd.n */
191 {0xf400c400, 0xfffff7e0, PIA_NOTE_PROLOGUE_END} /* jmp.n or jsr.n */
196 /* Fetch the instruction at ADDR, returning 0 if ADDR is beyond LIM or
197 is not the address of a valid instruction, the address of the next
198 instruction beyond ADDR otherwise. *PWORD1 receives the first word
199 of the instruction. */
201 #define NEXT_PROLOGUE_INSN(addr, lim, pword1) \
202 (((addr) < (lim)) ? next_insn (addr, pword1) : 0)
204 /* Read the m88k instruction at 'memaddr' and return the address of
205 the next instruction after that, or 0 if 'memaddr' is not the
206 address of a valid instruction. The instruction
207 is stored at 'pword1'. */
209 CORE_ADDR
210 next_insn (CORE_ADDR memaddr, unsigned long *pword1)
212 *pword1 = read_memory_integer (memaddr, BYTES_PER_88K_INSN);
213 return memaddr + BYTES_PER_88K_INSN;
216 /* Read a register from frames called by us (or from the hardware regs). */
218 static int
219 read_next_frame_reg (struct frame_info *frame, int regno)
221 for (; frame; frame = frame->next)
223 if (regno == SP_REGNUM)
224 return FRAME_FP (frame);
225 else if (frame->fsr->regs[regno])
226 return read_memory_integer (frame->fsr->regs[regno], 4);
228 return read_register (regno);
231 /* Examine the prologue of a function. `ip' points to the first instruction.
232 `limit' is the limit of the prologue (e.g. the addr of the first
233 linenumber, or perhaps the program counter if we're stepping through).
234 `frame_sp' is the stack pointer value in use in this frame.
235 `fsr' is a pointer to a frame_saved_regs structure into which we put
236 info about the registers saved by this frame.
237 `fi' is a struct frame_info pointer; we fill in various fields in it
238 to reflect the offsets of the arg pointer and the locals pointer. */
240 static CORE_ADDR
241 examine_prologue (register CORE_ADDR ip, register CORE_ADDR limit,
242 CORE_ADDR frame_sp, struct frame_saved_regs *fsr,
243 struct frame_info *fi)
245 register CORE_ADDR next_ip;
246 register int src;
247 unsigned int insn;
248 int size, offset;
249 char must_adjust[32]; /* If set, must adjust offsets in fsr */
250 int sp_offset = -1; /* -1 means not set (valid must be mult of 8) */
251 int fp_offset = -1; /* -1 means not set */
252 CORE_ADDR frame_fp;
253 CORE_ADDR prologue_end = 0;
255 memset (must_adjust, '\0', sizeof (must_adjust));
256 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
258 while (next_ip)
260 struct prologue_insns *pip;
262 for (pip = prologue_insn_tbl; (insn & pip->mask) != pip->insn;)
263 if (++pip >= prologue_insn_tbl + sizeof prologue_insn_tbl)
264 goto end_of_prologue_found; /* not a prologue insn */
266 switch (pip->action)
268 case PIA_NOTE_ST:
269 case PIA_NOTE_STD:
270 if (sp_offset != -1)
272 src = ST_SRC (insn);
273 offset = ST_OFFSET (insn);
274 must_adjust[src] = 1;
275 fsr->regs[src++] = offset; /* Will be adjusted later */
276 if (pip->action == PIA_NOTE_STD && src < 32)
278 offset += 4;
279 must_adjust[src] = 1;
280 fsr->regs[src++] = offset;
283 else
284 goto end_of_prologue_found;
285 break;
286 case PIA_NOTE_SP_ADJUSTMENT:
287 if (sp_offset == -1)
288 sp_offset = -SUBU_OFFSET (insn);
289 else
290 goto end_of_prologue_found;
291 break;
292 case PIA_NOTE_FP_ASSIGNMENT:
293 if (fp_offset == -1)
294 fp_offset = ADDU_OFFSET (insn);
295 else
296 goto end_of_prologue_found;
297 break;
298 case PIA_NOTE_PROLOGUE_END:
299 if (!prologue_end)
300 prologue_end = ip;
301 break;
302 case PIA_SKIP:
303 default:
304 /* Do nothing */
305 break;
308 ip = next_ip;
309 next_ip = NEXT_PROLOGUE_INSN (ip, limit, &insn);
312 end_of_prologue_found:
314 if (prologue_end)
315 ip = prologue_end;
317 /* We're done with the prologue. If we don't care about the stack
318 frame itself, just return. (Note that fsr->regs has been trashed,
319 but the one caller who calls with fi==0 passes a dummy there.) */
321 if (fi == 0)
322 return ip;
325 OK, now we have:
327 sp_offset original (before any alloca calls) displacement of SP
328 (will be negative).
330 fp_offset displacement from original SP to the FP for this frame
331 or -1.
333 fsr->regs[0..31] displacement from original SP to the stack
334 location where reg[0..31] is stored.
336 must_adjust[0..31] set if corresponding offset was set.
338 If alloca has been called between the function prologue and the current
339 IP, then the current SP (frame_sp) will not be the original SP as set by
340 the function prologue. If the current SP is not the original SP, then the
341 compiler will have allocated an FP for this frame, fp_offset will be set,
342 and we can use it to calculate the original SP.
344 Then, we figure out where the arguments and locals are, and relocate the
345 offsets in fsr->regs to absolute addresses. */
347 if (fp_offset != -1)
349 /* We have a frame pointer, so get it, and base our calc's on it. */
350 frame_fp = (CORE_ADDR) read_next_frame_reg (fi->next, ACTUAL_FP_REGNUM);
351 frame_sp = frame_fp - fp_offset;
353 else
355 /* We have no frame pointer, therefore frame_sp is still the same value
356 as set by prologue. But where is the frame itself? */
357 if (must_adjust[SRP_REGNUM])
359 /* Function header saved SRP (r1), the return address. Frame starts
360 4 bytes down from where it was saved. */
361 frame_fp = frame_sp + fsr->regs[SRP_REGNUM] - 4;
362 fi->locals_pointer = frame_fp;
364 else
366 /* Function header didn't save SRP (r1), so we are in a leaf fn or
367 are otherwise confused. */
368 frame_fp = -1;
372 /* The locals are relative to the FP (whether it exists as an allocated
373 register, or just as an assumed offset from the SP) */
374 fi->locals_pointer = frame_fp;
376 /* The arguments are just above the SP as it was before we adjusted it
377 on entry. */
378 fi->args_pointer = frame_sp - sp_offset;
380 /* Now that we know the SP value used by the prologue, we know where
381 it saved all the registers. */
382 for (src = 0; src < 32; src++)
383 if (must_adjust[src])
384 fsr->regs[src] += frame_sp;
386 /* The saved value of the SP is always known. */
387 /* (we hope...) */
388 if (fsr->regs[SP_REGNUM] != 0
389 && fsr->regs[SP_REGNUM] != frame_sp - sp_offset)
390 fprintf_unfiltered (gdb_stderr, "Bad saved SP value %x != %x, offset %x!\n",
391 fsr->regs[SP_REGNUM],
392 frame_sp - sp_offset, sp_offset);
394 fsr->regs[SP_REGNUM] = frame_sp - sp_offset;
396 return (ip);
399 /* Given an ip value corresponding to the start of a function,
400 return the ip of the first instruction after the function
401 prologue. */
403 CORE_ADDR
404 m88k_skip_prologue (CORE_ADDR ip)
406 struct frame_saved_regs saved_regs_dummy;
407 struct symtab_and_line sal;
408 CORE_ADDR limit;
410 sal = find_pc_line (ip, 0);
411 limit = (sal.end) ? sal.end : 0xffffffff;
413 return (examine_prologue (ip, limit, (CORE_ADDR) 0, &saved_regs_dummy,
414 (struct frame_info *) 0));
417 /* Put here the code to store, into a struct frame_saved_regs,
418 the addresses of the saved registers of frame described by FRAME_INFO.
419 This includes special registers such as pc and fp saved in special
420 ways in the stack frame. sp is even more special:
421 the address we return for it IS the sp for the next frame.
423 We cache the result of doing this in the frame_obstack, since it is
424 fairly expensive. */
426 void
427 frame_find_saved_regs (struct frame_info *fi, struct frame_saved_regs *fsr)
429 register struct frame_saved_regs *cache_fsr;
430 CORE_ADDR ip;
431 struct symtab_and_line sal;
432 CORE_ADDR limit;
434 if (!fi->fsr)
436 cache_fsr = (struct frame_saved_regs *)
437 frame_obstack_alloc (sizeof (struct frame_saved_regs));
438 memset (cache_fsr, '\0', sizeof (struct frame_saved_regs));
439 fi->fsr = cache_fsr;
441 /* Find the start and end of the function prologue. If the PC
442 is in the function prologue, we only consider the part that
443 has executed already. In the case where the PC is not in
444 the function prologue, we set limit to two instructions beyond
445 where the prologue ends in case if any of the prologue instructions
446 were moved into a delay slot of a branch instruction. */
448 ip = get_pc_function_start (fi->pc);
449 sal = find_pc_line (ip, 0);
450 limit = (sal.end && sal.end < fi->pc) ? sal.end + 2 * BYTES_PER_88K_INSN
451 : fi->pc;
453 /* This will fill in fields in *fi as well as in cache_fsr. */
454 #ifdef SIGTRAMP_FRAME_FIXUP
455 if (fi->signal_handler_caller)
456 SIGTRAMP_FRAME_FIXUP (fi->frame);
457 #endif
458 examine_prologue (ip, limit, fi->frame, cache_fsr, fi);
459 #ifdef SIGTRAMP_SP_FIXUP
460 if (fi->signal_handler_caller && fi->fsr->regs[SP_REGNUM])
461 SIGTRAMP_SP_FIXUP (fi->fsr->regs[SP_REGNUM]);
462 #endif
465 if (fsr)
466 *fsr = *fi->fsr;
469 /* Return the address of the locals block for the frame
470 described by FI. Returns 0 if the address is unknown.
471 NOTE! Frame locals are referred to by negative offsets from the
472 argument pointer, so this is the same as frame_args_address(). */
474 CORE_ADDR
475 frame_locals_address (struct frame_info *fi)
477 struct frame_saved_regs fsr;
479 if (fi->args_pointer) /* Cached value is likely there. */
480 return fi->args_pointer;
482 /* Nope, generate it. */
484 get_frame_saved_regs (fi, &fsr);
486 return fi->args_pointer;
489 /* Return the address of the argument block for the frame
490 described by FI. Returns 0 if the address is unknown. */
492 CORE_ADDR
493 frame_args_address (struct frame_info *fi)
495 struct frame_saved_regs fsr;
497 if (fi->args_pointer) /* Cached value is likely there. */
498 return fi->args_pointer;
500 /* Nope, generate it. */
502 get_frame_saved_regs (fi, &fsr);
504 return fi->args_pointer;
507 /* Return the saved PC from this frame.
509 If the frame has a memory copy of SRP_REGNUM, use that. If not,
510 just use the register SRP_REGNUM itself. */
512 CORE_ADDR
513 frame_saved_pc (struct frame_info *frame)
515 return read_next_frame_reg (frame, SRP_REGNUM);
519 #define DUMMY_FRAME_SIZE 192
521 static void
522 write_word (CORE_ADDR sp, ULONGEST word)
524 register int len = REGISTER_SIZE;
525 char buffer[MAX_REGISTER_RAW_SIZE];
527 store_unsigned_integer (buffer, len, word);
528 write_memory (sp, buffer, len);
531 void
532 m88k_push_dummy_frame (void)
534 register CORE_ADDR sp = read_register (SP_REGNUM);
535 register int rn;
536 int offset;
538 sp -= DUMMY_FRAME_SIZE; /* allocate a bunch of space */
540 for (rn = 0, offset = 0; rn <= SP_REGNUM; rn++, offset += 4)
541 write_word (sp + offset, read_register (rn));
543 write_word (sp + offset, read_register (SXIP_REGNUM));
544 offset += 4;
546 write_word (sp + offset, read_register (SNIP_REGNUM));
547 offset += 4;
549 write_word (sp + offset, read_register (SFIP_REGNUM));
550 offset += 4;
552 write_word (sp + offset, read_register (PSR_REGNUM));
553 offset += 4;
555 write_word (sp + offset, read_register (FPSR_REGNUM));
556 offset += 4;
558 write_word (sp + offset, read_register (FPCR_REGNUM));
559 offset += 4;
561 write_register (SP_REGNUM, sp);
562 write_register (ACTUAL_FP_REGNUM, sp);
565 void
566 pop_frame (void)
568 register struct frame_info *frame = get_current_frame ();
569 register CORE_ADDR fp;
570 register int regnum;
571 struct frame_saved_regs fsr;
573 fp = FRAME_FP (frame);
574 get_frame_saved_regs (frame, &fsr);
576 if (PC_IN_CALL_DUMMY (read_pc (), read_register (SP_REGNUM), FRAME_FP (fi)))
578 /* FIXME: I think get_frame_saved_regs should be handling this so
579 that we can deal with the saved registers properly (e.g. frame
580 1 is a call dummy, the user types "frame 2" and then "print $ps"). */
581 register CORE_ADDR sp = read_register (ACTUAL_FP_REGNUM);
582 int offset;
584 for (regnum = 0, offset = 0; regnum <= SP_REGNUM; regnum++, offset += 4)
585 (void) write_register (regnum, read_memory_integer (sp + offset, 4));
587 write_register (SXIP_REGNUM, read_memory_integer (sp + offset, 4));
588 offset += 4;
590 write_register (SNIP_REGNUM, read_memory_integer (sp + offset, 4));
591 offset += 4;
593 write_register (SFIP_REGNUM, read_memory_integer (sp + offset, 4));
594 offset += 4;
596 write_register (PSR_REGNUM, read_memory_integer (sp + offset, 4));
597 offset += 4;
599 write_register (FPSR_REGNUM, read_memory_integer (sp + offset, 4));
600 offset += 4;
602 write_register (FPCR_REGNUM, read_memory_integer (sp + offset, 4));
603 offset += 4;
606 else
608 for (regnum = FP_REGNUM; regnum > 0; regnum--)
609 if (fsr.regs[regnum])
610 write_register (regnum,
611 read_memory_integer (fsr.regs[regnum], 4));
612 write_pc (frame_saved_pc (frame));
614 reinit_frame_cache ();
617 void
618 _initialize_m88k_tdep (void)
620 tm_print_insn = print_insn_m88k;