ld/testsuite/ld-powerpc/notoc3.d

   1 #as: -a64 -mpower10
   2 #ld: --no-plt-localentry -T ext.lnk
   3 #objdump: -d
   4 #target: powerpc64*-*-*
   5
   6 .*
   7
   8 Disassembly of section \.text:
   9
  10 .* <.*\.long_branch\.f1>:
  11 .*:     (18 00 41 f8|f8 41 00 18)       std     r2,24\(r1\)
  12 .*:     (.. .. 00 48|48 00 .. ..)       b       .* <f1>
  13
  14 .* <.*\.long_branch\.g1>:
  15 .*:     (18 00 41 f8|f8 41 00 18)       std     r2,24\(r1\)
  16 .*:     (.. .. 00 48|48 00 .. ..)       b       .* <g1>
  17 #...
  18 .* <.*\.plt_branch\.ext>:
  19 .*:     (00 20 60 3d|3d 60 20 00)       lis     r11,8192
  20 .*:     (00 00 6b 61|61 6b 00 00)       ori     r11,r11,0
  21 .*:     (ff ef 13 06|06 13 ef ff)       pla     r12,-268435752  # 0
  22 .*:     (d8 fe 80 39|39 80 fe d8)
  23 .*:     (46 17 6b 79|79 6b 17 46)       sldi    r11,r11,34
  24 .*:     (14 62 8b 7d|7d 8b 62 14)       add     r12,r11,r12
  25 .*:     (a6 03 89 7d|7d 89 03 a6)       mtctr   r12
  26 .*:     (20 04 80 4e|4e 80 04 20)       bctr
  27 .*:     (00 80 82 e9|e9 82 80 00)       ld      r12,-32768\(r2\)
  28 .*:     (a6 03 89 7d|7d 89 03 a6)       mtctr   r12
  29 .*:     (20 04 80 4e|4e 80 04 20)       bctr
  30
  31 .* <.*\.long_branch\.f2>:
  32 .*:     (00 00 00 60|60 00 00 00)       nop
  33 .*:     (00 00 10 06|06 10 00 00)       pla     r12,92  # .* <f2>
  34 .*:     (5c 00 80 39|39 80 00 5c)
  35 .*:     (.. .. 00 48|48 00 .. ..)       b       .* <f2>
  36
  37 .* <.*\.long_branch\.g2>:
  38 .*:     (00 00 00 60|60 00 00 00)       nop
  39 .*:     (00 00 10 06|06 10 00 00)       pla     r12,128 # .* <g2>
  40 .*:     (80 00 80 39|39 80 00 80)
  41 .*:     (.. .. 00 48|48 00 .. ..)       b       .* <g2>
  42 #...
  43 .* <f1>:
  44 .*:     (01 00 00 48|48 00 00 01)       bl      .* <f1>
  45 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f2>
  46 .*:     (.. .. 00 48|48 00 .. ..)       bl      .* <g1>
  47 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g2>
  48 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.plt_branch\.ext>
  49 .*:     (20 00 80 4e|4e 80 00 20)       blr
  50
  51 .* <g1>:
  52 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f2>
  53 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <f1>
  54 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g2>
  55 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <g1>
  56 .*:     (20 00 80 4e|4e 80 00 20)       blr
  57
  58 .* <f2>:
  59 .*:     (02 10 40 3c|3c 40 10 02)       lis     r2,4098
  60 .*:     (00 90 42 38|38 42 90 00)       addi    r2,r2,-28672
  61 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f1>
  62 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  63 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <f2\+0x8>
  64 .*:     (00 00 00 60|60 00 00 00)       nop
  65 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g1>
  66 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  67 .*:     (.. .. 00 48|48 00 .. ..)       bl      .* <g2\+0x8>
  68 .*:     (00 00 00 60|60 00 00 00)       nop
  69 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.plt_branch\.ext\+0x20>
  70 .*:     (00 00 00 60|60 00 00 00)       nop
  71 .*:     (20 00 80 4e|4e 80 00 20)       blr
  72
  73 .* <g2>:
  74 .*:     (02 10 40 3c|3c 40 10 02)       lis     r2,4098
  75 .*:     (00 90 42 38|38 42 90 00)       addi    r2,r2,-28672
  76 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <f2\+0x8>
  77 .*:     (00 00 00 60|60 00 00 00)       nop
  78 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.f1>
  79 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  80 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <g2\+0x8>
  81 .*:     (00 00 00 60|60 00 00 00)       nop
  82 .*:     (.. .. ff 4b|4b ff .. ..)       bl      .* <.*\.long_branch\.g1>
  83 .*:     (18 00 41 e8|e8 41 00 18)       ld      r2,24\(r1\)
  84 .*:     (20 00 80 4e|4e 80 00 20)       blr
  85
  86 .* <_start>:
  87 .*:     (00 00 00 48|48 00 00 00)       b       .* <_start>
  88 #...
  89
  90 Disassembly of section \.text\.ext:
  91
  92 8000000000000000 <ext>:
  93 8000000000000000:       (02 10 40 3c|3c 40 10 02)       lis     r2,4098
  94 8000000000000004:       (00 90 42 38|38 42 90 00)       addi    r2,r2,-28672
  95 8000000000000008:       (00 00 00 60|60 00 00 00)       nop
  96 800000000000000c:       (20 00 80 4e|4e 80 00 20)       blr