[ARM] "svc" insn check at irrelevant address in ARM unwind info sniffer
[binutils-gdb.git] / sim / d10v / sim-main.h
blob0b87811d5704107216c27ae44dfbc24cde5ba5c3
1 /* Simulation code for the d10v processor.
2 Copyright (C) 2009-2015 Free Software Foundation, Inc.
4 This file is part of simulators.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 #ifndef SIM_MAIN_H
20 #define SIM_MAIN_H
22 #include "sim-basics.h"
24 typedef long int word;
25 typedef unsigned long int uword;
27 #include "sim-base.h"
28 #include "bfd.h"
30 #include "d10v_sim.h"
32 struct _sim_cpu {
34 sim_cpu_base base;
37 struct sim_state {
39 sim_cpu *cpu[MAX_NR_PROCESSORS];
41 sim_state_base base;
44 #endif