sim/cris/crisv10f.c

   1 /* CRIS v10 simulator support code
   2    Copyright (C) 2004-2024 Free Software Foundation, Inc.
   3    Contributed by Axis Communications.
   4
   5 This file is part of the GNU simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* The infrastructure is based on that of i960.c.  */
  21
  22 /* This must come before any other includes.  */
  23 #include "defs.h"
  24
  25 #define WANT_CPU_CRISV10F
  26
  27 #define BASENUM 10
  28 #define CRIS_TLS_REGISTER 14
  29 #include "cris-tmpl.c"
  30
  31 #if WITH_PROFILE_MODEL_P
  32
  33 /* Model function for u-multiply unit.  */
  34
  35 int
  36 MY (XCONCAT3 (f_model_crisv,BASENUM,
  37               _u_multiply)) (SIM_CPU *current_cpu ATTRIBUTE_UNUSED,
  38                              const IDESC *idesc ATTRIBUTE_UNUSED,
  39                              int unit_num ATTRIBUTE_UNUSED,
  40                              int referenced ATTRIBUTE_UNUSED)
  41 {
  42   return 1;
  43 }
  44
  45 #endif /* WITH_PROFILE_MODEL_P */
  46
  47 /* Do the interrupt sequence if possible, and return 1.  If interrupts
  48    are disabled or some other lockout is active, return 0 and do
  49    nothing.
  50
  51    Beware, the v10 implementation is incomplete and doesn't properly
  52    lock out interrupts e.g. after special-register access and doesn't
  53    handle user-mode.  */
  54
  55 int
  56 MY (deliver_interrupt) (SIM_CPU *current_cpu,
  57                         enum cris_interrupt_type type,
  58                         unsigned int vec)
  59 {
  60   unsigned char entryaddr_le[4];
  61   SIM_DESC sd = CPU_STATE (current_cpu);
  62   uint32_t entryaddr;
  63
  64   /* We haven't implemented other interrupt-types yet.  */
  65   if (type != CRIS_INT_INT)
  66     abort ();
  67
  68   /* We're supposed to be called outside of prefixes and branch
  69      delay-slots etc, but why not check.  */
  70   if (GET_H_INSN_PREFIXED_P ())
  71     abort ();
  72
  73   if (!GET_H_IBIT ())
  74     return 0;
  75
  76   /* User mode isn't supported for interrupts.  (And we shouldn't see
  77      this as 1 anyway.  The user-mode bit isn't visible from user
  78      mode.  It doesn't make it into the U bit until the next
  79      interrupt/exception.)  */
  80   if (GET_H_UBIT ())
  81     abort ();
  82
  83   SET_H_PBIT (1);
  84
  85   if (sim_core_read_buffer (sd,
  86                             current_cpu,
  87                             read_map, entryaddr_le,
  88                             GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4, 4) == 0)
  89     {
  90       /* Nothing to do actually; either abort or send a signal.  */
  91       sim_core_signal (sd, current_cpu, CPU_PC_GET (current_cpu), 0, 4,
  92                        GET_H_SR (H_SR_PRE_V32_IBR) + vec * 4,
  93                        read_transfer, sim_core_unmapped_signal);
  94       return 0;
  95     }
  96
  97   entryaddr = bfd_getl32 (entryaddr_le);
  98
  99   SET_H_SR (H_SR_PRE_V32_IRP, GET_H_PC ());
 100   SET_H_PC (entryaddr);
 101
 102   return 1;
 103 }