1 /* mips-opc.c -- MIPS opcode list.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2012
4 Free Software Foundation, Inc.
5 Contributed by Ralph Campbell and OSF
6 Commented and modified by Ian Lance Taylor, Cygnus Support
7 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
8 MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom
11 This file is part of the GNU opcodes library.
13 This library is free software; you can redistribute it and/or modify
14 it under the terms of the GNU General Public License as published by
15 the Free Software Foundation; either version 3, or (at your option)
18 It is distributed in the hope that it will be useful, but WITHOUT
19 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
20 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
21 License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this file; see the file COPYING. If not, write to the
25 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
26 MA 02110-1301, USA. */
30 #include "opcode/mips.h"
32 /* Short hand so the lines aren't too long. */
34 #define LDD INSN_LOAD_MEMORY_DELAY
35 #define LCD INSN_LOAD_COPROC_DELAY
36 #define UBD INSN_UNCOND_BRANCH_DELAY
37 #define CBD INSN_COND_BRANCH_DELAY
38 #define COD INSN_COPROC_MOVE_DELAY
39 #define CLD INSN_COPROC_MEMORY_DELAY
40 #define CBL INSN_COND_BRANCH_LIKELY
41 #define NODS INSN_NO_DELAY_SLOT
42 #define TRAP INSN_NO_DELAY_SLOT
43 #define SM INSN_STORE_MEMORY
45 #define WR_d INSN_WRITE_GPR_D
46 #define WR_t INSN_WRITE_GPR_T
47 #define WR_31 INSN_WRITE_GPR_31
48 #define WR_D INSN_WRITE_FPR_D
49 #define WR_T INSN_WRITE_FPR_T
50 #define WR_S INSN_WRITE_FPR_S
51 #define RD_s INSN_READ_GPR_S
52 #define RD_b INSN_READ_GPR_S
53 #define RD_t INSN_READ_GPR_T
54 #define RD_S INSN_READ_FPR_S
55 #define RD_T INSN_READ_FPR_T
56 #define RD_R INSN_READ_FPR_R
57 #define WR_CC INSN_WRITE_COND_CODE
58 #define RD_CC INSN_READ_COND_CODE
59 #define RD_C0 INSN_COP
60 #define RD_C1 INSN_COP
61 #define RD_C2 INSN_COP
62 #define RD_C3 INSN_COP
63 #define WR_C0 INSN_COP
64 #define WR_C1 INSN_COP
65 #define WR_C2 INSN_COP
66 #define WR_C3 INSN_COP
69 #define WR_HI INSN_WRITE_HI
70 #define RD_HI INSN_READ_HI
71 #define MOD_HI WR_HI|RD_HI
73 #define WR_LO INSN_WRITE_LO
74 #define RD_LO INSN_READ_LO
75 #define MOD_LO WR_LO|RD_LO
77 #define WR_HILO WR_HI|WR_LO
78 #define RD_HILO RD_HI|RD_LO
79 #define MOD_HILO WR_HILO|RD_HILO
81 #define IS_M INSN_MULT
83 #define WR_MACC INSN2_WRITE_MDMX_ACC
84 #define RD_MACC INSN2_READ_MDMX_ACC
91 #define I32 INSN_ISA32
92 #define I64 INSN_ISA64
93 #define I33 INSN_ISA32R2
94 #define I65 INSN_ISA64R2
95 #define I3_32 INSN_ISA3_32
96 #define I3_33 INSN_ISA3_32R2
97 #define I4_32 INSN_ISA4_32
98 #define I4_33 INSN_ISA4_32R2
99 #define I5_33 INSN_ISA5_32R2
101 /* MIPS64 MIPS-3D ASE support. */
102 #define M3D INSN_MIPS3D
104 /* MIPS32 SmartMIPS ASE support. */
105 #define SMT INSN_SMARTMIPS
107 /* MIPS64 MDMX ASE support. */
110 #define IL2E (INSN_LOONGSON_2E)
111 #define IL2F (INSN_LOONGSON_2F)
112 #define IL3A (INSN_LOONGSON_3A)
116 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
118 #define M1 INSN_10000
120 #define N411 INSN_4111
121 #define N412 INSN_4120
122 #define N5 (INSN_5400 | INSN_5500)
123 #define N54 INSN_5400
124 #define N55 INSN_5500
125 #define IOCT (INSN_OCTEON | INSN_OCTEONP | INSN_OCTEON2)
126 #define IOCTP (INSN_OCTEONP | INSN_OCTEON2)
127 #define IOCT2 INSN_OCTEON2
139 /* MIPS DSP ASE support.
141 1. MIPS DSP ASE includes 4 accumulators ($ac0 - $ac3). $ac0 is the pair
142 of original HI and LO. $ac1, $ac2 and $ac3 are new registers, and have
143 the same structure as $ac0 (HI + LO). For DSP instructions that write or
144 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a
145 (RD_HILO) attributes, such that HILO dependencies are maintained
148 2. For some mul. instructions that use integer registers as destinations
149 but destroy HI+LO as side-effect, we add WR_HILO to their attributes.
151 3. MIPS DSP ASE includes a new DSP control register, which has 6 fields
152 (ccond, outflag, EFI, c, scount, pos). Many DSP instructions read or write
153 certain fields of the DSP control register. For simplicity, we decide not
154 to track dependencies of these fields.
155 However, "bposge32" is a branch instruction that depends on the "pos"
156 field. In order to make sure that GAS does not reorder DSP instructions
157 that writes the "pos" field and "bposge32", we add DSP_VOLA
158 (INSN_NO_DELAY_SLOT) attribute to those instructions that write the "pos"
161 #define WR_a WR_HILO /* Write dsp accumulators (reuse WR_HILO) */
162 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) */
163 #define MOD_a WR_a|RD_a
164 #define DSP_VOLA INSN_NO_DELAY_SLOT
166 #define D33 INSN_DSPR2
167 #define D64 INSN_DSP64
169 /* MIPS MT ASE support. */
172 /* Loongson support. */
173 #define WR_z INSN2_WRITE_GPR_Z
174 #define WR_Z INSN2_WRITE_FPR_Z
175 #define RD_z INSN2_READ_GPR_Z
176 #define RD_Z INSN2_READ_FPR_Z
177 #define RD_d INSN2_READ_GPR_D
179 /* MIPS MCU (MicroController) ASE support. */
182 /* The order of overloaded instructions matters. Label arguments and
183 register arguments look the same. Instructions that can have either
184 for arguments must apear in the correct order in this table for the
185 assembler to pick the right one. In other words, entries with
186 immediate operands must apear after the same instruction with
189 Because of the lookup algorithm used, entries with the same opcode
190 name must be contiguous.
192 Many instructions are short hand for other instructions (i.e., The
193 jal <register> instruction is short for jalr <register>). */
195 const struct mips_opcode mips_builtin_opcodes
[] =
197 /* These instructions appear first so that the disassembler will find
198 them first. The assemblers uses a hash table based on the
199 instruction name anyhow. */
200 /* name, args, match, mask, pinfo, pinfo2, membership, [exclusions] */
201 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b
, 0, I4_32
|G3
},
202 {"pref", "k,A(b)", 0, (int) M_PREF_AB
, INSN_MACRO
, 0, I4_32
|G3
},
203 {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b
|RD_t
|FP_S
, 0, I4_33
},
204 {"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
205 {"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
206 {"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
207 {"li", "t,j", 0x24000000, 0xffe00000, WR_t
, INSN2_ALIAS
, I1
}, /* addiu */
208 {"li", "t,i", 0x34000000, 0xffe00000, WR_t
, INSN2_ALIAS
, I1
}, /* ori */
209 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, 0, I1
},
210 {"move", "d,s", 0, (int) M_MOVE
, INSN_MACRO
, 0, I1
},
211 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d
|RD_s
, INSN2_ALIAS
, I3
},/* daddu */
212 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d
|RD_s
, INSN2_ALIAS
, I1
},/* addu */
213 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d
|RD_s
, INSN2_ALIAS
, I1
},/* or */
214 {"b", "p", 0x10000000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
},/* beq 0,0 */
215 {"b", "p", 0x04010000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
},/* bgez 0 */
216 {"bal", "p", 0x04110000, 0xffff0000, UBD
|WR_31
, INSN2_ALIAS
, I1
},/* bgezal 0*/
218 /* Loongson specific instructions. Loongson 3A redefines the Coprocessor 2
219 instructions. Put them here so that disassembler will find them first.
220 The assemblers uses a hash table based on the instruction name anyhow. */
221 {"campi", "d,s", 0x70000075, 0xfc1f07ff, WR_d
|RD_s
, 0, IL3A
},
222 {"campv", "d,s", 0x70000035, 0xfc1f07ff, WR_d
|RD_s
, 0, IL3A
},
223 {"camwi", "d,s,t", 0x700000b5, 0xfc0007ff, RD_s
|RD_t
, RD_d
, IL3A
},
224 {"ramri", "d,s", 0x700000f5, 0xfc1f07ff, WR_d
|RD_s
, 0, IL3A
},
225 {"gsle", "s,t", 0x70000026, 0xfc00ffff, RD_s
|RD_t
, 0, IL3A
},
226 {"gsgt", "s,t", 0x70000027, 0xfc00ffff, RD_s
|RD_t
, 0, IL3A
},
227 {"gslble", "t,b,d", 0xc8000010, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
228 {"gslbgt", "t,b,d", 0xc8000011, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
229 {"gslhle", "t,b,d", 0xc8000012, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
230 {"gslhgt", "t,b,d", 0xc8000013, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
231 {"gslwle", "t,b,d", 0xc8000014, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
232 {"gslwgt", "t,b,d", 0xc8000015, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
233 {"gsldle", "t,b,d", 0xc8000016, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
234 {"gsldgt", "t,b,d", 0xc8000017, 0xfc0007ff, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
235 {"gssble", "t,b,d", 0xe8000010, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
236 {"gssbgt", "t,b,d", 0xe8000011, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
237 {"gsshle", "t,b,d", 0xe8000012, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
238 {"gsshgt", "t,b,d", 0xe8000013, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
239 {"gsswle", "t,b,d", 0xe8000014, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
240 {"gsswgt", "t,b,d", 0xe8000015, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
241 {"gssdle", "t,b,d", 0xe8000016, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
242 {"gssdgt", "t,b,d", 0xe8000017, 0xfc0007ff, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
243 {"gslwlec1", "T,b,d", 0xc8000018, 0xfc0007ff, WR_T
|RD_b
|LDD
, RD_d
, IL3A
},
244 {"gslwgtc1", "T,b,d", 0xc8000019, 0xfc0007ff, WR_T
|RD_b
|LDD
, RD_d
, IL3A
},
245 {"gsldlec1", "T,b,d", 0xc800001a, 0xfc0007ff, WR_T
|RD_b
|LDD
, RD_d
, IL3A
},
246 {"gsldgtc1", "T,b,d", 0xc800001b, 0xfc0007ff, WR_T
|RD_b
|LDD
, RD_d
, IL3A
},
247 {"gsswlec1", "T,b,d", 0xe800001c, 0xfc0007ff, RD_T
|RD_b
|SM
, RD_d
, IL3A
},
248 {"gsswgtc1", "T,b,d", 0xe800001d, 0xfc0007ff, RD_T
|RD_b
|SM
, RD_d
, IL3A
},
249 {"gssdlec1", "T,b,d", 0xe800001e, 0xfc0007ff, RD_T
|RD_b
|SM
, RD_d
, IL3A
},
250 {"gssdgtc1", "T,b,d", 0xe800001f, 0xfc0007ff, RD_T
|RD_b
|SM
, RD_d
, IL3A
},
251 {"gslwlc1", "T,+a(b)", 0xc8000004, 0xfc00c03f, WR_T
|RD_b
|LDD
, 0, IL3A
},
252 {"gslwrc1", "T,+a(b)", 0xc8000005, 0xfc00c03f, WR_T
|RD_b
|LDD
, 0, IL3A
},
253 {"gsldlc1", "T,+a(b)", 0xc8000006, 0xfc00c03f, WR_T
|RD_b
|LDD
, 0, IL3A
},
254 {"gsldrc1", "T,+a(b)", 0xc8000007, 0xfc00c03f, WR_T
|RD_b
|LDD
, 0, IL3A
},
255 {"gsswlc1", "T,+a(b)", 0xe8000004, 0xfc00c03f, RD_T
|RD_b
|SM
, 0, IL3A
},
256 {"gsswrc1", "T,+a(b)", 0xe8000005, 0xfc00c03f, RD_T
|RD_b
|SM
, 0, IL3A
},
257 {"gssdlc1", "T,+a(b)", 0xe8000006, 0xfc00c03f, RD_T
|RD_b
|SM
, 0, IL3A
},
258 {"gssdrc1", "T,+a(b)", 0xe8000007, 0xfc00c03f, RD_T
|RD_b
|SM
, 0, IL3A
},
259 {"gslbx", "t,+b(b,d)", 0xd8000000, 0xfc000007, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
260 {"gslhx", "t,+b(b,d)", 0xd8000001, 0xfc000007, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
261 {"gslwx", "t,+b(b,d)", 0xd8000002, 0xfc000007, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
262 {"gsldx", "t,+b(b,d)", 0xd8000003, 0xfc000007, WR_t
|RD_b
|LDD
, RD_d
, IL3A
},
263 {"gssbx", "t,+b(b,d)", 0xf8000000, 0xfc000007, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
264 {"gsshx", "t,+b(b,d)", 0xf8000001, 0xfc000007, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
265 {"gsswx", "t,+b(b,d)", 0xf8000002, 0xfc000007, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
266 {"gssdx", "t,+b(b,d)", 0xf8000003, 0xfc000007, RD_t
|RD_b
|SM
, RD_d
, IL3A
},
267 {"gslwxc1", "T,+b(b,d)", 0xd8000006, 0xfc000007, WR_T
|RD_b
|LDD
, RD_d
, IL3A
},
268 {"gsldxc1", "T,+b(b,d)", 0xd8000007, 0xfc000007, WR_T
|RD_b
|LDD
, RD_d
, IL3A
},
269 {"gsswxc1", "T,+b(b,d)", 0xf8000006, 0xfc000007, RD_T
|RD_b
|SM
, RD_d
, IL3A
},
270 {"gssdxc1", "T,+b(b,d)", 0xf8000007, 0xfc000007, RD_T
|RD_b
|SM
, RD_d
, IL3A
},
271 {"gslq", "+z,t,+c(b)", 0xc8000020, 0xfc008020, WR_t
|RD_b
|LDD
, WR_z
, IL3A
},
272 {"gssq", "+z,t,+c(b)", 0xe8000020, 0xfc008020, RD_t
|RD_b
|SM
, RD_z
, IL3A
},
273 {"gslqc1", "+Z,T,+c(b)", 0xc8008020, 0xfc008020, WR_T
|RD_b
|LDD
, WR_Z
, IL3A
},
274 {"gssqc1", "+Z,T,+c(b)", 0xe8008020, 0xfc008020, RD_T
|RD_b
|SM
, RD_Z
, IL3A
},
276 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, 0, I1
},
277 {"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
278 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I1
},
279 {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I5_33
|IL2F
},
280 {"abs.ps", "D,V", 0x45600005, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, IL2E
},
281 {"aclr", "\\,~(b)", 0x04070000, 0xfc1f8000, SM
|RD_b
|NODS
, 0, MC
},
282 {"aclr", "\\,o(b)", 0, (int) M_ACLR_OB
, INSN_MACRO
, 0, MC
},
283 {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB
, INSN_MACRO
, 0, MC
},
284 {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
285 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, 0, I1
},
286 {"add", "D,S,T", 0x45c00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
287 {"add", "D,S,T", 0x4b40000c, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
|IL3A
},
288 {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
289 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
290 {"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
291 {"add.ob", "D,S,T", 0x4ac0000b, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
292 {"add.ob", "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
293 {"add.ob", "D,S,k", 0x4bc0000b, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
294 {"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
|IL2F
},
295 {"add.ps", "D,V,T", 0x45600000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, IL2E
},
296 {"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
297 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
298 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
299 {"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
300 {"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
301 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
302 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
303 {"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
304 {"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
305 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, 0, I1
},
306 {"addu", "D,S,T", 0x45800000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
307 {"addu", "D,S,T", 0x4b00000c, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
|IL3A
},
308 {"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
309 {"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D
|RD_S
|RD_T
, 0, N54
},
310 {"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
311 {"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D
|RD_S
|RD_T
|RD_s
|FP_D
, 0, I5_33
},
312 {"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_D
|RD_S
|RD_T
|RD_s
|FP_D
, 0, MX
|SB1
},
313 {"alnv.qh", "X,Y,Z,s", 0x7800001b, 0xfc00003f, WR_D
|RD_S
|RD_T
|RD_s
|FP_D
, 0, MX
},
314 {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
315 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, 0, I1
},
316 {"and", "D,S,T", 0x47c00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
317 {"and", "D,S,T", 0x4bc00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
318 {"and.ob", "X,Y,Q", 0x7800000c, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
319 {"and.ob", "D,S,T", 0x4ac0000c, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
320 {"and.ob", "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
321 {"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
322 {"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
323 {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
324 {"aset", "\\,~(b)", 0x04078000, 0xfc1f8000, SM
|RD_b
|NODS
, 0, MC
},
325 {"aset", "\\,o(b)", 0, (int) M_ASET_OB
, INSN_MACRO
, 0, MC
},
326 {"aset", "\\,A(b)", 0, (int) M_ASET_AB
, INSN_MACRO
, 0, MC
},
327 {"baddu", "d,v,t", 0x70000028, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IOCT
},
328 /* b is at the top of the table. */
329 /* bal is at the top of the table. */
330 {"bbit032", "s,+x,p", 0xd8000000, 0xfc000000, RD_s
|CBD
, 0, IOCT
},
331 {"bbit0", "s,+X,p", 0xd8000000, 0xfc000000, RD_s
|CBD
, 0, IOCT
}, /* bbit032 */
332 {"bbit0", "s,+x,p", 0xc8000000, 0xfc000000, RD_s
|CBD
, 0, IOCT
},
333 {"bbit132", "s,+x,p", 0xf8000000, 0xfc000000, RD_s
|CBD
, 0, IOCT
},
334 {"bbit1", "s,+X,p", 0xf8000000, 0xfc000000, RD_s
|CBD
, 0, IOCT
}, /* bbit132 */
335 {"bbit1", "s,+x,p", 0xe8000000, 0xfc000000, RD_s
|CBD
, 0, IOCT
},
336 /* bc0[tf]l? are at the bottom of the table. */
337 {"bc1any2f", "N,p", 0x45200000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
338 {"bc1any2t", "N,p", 0x45210000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
339 {"bc1any4f", "N,p", 0x45400000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
340 {"bc1any4t", "N,p", 0x45410000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
341 {"bc1f", "p", 0x45000000, 0xffff0000, CBD
|RD_CC
|FP_S
, 0, I1
},
342 {"bc1f", "N,p", 0x45000000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, I4_32
},
343 {"bc1fl", "p", 0x45020000, 0xffff0000, CBL
|RD_CC
|FP_S
, 0, I2
|T3
},
344 {"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL
|RD_CC
|FP_S
, 0, I4_32
},
345 {"bc1t", "p", 0x45010000, 0xffff0000, CBD
|RD_CC
|FP_S
, 0, I1
},
346 {"bc1t", "N,p", 0x45010000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, I4_32
},
347 {"bc1tl", "p", 0x45030000, 0xffff0000, CBL
|RD_CC
|FP_S
, 0, I2
|T3
},
348 {"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL
|RD_CC
|FP_S
, 0, I4_32
},
349 /* bc2* are at the bottom of the table. */
350 /* bc3* are at the bottom of the table. */
351 {"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
352 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
353 {"beq", "s,t,p", 0x10000000, 0xfc000000, CBD
|RD_s
|RD_t
, 0, I1
},
354 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, 0, I1
},
355 {"beql", "s,t,p", 0x50000000, 0xfc000000, CBL
|RD_s
|RD_t
, 0, I2
|T3
},
356 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, 0, I2
|T3
},
357 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, 0, I1
},
358 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, 0, I1
},
359 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, 0, I2
|T3
},
360 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, 0, I2
|T3
},
361 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, 0, I1
},
362 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, 0, I1
},
363 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, 0, I2
|T3
},
364 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, 0, I2
|T3
},
365 {"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
366 {"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
367 {"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD
|RD_s
|WR_31
, 0, I1
},
368 {"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL
|RD_s
|WR_31
, 0, I2
|T3
},
369 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, 0, I1
},
370 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, 0, I1
},
371 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, 0, I2
|T3
},
372 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, 0, I2
|T3
},
373 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, 0, I1
},
374 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, 0, I1
},
375 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, 0, I2
|T3
},
376 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, 0, I2
|T3
},
377 {"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
378 {"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
379 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, 0, I1
},
380 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, 0, I1
},
381 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, 0, I2
|T3
},
382 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, 0, I2
|T3
},
383 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, 0, I1
},
384 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, 0, I1
},
385 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, 0, I2
|T3
},
386 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, 0, I2
|T3
},
387 {"blez", "s,p", 0x18000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
388 {"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
389 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, 0, I1
},
390 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, 0, I1
},
391 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, 0, I2
|T3
},
392 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, 0, I2
|T3
},
393 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, 0, I1
},
394 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, 0, I1
},
395 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, 0, I2
|T3
},
396 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, 0, I2
|T3
},
397 {"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
398 {"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
399 {"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD
|RD_s
|WR_31
, 0, I1
},
400 {"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL
|RD_s
|WR_31
, 0, I2
|T3
},
401 {"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
402 {"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
403 {"bne", "s,t,p", 0x14000000, 0xfc000000, CBD
|RD_s
|RD_t
, 0, I1
},
404 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, 0, I1
},
405 {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL
|RD_s
|RD_t
, 0, I2
|T3
},
406 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, 0, I2
|T3
},
407 {"break", "", 0x0000000d, 0xffffffff, TRAP
, 0, I1
},
408 {"break", "c", 0x0000000d, 0xfc00ffff, TRAP
, 0, I1
},
409 {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP
, 0, I1
},
410 {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
411 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
412 {"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
413 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
414 {"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
415 {"c.f.ps", "S,T", 0x45600030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
416 {"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
417 {"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
418 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
419 {"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
420 {"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
421 {"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
422 {"c.un.ps", "S,T", 0x45600031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
423 {"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
424 {"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
425 {"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
426 {"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
427 {"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
428 {"c.eq.ob", "Y,Q", 0x78000001, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
429 {"c.eq.ob", "S,T", 0x4ac00001, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
430 {"c.eq.ob", "S,T[e]", 0x48000001, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
431 {"c.eq.ob", "S,k", 0x4bc00001, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
432 {"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
433 {"c.eq.ps", "S,T", 0x45600032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
434 {"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
435 {"c.eq.qh", "Y,Q", 0x78200001, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
},
436 {"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
437 {"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
438 {"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
439 {"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
440 {"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
441 {"c.ueq.ps","S,T", 0x45600033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
442 {"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
443 {"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
444 {"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
445 {"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
446 {"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
447 {"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
448 {"c.olt.ps","S,T", 0x45600034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
449 {"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
450 {"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
451 {"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
452 {"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
453 {"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
454 {"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
455 {"c.ult.ps","S,T", 0x45600035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
456 {"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
457 {"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
458 {"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
459 {"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
460 {"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
461 {"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
462 {"c.ole.ps","S,T", 0x45600036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
463 {"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
464 {"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
465 {"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
466 {"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
467 {"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
468 {"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
469 {"c.ule.ps","S,T", 0x45600037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
470 {"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
471 {"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
472 {"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
473 {"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
474 {"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
475 {"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
476 {"c.sf.ps", "S,T", 0x45600038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
477 {"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
478 {"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
479 {"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
480 {"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
481 {"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
482 {"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
483 {"c.ngle.ps","S,T", 0x45600039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
484 {"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
485 {"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
486 {"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
487 {"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
488 {"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
489 {"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
490 {"c.seq.ps","S,T", 0x4560003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
491 {"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
492 {"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
493 {"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
494 {"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
495 {"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
496 {"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
497 {"c.ngl.ps","S,T", 0x4560003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
498 {"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
499 {"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
500 {"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
501 {"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
502 {"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
503 {"c.lt.ob", "Y,Q", 0x78000004, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
504 {"c.lt.ob", "S,T", 0x4ac00004, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
505 {"c.lt.ob", "S,T[e]", 0x48000004, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
506 {"c.lt.ob", "S,k", 0x4bc00004, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
507 {"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
508 {"c.lt.ps", "S,T", 0x4560003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
509 {"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
510 {"c.lt.qh", "Y,Q", 0x78200004, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
},
511 {"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
512 {"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
513 {"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
514 {"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
515 {"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
516 {"c.nge.ps","S,T", 0x4560003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
517 {"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
518 {"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
519 {"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
520 {"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
521 {"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
522 {"c.le.ob", "Y,Q", 0x78000005, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
523 {"c.le.ob", "S,T", 0x4ac00005, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
524 {"c.le.ob", "S,T[e]", 0x48000005, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
525 {"c.le.ob", "S,k", 0x4bc00005, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
526 {"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
527 {"c.le.ps", "S,T", 0x4560003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
528 {"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
529 {"c.le.qh", "Y,Q", 0x78200005, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
},
530 {"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
531 {"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
532 {"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
533 {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
534 {"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
|IL2F
},
535 {"c.ngt.ps","S,T", 0x4560003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
536 {"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
537 {"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
538 {"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
539 {"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
540 {"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
541 {"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
542 {"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
543 {"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
544 {"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
545 {"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
546 {"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
547 {"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
548 {"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
549 {"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
550 {"cabs.nge.ps","M,S,T", 0x46c0007d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
551 {"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
552 {"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
553 {"cabs.ngl.ps","M,S,T", 0x46c0007b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
554 {"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
555 {"cabs.ngle.d","M,S,T", 0x46200079, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
556 {"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
557 {"cabs.ngle.s","M,S,T", 0x46000079, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
558 {"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
559 {"cabs.ngt.ps","M,S,T", 0x46c0007f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
560 {"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
561 {"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
562 {"cabs.ole.ps","M,S,T", 0x46c00076, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
563 {"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
564 {"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
565 {"cabs.olt.ps","M,S,T", 0x46c00074, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
566 {"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
567 {"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
568 {"cabs.seq.ps","M,S,T", 0x46c0007a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
569 {"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
570 {"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
571 {"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
572 {"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
573 {"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
574 {"cabs.ueq.ps","M,S,T", 0x46c00073, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
575 {"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
576 {"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
577 {"cabs.ule.ps","M,S,T", 0x46c00077, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
578 {"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
579 {"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
580 {"cabs.ult.ps","M,S,T", 0x46c00075, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
581 {"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
582 {"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
583 {"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
584 {"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
585 /* CW4010 instructions which are aliases for the cache instruction. */
586 {"flushi", "", 0xbc010000, 0xffffffff, 0, 0, L1
},
587 {"flushd", "", 0xbc020000, 0xffffffff, 0, 0, L1
},
588 {"flushid", "", 0xbc030000, 0xffffffff, 0, 0, L1
},
589 {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM
|RD_b
, 0, L1
},
590 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b
, 0, I3_32
|T3
},
591 {"cache", "k,A(b)", 0, (int) M_CACHE_AB
, INSN_MACRO
, 0, I3_32
|T3
},
592 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
593 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
594 {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
595 {"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
596 {"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
597 {"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, 0, I1
},
598 {"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, 0, I1
},
599 /* cfc2 is at the bottom of the table. */
600 /* cfc3 is at the bottom of the table. */
601 {"cftc1", "d,E", 0x41000023, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C1
|FP_S
, 0, MT32
},
602 {"cftc1", "d,T", 0x41000023, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C1
|FP_S
, 0, MT32
},
603 {"cftc2", "d,E", 0x41000025, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C2
, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
604 {"cins32", "t,r,+p,+S",0x70000033, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
},
605 {"cins", "t,r,+P,+S",0x70000033, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
}, /* cins32 */
606 {"cins", "t,r,+p,+s",0x70000032, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
},
607 {"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d
|WR_t
|RD_s
, 0, I32
|N55
},
608 {"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d
|WR_t
|RD_s
, 0, I32
|N55
},
609 {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
610 {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, 0, I1
},
611 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, 0, I1
},
612 /* ctc2 is at the bottom of the table. */
613 /* ctc3 is at the bottom of the table. */
614 {"cttc1", "t,g", 0x41800023, 0xffe007ff, TRAP
|COD
|RD_t
|WR_CC
|FP_S
, 0, MT32
},
615 {"cttc1", "t,S", 0x41800023, 0xffe007ff, TRAP
|COD
|RD_t
|WR_CC
|FP_S
, 0, MT32
},
616 {"cttc2", "t,g", 0x41800025, 0xffe007ff, TRAP
|COD
|RD_t
|WR_CC
, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
617 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
618 {"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
619 {"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
620 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
621 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
622 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
623 {"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
624 {"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
625 {"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I5_33
},
626 {"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I5_33
},
627 {"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
628 {"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
629 {"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, M3D
},
630 {"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
|FP_D
, 0, I5_33
},
631 {"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, M3D
},
632 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, 0, I3
},
633 {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
634 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
},
635 {"dadd", "D,S,T", 0x45e00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
636 {"dadd", "D,S,T", 0x4b60000c, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
637 {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t
|RD_s
, 0, I3
},
638 {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t
|RD_s
, 0, I3
},
639 {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
640 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, 0, I3
},
641 {"daddwc", "d,s,t", 0x70000038, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_C0
|RD_C0
, 0, XLR
},
642 {"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5
},
643 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s
|WR_d
|WR_t
, 0, I64
|N55
},
644 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s
|WR_d
|WR_t
, 0, I64
|N55
},
645 /* dctr and dctw are used on the r5000. */
646 {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b
, 0, I3
},
647 {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b
, 0, I3
},
648 {"deret", "", 0x4200001f, 0xffffffff, NODS
, 0, I32
|G2
},
649 {"dext", "t,r,I,+I", 0, (int) M_DEXT
, INSN_MACRO
, 0, I65
},
650 {"dext", "t,r,+A,+C", 0x7c000003, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
651 {"dextm", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
652 {"dextu", "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
653 /* For ddiv, see the comments about div. */
654 {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
655 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, 0, I3
},
656 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, 0, I3
},
657 /* For ddivu, see the comments about div. */
658 {"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
659 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, 0, I3
},
660 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, 0, I3
},
661 {"di", "", 0x41606000, 0xffffffff, WR_t
|WR_C0
, 0, I33
},
662 {"di", "t", 0x41606000, 0xffe0ffff, WR_t
|WR_C0
, 0, I33
},
663 {"dins", "t,r,I,+I", 0, (int) M_DINS
, INSN_MACRO
, 0, I65
},
664 {"dins", "t,r,+A,+B", 0x7c000007, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
665 {"dinsm", "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
666 {"dinsu", "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
667 /* The MIPS assembler treats the div opcode with two operands as
668 though the first operand appeared twice (the first operand is both
669 a source and a destination). To get the div machine instruction,
670 you must use an explicit destination of $0. */
671 {"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
672 {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
673 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, 0, I1
},
674 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, 0, I1
},
675 {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
676 {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
677 {"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, SB1
},
678 /* For divu, see the comments about div. */
679 {"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
680 {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
681 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, 0, I1
},
682 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, 0, I1
},
683 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, 0, I3
},
684 {"dlca", "t,A(b)", 0, (int) M_DLCA_AB
, INSN_MACRO
, 0, I3
},
685 {"dli", "t,j", 0x24000000, 0xffe00000, WR_t
, 0, I3
}, /* addiu */
686 {"dli", "t,i", 0x34000000, 0xffe00000, WR_t
, 0, I3
}, /* ori */
687 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, 0, I3
},
688 {"dmacc", "d,s,t", 0x00000029, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
689 {"dmacchi", "d,s,t", 0x00000229, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
690 {"dmacchis", "d,s,t", 0x00000629, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
691 {"dmacchiu", "d,s,t", 0x00000269, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
692 {"dmacchius", "d,s,t", 0x00000669, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
693 {"dmaccs", "d,s,t", 0x00000429, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
694 {"dmaccu", "d,s,t", 0x00000069, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
695 {"dmaccus", "d,s,t", 0x00000469, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
696 {"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s
|RD_t
|MOD_LO
, 0, N411
},
697 {"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, I3
},
698 {"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I64
},
699 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I64
},
700 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP
, 0, MT32
},
701 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
702 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, 0, I3
},
703 {"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I64
},
704 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I64
},
705 {"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I3
},
706 {"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I3
},
707 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I3
},
708 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I3
},
709 /* dmfc2 is at the bottom of the table. */
710 /* dmtc2 is at the bottom of the table. */
711 /* dmfc3 is at the bottom of the table. */
712 /* dmtc3 is at the bottom of the table. */
713 {"dmul", "d,v,t", 0x70000003, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, IOCT
},
714 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, 0, I3
},
715 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, 0, I3
},
716 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, 0, I3
},
717 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, 0, I3
},
718 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, 0, I3
},
719 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, 0, I3
},
720 {"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
721 {"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
722 {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d
|RD_t
, 0, I3
}, /* dsub 0 */
723 {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d
|RD_t
, 0, I3
}, /* dsubu 0*/
724 {"dpop", "d,v", 0x7000002d, 0xfc1f07ff, WR_d
|RD_s
, 0, IOCT
},
725 {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
726 {"drem", "d,v,t", 0, (int) M_DREM_3
, INSN_MACRO
, 0, I3
},
727 {"drem", "d,v,I", 0, (int) M_DREM_3I
, INSN_MACRO
, 0, I3
},
728 {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
729 {"dremu", "d,v,t", 0, (int) M_DREMU_3
, INSN_MACRO
, 0, I3
},
730 {"dremu", "d,v,I", 0, (int) M_DREMU_3I
, INSN_MACRO
, 0, I3
},
731 {"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5
},
732 {"drol", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
},
733 {"drol", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
},
734 {"dror", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
},
735 {"dror", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
},
736 {"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d
|RD_t
, 0, N5
|I65
},
737 {"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, N5
|I65
},
738 {"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d
|RD_t
, 0, N5
|I65
},
739 {"drotl", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I65
},
740 {"drotl", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I65
},
741 {"drotr", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I65
},
742 {"drotr", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I65
},
743 {"drotrv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I65
},
744 {"drotr32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d
|RD_t
, 0, I65
},
745 {"dsbh", "d,w", 0x7c0000a4, 0xffe007ff, WR_d
|RD_t
, 0, I65
},
746 {"dshd", "d,w", 0x7c000164, 0xffe007ff, WR_d
|RD_t
, 0, I65
},
747 {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
748 {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
749 {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsllv */
750 {"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, 0, I3
}, /* dsll32 */
751 {"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
752 {"dsll", "D,S,T", 0x45a00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
753 {"dsll", "D,S,T", 0x4b20000e, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
754 {"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
755 {"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
756 {"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsrav */
757 {"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, 0, I3
}, /* dsra32 */
758 {"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
759 {"dsra", "D,S,T", 0x45e00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
760 {"dsra", "D,S,T", 0x4b60000f, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
761 {"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
762 {"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
763 {"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsrlv */
764 {"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, 0, I3
}, /* dsrl32 */
765 {"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
766 {"dsrl", "D,S,T", 0x45a00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
767 {"dsrl", "D,S,T", 0x4b20000f, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
768 {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
769 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, 0, I3
},
770 {"dsub", "D,S,T", 0x45e00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
771 {"dsub", "D,S,T", 0x4b60000d, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
772 {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
773 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, 0, I3
},
774 {"dvpe", "", 0x41600001, 0xffffffff, TRAP
, 0, MT32
},
775 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
776 {"ei", "", 0x41606020, 0xffffffff, WR_t
|WR_C0
, 0, I33
},
777 {"ei", "t", 0x41606020, 0xffe0ffff, WR_t
|WR_C0
, 0, I33
},
778 {"emt", "", 0x41600be1, 0xffffffff, TRAP
, 0, MT32
},
779 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
780 {"eret", "", 0x42000018, 0xffffffff, NODS
, 0, I3_32
},
781 {"evpe", "", 0x41600021, 0xffffffff, TRAP
, 0, MT32
},
782 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
783 {"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t
|RD_s
, 0, I33
},
784 {"exts32", "t,r,+p,+S",0x7000003b, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
},
785 {"exts", "t,r,+P,+S",0x7000003b, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
}, /* exts32 */
786 {"exts", "t,r,+p,+s",0x7000003a, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
},
787 {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
788 {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
789 {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
790 {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
791 {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1
},
792 {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t
|RD_s
, 0, I33
},
793 {"iret", "", 0x42000038, 0xffffffff, NODS
, 0, MC
},
794 {"jr", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, 0, I1
},
795 /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with
796 the same hazard barrier effect. */
797 {"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD
|RD_s
, 0, I32
},
798 {"j", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, 0, I1
}, /* jr */
799 /* SVR4 PIC code requires special handling for j, so it must be a
801 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, 0, I1
},
802 /* This form of j is used by the disassembler and internally by the
803 assembler, but will never match user input (because the line above
804 will match first). */
805 {"j", "a", 0x08000000, 0xfc000000, UBD
, 0, I1
},
806 {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD
|RD_s
|WR_d
, 0, I1
},
807 {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD
|RD_s
|WR_d
, 0, I1
},
808 /* jalr.hb is officially MIPS{32,64}R2, but it works on R1 as jalr
809 with the same hazard barrier effect. */
810 {"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, UBD
|RD_s
|WR_d
, 0, I32
},
811 {"jalr.hb", "d,s", 0x00000409, 0xfc1f07ff, UBD
|RD_s
|WR_d
, 0, I32
},
812 /* SVR4 PIC code requires special handling for jal, so it must be a
814 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, 0, I1
},
815 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, 0, I1
},
816 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, 0, I1
},
817 /* This form of jal is used by the disassembler and internally by the
818 assembler, but will never match user input (because the line above
819 will match first). */
820 {"jal", "a", 0x0c000000, 0xfc000000, UBD
|WR_31
, 0, I1
},
821 {"jalx", "a", 0x74000000, 0xfc000000, UBD
|WR_31
, 0, I1
},
822 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, 0, I1
},
823 {"laa", "d,(b),t", 0x7000049f, 0xfc0007ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
824 {"laad", "d,(b),t", 0x700004df, 0xfc0007ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
825 {"lac", "d,(b)", 0x7000039f, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_b
, 0, IOCT2
},
826 {"lacd", "d,(b)", 0x700003df, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_b
, 0, IOCT2
},
827 {"lad", "d,(b)", 0x7000019f, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
828 {"ladd", "d,(b)", 0x700001df, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
829 {"lai", "d,(b)", 0x7000009f, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
830 {"laid", "d,(b)", 0x700000df, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
831 {"las", "d,(b)", 0x7000029f, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_b
, 0, IOCT2
},
832 {"lasd", "d,(b)", 0x700002df, 0xfc1f07ff, LDD
|SM
|WR_d
|RD_b
, 0, IOCT2
},
833 {"law", "d,(b),t", 0x7000059f, 0xfc0007ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
834 {"lawd", "d,(b),t", 0x700005df, 0xfc0007ff, LDD
|SM
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
835 {"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
836 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, 0, I1
},
837 {"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
838 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, 0, I1
},
839 {"lbx", "d,t(b)", 0x7c00058a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
840 {"lbux", "d,t(b)", 0x7c00018a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D32
|IOCT2
},
841 {"ldx", "d,t(b)", 0x7c00020a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D64
|IOCT2
},
842 {"lhx", "d,t(b)", 0x7c00010a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D32
|IOCT2
},
843 {"lhux", "d,t(b)", 0x7c00050a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
844 {"lwx", "d,t(b)", 0x7c00000a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D32
|IOCT2
},
845 {"lwux", "d,t(b)", 0x7c00040a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, IOCT2
},
846 {"lca", "t,A(b)", 0, (int) M_LCA_AB
, INSN_MACRO
, 0, I1
},
847 /* The macro has to be first to handle o32 correctly. */
848 {"ld", "t,o(b)", 0, (int) M_LD_OB
, INSN_MACRO
, 0, I1
},
849 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t
|RD_b
, 0, I3
},
850 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, 0, I1
},
851 {"ldaddw", "t,b", 0x70000010, 0xfc00ffff, SM
|RD_t
|WR_t
|RD_b
, 0, XLR
},
852 {"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, SM
|RD_t
|WR_t
|RD_b
, 0, XLR
},
853 {"ldaddd", "t,b", 0x70000012, 0xfc00ffff, SM
|RD_t
|WR_t
|RD_b
, 0, XLR
},
854 {"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, 0, I2
},
855 {"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, 0, I2
},
856 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
},
857 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
},
858 {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, 0, I2
}, /* ldc1 */
859 {"l.d", "T,o(b)", 0, (int) M_L_DOB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
860 {"l.d", "T,A(b)", 0, (int) M_L_DAB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
861 {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
862 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
863 {"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
864 {"ldc3", "E,A(b)", 0, (int) M_LDC3_AB
, INSN_MACRO
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
865 {"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD
|WR_t
|RD_b
, 0, I3
},
866 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, 0, I3
},
867 {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD
|WR_t
|RD_b
, 0, I3
},
868 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, 0, I3
},
869 {"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
|FP_D
, 0, I4_33
},
870 {"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
871 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, 0, I1
},
872 {"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
873 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, 0, I1
},
874 /* li is at the start of the table. */
875 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
876 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
877 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
878 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
879 {"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I2
},
880 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, 0, I2
},
881 {"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I3
},
882 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, 0, I3
},
883 {"lui", "t,u", 0x3c000000, 0xffe00000, WR_t
, 0, I1
},
884 {"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
|FP_D
, 0, I5_33
|N55
},
885 {"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
886 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, 0, I1
},
887 {"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
888 {"lwc0", "E,A(b)", 0, (int) M_LWC0_AB
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
889 {"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, 0, I1
},
890 {"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, 0, I1
},
891 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
892 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
893 {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, 0, I1
}, /* lwc1 */
894 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
895 {"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
896 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
897 {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
898 {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
899 {"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
900 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
},
901 {"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I2
}, /* same */
902 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I2
}, /* as lwl */
903 {"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
904 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
},
905 {"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I2
}, /* same */
906 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I2
}, /* as lwr */
907 {"fork", "d,s,t", 0x7c000008, 0xfc0007ff, TRAP
|WR_d
|RD_s
|RD_t
, 0, MT32
},
908 {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I3
},
909 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, 0, I3
},
910 {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
|FP_S
, 0, I4_33
},
911 {"lwxs", "d,t(b)", 0x70000088, 0xfc0007ff, LDD
|RD_b
|RD_t
|WR_d
, 0, SMT
},
912 {"macc", "d,s,t", 0x00000028, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
913 {"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
914 {"maccs", "d,s,t", 0x00000428, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
915 {"macchi", "d,s,t", 0x00000228, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
916 {"macchi", "d,s,t", 0x00000358, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
917 {"macchis", "d,s,t", 0x00000628, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
918 {"macchiu", "d,s,t", 0x00000268, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
919 {"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
920 {"macchius","d,s,t", 0x00000668, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
921 {"maccu", "d,s,t", 0x00000068, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
922 {"maccu", "d,s,t", 0x00000159, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
923 {"maccus", "d,s,t", 0x00000468, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
924 {"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, P3
},
925 {"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, P3
},
926 {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
927 {"madd.d", "D,S,T", 0x46200018, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
928 {"madd.d", "D,S,T", 0x72200018, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
929 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
930 {"madd.s", "D,S,T", 0x46000018, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
931 {"madd.s", "D,S,T", 0x72000018, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
},
932 {"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
933 {"madd.ps", "D,S,T", 0x45600018, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
934 {"madd.ps", "D,S,T", 0x71600018, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
935 {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
936 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
937 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, G1
},
938 {"madd", "7,s,t", 0x70000000, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
939 {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
940 {"maddp", "s,t", 0x70000441, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, SMT
},
941 {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
942 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
943 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, G1
},
944 {"maddu", "7,s,t", 0x70000001, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
945 {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
946 {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, N411
},
947 {"max.ob", "X,Y,Q", 0x78000007, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
948 {"max.ob", "D,S,T", 0x4ac00007, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
949 {"max.ob", "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
950 {"max.ob", "D,S,k", 0x4bc00007, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
951 {"max.qh", "X,Y,Q", 0x78200007, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
952 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, LCD
|WR_t
|RD_C0
, 0, M1
|N5
},
953 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, LCD
|WR_t
|RD_C0
, 0, M1
|N5
},
954 {"mftacx", "d", 0x41020021, 0xffff07ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
955 {"mftacx", "d,*", 0x41020021, 0xfff307ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
956 {"mftc0", "d,+t", 0x41000000, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C0
, 0, MT32
},
957 {"mftc0", "d,+T", 0x41000000, 0xffe007f8, TRAP
|LCD
|WR_d
|RD_C0
, 0, MT32
},
958 {"mftc0", "d,E,H", 0x41000000, 0xffe007f8, TRAP
|LCD
|WR_d
|RD_C0
, 0, MT32
},
959 {"mftc1", "d,T", 0x41000022, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_S
, 0, MT32
},
960 {"mftc1", "d,E", 0x41000022, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_S
, 0, MT32
},
961 {"mftc2", "d,E", 0x41000024, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C2
, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
962 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP
|WR_d
, 0, MT32
},
963 {"mftgpr", "d,t", 0x41000020, 0xffe007ff, TRAP
|WR_d
|RD_t
, 0, MT32
},
964 {"mfthc1", "d,T", 0x41000032, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_D
, 0, MT32
},
965 {"mfthc1", "d,E", 0x41000032, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_D
, 0, MT32
},
966 {"mfthc2", "d,E", 0x41000034, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C2
, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
967 {"mfthi", "d", 0x41010021, 0xffff07ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
968 {"mfthi", "d,*", 0x41010021, 0xfff307ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
969 {"mftlo", "d", 0x41000021, 0xffff07ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
970 {"mftlo", "d,*", 0x41000021, 0xfff307ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
971 {"mftr", "d,t,!,H,$", 0x41000000, 0xffe007c8, TRAP
|WR_d
, 0, MT32
},
972 {"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, I1
},
973 {"mfc0", "t,+D",0x40000000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I32
},
974 {"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I32
},
975 {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, 0, I1
},
976 {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, 0, I1
},
977 {"mfhc1", "t,S", 0x44600000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I33
},
978 {"mfhc1", "t,G", 0x44600000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I33
},
979 /* mfc2 is at the bottom of the table. */
980 /* mfhc2 is at the bottom of the table. */
981 /* mfc3 is at the bottom of the table. */
982 {"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, N5
},
983 {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d
|RD_HI
, 0, I1
},
984 {"mfhi", "d,9", 0x00000010, 0xff9f07ff, WR_d
|RD_HI
, 0, D32
},
985 {"mflo", "d", 0x00000012, 0xffff07ff, WR_d
|RD_LO
, 0, I1
},
986 {"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_d
|RD_LO
, 0, D32
},
987 {"mflhxu", "d", 0x00000052, 0xffff07ff, WR_d
|MOD_HILO
, 0, SMT
},
988 {"mfcr", "t,s", 0x70000018, 0xfc00ffff, WR_t
, 0, XLR
},
989 {"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
990 {"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
991 {"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
992 {"min.ob", "D,S,k", 0x4bc00006, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
993 {"min.qh", "X,Y,Q", 0x78200006, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
994 {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I1
},
995 {"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
996 {"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I5_33
|IL2F
},
997 {"mov.ps", "D,S", 0x45600006, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, IL2E
},
998 {"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
|FP_S
|FP_D
, 0, I4_32
},
999 {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I4_32
},
1000 {"movf.l", "D,S,N", 0x46a00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
1001 {"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
1002 {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, 0, I4_32
},
1003 {"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I5_33
},
1004 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I4_32
|IL2E
|IL2F
},
1005 {"movnz", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IL2E
|IL2F
|IL3A
},
1006 {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d
|RD_s
, 0, L1
},
1007 {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I4_32
},
1008 {"movn.l", "D,S,t", 0x46a00013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
1009 {"movn.l", "X,Y,t", 0x46a00013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
1010 {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, 0, I4_32
},
1011 {"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I5_33
},
1012 {"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
|FP_S
|FP_D
, 0, I4_32
},
1013 {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I4_32
},
1014 {"movt.l", "D,S,N", 0x46a10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
1015 {"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
1016 {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, 0, I4_32
},
1017 {"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I5_33
},
1018 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I4_32
|IL2E
|IL2F
},
1019 {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d
|RD_s
, 0, L1
},
1020 {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I4_32
},
1021 {"movz.l", "D,S,t", 0x46a00012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
1022 {"movz.l", "X,Y,t", 0x46a00012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
1023 {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, 0, I4_32
},
1024 {"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I5_33
},
1025 {"msac", "d,s,t", 0x000001d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1026 {"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1027 {"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1028 {"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1029 /* move is at the top of the table. */
1030 {"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1031 {"msgsnd", "t", 0, (int) M_MSGSND
, INSN_MACRO
, 0, XLR
},
1032 {"msgld", "", 0, (int) M_MSGLD
, INSN_MACRO
, 0, XLR
},
1033 {"msgld", "t", 0, (int) M_MSGLD_T
, INSN_MACRO
, 0, XLR
},
1034 {"msgwait", "", 0, (int) M_MSGWAIT
, INSN_MACRO
, 0, XLR
},
1035 {"msgwait", "t", 0, (int) M_MSGWAIT_T
,INSN_MACRO
, 0, XLR
},
1036 {"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
1037 {"msub.d", "D,S,T", 0x46200019, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1038 {"msub.d", "D,S,T", 0x72200019, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
1039 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
1040 {"msub.s", "D,S,T", 0x46000019, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
1041 {"msub.s", "D,S,T", 0x72000019, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
},
1042 {"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
1043 {"msub.ps", "D,S,T", 0x45600019, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1044 {"msub.ps", "D,S,T", 0x71600019, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
1045 {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
1046 {"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
1047 {"msub", "7,s,t", 0x70000004, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1048 {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
1049 {"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
1050 {"msubu", "7,s,t", 0x70000005, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1051 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD
|RD_t
|WR_C0
, 0, M1
|N5
},
1052 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD
|RD_t
|WR_C0
, 0, M1
|N5
},
1053 {"mtc0", "t,G", 0x40800000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, 0, I1
},
1054 {"mtc0", "t,+D", 0x40800000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I32
},
1055 {"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I32
},
1056 {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, 0, I1
},
1057 {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, 0, I1
},
1058 {"mthc1", "t,S", 0x44e00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I33
},
1059 {"mthc1", "t,G", 0x44e00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I33
},
1060 /* mtc2 is at the bottom of the table. */
1061 /* mthc2 is at the bottom of the table. */
1062 /* mtc3 is at the bottom of the table. */
1063 {"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD
|RD_t
|WR_C0
, 0, N5
},
1064 {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s
|WR_HI
, 0, I1
},
1065 {"mthi", "s,7", 0x00000011, 0xfc1fe7ff, RD_s
|WR_HI
, 0, D32
},
1066 {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s
|WR_LO
, 0, I1
},
1067 {"mtlo", "s,7", 0x00000013, 0xfc1fe7ff, RD_s
|WR_LO
, 0, D32
},
1068 {"mtlhx", "s", 0x00000053, 0xfc1fffff, RD_s
|MOD_HILO
, 0, SMT
},
1069 {"mtcr", "t,s", 0x70000019, 0xfc00ffff, RD_t
, 0, XLR
},
1070 {"mtm0", "s", 0x70000008, 0xfc1fffff, RD_s
, 0, IOCT
},
1071 {"mtm1", "s", 0x7000000c, 0xfc1fffff, RD_s
, 0, IOCT
},
1072 {"mtm2", "s", 0x7000000d, 0xfc1fffff, RD_s
, 0, IOCT
},
1073 {"mtp0", "s", 0x70000009, 0xfc1fffff, RD_s
, 0, IOCT
},
1074 {"mtp1", "s", 0x7000000a, 0xfc1fffff, RD_s
, 0, IOCT
},
1075 {"mtp2", "s", 0x7000000b, 0xfc1fffff, RD_s
, 0, IOCT
},
1076 {"mttc0", "t,G", 0x41800000, 0xffe007ff, TRAP
|COD
|RD_t
|WR_C0
|WR_CC
, 0, MT32
},
1077 {"mttc0", "t,+D", 0x41800000, 0xffe007f8, TRAP
|COD
|RD_t
|WR_C0
|WR_CC
, 0, MT32
},
1078 {"mttc0", "t,G,H", 0x41800000, 0xffe007f8, TRAP
|COD
|RD_t
|WR_C0
|WR_CC
, 0, MT32
},
1079 {"mttc1", "t,S", 0x41800022, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_S
, 0, MT32
},
1080 {"mttc1", "t,G", 0x41800022, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_S
, 0, MT32
},
1081 {"mttc2", "t,g", 0x41800024, 0xffe007ff, TRAP
|COD
|RD_t
|WR_C2
|WR_CC
, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
1082 {"mttacx", "t", 0x41801021, 0xffe0ffff, TRAP
|WR_a
|RD_t
, 0, MT32
},
1083 {"mttacx", "t,&", 0x41801021, 0xffe09fff, TRAP
|WR_a
|RD_t
, 0, MT32
},
1084 {"mttdsp", "t", 0x41808021, 0xffe0ffff, TRAP
|RD_t
, 0, MT32
},
1085 {"mttgpr", "t,d", 0x41800020, 0xffe007ff, TRAP
|WR_d
|RD_t
, 0, MT32
},
1086 {"mtthc1", "t,S", 0x41800032, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_D
, 0, MT32
},
1087 {"mtthc1", "t,G", 0x41800032, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_D
, 0, MT32
},
1088 {"mtthc2", "t,g", 0x41800034, 0xffe007ff, TRAP
|COD
|RD_t
|WR_C2
|WR_CC
, 0, MT32
, IOCT
|IOCTP
|IOCT2
},
1089 {"mtthi", "t", 0x41800821, 0xffe0ffff, TRAP
|WR_a
|RD_t
, 0, MT32
},
1090 {"mtthi", "t,&", 0x41800821, 0xffe09fff, TRAP
|WR_a
|RD_t
, 0, MT32
},
1091 {"mttlo", "t", 0x41800021, 0xffe0ffff, TRAP
|WR_a
|RD_t
, 0, MT32
},
1092 {"mttlo", "t,&", 0x41800021, 0xffe09fff, TRAP
|WR_a
|RD_t
, 0, MT32
},
1093 {"mttr", "t,d,!,H,$", 0x41800000, 0xffe007c8, TRAP
|RD_t
, 0, MT32
},
1094 {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
1095 {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
1096 {"mul.ob", "X,Y,Q", 0x78000030, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1097 {"mul.ob", "D,S,T", 0x4ac00030, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1098 {"mul.ob", "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1099 {"mul.ob", "D,S,k", 0x4bc00030, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1100 {"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
|IL2F
},
1101 {"mul.ps", "D,V,T", 0x45600002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, IL2E
},
1102 {"mul.qh", "X,Y,Q", 0x78200030, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1103 {"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, I32
|P3
|N55
},
1104 {"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N54
},
1105 {"mul", "d,v,t", 0, (int) M_MUL
, INSN_MACRO
, 0, I1
},
1106 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, 0, I1
},
1107 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1108 {"mula.ob", "S,T", 0x4ac00033, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1109 {"mula.ob", "S,T[e]", 0x48000033, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1110 {"mula.ob", "S,k", 0x4bc00033, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1111 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1112 {"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1113 {"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1114 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1115 {"mull.ob", "S,T", 0x4ac00433, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1116 {"mull.ob", "S,T[e]", 0x48000433, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1117 {"mull.ob", "S,k", 0x4bc00433, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1118 {"mull.qh", "Y,Q", 0x78200433, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1119 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, 0, I1
},
1120 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, 0, I1
},
1121 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, 0, I1
},
1122 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, 0, I1
},
1123 {"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
1124 {"muls", "d,s,t", 0x000000d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1125 {"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1126 {"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1127 {"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1128 {"muls.ob", "Y,Q", 0x78000032, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1129 {"muls.ob", "S,T", 0x4ac00032, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1130 {"muls.ob", "S,T[e]", 0x48000032, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1131 {"muls.ob", "S,k", 0x4bc00032, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1132 {"muls.qh", "Y,Q", 0x78200032, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1133 {"mulsl.ob", "Y,Q", 0x78000432, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1134 {"mulsl.ob", "S,T", 0x4ac00432, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1135 {"mulsl.ob", "S,T[e]", 0x48000432, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1136 {"mulsl.ob", "S,k", 0x4bc00432, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
1137 {"mulsl.qh", "Y,Q", 0x78200432, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1138 {"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, I1
},
1139 {"mult", "7,s,t", 0x00000018, 0xfc00e7ff, WR_a
|RD_s
|RD_t
, 0, D32
},
1140 {"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
1141 {"multp", "s,t", 0x00000459, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, SMT
},
1142 {"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, I1
},
1143 {"multu", "7,s,t", 0x00000019, 0xfc00e7ff, WR_a
|RD_s
|RD_t
, 0, D32
},
1144 {"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
1145 {"mulu", "d,s,t", 0x00000059, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
1146 {"neg", "d,w", 0x00000022, 0xffe007ff, WR_d
|RD_t
, 0, I1
}, /* sub 0 */
1147 {"negu", "d,w", 0x00000023, 0xffe007ff, WR_d
|RD_t
, 0, I1
}, /* subu 0 */
1148 {"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I1
},
1149 {"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
1150 {"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I5_33
|IL2F
},
1151 {"neg.ps", "D,V", 0x45600007, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, IL2E
},
1152 {"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
1153 {"nmadd.d", "D,S,T", 0x4620001a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1154 {"nmadd.d", "D,S,T", 0x7220001a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
1155 {"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
1156 {"nmadd.s", "D,S,T", 0x4600001a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
1157 {"nmadd.s", "D,S,T", 0x7200001a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
},
1158 {"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
1159 {"nmadd.ps", "D,S,T", 0x4560001a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1160 {"nmadd.ps", "D,S,T", 0x7160001a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
1161 {"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
1162 {"nmsub.d", "D,S,T", 0x4620001b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1163 {"nmsub.d", "D,S,T", 0x7220001b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
1164 {"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
1165 {"nmsub.s", "D,S,T", 0x4600001b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
1166 {"nmsub.s", "D,S,T", 0x7200001b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
},
1167 {"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
1168 {"nmsub.ps", "D,S,T", 0x4560001b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1169 {"nmsub.ps", "D,S,T", 0x7160001b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
},
1170 /* nop is at the start of the table. */
1171 {"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1172 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, 0, I1
},
1173 {"nor", "D,S,T", 0x47a00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1174 {"nor", "D,S,T", 0x4ba00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1175 {"nor.ob", "X,Y,Q", 0x7800000f, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1176 {"nor.ob", "D,S,T", 0x4ac0000f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1177 {"nor.ob", "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1178 {"nor.ob", "D,S,k", 0x4bc0000f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1179 {"nor.qh", "X,Y,Q", 0x7820000f, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1180 {"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d
|RD_s
|RD_t
, 0, I1
},/*nor d,s,0*/
1181 {"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1182 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, 0, I1
},
1183 {"or", "D,S,T", 0x45a00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1184 {"or", "D,S,T", 0x4b20000c, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1185 {"or.ob", "X,Y,Q", 0x7800000e, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1186 {"or.ob", "D,S,T", 0x4ac0000e, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1187 {"or.ob", "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1188 {"or.ob", "D,S,k", 0x4bc0000e, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1189 {"or.qh", "X,Y,Q", 0x7820000e, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1190 {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1191 {"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, SB1
},
1192 {"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, SB1
},
1193 {"pause", "", 0x00000140, 0xffffffff, TRAP
, 0, I33
},
1194 {"pavg.ob", "X,Y,Q", 0x78000008, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, SB1
},
1195 {"pickf.ob", "X,Y,Q", 0x78000002, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1196 {"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1197 {"pickf.ob", "D,S,T[e]",0x48000002, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1198 {"pickf.ob", "D,S,k", 0x4bc00002, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1199 {"pickf.qh", "X,Y,Q", 0x78200002, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1200 {"pickt.ob", "X,Y,Q", 0x78000003, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1201 {"pickt.ob", "D,S,T", 0x4ac00003, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1202 {"pickt.ob", "D,S,T[e]",0x48000003, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1203 {"pickt.ob", "D,S,k", 0x4bc00003, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1204 {"pickt.qh", "X,Y,Q", 0x78200003, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1205 {"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1206 {"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1207 {"pop", "d,v", 0x7000002c, 0xfc1f07ff, WR_d
|RD_s
, 0, IOCT
},
1208 /* pref and prefx are at the start of the table. */
1209 {"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1210 {"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1211 {"pperm", "s,t", 0x70000481, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, SMT
},
1212 {"qmac.00", "s,t", 0x70000412, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1213 {"qmac.01", "s,t", 0x70000452, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1214 {"qmac.02", "s,t", 0x70000492, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1215 {"qmac.03", "s,t", 0x700004d2, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1216 {"qmacs.00", "s,t", 0x70000012, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1217 {"qmacs.01", "s,t", 0x70000052, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1218 {"qmacs.02", "s,t", 0x70000092, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1219 {"qmacs.03", "s,t", 0x700000d2, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, IOCT2
},
1220 {"rach.ob", "X", 0x7a00003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
|SB1
},
1221 {"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_D
, 0, N54
},
1222 {"rach.qh", "X", 0x7a20003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
},
1223 {"racl.ob", "X", 0x7800003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
|SB1
},
1224 {"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_D
, 0, N54
},
1225 {"racl.qh", "X", 0x7820003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
},
1226 {"racm.ob", "X", 0x7900003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
|SB1
},
1227 {"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D
, 0, N54
},
1228 {"racm.qh", "X", 0x7920003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
},
1229 {"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I4_33
},
1230 {"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, SB1
},
1231 {"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I4_33
},
1232 {"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, M3D
},
1233 {"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1234 {"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1235 {"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
1236 {"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1237 {"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1238 {"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
1239 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, 0, I1
},
1240 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, 0, I1
},
1241 {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
1242 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, 0, I1
},
1243 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, 0, I1
},
1244 {"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_t
, 0, I33
},
1245 {"rdpgpr", "d,w", 0x41400000, 0xffe007ff, WR_d
, 0, I33
},
1246 {"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1
|T3
},
1247 {"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1248 {"rnau.ob", "X,Q", 0x78000021, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
|SB1
},
1249 {"rnau.qh", "X,Q", 0x78200021, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1250 {"rnes.qh", "X,Q", 0x78200026, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1251 {"rneu.ob", "X,Q", 0x78000022, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
|SB1
},
1252 {"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1253 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
},
1254 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
},
1255 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
},
1256 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I1
},
1257 {"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d
|RD_t
, 0, N5
|I33
|SMT
},
1258 {"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, N5
|I33
|SMT
},
1259 {"rotl", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I33
|SMT
},
1260 {"rotl", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I33
|SMT
},
1261 {"rotr", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I33
|SMT
},
1262 {"rotr", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I33
|SMT
},
1263 {"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I33
|SMT
},
1264 {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
1265 {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
1266 {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
1267 {"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1268 {"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I4_33
},
1269 {"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, SB1
},
1270 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I4_33
},
1271 {"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, M3D
},
1272 {"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1273 {"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1274 {"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
1275 {"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1276 {"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1277 {"rzs.qh", "X,Q", 0x78200024, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1278 {"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
|SB1
},
1279 {"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D
|RD_S
|RD_T
, 0, N54
},
1280 {"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1281 {"saa", "t,o(b)", 0, (int) M_SAA_OB
, INSN_MACRO
, 0, IOCTP
},
1282 {"saa", "t,A(b)", 0, (int) M_SAA_AB
, INSN_MACRO
, 0, IOCTP
},
1283 {"saa", "t,(b)", 0x70000018, 0xfc00ffff, SM
|RD_t
|RD_b
, 0, IOCTP
},
1284 {"saad", "t,o(b)", 0, (int) M_SAAD_OB
, INSN_MACRO
, 0, IOCTP
},
1285 {"saad", "t,A(b)", 0, (int) M_SAAD_AB
, INSN_MACRO
, 0, IOCTP
},
1286 {"saad", "t,(b)", 0x70000019, 0xfc00ffff, SM
|RD_t
|RD_b
, 0, IOCTP
},
1287 {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1288 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, 0, I1
},
1289 {"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, 0, I2
},
1290 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, 0, I2
},
1291 {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, 0, I3
},
1292 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, 0, I3
},
1293 /* The macro has to be first to handle o32 correctly. */
1294 {"sd", "t,o(b)", 0, (int) M_SD_OB
, INSN_MACRO
, 0, I1
},
1295 {"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
1296 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, 0, I1
},
1297 {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP
, 0, G2
},
1298 {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP
, 0, G2
},
1299 {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP
, 0, G2
},
1300 {"sdbbp", "", 0x7000003f, 0xffffffff, TRAP
, 0, I32
},
1301 {"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP
, 0, I32
},
1302 {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I2
},
1303 {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I2
},
1304 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
},
1305 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I2
},
1306 {"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM
|RD_C2
|RD_b
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
1307 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
1308 {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM
|RD_C3
|RD_b
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
1309 {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB
, INSN_MACRO
, 0, I2
, IOCT
|IOCTP
|IOCT2
},
1310 {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I2
},
1311 {"s.d", "T,o(b)", 0, (int) M_S_DOB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
1312 {"s.d", "T,A(b)", 0, (int) M_S_DAB
, INSN_MACRO
, INSN2_M_FP_D
, I1
},
1313 {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
1314 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, 0, I3
},
1315 {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
1316 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, 0, I3
},
1317 {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
|FP_D
, 0, I4_33
},
1318 {"seb", "d,w", 0x7c000420, 0xffe007ff, WR_d
|RD_t
, 0, I33
},
1319 {"seh", "d,w", 0x7c000620, 0xffe007ff, WR_d
|RD_t
, 0, I33
},
1320 {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, L1
},
1321 {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, L1
},
1322 {"seq", "d,v,t", 0x7000002a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IOCT
},
1323 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, 0, I1
},
1324 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, 0, I1
},
1325 {"seq", "S,T", 0x46a00032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
1326 {"seq", "S,T", 0x4ba0000c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2F
|IL3A
},
1327 {"seqi", "t,r,+Q", 0x7000002e, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
},
1328 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, 0, I1
},
1329 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, 0, I1
},
1330 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, 0, I1
},
1331 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, 0, I1
},
1332 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, 0, I1
},
1333 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, 0, I1
},
1334 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, 0, I1
},
1335 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, 0, I1
},
1336 {"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1337 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, 0, I1
},
1338 {"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1339 {"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1340 {"shfl.mixh.ob", "D,S,T", 0x4980001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1341 {"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1342 {"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1343 {"shfl.mixl.ob", "D,S,T", 0x49c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1344 {"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1345 {"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1346 {"shfl.pach.ob", "D,S,T", 0x4900001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1347 {"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1348 {"shfl.pacl.ob", "D,S,T", 0x4940001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1349 {"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1350 {"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1351 {"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1352 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, 0, I1
},
1353 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, 0, I1
},
1354 {"sle", "S,T", 0x46a0003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
1355 {"sle", "S,T", 0x4ba0000e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2F
|IL3A
},
1356 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, 0, I1
},
1357 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, 0, I1
},
1358 {"sleu", "S,T", 0x4680003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
1359 {"sleu", "S,T", 0x4b80000e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2F
|IL3A
},
1360 {"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
1361 {"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* sllv */
1362 {"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d
|RD_t
, 0, I1
},
1363 {"sll", "D,S,T", 0x45800002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1364 {"sll", "D,S,T", 0x4b00000e, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1365 {"sll.ob", "X,Y,Q", 0x78000010, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1366 {"sll.ob", "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1367 {"sll.ob", "D,S,k", 0x4bc00010, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1368 {"sll.qh", "X,Y,Q", 0x78200010, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1369 {"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1370 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, 0, I1
},
1371 {"slt", "S,T", 0x46a0003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
1372 {"slt", "S,T", 0x4ba0000d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2F
|IL3A
},
1373 {"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1374 {"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1375 {"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1376 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, 0, I1
},
1377 {"sltu", "S,T", 0x4680003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
1378 {"sltu", "S,T", 0x4b80000d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2F
|IL3A
},
1379 {"sne", "d,v,t", 0x7000002b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IOCT
},
1380 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, 0, I1
},
1381 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, 0, I1
},
1382 {"snei", "t,r,+Q", 0x7000002f, 0xfc00003f, WR_t
|RD_s
, 0, IOCT
},
1383 {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I2
},
1384 {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1385 {"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, SB1
},
1386 {"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
1387 {"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* srav */
1388 {"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d
|RD_t
, 0, I1
},
1389 {"sra", "D,S,T", 0x45c00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1390 {"sra", "D,S,T", 0x4b40000f, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1391 {"sra.qh", "X,Y,Q", 0x78200013, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1392 {"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
1393 {"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* srlv */
1394 {"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d
|RD_t
, 0, I1
},
1395 {"srl", "D,S,T", 0x45800003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1396 {"srl", "D,S,T", 0x4b00000f, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1397 {"srl.ob", "X,Y,Q", 0x78000012, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1398 {"srl.ob", "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1399 {"srl.ob", "D,S,k", 0x4bc00012, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1400 {"srl.qh", "X,Y,Q", 0x78200012, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1401 /* ssnop is at the start of the table. */
1402 {"standby", "", 0x42000021, 0xffffffff, 0, 0, V1
},
1403 {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1404 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, 0, I1
},
1405 {"sub", "D,S,T", 0x45c00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
1406 {"sub", "D,S,T", 0x4b40000d, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
|IL3A
},
1407 {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
1408 {"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
1409 {"sub.ob", "X,Y,Q", 0x7800000a, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1410 {"sub.ob", "D,S,T", 0x4ac0000a, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1411 {"sub.ob", "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1412 {"sub.ob", "D,S,k", 0x4bc0000a, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1413 {"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
|IL2F
},
1414 {"sub.ps", "D,V,T", 0x45600001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, IL2E
},
1415 {"sub.qh", "X,Y,Q", 0x7820000a, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1416 {"suba.ob", "Y,Q", 0x78000036, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1417 {"suba.qh", "Y,Q", 0x78200036, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1418 {"subl.ob", "Y,Q", 0x78000436, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1419 {"subl.qh", "Y,Q", 0x78200436, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1420 {"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1421 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, 0, I1
},
1422 {"subu", "D,S,T", 0x45800001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2E
},
1423 {"subu", "D,S,T", 0x4b00000d, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_S
, 0, IL2F
|IL3A
},
1424 {"suspend", "", 0x42000022, 0xffffffff, 0, 0, V1
},
1425 {"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
|FP_D
, 0, I5_33
|N55
},
1426 {"sw", "t,o(b)", 0xac000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1427 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, 0, I1
},
1428 {"swapw", "t,b", 0x70000014, 0xfc00ffff, SM
|RD_t
|WR_t
|RD_b
, 0, XLR
},
1429 {"swapwu", "t,b", 0x70000015, 0xfc00ffff, SM
|RD_t
|WR_t
|RD_b
, 0, XLR
},
1430 {"swapd", "t,b", 0x70000016, 0xfc00ffff, SM
|RD_t
|WR_t
|RD_b
, 0, XLR
},
1431 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM
|RD_C0
|RD_b
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1432 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1433 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
},
1434 {"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
},
1435 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
1436 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
1437 {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
}, /* swc1 */
1438 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
1439 {"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM
|RD_C2
|RD_b
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1440 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1441 {"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM
|RD_C3
|RD_b
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1442 {"swc3", "E,A(b)", 0, (int) M_SWC3_AB
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1443 {"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1444 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
},
1445 {"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t
|RD_b
, 0, I2
}, /* same */
1446 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I2
}, /* as swl */
1447 {"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1448 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
},
1449 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t
|RD_b
, 0, I2
}, /* same */
1450 {"invalidate", "t,A(b)",0, (int) M_SWR_AB
, INSN_MACRO
, 0, I2
}, /* as swr */
1451 {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
|FP_S
, 0, I4_33
},
1452 {"synciobdma", "", 0x0000008f, 0xffffffff, NODS
, 0, IOCT
},
1453 {"syncs", "", 0x0000018f, 0xffffffff, NODS
, 0, IOCT
},
1454 {"syncw", "", 0x0000010f, 0xffffffff, NODS
, 0, IOCT
},
1455 {"syncws", "", 0x0000014f, 0xffffffff, NODS
, 0, IOCT
},
1456 {"sync_acquire", "", 0x0000044f, 0xffffffff, NODS
, 0, I33
},
1457 {"sync_mb", "", 0x0000040f, 0xffffffff, NODS
, 0, I33
},
1458 {"sync_release", "", 0x0000048f, 0xffffffff, NODS
, 0, I33
},
1459 {"sync_rmb", "", 0x000004cf, 0xffffffff, NODS
, 0, I33
},
1460 {"sync_wmb", "", 0x0000010f, 0xffffffff, NODS
, 0, I33
},
1461 {"sync", "", 0x0000000f, 0xffffffff, NODS
, 0, I2
|G1
},
1462 {"sync", "1", 0x0000000f, 0xfffff83f, NODS
, 0, I32
},
1463 {"sync.p", "", 0x0000040f, 0xffffffff, NODS
, 0, I2
},
1464 {"sync.l", "", 0x0000000f, 0xffffffff, NODS
, 0, I2
},
1465 {"synci", "o(b)", 0x041f0000, 0xfc1f0000, SM
|RD_b
, 0, I33
},
1466 {"syscall", "", 0x0000000c, 0xffffffff, TRAP
, 0, I1
},
1467 {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP
, 0, I1
},
1468 {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1469 {"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1470 {"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1471 {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* teqi */
1472 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, 0, I2
},
1473 {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1474 {"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1475 {"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1476 {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tgei */
1477 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, 0, I2
},
1478 {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1479 {"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1480 {"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1481 {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tgeiu */
1482 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, 0, I2
},
1483 {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB
, 0, I1
},
1484 {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB
, 0, I1
},
1485 {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB
, 0, I1
},
1486 {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB
, 0, I1
},
1487 {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1488 {"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1489 {"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1490 {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tlti */
1491 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, 0, I2
},
1492 {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1493 {"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1494 {"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1495 {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tltiu */
1496 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, 0, I2
},
1497 {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1498 {"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1499 {"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1500 {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tnei */
1501 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, 0, I2
},
1502 {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
1503 {"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
1504 {"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
1505 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
1506 {"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD
, INSN_MACRO
, INSN2_M_FP_S
|INSN2_M_FP_D
, I1
},
1507 {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1508 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1509 {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
1510 {"uld", "t,o(b)", 0, (int) M_ULD
, INSN_MACRO
, 0, I3
},
1511 {"uld", "t,A(b)", 0, (int) M_ULD_A
, INSN_MACRO
, 0, I3
},
1512 {"ulh", "t,o(b)", 0, (int) M_ULH
, INSN_MACRO
, 0, I1
},
1513 {"ulh", "t,A(b)", 0, (int) M_ULH_A
, INSN_MACRO
, 0, I1
},
1514 {"ulhu", "t,o(b)", 0, (int) M_ULHU
, INSN_MACRO
, 0, I1
},
1515 {"ulhu", "t,A(b)", 0, (int) M_ULHU_A
, INSN_MACRO
, 0, I1
},
1516 {"ulw", "t,o(b)", 0, (int) M_ULW
, INSN_MACRO
, 0, I1
},
1517 {"ulw", "t,A(b)", 0, (int) M_ULW_A
, INSN_MACRO
, 0, I1
},
1518 {"usd", "t,o(b)", 0, (int) M_USD
, INSN_MACRO
, 0, I3
},
1519 {"usd", "t,A(b)", 0, (int) M_USD_A
, INSN_MACRO
, 0, I3
},
1520 {"ush", "t,o(b)", 0, (int) M_USH
, INSN_MACRO
, 0, I1
},
1521 {"ush", "t,A(b)", 0, (int) M_USH_A
, INSN_MACRO
, 0, I1
},
1522 {"usw", "t,o(b)", 0, (int) M_USW
, INSN_MACRO
, 0, I1
},
1523 {"usw", "t,A(b)", 0, (int) M_USW_A
, INSN_MACRO
, 0, I1
},
1524 {"v3mulu", "d,v,t", 0x70000011, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IOCT
},
1525 {"vmm0", "d,v,t", 0x70000010, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IOCT
},
1526 {"vmulu", "d,v,t", 0x7000000f, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, IOCT
},
1527 {"wach.ob", "Y", 0x7a00003e, 0xffff07ff, RD_S
|FP_D
, WR_MACC
, MX
|SB1
},
1528 {"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_S
, 0, N54
},
1529 {"wach.qh", "Y", 0x7a20003e, 0xffff07ff, RD_S
|FP_D
, WR_MACC
, MX
},
1530 {"wacl.ob", "Y,Z", 0x7800003e, 0xffe007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1531 {"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S
|RD_T
, 0, N54
},
1532 {"wacl.qh", "Y,Z", 0x7820003e, 0xffe007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1533 {"wait", "", 0x42000020, 0xffffffff, NODS
, 0, I3_32
},
1534 {"wait", "J", 0x42000020, 0xfe00003f, NODS
, 0, I32
|N55
},
1535 {"waiti", "", 0x42000020, 0xffffffff, NODS
, 0, L1
},
1536 {"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_t
, 0, I33
},
1537 {"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_d
|RD_t
, 0, I33
},
1538 {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1539 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, 0, I1
},
1540 {"xor", "D,S,T", 0x47800002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1541 {"xor", "D,S,T", 0x4b800002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1542 {"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1543 {"xor.ob", "D,S,T", 0x4ac0000d, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1544 {"xor.ob", "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1545 {"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1546 {"xor.qh", "X,Y,Q", 0x7820000d, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1547 {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1548 {"yield", "s", 0x7c000009, 0xfc1fffff, NODS
|RD_s
, 0, MT32
},
1549 {"yield", "d,s", 0x7c000009, 0xfc1f07ff, NODS
|WR_d
|RD_s
, 0, MT32
},
1550 {"zcb", "(b)", 0x7000071f, 0xfc1fffff, SM
|RD_b
, 0, IOCT2
},
1551 {"zcbt", "(b)", 0x7000075f, 0xfc1fffff, SM
|RD_b
, 0, IOCT2
},
1553 /* User Defined Instruction. */
1554 {"udi0", "s,t,d,+1",0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1555 {"udi0", "s,t,+2", 0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1556 {"udi0", "s,+3", 0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1557 {"udi0", "+4", 0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1558 {"udi1", "s,t,d,+1",0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1559 {"udi1", "s,t,+2", 0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1560 {"udi1", "s,+3", 0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1561 {"udi1", "+4", 0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1562 {"udi2", "s,t,d,+1",0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1563 {"udi2", "s,t,+2", 0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1564 {"udi2", "s,+3", 0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1565 {"udi2", "+4", 0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1566 {"udi3", "s,t,d,+1",0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1567 {"udi3", "s,t,+2", 0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1568 {"udi3", "s,+3", 0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1569 {"udi3", "+4", 0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1570 {"udi4", "s,t,d,+1",0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1571 {"udi4", "s,t,+2", 0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1572 {"udi4", "s,+3", 0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1573 {"udi4", "+4", 0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1574 {"udi5", "s,t,d,+1",0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1575 {"udi5", "s,t,+2", 0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1576 {"udi5", "s,+3", 0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1577 {"udi5", "+4", 0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1578 {"udi6", "s,t,d,+1",0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1579 {"udi6", "s,t,+2", 0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1580 {"udi6", "s,+3", 0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1581 {"udi6", "+4", 0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1582 {"udi7", "s,t,d,+1",0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1583 {"udi7", "s,t,+2", 0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1584 {"udi7", "s,+3", 0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1585 {"udi7", "+4", 0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1586 {"udi8", "s,t,d,+1",0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1587 {"udi8", "s,t,+2", 0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1588 {"udi8", "s,+3", 0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1589 {"udi8", "+4", 0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1590 {"udi9", "s,t,d,+1",0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1591 {"udi9", "s,t,+2", 0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1592 {"udi9", "s,+3", 0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1593 {"udi9", "+4", 0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1594 {"udi10", "s,t,d,+1",0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1595 {"udi10", "s,t,+2", 0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1596 {"udi10", "s,+3", 0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1597 {"udi10", "+4", 0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1598 {"udi11", "s,t,d,+1",0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1599 {"udi11", "s,t,+2", 0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1600 {"udi11", "s,+3", 0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1601 {"udi11", "+4", 0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1602 {"udi12", "s,t,d,+1",0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1603 {"udi12", "s,t,+2", 0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1604 {"udi12", "s,+3", 0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1605 {"udi12", "+4", 0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1606 {"udi13", "s,t,d,+1",0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1607 {"udi13", "s,t,+2", 0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1608 {"udi13", "s,+3", 0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1609 {"udi13", "+4", 0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1610 {"udi14", "s,t,d,+1",0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1611 {"udi14", "s,t,+2", 0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1612 {"udi14", "s,+3", 0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1613 {"udi14", "+4", 0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1614 {"udi15", "s,t,d,+1",0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1615 {"udi15", "s,t,+2", 0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1616 {"udi15", "s,+3", 0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1617 {"udi15", "+4", 0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1619 /* Coprocessor 2 move/branch operations overlap with VR5400 .ob format
1620 instructions so they are here for the latters to take precedence. */
1621 {"bc2f", "p", 0x49000000, 0xffff0000, CBD
|RD_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1622 {"bc2f", "N,p", 0x49000000, 0xffe30000, CBD
|RD_CC
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1623 {"bc2fl", "p", 0x49020000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
, IOCT
|IOCTP
|IOCT2
},
1624 {"bc2fl", "N,p", 0x49020000, 0xffe30000, CBL
|RD_CC
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1625 {"bc2t", "p", 0x49010000, 0xffff0000, CBD
|RD_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1626 {"bc2t", "N,p", 0x49010000, 0xffe30000, CBD
|RD_CC
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1627 {"bc2tl", "p", 0x49030000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
, IOCT
|IOCTP
|IOCT2
},
1628 {"bc2tl", "N,p", 0x49030000, 0xffe30000, CBL
|RD_CC
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1629 {"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1630 {"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1631 {"dmfc2", "t,i", 0x48200000, 0xffe00000, LCD
|WR_t
|RD_C2
, 0, IOCT
},
1632 {"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I3
, IOCT
|IOCTP
|IOCT2
},
1633 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD
|WR_t
|RD_C2
, 0, I64
, IOCT
|IOCTP
|IOCT2
},
1634 {"dmtc2", "t,i", 0x48a00000, 0xffe00000, COD
|RD_t
|WR_C2
|WR_CC
, 0, IOCT
},
1635 {"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, 0, I3
, IOCT
|IOCTP
|IOCT2
},
1636 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, 0, I64
, IOCT
|IOCTP
|IOCT2
},
1637 {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1638 {"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD
|WR_t
|RD_C2
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1639 {"mfhc2", "t,G", 0x48600000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I33
, IOCT
|IOCTP
|IOCT2
},
1640 {"mfhc2", "t,G,H", 0x48600000, 0xffe007f8, LCD
|WR_t
|RD_C2
, 0, I33
, IOCT
|IOCTP
|IOCT2
},
1641 {"mfhc2", "t,i", 0x48600000, 0xffe00000, LCD
|WR_t
|RD_C2
, 0, I33
, IOCT
|IOCTP
|IOCT2
},
1642 {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1643 {"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1644 {"mthc2", "t,G", 0x48e00000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, 0, I33
, IOCT
|IOCTP
|IOCT2
},
1645 {"mthc2", "t,G,H", 0x48e00000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, 0, I33
, IOCT
|IOCTP
|IOCT2
},
1646 {"mthc2", "t,i", 0x48e00000, 0xffe00000, COD
|RD_t
|WR_C2
|WR_CC
, 0, I33
, IOCT
|IOCTP
|IOCT2
},
1648 /* Coprocessor 3 move/branch operations overlap with MIPS IV COP1X
1649 instructions, so they are here for the latters to take precedence. */
1650 {"bc3f", "p", 0x4d000000, 0xffff0000, CBD
|RD_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1651 {"bc3fl", "p", 0x4d020000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
, IOCT
|IOCTP
|IOCT2
},
1652 {"bc3t", "p", 0x4d010000, 0xffff0000, CBD
|RD_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1653 {"bc3tl", "p", 0x4d030000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
, IOCT
|IOCTP
|IOCT2
},
1654 {"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD
|WR_t
|RD_C3
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1655 {"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD
|RD_t
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1656 {"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD
|WR_t
|RD_C3
, 0, I3
, IOCT
|IOCTP
|IOCT2
},
1657 {"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, 0, I3
, IOCT
|IOCTP
|IOCT2
},
1658 {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD
|WR_t
|RD_C3
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1659 {"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD
|WR_t
|RD_C3
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1660 {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1661 {"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD
|RD_t
|WR_C3
|WR_CC
, 0, I32
, IOCT
|IOCTP
|IOCT2
},
1663 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
1664 4010 any more, so move this insn out of the way. If the object
1665 format gave us more info, we could do this right. */
1666 {"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t
|RD_s
, 0, L1
},
1668 {"absq_s.ph", "d,t", 0x7c000252, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1669 {"absq_s.pw", "d,t", 0x7c000456, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1670 {"absq_s.qh", "d,t", 0x7c000256, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1671 {"absq_s.w", "d,t", 0x7c000452, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1672 {"addq.ph", "d,s,t", 0x7c000290, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1673 {"addq.pw", "d,s,t", 0x7c000494, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1674 {"addq.qh", "d,s,t", 0x7c000294, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1675 {"addq_s.ph", "d,s,t", 0x7c000390, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1676 {"addq_s.pw", "d,s,t", 0x7c000594, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1677 {"addq_s.qh", "d,s,t", 0x7c000394, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1678 {"addq_s.w", "d,s,t", 0x7c000590, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1679 {"addsc", "d,s,t", 0x7c000410, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1680 {"addu.ob", "d,s,t", 0x7c000014, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1681 {"addu.qb", "d,s,t", 0x7c000010, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1682 {"addu_s.ob", "d,s,t", 0x7c000114, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1683 {"addu_s.qb", "d,s,t", 0x7c000110, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1684 {"addwc", "d,s,t", 0x7c000450, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1685 {"bitrev", "d,t", 0x7c0006d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1686 {"bposge32", "p", 0x041c0000, 0xffff0000, CBD
, 0, D32
},
1687 {"bposge64", "p", 0x041d0000, 0xffff0000, CBD
, 0, D64
},
1688 {"cmp.eq.ph", "s,t", 0x7c000211, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1689 {"cmp.eq.pw", "s,t", 0x7c000415, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1690 {"cmp.eq.qh", "s,t", 0x7c000215, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1691 {"cmpgu.eq.ob", "d,s,t", 0x7c000115, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1692 {"cmpgu.eq.qb", "d,s,t", 0x7c000111, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1693 {"cmpgu.le.ob", "d,s,t", 0x7c000195, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1694 {"cmpgu.le.qb", "d,s,t", 0x7c000191, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1695 {"cmpgu.lt.ob", "d,s,t", 0x7c000155, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1696 {"cmpgu.lt.qb", "d,s,t", 0x7c000151, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1697 {"cmp.le.ph", "s,t", 0x7c000291, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1698 {"cmp.le.pw", "s,t", 0x7c000495, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1699 {"cmp.le.qh", "s,t", 0x7c000295, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1700 {"cmp.lt.ph", "s,t", 0x7c000251, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1701 {"cmp.lt.pw", "s,t", 0x7c000455, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1702 {"cmp.lt.qh", "s,t", 0x7c000255, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1703 {"cmpu.eq.ob", "s,t", 0x7c000015, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1704 {"cmpu.eq.qb", "s,t", 0x7c000011, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1705 {"cmpu.le.ob", "s,t", 0x7c000095, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1706 {"cmpu.le.qb", "s,t", 0x7c000091, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1707 {"cmpu.lt.ob", "s,t", 0x7c000055, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1708 {"cmpu.lt.qb", "s,t", 0x7c000051, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1709 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_t
|RD_a
|DSP_VOLA
, 0, D64
},
1710 {"dextpdpv", "t,7,s", 0x7c0002fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
|DSP_VOLA
, 0, D64
},
1711 {"dextp", "t,7,6", 0x7c0000bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1712 {"dextpv", "t,7,s", 0x7c0000fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1713 {"dextr.l", "t,7,6", 0x7c00043c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1714 {"dextr_r.l", "t,7,6", 0x7c00053c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1715 {"dextr_rs.l", "t,7,6", 0x7c0005bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1716 {"dextr_rs.w", "t,7,6", 0x7c0001bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1717 {"dextr_r.w", "t,7,6", 0x7c00013c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1718 {"dextr_s.h", "t,7,6", 0x7c0003bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1719 {"dextrv.l", "t,7,s", 0x7c00047c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1720 {"dextrv_r.l", "t,7,s", 0x7c00057c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1721 {"dextrv_rs.l", "t,7,s", 0x7c0005fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1722 {"dextrv_rs.w", "t,7,s", 0x7c0001fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1723 {"dextrv_r.w", "t,7,s", 0x7c00017c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1724 {"dextrv_s.h", "t,7,s", 0x7c0003fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1725 {"dextrv.w", "t,7,s", 0x7c00007c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1726 {"dextr.w", "t,7,6", 0x7c00003c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1727 {"dinsv", "t,s", 0x7c00000d, 0xfc00ffff, WR_t
|RD_s
, 0, D64
},
1728 {"dmadd", "7,s,t", 0x7c000674, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1729 {"dmaddu", "7,s,t", 0x7c000774, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1730 {"dmsub", "7,s,t", 0x7c0006f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1731 {"dmsubu", "7,s,t", 0x7c0007f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1732 {"dmthlip", "s,7", 0x7c0007fc, 0xfc1fe7ff, RD_s
|MOD_a
|DSP_VOLA
, 0, D64
},
1733 {"dpaq_sa.l.pw", "7,s,t", 0x7c000334, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1734 {"dpaq_sa.l.w", "7,s,t", 0x7c000330, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1735 {"dpaq_s.w.ph", "7,s,t", 0x7c000130, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1736 {"dpaq_s.w.qh", "7,s,t", 0x7c000134, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1737 {"dpau.h.obl", "7,s,t", 0x7c0000f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1738 {"dpau.h.obr", "7,s,t", 0x7c0001f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1739 {"dpau.h.qbl", "7,s,t", 0x7c0000f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1740 {"dpau.h.qbr", "7,s,t", 0x7c0001f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1741 {"dpsq_sa.l.pw", "7,s,t", 0x7c000374, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1742 {"dpsq_sa.l.w", "7,s,t", 0x7c000370, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1743 {"dpsq_s.w.ph", "7,s,t", 0x7c000170, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1744 {"dpsq_s.w.qh", "7,s,t", 0x7c000174, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1745 {"dpsu.h.obl", "7,s,t", 0x7c0002f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1746 {"dpsu.h.obr", "7,s,t", 0x7c0003f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1747 {"dpsu.h.qbl", "7,s,t", 0x7c0002f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1748 {"dpsu.h.qbr", "7,s,t", 0x7c0003f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1749 {"dshilo", "7,:", 0x7c0006bc, 0xfc07e7ff, MOD_a
, 0, D64
},
1750 {"dshilov", "7,s", 0x7c0006fc, 0xfc1fe7ff, MOD_a
|RD_s
, 0, D64
},
1751 {"extpdp", "t,7,6", 0x7c0002b8, 0xfc00e7ff, WR_t
|RD_a
|DSP_VOLA
, 0, D32
},
1752 {"extpdpv", "t,7,s", 0x7c0002f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
|DSP_VOLA
, 0, D32
},
1753 {"extp", "t,7,6", 0x7c0000b8, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1754 {"extpv", "t,7,s", 0x7c0000f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1755 {"extr_rs.w", "t,7,6", 0x7c0001b8, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1756 {"extr_r.w", "t,7,6", 0x7c000138, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1757 {"extr_s.h", "t,7,6", 0x7c0003b8, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1758 {"extrv_rs.w", "t,7,s", 0x7c0001f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1759 {"extrv_r.w", "t,7,s", 0x7c000178, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1760 {"extrv_s.h", "t,7,s", 0x7c0003f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1761 {"extrv.w", "t,7,s", 0x7c000078, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1762 {"extr.w", "t,7,6", 0x7c000038, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1763 {"insv", "t,s", 0x7c00000c, 0xfc00ffff, WR_t
|RD_s
, 0, D32
},
1764 /* lbux, ldx, lhx and lwx are the basic instruction section. */
1765 {"maq_sa.w.phl", "7,s,t", 0x7c000430, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1766 {"maq_sa.w.phr", "7,s,t", 0x7c0004b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1767 {"maq_sa.w.qhll", "7,s,t", 0x7c000434, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1768 {"maq_sa.w.qhlr", "7,s,t", 0x7c000474, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1769 {"maq_sa.w.qhrl", "7,s,t", 0x7c0004b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1770 {"maq_sa.w.qhrr", "7,s,t", 0x7c0004f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1771 {"maq_s.l.pwl", "7,s,t", 0x7c000734, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1772 {"maq_s.l.pwr", "7,s,t", 0x7c0007b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1773 {"maq_s.w.phl", "7,s,t", 0x7c000530, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1774 {"maq_s.w.phr", "7,s,t", 0x7c0005b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1775 {"maq_s.w.qhll", "7,s,t", 0x7c000534, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1776 {"maq_s.w.qhlr", "7,s,t", 0x7c000574, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1777 {"maq_s.w.qhrl", "7,s,t", 0x7c0005b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1778 {"maq_s.w.qhrr", "7,s,t", 0x7c0005f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1779 {"modsub", "d,s,t", 0x7c000490, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1780 {"mthlip", "s,7", 0x7c0007f8, 0xfc1fe7ff, RD_s
|MOD_a
|DSP_VOLA
, 0, D32
},
1781 {"muleq_s.pw.qhl", "d,s,t", 0x7c000714, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1782 {"muleq_s.pw.qhr", "d,s,t", 0x7c000754, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1783 {"muleq_s.w.phl", "d,s,t", 0x7c000710, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1784 {"muleq_s.w.phr", "d,s,t", 0x7c000750, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1785 {"muleu_s.ph.qbl", "d,s,t", 0x7c000190, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1786 {"muleu_s.ph.qbr", "d,s,t", 0x7c0001d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1787 {"muleu_s.qh.obl", "d,s,t", 0x7c000194, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1788 {"muleu_s.qh.obr", "d,s,t", 0x7c0001d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1789 {"mulq_rs.ph", "d,s,t", 0x7c0007d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1790 {"mulq_rs.qh", "d,s,t", 0x7c0007d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1791 {"mulsaq_s.l.pw", "7,s,t", 0x7c0003b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1792 {"mulsaq_s.w.ph", "7,s,t", 0x7c0001b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1793 {"mulsaq_s.w.qh", "7,s,t", 0x7c0001b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1794 {"packrl.ph", "d,s,t", 0x7c000391, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1795 {"packrl.pw", "d,s,t", 0x7c000395, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1796 {"pick.ob", "d,s,t", 0x7c0000d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1797 {"pick.ph", "d,s,t", 0x7c0002d1, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1798 {"pick.pw", "d,s,t", 0x7c0004d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1799 {"pick.qb", "d,s,t", 0x7c0000d1, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1800 {"pick.qh", "d,s,t", 0x7c0002d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1801 {"preceq.pw.qhla", "d,t", 0x7c000396, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1802 {"preceq.pw.qhl", "d,t", 0x7c000316, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1803 {"preceq.pw.qhra", "d,t", 0x7c0003d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1804 {"preceq.pw.qhr", "d,t", 0x7c000356, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1805 {"preceq.s.l.pwl", "d,t", 0x7c000516, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1806 {"preceq.s.l.pwr", "d,t", 0x7c000556, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1807 {"precequ.ph.qbla", "d,t", 0x7c000192, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1808 {"precequ.ph.qbl", "d,t", 0x7c000112, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1809 {"precequ.ph.qbra", "d,t", 0x7c0001d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1810 {"precequ.ph.qbr", "d,t", 0x7c000152, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1811 {"precequ.pw.qhla", "d,t", 0x7c000196, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1812 {"precequ.pw.qhl", "d,t", 0x7c000116, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1813 {"precequ.pw.qhra", "d,t", 0x7c0001d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1814 {"precequ.pw.qhr", "d,t", 0x7c000156, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1815 {"preceq.w.phl", "d,t", 0x7c000312, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1816 {"preceq.w.phr", "d,t", 0x7c000352, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1817 {"preceu.ph.qbla", "d,t", 0x7c000792, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1818 {"preceu.ph.qbl", "d,t", 0x7c000712, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1819 {"preceu.ph.qbra", "d,t", 0x7c0007d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1820 {"preceu.ph.qbr", "d,t", 0x7c000752, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1821 {"preceu.qh.obla", "d,t", 0x7c000796, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1822 {"preceu.qh.obl", "d,t", 0x7c000716, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1823 {"preceu.qh.obra", "d,t", 0x7c0007d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1824 {"preceu.qh.obr", "d,t", 0x7c000756, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1825 {"precrq.ob.qh", "d,s,t", 0x7c000315, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1826 {"precrq.ph.w", "d,s,t", 0x7c000511, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1827 {"precrq.pw.l", "d,s,t", 0x7c000715, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1828 {"precrq.qb.ph", "d,s,t", 0x7c000311, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1829 {"precrq.qh.pw", "d,s,t", 0x7c000515, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1830 {"precrq_rs.ph.w", "d,s,t", 0x7c000551, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1831 {"precrq_rs.qh.pw", "d,s,t", 0x7c000555, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1832 {"precrqu_s.ob.qh", "d,s,t", 0x7c0003d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1833 {"precrqu_s.qb.ph", "d,s,t", 0x7c0003d1, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1834 {"raddu.l.ob", "d,s", 0x7c000514, 0xfc1f07ff, WR_d
|RD_s
, 0, D64
},
1835 {"raddu.w.qb", "d,s", 0x7c000510, 0xfc1f07ff, WR_d
|RD_s
, 0, D32
},
1836 {"rddsp", "d", 0x7fff04b8, 0xffff07ff, WR_d
, 0, D32
},
1837 {"rddsp", "d,'", 0x7c0004b8, 0xffc007ff, WR_d
, 0, D32
},
1838 {"repl.ob", "d,5", 0x7c000096, 0xff0007ff, WR_d
, 0, D64
},
1839 {"repl.ph", "d,@", 0x7c000292, 0xfc0007ff, WR_d
, 0, D32
},
1840 {"repl.pw", "d,@", 0x7c000496, 0xfc0007ff, WR_d
, 0, D64
},
1841 {"repl.qb", "d,5", 0x7c000092, 0xff0007ff, WR_d
, 0, D32
},
1842 {"repl.qh", "d,@", 0x7c000296, 0xfc0007ff, WR_d
, 0, D64
},
1843 {"replv.ob", "d,t", 0x7c0000d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1844 {"replv.ph", "d,t", 0x7c0002d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1845 {"replv.pw", "d,t", 0x7c0004d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1846 {"replv.qb", "d,t", 0x7c0000d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1847 {"replv.qh", "d,t", 0x7c0002d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1848 {"shilo", "7,0", 0x7c0006b8, 0xfc0fe7ff, MOD_a
, 0, D32
},
1849 {"shilov", "7,s", 0x7c0006f8, 0xfc1fe7ff, MOD_a
|RD_s
, 0, D32
},
1850 {"shll.ob", "d,t,3", 0x7c000017, 0xff0007ff, WR_d
|RD_t
, 0, D64
},
1851 {"shll.ph", "d,t,4", 0x7c000213, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1852 {"shll.pw", "d,t,6", 0x7c000417, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1853 {"shll.qb", "d,t,3", 0x7c000013, 0xff0007ff, WR_d
|RD_t
, 0, D32
},
1854 {"shll.qh", "d,t,4", 0x7c000217, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1855 {"shll_s.ph", "d,t,4", 0x7c000313, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1856 {"shll_s.pw", "d,t,6", 0x7c000517, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1857 {"shll_s.qh", "d,t,4", 0x7c000317, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1858 {"shll_s.w", "d,t,6", 0x7c000513, 0xfc0007ff, WR_d
|RD_t
, 0, D32
},
1859 {"shllv.ob", "d,t,s", 0x7c000097, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1860 {"shllv.ph", "d,t,s", 0x7c000293, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1861 {"shllv.pw", "d,t,s", 0x7c000497, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1862 {"shllv.qb", "d,t,s", 0x7c000093, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1863 {"shllv.qh", "d,t,s", 0x7c000297, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1864 {"shllv_s.ph", "d,t,s", 0x7c000393, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1865 {"shllv_s.pw", "d,t,s", 0x7c000597, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1866 {"shllv_s.qh", "d,t,s", 0x7c000397, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1867 {"shllv_s.w", "d,t,s", 0x7c000593, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1868 {"shra.ph", "d,t,4", 0x7c000253, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1869 {"shra.pw", "d,t,6", 0x7c000457, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1870 {"shra.qh", "d,t,4", 0x7c000257, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1871 {"shra_r.ph", "d,t,4", 0x7c000353, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1872 {"shra_r.pw", "d,t,6", 0x7c000557, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1873 {"shra_r.qh", "d,t,4", 0x7c000357, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1874 {"shra_r.w", "d,t,6", 0x7c000553, 0xfc0007ff, WR_d
|RD_t
, 0, D32
},
1875 {"shrav.ph", "d,t,s", 0x7c0002d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1876 {"shrav.pw", "d,t,s", 0x7c0004d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1877 {"shrav.qh", "d,t,s", 0x7c0002d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1878 {"shrav_r.ph", "d,t,s", 0x7c0003d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1879 {"shrav_r.pw", "d,t,s", 0x7c0005d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1880 {"shrav_r.qh", "d,t,s", 0x7c0003d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1881 {"shrav_r.w", "d,t,s", 0x7c0005d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1882 {"shrl.ob", "d,t,3", 0x7c000057, 0xff0007ff, WR_d
|RD_t
, 0, D64
},
1883 {"shrl.qb", "d,t,3", 0x7c000053, 0xff0007ff, WR_d
|RD_t
, 0, D32
},
1884 {"shrlv.ob", "d,t,s", 0x7c0000d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1885 {"shrlv.qb", "d,t,s", 0x7c0000d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1886 {"subq.ph", "d,s,t", 0x7c0002d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1887 {"subq.pw", "d,s,t", 0x7c0004d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1888 {"subq.qh", "d,s,t", 0x7c0002d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1889 {"subq_s.ph", "d,s,t", 0x7c0003d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1890 {"subq_s.pw", "d,s,t", 0x7c0005d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1891 {"subq_s.qh", "d,s,t", 0x7c0003d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1892 {"subq_s.w", "d,s,t", 0x7c0005d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1893 {"subu.ob", "d,s,t", 0x7c000054, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1894 {"subu.qb", "d,s,t", 0x7c000050, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1895 {"subu_s.ob", "d,s,t", 0x7c000154, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1896 {"subu_s.qb", "d,s,t", 0x7c000150, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1897 {"wrdsp", "s", 0x7c1ffcf8, 0xfc1fffff, RD_s
|DSP_VOLA
, 0, D32
},
1898 {"wrdsp", "s,8", 0x7c0004f8, 0xfc1e07ff, RD_s
|DSP_VOLA
, 0, D32
},
1899 /* MIPS DSP ASE Rev2 */
1900 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_d
|RD_t
, 0, D33
},
1901 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1902 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1903 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1904 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1905 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1906 {"balign", "t,s,I", 0, (int) M_BALIGN
, INSN_MACRO
, 0, D33
},
1907 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1908 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1909 {"cmpgdu.lt.qb", "d,s,t", 0x7c000651, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1910 {"cmpgdu.le.qb", "d,s,t", 0x7c000691, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1911 {"dpa.w.ph", "7,s,t", 0x7c000030, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1912 {"dps.w.ph", "7,s,t", 0x7c000070, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1913 {"mul.ph", "d,s,t", 0x7c000318, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1914 {"mul_s.ph", "d,s,t", 0x7c000398, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1915 {"mulq_rs.w", "d,s,t", 0x7c0005d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1916 {"mulq_s.ph", "d,s,t", 0x7c000790, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1917 {"mulq_s.w", "d,s,t", 0x7c000598, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1918 {"mulsa.w.ph", "7,s,t", 0x7c0000b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1919 {"precr.qb.ph", "d,s,t", 0x7c000351, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1920 {"precr_sra.ph.w", "t,s,h", 0x7c000791, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1921 {"precr_sra_r.ph.w", "t,s,h", 0x7c0007d1, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1922 {"prepend", "t,s,h", 0x7c000071, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1923 {"shra.qb", "d,t,3", 0x7c000113, 0xff0007ff, WR_d
|RD_t
, 0, D33
},
1924 {"shra_r.qb", "d,t,3", 0x7c000153, 0xff0007ff, WR_d
|RD_t
, 0, D33
},
1925 {"shrav.qb", "d,t,s", 0x7c000193, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1926 {"shrav_r.qb", "d,t,s", 0x7c0001d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1927 {"shrl.ph", "d,t,4", 0x7c000653, 0xfe0007ff, WR_d
|RD_t
, 0, D33
},
1928 {"shrlv.ph", "d,t,s", 0x7c0006d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1929 {"subu.ph", "d,s,t", 0x7c000250, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1930 {"subu_s.ph", "d,s,t", 0x7c000350, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1931 {"subuh.qb", "d,s,t", 0x7c000058, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1932 {"subuh_r.qb", "d,s,t", 0x7c0000d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1933 {"addqh.ph", "d,s,t", 0x7c000218, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1934 {"addqh_r.ph", "d,s,t", 0x7c000298, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1935 {"addqh.w", "d,s,t", 0x7c000418, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1936 {"addqh_r.w", "d,s,t", 0x7c000498, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1937 {"subqh.ph", "d,s,t", 0x7c000258, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1938 {"subqh_r.ph", "d,s,t", 0x7c0002d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1939 {"subqh.w", "d,s,t", 0x7c000458, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1940 {"subqh_r.w", "d,s,t", 0x7c0004d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1941 {"dpax.w.ph", "7,s,t", 0x7c000230, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1942 {"dpsx.w.ph", "7,s,t", 0x7c000270, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1943 {"dpaqx_s.w.ph", "7,s,t", 0x7c000630, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1944 {"dpaqx_sa.w.ph", "7,s,t", 0x7c0006b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1945 {"dpsqx_s.w.ph", "7,s,t", 0x7c000670, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1946 {"dpsqx_sa.w.ph", "7,s,t", 0x7c0006f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1947 /* Move bc0* after mftr and mttr to avoid opcode collision. */
1948 {"bc0f", "p", 0x41000000, 0xffff0000, CBD
|RD_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1949 {"bc0fl", "p", 0x41020000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
, IOCT
|IOCTP
|IOCT2
},
1950 {"bc0t", "p", 0x41010000, 0xffff0000, CBD
|RD_CC
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
1951 {"bc0tl", "p", 0x41030000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
, IOCT
|IOCTP
|IOCT2
},
1952 /* ST Microelectronics Loongson-2E and -2F. */
1953 {"mult.g", "d,s,t", 0x7c000018, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1954 {"mult.g", "d,s,t", 0x70000010, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1955 {"gsmult", "d,s,t", 0x70000010, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1956 {"multu.g", "d,s,t", 0x7c000019, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1957 {"multu.g", "d,s,t", 0x70000012, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1958 {"gsmultu", "d,s,t", 0x70000012, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1959 {"dmult.g", "d,s,t", 0x7c00001c, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1960 {"dmult.g", "d,s,t", 0x70000011, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1961 {"gsdmult", "d,s,t", 0x70000011, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1962 {"dmultu.g", "d,s,t", 0x7c00001d, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1963 {"dmultu.g", "d,s,t", 0x70000013, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1964 {"gsdmultu", "d,s,t", 0x70000013, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1965 {"div.g", "d,s,t", 0x7c00001a, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1966 {"div.g", "d,s,t", 0x70000014, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1967 {"gsdiv", "d,s,t", 0x70000014, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1968 {"divu.g", "d,s,t", 0x7c00001b, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1969 {"divu.g", "d,s,t", 0x70000016, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1970 {"gsdivu", "d,s,t", 0x70000016, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1971 {"ddiv.g", "d,s,t", 0x7c00001e, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1972 {"ddiv.g", "d,s,t", 0x70000015, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1973 {"gsddiv", "d,s,t", 0x70000015, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1974 {"ddivu.g", "d,s,t", 0x7c00001f, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1975 {"ddivu.g", "d,s,t", 0x70000017, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1976 {"gsddivu", "d,s,t", 0x70000017, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1977 {"mod.g", "d,s,t", 0x7c000022, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1978 {"mod.g", "d,s,t", 0x7000001c, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1979 {"gsmod", "d,s,t", 0x7000001c, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1980 {"modu.g", "d,s,t", 0x7c000023, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1981 {"modu.g", "d,s,t", 0x7000001e, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1982 {"gsmodu", "d,s,t", 0x7000001e, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1983 {"dmod.g", "d,s,t", 0x7c000026, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1984 {"dmod.g", "d,s,t", 0x7000001d, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1985 {"gsdmod", "d,s,t", 0x7000001d, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1986 {"dmodu.g", "d,s,t", 0x7c000027, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2E
},
1987 {"dmodu.g", "d,s,t", 0x7000001f, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL2F
},
1988 {"gsdmodu", "d,s,t", 0x7000001f, 0xfc0007ff, RD_s
|RD_t
|WR_d
, 0, IL3A
},
1989 {"packsshb", "D,S,T", 0x47400002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1990 {"packsshb", "D,S,T", 0x4b400002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1991 {"packsswh", "D,S,T", 0x47200002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1992 {"packsswh", "D,S,T", 0x4b200002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1993 {"packushb", "D,S,T", 0x47600002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1994 {"packushb", "D,S,T", 0x4b600002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1995 {"paddb", "D,S,T", 0x47c00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1996 {"paddb", "D,S,T", 0x4bc00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1997 {"paddh", "D,S,T", 0x47400000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
1998 {"paddh", "D,S,T", 0x4b400000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
1999 {"paddw", "D,S,T", 0x47600000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2000 {"paddw", "D,S,T", 0x4b600000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2001 {"paddd", "D,S,T", 0x47e00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2002 {"paddd", "D,S,T", 0x4be00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2003 {"paddsb", "D,S,T", 0x47800000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2004 {"paddsb", "D,S,T", 0x4b800000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2005 {"paddsh", "D,S,T", 0x47000000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2006 {"paddsh", "D,S,T", 0x4b000000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2007 {"paddusb", "D,S,T", 0x47a00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2008 {"paddusb", "D,S,T", 0x4ba00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2009 {"paddush", "D,S,T", 0x47200000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2010 {"paddush", "D,S,T", 0x4b200000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2011 {"pandn", "D,S,T", 0x47e00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2012 {"pandn", "D,S,T", 0x4be00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2013 {"pavgb", "D,S,T", 0x46600000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2014 {"pavgb", "D,S,T", 0x4b200008, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2015 {"pavgh", "D,S,T", 0x46400000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2016 {"pavgh", "D,S,T", 0x4b000008, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2017 {"pcmpeqb", "D,S,T", 0x46c00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2018 {"pcmpeqb", "D,S,T", 0x4b800009, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2019 {"pcmpeqh", "D,S,T", 0x46800001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2020 {"pcmpeqh", "D,S,T", 0x4b400009, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2021 {"pcmpeqw", "D,S,T", 0x46400001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2022 {"pcmpeqw", "D,S,T", 0x4b000009, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2023 {"pcmpgtb", "D,S,T", 0x46e00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2024 {"pcmpgtb", "D,S,T", 0x4ba00009, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2025 {"pcmpgth", "D,S,T", 0x46a00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2026 {"pcmpgth", "D,S,T", 0x4b600009, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2027 {"pcmpgtw", "D,S,T", 0x46600001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2028 {"pcmpgtw", "D,S,T", 0x4b200009, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2029 {"pextrh", "D,S,T", 0x45c00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2030 {"pextrh", "D,S,T", 0x4b40000e, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2031 {"pinsrh_0", "D,S,T", 0x47800003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2032 {"pinsrh_0", "D,S,T", 0x4b800003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2033 {"pinsrh_1", "D,S,T", 0x47a00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2034 {"pinsrh_1", "D,S,T", 0x4ba00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2035 {"pinsrh_2", "D,S,T", 0x47c00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2036 {"pinsrh_2", "D,S,T", 0x4bc00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2037 {"pinsrh_3", "D,S,T", 0x47e00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2038 {"pinsrh_3", "D,S,T", 0x4be00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2039 {"pmaddhw", "D,S,T", 0x45e00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2040 {"pmaddhw", "D,S,T", 0x4b60000e, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2041 {"pmaxsh", "D,S,T", 0x46800000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2042 {"pmaxsh", "D,S,T", 0x4b400008, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2043 {"pmaxub", "D,S,T", 0x46c00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2044 {"pmaxub", "D,S,T", 0x4b800008, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2045 {"pminsh", "D,S,T", 0x46a00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2046 {"pminsh", "D,S,T", 0x4b600008, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2047 {"pminub", "D,S,T", 0x46e00000, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2048 {"pminub", "D,S,T", 0x4ba00008, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2049 {"pmovmskb", "D,S", 0x46a00005, 0xffff003f, RD_S
|WR_D
|FP_D
, 0, IL2E
},
2050 {"pmovmskb", "D,S", 0x4ba0000f, 0xffff003f, RD_S
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2051 {"pmulhuh", "D,S,T", 0x46e00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2052 {"pmulhuh", "D,S,T", 0x4ba0000a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2053 {"pmulhh", "D,S,T", 0x46a00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2054 {"pmulhh", "D,S,T", 0x4b60000a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2055 {"pmullh", "D,S,T", 0x46800002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2056 {"pmullh", "D,S,T", 0x4b40000a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2057 {"pmuluw", "D,S,T", 0x46c00002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2058 {"pmuluw", "D,S,T", 0x4b80000a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2059 {"pasubub", "D,S,T", 0x45a00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2060 {"pasubub", "D,S,T", 0x4b20000d, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2061 {"biadd", "D,S", 0x46800005, 0xffff003f, RD_S
|WR_D
|FP_D
, 0, IL2E
},
2062 {"biadd", "D,S", 0x4b80000f, 0xffff003f, RD_S
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2063 {"pshufh", "D,S,T", 0x47000002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2064 {"pshufh", "D,S,T", 0x4b000002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2065 {"psllh", "D,S,T", 0x46600002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2066 {"psllh", "D,S,T", 0x4b20000a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2067 {"psllw", "D,S,T", 0x46400002, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2068 {"psllw", "D,S,T", 0x4b00000a, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2069 {"psrah", "D,S,T", 0x46a00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2070 {"psrah", "D,S,T", 0x4b60000b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2071 {"psraw", "D,S,T", 0x46800003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2072 {"psraw", "D,S,T", 0x4b40000b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2073 {"psrlh", "D,S,T", 0x46600003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2074 {"psrlh", "D,S,T", 0x4b20000b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2075 {"psrlw", "D,S,T", 0x46400003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2076 {"psrlw", "D,S,T", 0x4b00000b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2077 {"psubb", "D,S,T", 0x47c00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2078 {"psubb", "D,S,T", 0x4bc00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2079 {"psubh", "D,S,T", 0x47400001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2080 {"psubh", "D,S,T", 0x4b400001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2081 {"psubw", "D,S,T", 0x47600001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2082 {"psubw", "D,S,T", 0x4b600001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2083 {"psubd", "D,S,T", 0x47e00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2084 {"psubd", "D,S,T", 0x4be00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2085 {"psubsb", "D,S,T", 0x47800001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2086 {"psubsb", "D,S,T", 0x4b800001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2087 {"psubsh", "D,S,T", 0x47000001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2088 {"psubsh", "D,S,T", 0x4b000001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2089 {"psubusb", "D,S,T", 0x47a00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2090 {"psubusb", "D,S,T", 0x4ba00001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2091 {"psubush", "D,S,T", 0x47200001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2092 {"psubush", "D,S,T", 0x4b200001, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2093 {"punpckhbh", "D,S,T", 0x47600003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2094 {"punpckhbh", "D,S,T", 0x4b600003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2095 {"punpckhhw", "D,S,T", 0x47200003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2096 {"punpckhhw", "D,S,T", 0x4b200003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2097 {"punpckhwd", "D,S,T", 0x46e00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2098 {"punpckhwd", "D,S,T", 0x4ba0000b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2099 {"punpcklbh", "D,S,T", 0x47400003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2100 {"punpcklbh", "D,S,T", 0x4b400003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2101 {"punpcklhw", "D,S,T", 0x47000003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2102 {"punpcklhw", "D,S,T", 0x4b000003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2103 {"punpcklwd", "D,S,T", 0x46c00003, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2E
},
2104 {"punpcklwd", "D,S,T", 0x4b80000b, 0xffe0003f, RD_S
|RD_T
|WR_D
|FP_D
, 0, IL2F
|IL3A
},
2105 {"sequ", "S,T", 0x46800032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2E
},
2106 {"sequ", "S,T", 0x4b80000c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, IL2F
|IL3A
},
2107 /* No hazard protection on coprocessor instructions--they shouldn't
2108 change the state of the processor and if they do it's up to the
2109 user to put in nops as necessary. These are at the end so that the
2110 disassembler recognizes more specific versions first. */
2111 {"c0", "C", 0x42000000, 0xfe000000, CP
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
2112 {"c1", "C", 0x46000000, 0xfe000000, FP_S
, 0, I1
},
2113 {"c2", "C", 0x4a000000, 0xfe000000, CP
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
2114 {"c3", "C", 0x4e000000, 0xfe000000, CP
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
2115 {"cop0", "C", 0, (int) M_COP0
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
2116 {"cop1", "C", 0, (int) M_COP1
, INSN_MACRO
, INSN2_M_FP_S
, I1
},
2117 {"cop2", "C", 0, (int) M_COP2
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
2118 {"cop3", "C", 0, (int) M_COP3
, INSN_MACRO
, 0, I1
, IOCT
|IOCTP
|IOCT2
},
2121 #define MIPS_NUM_OPCODES \
2122 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
2123 const int bfd_mips_num_builtin_opcodes
= MIPS_NUM_OPCODES
;
2125 /* const removed from the following to allow for dynamic extensions to the
2126 * built-in instruction set. */
2127 struct mips_opcode
*mips_opcodes
=
2128 (struct mips_opcode
*) mips_builtin_opcodes
;
2129 int bfd_mips_num_opcodes
= MIPS_NUM_OPCODES
;
2130 #undef MIPS_NUM_OPCODES
