sim/h8500/inst.h

   1 #define DEBUG
   2
   3 #define H8500_MSIZE (8*64*1024)
   4 #define CSIZE 1000
   5
   6
   7 union rtype
   8     {
   9       unsigned long l;
  10       unsigned short s[2];
  11       unsigned char *c;
  12     };
  13
  14
  15 /* Local register names */
  16 typedef enum
  17 {
  18   R0, R1, R2, R3, R4, R5, R6, R7,
  19   R_SR,                         /* 8 */
  20   R_PC,                         /* 9 */
  21   R_BR,                         /* 10 */
  22   R_BP,                         /* 11 */
  23   R_CP,                         /* 14 */
  24   R_DP,                         /* 13 */
  25   R_EP,                         /* 12 */
  26   R_TP,                         /* 15 */
  27   R_HARD_0,                     /* 16 */
  28   R_HARD8_0,                    /* 17 */
  29   R_LAST,
  30 } reg_type;
  31
  32
  33
  34
  35 typedef struct
  36 {
  37   fastref type;
  38   union
  39     {
  40       int code;
  41       unsigned char *bptr;
  42       unsigned short *wptr;
  43       unsigned long *lptr;
  44       unsigned char **segptr;
  45       union rtype *rptr;
  46
  47     }
  48   reg;
  49   int literal;
  50   union
  51     {
  52       unsigned char **segreg;
  53       unsigned short *wptr;
  54       union rtype *rptr;
  55     }
  56   r2;
  57 }
  58
  59 ea_type;
  60
  61
  62
  63 typedef struct
  64 {
  65   ea_type srca;
  66   ea_type srcb;
  67   ea_type dst;
  68   fastref opcode;
  69   fastref flags;
  70   int next_pc;
  71   int oldpc;
  72   int cycles;
  73 #ifdef DEBUG
  74   h8500_opcode_info *op;
  75 #endif
  76 }
  77
  78 decoded_inst;
  79
  80
  81
  82 typedef struct
  83 {
  84   int exception;
  85   union rtype   regs[20];
  86
  87
  88
  89   unsigned char *memory;
  90   unsigned short *cache_idx;
  91   int cache_top;
  92   int maximum;
  93   int csize;
  94   decoded_inst *cache;
  95   int cycles;
  96   int insts;
  97   int ticks;
  98   int compiles;
  99 }
 100
 101 cpu_state_type;