| blob | a5063246689932384f713f667b8b3d132ee48bbf |
1 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
3 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
4 * Makefile.in: Don't delete *.igen when cleaning directory.
6 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
8 * m16.igen (break): Call SignalException not sim_engine_halt.
10 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
12 From Jason Eckhardt:
13 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
15 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
17 * mips.igen (MxC1, DMxC1): Fix printf formatting.
19 2000-05-24 Michael Hayes <mhayes@cygnus.com>
21 * mips.igen (do_dmultx): Fix typo.
23 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
25 * configure: Regenerated to track ../common/aclocal.m4 changes.
27 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
29 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
31 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
33 * sim-main.h (GPR_CLEAR): Define macro.
35 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
37 * interp.c (decode_coproc): Output long using %lx and not %s.
39 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
41 * interp.c (sim_open): Sort & extend dummy memory regions for
42 --board=jmr3904 for eCos.
44 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
46 * configure: Regenerated.
48 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
50 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
51 calls, conditional on the simulator being in verbose mode.
53 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
55 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
56 cache don't get ReservedInstruction traps.
58 1999-11-29 Mark Salter <msalter@cygnus.com>
60 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
61 to clear status bits in sdisr register. This is how the hardware works.
63 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
64 being used by cygmon.
66 1999-11-11 Andrew Haley <aph@cygnus.com>
68 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
69 instructions.
71 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
73 * mips.igen (MULT): Correct previous mis-applied patch.
75 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
77 * mips.igen (delayslot32): Handle sequence like
78 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
79 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
80 (MULT): Actually pass the third register...
82 1999-09-03 Mark Salter <msalter@cygnus.com>
84 * interp.c (sim_open): Added more memory aliases for additional
85 hardware being touched by cygmon on jmr3904 board.
87 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
89 * configure: Regenerated to track ../common/aclocal.m4 changes.
91 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
93 * interp.c (sim_store_register): Handle case where client - GDB -
94 specifies that a 4 byte register is 8 bytes in size.
95 (sim_fetch_register): Ditto.
97 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
99 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
100 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
101 (idt_monitor_base): Base address for IDT monitor traps.
102 (pmon_monitor_base): Ditto for PMON.
103 (lsipmon_monitor_base): Ditto for LSI PMON.
104 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
105 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
106 (sim_firmware_command): New function.
107 (mips_option_handler): Call it for OPTION_FIRMWARE.
108 (sim_open): Allocate memory for idt_monitor region. If "--board"
109 option was given, add no monitor by default. Add BREAK hooks only if
110 monitors are also there.
112 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
114 * interp.c (sim_monitor): Flush output before reading input.
116 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
118 * tconfig.in (SIM_HANDLES_LMA): Always define.
120 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
122 From Mark Salter <msalter@cygnus.com>:
123 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
124 (sim_open): Add setup for BSP board.
126 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
128 * mips.igen (MULT, MULTU): Add syntax for two operand version.
129 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
130 them as unimplemented.
132 1999-05-08 Felix Lee <flee@cygnus.com>
134 * configure: Regenerated to track ../common/aclocal.m4 changes.
136 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
138 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
140 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
142 * configure.in: Any mips64vr5*-*-* target should have
143 -DTARGET_ENABLE_FR=1.
144 (default_endian): Any mips64vr*el-*-* target should default to
145 LITTLE_ENDIAN.
146 * configure: Re-generate.
148 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
150 * mips.igen (ldl): Extend from _16_, not 32.
152 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
154 * interp.c (sim_store_register): Force registers written to by GDB
155 into an un-interpreted state.
157 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
159 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
160 CPU, start periodic background I/O polls.
161 (tx3904sio_poll): New function: periodic I/O poller.
163 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
165 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
167 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
169 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
170 case statement.
172 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
174 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
175 (load_word): Call SIM_CORE_SIGNAL hook on error.
176 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
177 starting. For exception dispatching, pass PC instead of NULL_CIA.
178 (decode_coproc): Use COP0_BADVADDR to store faulting address.
179 * sim-main.h (COP0_BADVADDR): Define.
180 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
181 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
182 (_sim_cpu): Add exc_* fields to store register value snapshots.
183 * mips.igen (*): Replace memory-related SignalException* calls
184 with references to SIM_CORE_SIGNAL hook.
186 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
187 fix.
188 * sim-main.c (*): Minor warning cleanups.
190 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
192 * m16.igen (DADDIU5): Correct type-o.
194 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
196 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
197 variables.
199 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
201 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
202 to include path.
203 (interp.o): Add dependency on itable.h
204 (oengine.c, gencode): Delete remaining references.
205 (BUILT_SRC_FROM_GEN): Clean up.
207 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
209 * vr4run.c: New.
210 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
211 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
212 tmp-run-hack) : New.
213 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
214 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
215 Drop the "64" qualifier to get the HACK generator working.
216 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
217 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
218 qualifier to get the hack generator working.
219 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
220 (DSLL): Use do_dsll.
221 (DSLLV): Use do_dsllv.
222 (DSRA): Use do_dsra.
223 (DSRL): Use do_dsrl.
224 (DSRLV): Use do_dsrlv.
225 (BC1): Move *vr4100 to get the HACK generator working.
226 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
227 get the HACK generator working.
228 (MACC) Rename to get the HACK generator working.
229 (DMACC,MACCS,DMACCS): Add the 64.
231 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
233 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
234 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
236 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
238 * mips/interp.c (DEBUG): Cleanups.
240 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
242 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
243 (tx3904sio_tickle): fflush after a stdout character output.
245 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
247 * interp.c (sim_close): Uninstall modules.
249 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
251 * sim-main.h, interp.c (sim_monitor): Change to global
252 function.
254 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
256 * configure.in (vr4100): Only include vr4100 instructions in
257 simulator.
258 * configure: Re-generate.
259 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
261 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
263 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
264 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
265 true alternative.
267 * configure.in (sim_default_gen, sim_use_gen): Replace with
268 sim_gen.
269 (--enable-sim-igen): Delete config option. Always using IGEN.
270 * configure: Re-generate.
272 * Makefile.in (gencode): Kill, kill, kill.
273 * gencode.c: Ditto.
275 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
277 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
278 bit mips16 igen simulator.
279 * configure: Re-generate.
281 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
282 as part of vr4100 ISA.
283 * vr.igen: Mark all instructions as 64 bit only.
285 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
287 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
288 Pacify GCC.
290 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
292 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
293 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
294 * configure: Re-generate.
296 * m16.igen (BREAK): Define breakpoint instruction.
297 (JALX32): Mark instruction as mips16 and not r3900.
298 * mips.igen (C.cond.fmt): Fix typo in instruction format.
300 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
302 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
304 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
305 insn as a debug breakpoint.
307 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
308 pending.slot_size.
309 (PENDING_SCHED): Clean up trace statement.
310 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
311 (PENDING_FILL): Delay write by only one cycle.
312 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
314 * sim-main.c (pending_tick): Clean up trace statements. Add trace
315 of pending writes.
316 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
317 32 & 64.
318 (pending_tick): Move incrementing of index to FOR statement.
319 (pending_tick): Only update PENDING_OUT after a write has occured.
321 * configure.in: Add explicit mips-lsi-* target. Use gencode to
322 build simulator.
323 * configure: Re-generate.
325 * interp.c (sim_engine_run OLD): Delete explicit call to
326 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
328 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
330 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
331 interrupt level number to match changed SignalExceptionInterrupt
332 macro.
334 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
336 * interp.c: #include "itable.h" if WITH_IGEN.
337 (get_insn_name): New function.
338 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
339 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
341 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
343 * configure: Rebuilt to inhale new common/aclocal.m4.
345 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
347 * dv-tx3904sio.c: Include sim-assert.h.
349 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
351 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
352 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
353 Reorganize target-specific sim-hardware checks.
354 * configure: rebuilt.
355 * interp.c (sim_open): For tx39 target boards, set
356 OPERATING_ENVIRONMENT, add tx3904sio devices.
357 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
358 ROM executables. Install dv-sockser into sim-modules list.
360 * dv-tx3904irc.c: Compiler warning clean-up.
361 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
362 frequent hw-trace messages.
364 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
366 * vr.igen (MulAcc): Identify as a vr4100 specific function.
368 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
370 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
372 * vr.igen: New file.
373 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
374 * mips.igen: Define vr4100 model. Include vr.igen.
375 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
377 * mips.igen (check_mf_hilo): Correct check.
379 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
381 * sim-main.h (interrupt_event): Add prototype.
383 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
384 register_ptr, register_value.
385 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
387 * sim-main.h (tracefh): Make extern.
389 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
391 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
392 Reduce unnecessarily high timer event frequency.
393 * dv-tx3904cpu.c: Ditto for interrupt event.
395 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
397 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
398 to allay warnings.
399 (interrupt_event): Made non-static.
401 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
402 interchange of configuration values for external vs. internal
403 clock dividers.
405 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
407 * mips.igen (BREAK): Moved code to here for
408 simulator-reserved break instructions.
409 * gencode.c (build_instruction): Ditto.
410 * interp.c (signal_exception): Code moved from here. Non-
411 reserved instructions now use exception vector, rather
412 than halting sim.
413 * sim-main.h: Moved magic constants to here.
415 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
417 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
418 register upon non-zero interrupt event level, clear upon zero
419 event value.
420 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
421 by passing zero event value.
422 (*_io_{read,write}_buffer): Endianness fixes.
423 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
424 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
426 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
427 serial I/O and timer module at base address 0xFFFF0000.
429 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
431 * mips.igen (SWC1) : Correct the handling of ReverseEndian
432 and BigEndianCPU.
434 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
436 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
437 parts.
438 * configure: Update.
440 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
442 * dv-tx3904tmr.c: New file - implements tx3904 timer.
443 * dv-tx3904{irc,cpu}.c: Mild reformatting.
444 * configure.in: Include tx3904tmr in hw_device list.
445 * configure: Rebuilt.
446 * interp.c (sim_open): Instantiate three timer instances.
447 Fix address typo of tx3904irc instance.
449 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
451 * interp.c (signal_exception): SystemCall exception now uses
452 the exception vector.
454 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
456 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
457 to allay warnings.
459 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
461 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
463 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
465 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
467 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
468 sim-main.h. Declare a struct hw_descriptor instead of struct
469 hw_device_descriptor.
471 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
473 * mips.igen (do_store_left, do_load_left): Compute nr of left and
474 right bits and then re-align left hand bytes to correct byte
475 lanes. Fix incorrect computation in do_store_left when loading
476 bytes from second word.
478 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
480 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
481 * interp.c (sim_open): Only create a device tree when HW is
482 enabled.
484 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
485 * interp.c (signal_exception): Ditto.
487 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
489 * gencode.c: Mark BEGEZALL as LIKELY.
491 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
493 * sim-main.h (ALU32_END): Sign extend 32 bit results.
494 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
496 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
498 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
499 modules. Recognize TX39 target with "mips*tx39" pattern.
500 * configure: Rebuilt.
501 * sim-main.h (*): Added many macros defining bits in
502 TX39 control registers.
503 (SignalInterrupt): Send actual PC instead of NULL.
504 (SignalNMIReset): New exception type.
505 * interp.c (board): New variable for future use to identify
506 a particular board being simulated.
507 (mips_option_handler,mips_options): Added "--board" option.
508 (interrupt_event): Send actual PC.
509 (sim_open): Make memory layout conditional on board setting.
510 (signal_exception): Initial implementation of hardware interrupt
511 handling. Accept another break instruction variant for simulator
512 exit.
513 (decode_coproc): Implement RFE instruction for TX39.
514 (mips.igen): Decode RFE instruction as such.
515 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
516 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
517 bbegin to implement memory map.
518 * dv-tx3904cpu.c: New file.
519 * dv-tx3904irc.c: New file.
521 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
523 * mips.igen (check_mt_hilo): Create a separate r3900 version.
525 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
527 * tx.igen (madd,maddu): Replace calls to check_op_hilo
528 with calls to check_div_hilo.
530 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
532 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
533 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
534 Add special r3900 version of do_mult_hilo.
535 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
536 with calls to check_mult_hilo.
537 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
538 with calls to check_div_hilo.
540 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
542 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
543 Document a replacement.
545 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
547 * interp.c (sim_monitor): Make mon_printf work.
549 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
551 * sim-main.h (INSN_NAME): New arg `cpu'.
553 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
555 * configure: Regenerated to track ../common/aclocal.m4 changes.
557 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
559 * configure: Regenerated to track ../common/aclocal.m4 changes.
560 * config.in: Ditto.
562 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
564 * acconfig.h: New file.
565 * configure.in: Reverted change of Apr 24; use sinclude again.
567 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
569 * configure: Regenerated to track ../common/aclocal.m4 changes.
570 * config.in: Ditto.
572 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
574 * configure.in: Don't call sinclude.
576 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
578 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
580 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
582 * mips.igen (ERET): Implement.
584 * interp.c (decode_coproc): Return sign-extended EPC.
586 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
588 * interp.c (signal_exception): Do not ignore Trap.
589 (signal_exception): On TRAP, restart at exception address.
590 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
591 (signal_exception): Update.
592 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
593 so that TRAP instructions are caught.
595 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
597 * sim-main.h (struct hilo_access, struct hilo_history): Define,
598 contains HI/LO access history.
599 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
600 (HIACCESS, LOACCESS): Delete, replace with
601 (HIHISTORY, LOHISTORY): New macros.
602 (CHECKHILO): Delete all, moved to mips.igen
604 * gencode.c (build_instruction): Do not generate checks for
605 correct HI/LO register usage.
607 * interp.c (old_engine_run): Delete checks for correct HI/LO
608 register usage.
610 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
611 check_mf_cycles): New functions.
612 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
613 do_divu, domultx, do_mult, do_multu): Use.
615 * tx.igen ("madd", "maddu"): Use.
617 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
619 * mips.igen (DSRAV): Use function do_dsrav.
620 (SRAV): Use new function do_srav.
622 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
623 (B): Sign extend 11 bit immediate.
624 (EXT-B*): Shift 16 bit immediate left by 1.
625 (ADDIU*): Don't sign extend immediate value.
627 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
629 * m16run.c (sim_engine_run): Restore CIA after handling an event.
631 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
632 functions.
634 * mips.igen (delayslot32, nullify_next_insn): New functions.
635 (m16.igen): Always include.
636 (do_*): Add more tracing.
638 * m16.igen (delayslot16): Add NIA argument, could be called by a
639 32 bit MIPS16 instruction.
641 * interp.c (ifetch16): Move function from here.
642 * sim-main.c (ifetch16): To here.
644 * sim-main.c (ifetch16, ifetch32): Update to match current
645 implementations of LH, LW.
646 (signal_exception): Don't print out incorrect hex value of illegal
647 instruction.
649 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
651 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
652 instruction.
654 * m16.igen: Implement MIPS16 instructions.
656 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
657 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
658 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
659 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
660 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
661 bodies of corresponding code from 32 bit insn to these. Also used
662 by MIPS16 versions of functions.
664 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
665 (IMEM16): Drop NR argument from macro.
667 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
669 * Makefile.in (SIM_OBJS): Add sim-main.o.
671 * sim-main.h (address_translation, load_memory, store_memory,
672 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
673 as INLINE_SIM_MAIN.
674 (pr_addr, pr_uword64): Declare.
675 (sim-main.c): Include when H_REVEALS_MODULE_P.
677 * interp.c (address_translation, load_memory, store_memory,
678 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
679 from here.
680 * sim-main.c: To here. Fix compilation problems.
682 * configure.in: Enable inlining.
683 * configure: Re-config.
685 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
687 * configure: Regenerated to track ../common/aclocal.m4 changes.
689 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
691 * mips.igen: Include tx.igen.
692 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
693 * tx.igen: New file, contains MADD and MADDU.
695 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
696 the hardwired constant `7'.
697 (store_memory): Ditto.
698 (LOADDRMASK): Move definition to sim-main.h.
700 mips.igen (MTC0): Enable for r3900.
701 (ADDU): Add trace.
703 mips.igen (do_load_byte): Delete.
704 (do_load, do_store, do_load_left, do_load_write, do_store_left,
705 do_store_right): New functions.
706 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
708 configure.in: Let the tx39 use igen again.
709 configure: Update.
711 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
713 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
714 not an address sized quantity. Return zero for cache sizes.
716 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
718 * mips.igen (r3900): r3900 does not support 64 bit integer
719 operations.
721 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
723 * configure.in (mipstx39*-*-*): Use gencode simulator rather
724 than igen one.
725 * configure : Rebuild.
727 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
729 * configure: Regenerated to track ../common/aclocal.m4 changes.
731 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
733 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
735 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
737 * configure: Regenerated to track ../common/aclocal.m4 changes.
738 * config.in: Regenerated to track ../common/aclocal.m4 changes.
740 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
742 * configure: Regenerated to track ../common/aclocal.m4 changes.
744 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
746 * interp.c (Max, Min): Comment out functions. Not yet used.
748 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
750 * configure: Regenerated to track ../common/aclocal.m4 changes.
752 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
754 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
755 configurable settings for stand-alone simulator.
757 * configure.in: Added X11 search, just in case.
759 * configure: Regenerated.
761 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
763 * interp.c (sim_write, sim_read, load_memory, store_memory):
764 Replace sim_core_*_map with read_map, write_map, exec_map resp.
766 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
768 * sim-main.h (GETFCC): Return an unsigned value.
770 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
772 * mips.igen (DIV): Fix check for -1 / MIN_INT.
773 (DADD): Result destination is RD not RT.
775 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
777 * sim-main.h (HIACCESS, LOACCESS): Always define.
779 * mdmx.igen (Maxi, Mini): Rename Max, Min.
781 * interp.c (sim_info): Delete.
783 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
785 * interp.c (DECLARE_OPTION_HANDLER): Use it.
786 (mips_option_handler): New argument `cpu'.
787 (sim_open): Update call to sim_add_option_table.
789 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
791 * mips.igen (CxC1): Add tracing.
793 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
795 * sim-main.h (Max, Min): Declare.
797 * interp.c (Max, Min): New functions.
799 * mips.igen (BC1): Add tracing.
801 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
803 * interp.c Added memory map for stack in vr4100
805 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
807 * interp.c (load_memory): Add missing "break"'s.
809 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
811 * interp.c (sim_store_register, sim_fetch_register): Pass in
812 length parameter. Return -1.
814 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
816 * interp.c: Added hardware init hook, fixed warnings.
818 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
820 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
822 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
824 * interp.c (ifetch16): New function.
826 * sim-main.h (IMEM32): Rename IMEM.
827 (IMEM16_IMMED): Define.
828 (IMEM16): Define.
829 (DELAY_SLOT): Update.
831 * m16run.c (sim_engine_run): New file.
833 * m16.igen: All instructions except LB.
834 (LB): Call do_load_byte.
835 * mips.igen (do_load_byte): New function.
836 (LB): Call do_load_byte.
838 * mips.igen: Move spec for insn bit size and high bit from here.
839 * Makefile.in (tmp-igen, tmp-m16): To here.
841 * m16.dc: New file, decode mips16 instructions.
843 * Makefile.in (SIM_NO_ALL): Define.
844 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
846 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
848 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
849 point unit to 32 bit registers.
850 * configure: Re-generate.
852 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
854 * configure.in (sim_use_gen): Make IGEN the default simulator
855 generator for generic 32 and 64 bit mips targets.
856 * configure: Re-generate.
858 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
860 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
861 bitsize.
863 * interp.c (sim_fetch_register, sim_store_register): Read/write
864 FGR from correct location.
865 (sim_open): Set size of FGR's according to
866 WITH_TARGET_FLOATING_POINT_BITSIZE.
868 * sim-main.h (FGR): Store floating point registers in a separate
869 array.
871 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
873 * configure: Regenerated to track ../common/aclocal.m4 changes.
875 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
877 * interp.c (ColdReset): Call PENDING_INVALIDATE.
879 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
881 * interp.c (pending_tick): New function. Deliver pending writes.
883 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
884 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
885 it can handle mixed sized quantites and single bits.
887 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
889 * interp.c (oengine.h): Do not include when building with IGEN.
890 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
891 (sim_info): Ditto for PROCESSOR_64BIT.
892 (sim_monitor): Replace ut_reg with unsigned_word.
893 (*): Ditto for t_reg.
894 (LOADDRMASK): Define.
895 (sim_open): Remove defunct check that host FP is IEEE compliant,
896 using software to emulate floating point.
897 (value_fpr, ...): Always compile, was conditional on HASFPU.
899 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
901 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
902 size.
904 * interp.c (SD, CPU): Define.
905 (mips_option_handler): Set flags in each CPU.
906 (interrupt_event): Assume CPU 0 is the one being iterrupted.
907 (sim_close): Do not clear STATE, deleted anyway.
908 (sim_write, sim_read): Assume CPU zero's vm should be used for
909 data transfers.
910 (sim_create_inferior): Set the PC for all processors.
911 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
912 argument.
913 (mips16_entry): Pass correct nr of args to store_word, load_word.
914 (ColdReset): Cold reset all cpu's.
915 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
916 (sim_monitor, load_memory, store_memory, signal_exception): Use
917 `CPU' instead of STATE_CPU.
920 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
921 SD or CPU_.
923 * sim-main.h (signal_exception): Add sim_cpu arg.
924 (SignalException*): Pass both SD and CPU to signal_exception.
925 * interp.c (signal_exception): Update.
927 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
928 Ditto
929 (sync_operation, prefetch, cache_op, store_memory, load_memory,
930 address_translation): Ditto
931 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
933 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
935 * configure: Regenerated to track ../common/aclocal.m4 changes.
937 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
939 * interp.c (sim_engine_run): Add `nr_cpus' argument.
941 * mips.igen (model): Map processor names onto BFD name.
943 * sim-main.h (CPU_CIA): Delete.
944 (SET_CIA, GET_CIA): Define
946 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
948 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
949 regiser.
951 * configure.in (default_endian): Configure a big-endian simulator
952 by default.
953 * configure: Re-generate.
955 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
957 * configure: Regenerated to track ../common/aclocal.m4 changes.
959 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
961 * interp.c (sim_monitor): Handle Densan monitor outbyte
962 and inbyte functions.
964 1997-12-29 Felix Lee <flee@cygnus.com>
966 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
968 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
970 * Makefile.in (tmp-igen): Arrange for $zero to always be
971 reset to zero after every instruction.
973 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
975 * configure: Regenerated to track ../common/aclocal.m4 changes.
976 * config.in: Ditto.
978 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
980 * mips.igen (MSUB): Fix to work like MADD.
981 * gencode.c (MSUB): Similarly.
983 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
985 * configure: Regenerated to track ../common/aclocal.m4 changes.
987 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
989 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
991 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
993 * sim-main.h (sim-fpu.h): Include.
995 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
996 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
997 using host independant sim_fpu module.
999 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1001 * interp.c (signal_exception): Report internal errors with SIGABRT
1002 not SIGQUIT.
1004 * sim-main.h (C0_CONFIG): New register.
1005 (signal.h): No longer include.
1007 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1009 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1011 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1013 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1015 * mips.igen: Tag vr5000 instructions.
1016 (ANDI): Was missing mipsIV model, fix assembler syntax.
1017 (do_c_cond_fmt): New function.
1018 (C.cond.fmt): Handle mips I-III which do not support CC field
1019 separatly.
1020 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1021 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1022 in IV3.2 spec.
1023 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1024 vr5000 which saves LO in a GPR separatly.
1026 * configure.in (enable-sim-igen): For vr5000, select vr5000
1027 specific instructions.
1028 * configure: Re-generate.
1030 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1032 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1034 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1035 fmt_uninterpreted_64 bit cases to switch. Convert to
1036 fmt_formatted,
1038 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1040 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1041 as specified in IV3.2 spec.
1042 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1044 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1046 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1047 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1048 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1049 PENDING_FILL versions of instructions. Simplify.
1050 (X): New function.
1051 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1052 instructions.
1053 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1054 a signed value.
1055 (MTHI, MFHI): Disable code checking HI-LO.
1057 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1058 global.
1059 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1061 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1063 * gencode.c (build_mips16_operands): Replace IPC with cia.
1065 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1066 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1067 IPC to `cia'.
1068 (UndefinedResult): Replace function with macro/function
1069 combination.
1070 (sim_engine_run): Don't save PC in IPC.
1072 * sim-main.h (IPC): Delete.
1075 * interp.c (signal_exception, store_word, load_word,
1076 address_translation, load_memory, store_memory, cache_op,
1077 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1078 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1079 current instruction address - cia - argument.
1080 (sim_read, sim_write): Call address_translation directly.
1081 (sim_engine_run): Rename variable vaddr to cia.
1082 (signal_exception): Pass cia to sim_monitor
1084 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1085 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1086 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1088 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1089 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1090 SIM_ASSERT.
1092 * interp.c (signal_exception): Pass restart address to
1093 sim_engine_restart.
1095 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1096 idecode.o): Add dependency.
1098 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1099 Delete definitions
1100 (DELAY_SLOT): Update NIA not PC with branch address.
1101 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1103 * mips.igen: Use CIA not PC in branch calculations.
1104 (illegal): Call SignalException.
1105 (BEQ, ADDIU): Fix assembler.
1107 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1109 * m16.igen (JALX): Was missing.
1111 * configure.in (enable-sim-igen): New configuration option.
1112 * configure: Re-generate.
1114 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1116 * interp.c (load_memory, store_memory): Delete parameter RAW.
1117 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1118 bypassing {load,store}_memory.
1120 * sim-main.h (ByteSwapMem): Delete definition.
1122 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1124 * interp.c (sim_do_command, sim_commands): Delete mips specific
1125 commands. Handled by module sim-options.
1127 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1128 (WITH_MODULO_MEMORY): Define.
1130 * interp.c (sim_info): Delete code printing memory size.
1132 * interp.c (mips_size): Nee sim_size, delete function.
1133 (power2): Delete.
1134 (monitor, monitor_base, monitor_size): Delete global variables.
1135 (sim_open, sim_close): Delete code creating monitor and other
1136 memory regions. Use sim-memopts module, via sim_do_commandf, to
1137 manage memory regions.
1138 (load_memory, store_memory): Use sim-core for memory model.
1140 * interp.c (address_translation): Delete all memory map code
1141 except line forcing 32 bit addresses.
1143 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1145 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1146 trace options.
1148 * interp.c (logfh, logfile): Delete globals.
1149 (sim_open, sim_close): Delete code opening & closing log file.
1150 (mips_option_handler): Delete -l and -n options.
1151 (OPTION mips_options): Ditto.
1153 * interp.c (OPTION mips_options): Rename option trace to dinero.
1154 (mips_option_handler): Update.
1156 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1158 * interp.c (fetch_str): New function.
1159 (sim_monitor): Rewrite using sim_read & sim_write.
1160 (sim_open): Check magic number.
1161 (sim_open): Write monitor vectors into memory using sim_write.
1162 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1163 (sim_read, sim_write): Simplify - transfer data one byte at a
1164 time.
1165 (load_memory, store_memory): Clarify meaning of parameter RAW.
1167 * sim-main.h (isHOST): Defete definition.
1168 (isTARGET): Mark as depreciated.
1169 (address_translation): Delete parameter HOST.
1171 * interp.c (address_translation): Delete parameter HOST.
1173 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1175 * mips.igen:
1177 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1178 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1180 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1182 * mips.igen: Add model filter field to records.
1184 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1186 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1188 interp.c (sim_engine_run): Do not compile function sim_engine_run
1189 when WITH_IGEN == 1.
1191 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1192 target architecture.
1194 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1195 igen. Replace with configuration variables sim_igen_flags /
1196 sim_m16_flags.
1198 * m16.igen: New file. Copy mips16 insns here.
1199 * mips.igen: From here.
1201 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1203 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1204 to top.
1205 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1207 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1209 * gencode.c (build_instruction): Follow sim_write's lead in using
1210 BigEndianMem instead of !ByteSwapMem.
1212 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1214 * configure.in (sim_gen): Dependent on target, select type of
1215 generator. Always select old style generator.
1217 configure: Re-generate.
1219 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1220 targets.
1221 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1222 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1223 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1224 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1225 SIM_@sim_gen@_*, set by autoconf.
1227 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1229 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1231 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1232 CURRENT_FLOATING_POINT instead.
1234 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1235 (address_translation): Raise exception InstructionFetch when
1236 translation fails and isINSTRUCTION.
1238 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1239 sim_engine_run): Change type of of vaddr and paddr to
1240 address_word.
1241 (address_translation, prefetch, load_memory, store_memory,
1242 cache_op): Change type of vAddr and pAddr to address_word.
1244 * gencode.c (build_instruction): Change type of vaddr and paddr to
1245 address_word.
1247 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1249 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1250 macro to obtain result of ALU op.
1252 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1254 * interp.c (sim_info): Call profile_print.
1256 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1258 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1260 * sim-main.h (WITH_PROFILE): Do not define, defined in
1261 common/sim-config.h. Use sim-profile module.
1262 (simPROFILE): Delete defintion.
1264 * interp.c (PROFILE): Delete definition.
1265 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1266 (sim_close): Delete code writing profile histogram.
1267 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1268 Delete.
1269 (sim_engine_run): Delete code profiling the PC.
1271 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1273 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1275 * interp.c (sim_monitor): Make register pointers of type
1276 unsigned_word*.
1278 * sim-main.h: Make registers of type unsigned_word not
1279 signed_word.
1281 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1283 * interp.c (sync_operation): Rename from SyncOperation, make
1284 global, add SD argument.
1285 (prefetch): Rename from Prefetch, make global, add SD argument.
1286 (decode_coproc): Make global.
1288 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1290 * gencode.c (build_instruction): Generate DecodeCoproc not
1291 decode_coproc calls.
1293 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1294 (SizeFGR): Move to sim-main.h
1295 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1296 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1297 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1298 sim-main.h.
1299 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1300 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1301 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1302 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1303 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1304 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1306 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1307 exception.
1308 (sim-alu.h): Include.
1309 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1310 (sim_cia): Typedef to instruction_address.
1312 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1314 * Makefile.in (interp.o): Rename generated file engine.c to
1315 oengine.c.
1317 * interp.c: Update.
1319 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1321 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1323 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1325 * gencode.c (build_instruction): For "FPSQRT", output correct
1326 number of arguments to Recip.
1328 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1330 * Makefile.in (interp.o): Depends on sim-main.h
1332 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1334 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1335 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1336 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1337 STATE, DSSTATE): Define
1338 (GPR, FGRIDX, ..): Define.
1340 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1341 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1342 (GPR, FGRIDX, ...): Delete macros.
1344 * interp.c: Update names to match defines from sim-main.h
1346 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1348 * interp.c (sim_monitor): Add SD argument.
1349 (sim_warning): Delete. Replace calls with calls to
1350 sim_io_eprintf.
1351 (sim_error): Delete. Replace calls with sim_io_error.
1352 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1353 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1354 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1355 argument.
1356 (mips_size): Rename from sim_size. Add SD argument.
1358 * interp.c (simulator): Delete global variable.
1359 (callback): Delete global variable.
1360 (mips_option_handler, sim_open, sim_write, sim_read,
1361 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1362 sim_size,sim_monitor): Use sim_io_* not callback->*.
1363 (sim_open): ZALLOC simulator struct.
1364 (PROFILE): Do not define.
1366 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1368 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1369 support.h with corresponding code.
1371 * sim-main.h (word64, uword64), support.h: Move definition to
1372 sim-main.h.
1373 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1375 * support.h: Delete
1376 * Makefile.in: Update dependencies
1377 * interp.c: Do not include.
1379 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1381 * interp.c (address_translation, load_memory, store_memory,
1382 cache_op): Rename to from AddressTranslation et.al., make global,
1383 add SD argument
1385 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1386 CacheOp): Define.
1388 * interp.c (SignalException): Rename to signal_exception, make
1389 global.
1391 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1393 * sim-main.h (SignalException, SignalExceptionInterrupt,
1394 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1395 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1396 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1397 Define.
1399 * interp.c, support.h: Use.
1401 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1403 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1404 to value_fpr / store_fpr. Add SD argument.
1405 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1406 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1408 * sim-main.h (ValueFPR, StoreFPR): Define.
1410 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1412 * interp.c (sim_engine_run): Check consistency between configure
1413 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1414 and HASFPU.
1416 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1417 (mips_fpu): Configure WITH_FLOATING_POINT.
1418 (mips_endian): Configure WITH_TARGET_ENDIAN.
1419 * configure: Update.
1421 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1423 * configure: Regenerated to track ../common/aclocal.m4 changes.
1425 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1427 * configure: Regenerated.
1429 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1431 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1433 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1435 * gencode.c (print_igen_insn_models): Assume certain architectures
1436 include all mips* instructions.
1437 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1438 instruction.
1440 * Makefile.in (tmp.igen): Add target. Generate igen input from
1441 gencode file.
1443 * gencode.c (FEATURE_IGEN): Define.
1444 (main): Add --igen option. Generate output in igen format.
1445 (process_instructions): Format output according to igen option.
1446 (print_igen_insn_format): New function.
1447 (print_igen_insn_models): New function.
1448 (process_instructions): Only issue warnings and ignore
1449 instructions when no FEATURE_IGEN.
1451 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1453 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1454 MIPS targets.
1456 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1458 * configure: Regenerated to track ../common/aclocal.m4 changes.
1460 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1462 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1463 SIM_RESERVED_BITS): Delete, moved to common.
1464 (SIM_EXTRA_CFLAGS): Update.
1466 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1468 * configure.in: Configure non-strict memory alignment.
1469 * configure: Regenerated to track ../common/aclocal.m4 changes.
1471 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1473 * configure: Regenerated to track ../common/aclocal.m4 changes.
1475 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1477 * gencode.c (SDBBP,DERET): Added (3900) insns.
1478 (RFE): Turn on for 3900.
1479 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1480 (dsstate): Made global.
1481 (SUBTARGET_R3900): Added.
1482 (CANCELDELAYSLOT): New.
1483 (SignalException): Ignore SystemCall rather than ignore and
1484 terminate. Add DebugBreakPoint handling.
1485 (decode_coproc): New insns RFE, DERET; and new registers Debug
1486 and DEPC protected by SUBTARGET_R3900.
1487 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1488 bits explicitly.
1489 * Makefile.in,configure.in: Add mips subtarget option.
1490 * configure: Update.
1492 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1494 * gencode.c: Add r3900 (tx39).
1497 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1499 * gencode.c (build_instruction): Don't need to subtract 4 for
1500 JALR, just 2.
1502 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1504 * interp.c: Correct some HASFPU problems.
1506 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1508 * configure: Regenerated to track ../common/aclocal.m4 changes.
1510 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1512 * interp.c (mips_options): Fix samples option short form, should
1513 be `x'.
1515 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1517 * interp.c (sim_info): Enable info code. Was just returning.
1519 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1521 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1522 MFC0.
1524 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1526 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1527 constants.
1528 (build_instruction): Ditto for LL.
1530 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1532 * configure: Regenerated to track ../common/aclocal.m4 changes.
1534 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1536 * configure: Regenerated to track ../common/aclocal.m4 changes.
1537 * config.in: Ditto.
1539 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1541 * interp.c (sim_open): Add call to sim_analyze_program, update
1542 call to sim_config.
1544 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1546 * interp.c (sim_kill): Delete.
1547 (sim_create_inferior): Add ABFD argument. Set PC from same.
1548 (sim_load): Move code initializing trap handlers from here.
1549 (sim_open): To here.
1550 (sim_load): Delete, use sim-hload.c.
1552 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1554 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1556 * configure: Regenerated to track ../common/aclocal.m4 changes.
1557 * config.in: Ditto.
1559 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1561 * interp.c (sim_open): Add ABFD argument.
1562 (sim_load): Move call to sim_config from here.
1563 (sim_open): To here. Check return status.
1565 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1567 * gencode.c (build_instruction): Two arg MADD should
1568 not assign result to $0.
1570 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1572 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1573 * sim/mips/configure.in: Regenerate.
1575 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1577 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1578 signed8, unsigned8 et.al. types.
1580 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1581 hosts when selecting subreg.
1583 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1585 * interp.c (sim_engine_run): Reset the ZERO register to zero
1586 regardless of FEATURE_WARN_ZERO.
1587 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1589 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1591 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1592 (SignalException): For BreakPoints ignore any mode bits and just
1593 save the PC.
1594 (SignalException): Always set the CAUSE register.
1596 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1598 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1599 exception has been taken.
1601 * interp.c: Implement the ERET and mt/f sr instructions.
1603 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1605 * interp.c (SignalException): Don't bother restarting an
1606 interrupt.
1608 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1610 * interp.c (SignalException): Really take an interrupt.
1611 (interrupt_event): Only deliver interrupts when enabled.
1613 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1615 * interp.c (sim_info): Only print info when verbose.
1616 (sim_info) Use sim_io_printf for output.
1618 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1620 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1621 mips architectures.
1623 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1625 * interp.c (sim_do_command): Check for common commands if a
1626 simulator specific command fails.
1628 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1630 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1631 and simBE when DEBUG is defined.
1633 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1635 * interp.c (interrupt_event): New function. Pass exception event
1636 onto exception handler.
1638 * configure.in: Check for stdlib.h.
1639 * configure: Regenerate.
1641 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1642 variable declaration.
1643 (build_instruction): Initialize memval1.
1644 (build_instruction): Add UNUSED attribute to byte, bigend,
1645 reverse.
1646 (build_operands): Ditto.
1648 * interp.c: Fix GCC warnings.
1649 (sim_get_quit_code): Delete.
1651 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1652 * Makefile.in: Ditto.
1653 * configure: Re-generate.
1655 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1657 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1659 * interp.c (mips_option_handler): New function parse argumes using
1660 sim-options.
1661 (myname): Replace with STATE_MY_NAME.
1662 (sim_open): Delete check for host endianness - performed by
1663 sim_config.
1664 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1665 (sim_open): Move much of the initialization from here.
1666 (sim_load): To here. After the image has been loaded and
1667 endianness set.
1668 (sim_open): Move ColdReset from here.
1669 (sim_create_inferior): To here.
1670 (sim_open): Make FP check less dependant on host endianness.
1672 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1673 run.
1674 * interp.c (sim_set_callbacks): Delete.
1676 * interp.c (membank, membank_base, membank_size): Replace with
1677 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1678 (sim_open): Remove call to callback->init. gdb/run do this.
1680 * interp.c: Update
1682 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1684 * interp.c (big_endian_p): Delete, replaced by
1685 current_target_byte_order.
1687 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1689 * interp.c (host_read_long, host_read_word, host_swap_word,
1690 host_swap_long): Delete. Using common sim-endian.
1691 (sim_fetch_register, sim_store_register): Use H2T.
1692 (pipeline_ticks): Delete. Handled by sim-events.
1693 (sim_info): Update.
1694 (sim_engine_run): Update.
1696 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1698 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1699 reason from here.
1700 (SignalException): To here. Signal using sim_engine_halt.
1701 (sim_stop_reason): Delete, moved to common.
1703 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1705 * interp.c (sim_open): Add callback argument.
1706 (sim_set_callbacks): Delete SIM_DESC argument.
1707 (sim_size): Ditto.
1709 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1711 * Makefile.in (SIM_OBJS): Add common modules.
1713 * interp.c (sim_set_callbacks): Also set SD callback.
1714 (set_endianness, xfer_*, swap_*): Delete.
1715 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1716 Change to functions using sim-endian macros.
1717 (control_c, sim_stop): Delete, use common version.
1718 (simulate): Convert into.
1719 (sim_engine_run): This function.
1720 (sim_resume): Delete.
1722 * interp.c (simulation): New variable - the simulator object.
1723 (sim_kind): Delete global - merged into simulation.
1724 (sim_load): Cleanup. Move PC assignment from here.
1725 (sim_create_inferior): To here.
1727 * sim-main.h: New file.
1728 * interp.c (sim-main.h): Include.
1730 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1732 * configure: Regenerated to track ../common/aclocal.m4 changes.
1734 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1736 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1738 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1740 * gencode.c (build_instruction): DIV instructions: check
1741 for division by zero and integer overflow before using
1742 host's division operation.
1744 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1746 * Makefile.in (SIM_OBJS): Add sim-load.o.
1747 * interp.c: #include bfd.h.
1748 (target_byte_order): Delete.
1749 (sim_kind, myname, big_endian_p): New static locals.
1750 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1751 after argument parsing. Recognize -E arg, set endianness accordingly.
1752 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1753 load file into simulator. Set PC from bfd.
1754 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1755 (set_endianness): Use big_endian_p instead of target_byte_order.
1757 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1759 * interp.c (sim_size): Delete prototype - conflicts with
1760 definition in remote-sim.h. Correct definition.
1762 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1764 * configure: Regenerated to track ../common/aclocal.m4 changes.
1765 * config.in: Ditto.
1767 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1769 * interp.c (sim_open): New arg `kind'.
1771 * configure: Regenerated to track ../common/aclocal.m4 changes.
1773 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1775 * configure: Regenerated to track ../common/aclocal.m4 changes.
1777 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1779 * interp.c (sim_open): Set optind to 0 before calling getopt.
1781 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1783 * configure: Regenerated to track ../common/aclocal.m4 changes.
1785 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1787 * interp.c : Replace uses of pr_addr with pr_uword64
1788 where the bit length is always 64 independent of SIM_ADDR.
1789 (pr_uword64) : added.
1791 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1793 * configure: Re-generate.
1795 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1797 * configure: Regenerate to track ../common/aclocal.m4 changes.
1799 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1801 * interp.c (sim_open): New SIM_DESC result. Argument is now
1802 in argv form.
1803 (other sim_*): New SIM_DESC argument.
1805 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1807 * interp.c: Fix printing of addresses for non-64-bit targets.
1808 (pr_addr): Add function to print address based on size.
1810 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1812 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1814 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1816 * gencode.c (build_mips16_operands): Correct computation of base
1817 address for extended PC relative instruction.
1819 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1821 * interp.c (mips16_entry): Add support for floating point cases.
1822 (SignalException): Pass floating point cases to mips16_entry.
1823 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1824 registers.
1825 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1826 or fmt_word.
1827 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1828 and then set the state to fmt_uninterpreted.
1829 (COP_SW): Temporarily set the state to fmt_word while calling
1830 ValueFPR.
1832 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1834 * gencode.c (build_instruction): The high order may be set in the
1835 comparison flags at any ISA level, not just ISA 4.
1837 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1839 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1840 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1841 * configure.in: sinclude ../common/aclocal.m4.
1842 * configure: Regenerated.
1844 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1846 * configure: Rebuild after change to aclocal.m4.
1848 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1850 * configure configure.in Makefile.in: Update to new configure
1851 scheme which is more compatible with WinGDB builds.
1852 * configure.in: Improve comment on how to run autoconf.
1853 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1854 * Makefile.in: Use autoconf substitution to install common
1855 makefile fragment.
1857 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1859 * gencode.c (build_instruction): Use BigEndianCPU instead of
1860 ByteSwapMem.
1862 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1864 * interp.c (sim_monitor): Make output to stdout visible in
1865 wingdb's I/O log window.
1867 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1869 * support.h: Undo previous change to SIGTRAP
1870 and SIGQUIT values.
1872 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1874 * interp.c (store_word, load_word): New static functions.
1875 (mips16_entry): New static function.
1876 (SignalException): Look for mips16 entry and exit instructions.
1877 (simulate): Use the correct index when setting fpr_state after
1878 doing a pending move.
1880 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1882 * interp.c: Fix byte-swapping code throughout to work on
1883 both little- and big-endian hosts.
1885 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1887 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1888 with gdb/config/i386/xm-windows.h.
1890 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1892 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1893 that messes up arithmetic shifts.
1895 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1897 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1898 SIGTRAP and SIGQUIT for _WIN32.
1900 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1902 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1903 force a 64 bit multiplication.
1904 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1905 destination register is 0, since that is the default mips16 nop
1906 instruction.
1908 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1910 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1911 (build_endian_shift): Don't check proc64.
1912 (build_instruction): Always set memval to uword64. Cast op2 to
1913 uword64 when shifting it left in memory instructions. Always use
1914 the same code for stores--don't special case proc64.
1916 * gencode.c (build_mips16_operands): Fix base PC value for PC
1917 relative operands.
1918 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1919 jal instruction.
1920 * interp.c (simJALDELAYSLOT): Define.
1921 (JALDELAYSLOT): Define.
1922 (INDELAYSLOT, INJALDELAYSLOT): Define.
1923 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1925 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1927 * interp.c (sim_open): add flush_cache as a PMON routine
1928 (sim_monitor): handle flush_cache by ignoring it
1930 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1932 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1933 BigEndianMem.
1934 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1935 (BigEndianMem): Rename to ByteSwapMem and change sense.
1936 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1937 BigEndianMem references to !ByteSwapMem.
1938 (set_endianness): New function, with prototype.
1939 (sim_open): Call set_endianness.
1940 (sim_info): Use simBE instead of BigEndianMem.
1941 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1942 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1943 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1944 ifdefs, keeping the prototype declaration.
1945 (swap_word): Rewrite correctly.
1946 (ColdReset): Delete references to CONFIG. Delete endianness related
1947 code; moved to set_endianness.
1949 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1951 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1952 * interp.c (CHECKHILO): Define away.
1953 (simSIGINT): New macro.
1954 (membank_size): Increase from 1MB to 2MB.
1955 (control_c): New function.
1956 (sim_resume): Rename parameter signal to signal_number. Add local
1957 variable prev. Call signal before and after simulate.
1958 (sim_stop_reason): Add simSIGINT support.
1959 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1960 functions always.
1961 (sim_warning): Delete call to SignalException. Do call printf_filtered
1962 if logfh is NULL.
1963 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1964 a call to sim_warning.
1966 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1968 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1969 16 bit instructions.
1971 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1973 Add support for mips16 (16 bit MIPS implementation):
1974 * gencode.c (inst_type): Add mips16 instruction encoding types.
1975 (GETDATASIZEINSN): Define.
1976 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1977 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1978 mtlo.
1979 (MIPS16_DECODE): New table, for mips16 instructions.
1980 (bitmap_val): New static function.
1981 (struct mips16_op): Define.
1982 (mips16_op_table): New table, for mips16 operands.
1983 (build_mips16_operands): New static function.
1984 (process_instructions): If PC is odd, decode a mips16
1985 instruction. Break out instruction handling into new
1986 build_instruction function.
1987 (build_instruction): New static function, broken out of
1988 process_instructions. Check modifiers rather than flags for SHIFT
1989 bit count and m[ft]{hi,lo} direction.
1990 (usage): Pass program name to fprintf.
1991 (main): Remove unused variable this_option_optind. Change
1992 ``*loptarg++'' to ``loptarg++''.
1993 (my_strtoul): Parenthesize && within ||.
1994 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1995 (simulate): If PC is odd, fetch a 16 bit instruction, and
1996 increment PC by 2 rather than 4.
1997 * configure.in: Add case for mips16*-*-*.
1998 * configure: Rebuild.
2000 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2002 * interp.c: Allow -t to enable tracing in standalone simulator.
2003 Fix garbage output in trace file and error messages.
2005 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2007 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2008 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2009 * configure.in: Simplify using macros in ../common/aclocal.m4.
2010 * configure: Regenerated.
2011 * tconfig.in: New file.
2013 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2015 * interp.c: Fix bugs in 64-bit port.
2016 Use ansi function declarations for msvc compiler.
2017 Initialize and test file pointer in trace code.
2018 Prevent duplicate definition of LAST_EMED_REGNUM.
2020 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2022 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2024 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2026 * interp.c (SignalException): Check for explicit terminating
2027 breakpoint value.
2028 * gencode.c: Pass instruction value through SignalException()
2029 calls for Trap, Breakpoint and Syscall.
2031 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2033 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2034 only used on those hosts that provide it.
2035 * configure.in: Add sqrt() to list of functions to be checked for.
2036 * config.in: Re-generated.
2037 * configure: Re-generated.
2039 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2041 * gencode.c (process_instructions): Call build_endian_shift when
2042 expanding STORE RIGHT, to fix swr.
2043 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2044 clear the high bits.
2045 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2046 Fix float to int conversions to produce signed values.
2048 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2050 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2051 (process_instructions): Correct handling of nor instruction.
2052 Correct shift count for 32 bit shift instructions. Correct sign
2053 extension for arithmetic shifts to not shift the number of bits in
2054 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2055 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2056 Fix madd.
2057 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2058 It's OK to have a mult follow a mult. What's not OK is to have a
2059 mult follow an mfhi.
2060 (Convert): Comment out incorrect rounding code.
2062 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2064 * interp.c (sim_monitor): Improved monitor printf
2065 simulation. Tidied up simulator warnings, and added "--log" option
2066 for directing warning message output.
2067 * gencode.c: Use sim_warning() rather than WARNING macro.
2069 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2071 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2072 getopt1.o, rather than on gencode.c. Link objects together.
2073 Don't link against -liberty.
2074 (gencode.o, getopt.o, getopt1.o): New targets.
2075 * gencode.c: Include <ctype.h> and "ansidecl.h".
2076 (AND): Undefine after including "ansidecl.h".
2077 (ULONG_MAX): Define if not defined.
2078 (OP_*): Don't define macros; now defined in opcode/mips.h.
2079 (main): Call my_strtoul rather than strtoul.
2080 (my_strtoul): New static function.
2082 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2084 * gencode.c (process_instructions): Generate word64 and uword64
2085 instead of `long long' and `unsigned long long' data types.
2086 * interp.c: #include sysdep.h to get signals, and define default
2087 for SIGBUS.
2088 * (Convert): Work around for Visual-C++ compiler bug with type
2089 conversion.
2090 * support.h: Make things compile under Visual-C++ by using
2091 __int64 instead of `long long'. Change many refs to long long
2092 into word64/uword64 typedefs.
2094 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2096 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2097 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2098 (docdir): Removed.
2099 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2100 (AC_PROG_INSTALL): Added.
2101 (AC_PROG_CC): Moved to before configure.host call.
2102 * configure: Rebuilt.
2104 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2106 * configure.in: Define @SIMCONF@ depending on mips target.
2107 * configure: Rebuild.
2108 * Makefile.in (run): Add @SIMCONF@ to control simulator
2109 construction.
2110 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2111 * interp.c: Remove some debugging, provide more detailed error
2112 messages, update memory accesses to use LOADDRMASK.
2114 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2116 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2117 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2118 stamp-h.
2119 * configure: Rebuild.
2120 * config.in: New file, generated by autoheader.
2121 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2122 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2123 HAVE_ANINT and HAVE_AINT, as appropriate.
2124 * Makefile.in (run): Use @LIBS@ rather than -lm.
2125 (interp.o): Depend upon config.h.
2126 (Makefile): Just rebuild Makefile.
2127 (clean): Remove stamp-h.
2128 (mostlyclean): Make the same as clean, not as distclean.
2129 (config.h, stamp-h): New targets.
2131 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2133 * interp.c (ColdReset): Fix boolean test. Make all simulator
2134 globals static.
2136 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2138 * interp.c (xfer_direct_word, xfer_direct_long,
2139 swap_direct_word, swap_direct_long, xfer_big_word,
2140 xfer_big_long, xfer_little_word, xfer_little_long,
2141 swap_word,swap_long): Added.
2142 * interp.c (ColdReset): Provide function indirection to
2143 host<->simulated_target transfer routines.
2144 * interp.c (sim_store_register, sim_fetch_register): Updated to
2145 make use of indirected transfer routines.
2147 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2149 * gencode.c (process_instructions): Ensure FP ABS instruction
2150 recognised.
2151 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2152 system call support.
2154 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2156 * interp.c (sim_do_command): Complain if callback structure not
2157 initialised.
2159 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2161 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2162 support for Sun hosts.
2163 * Makefile.in (gencode): Ensure the host compiler and libraries
2164 used for cross-hosted build.
2166 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2168 * interp.c, gencode.c: Some more (TODO) tidying.
2170 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2172 * gencode.c, interp.c: Replaced explicit long long references with
2173 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2174 * support.h (SET64LO, SET64HI): Macros added.
2176 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2178 * configure: Regenerate with autoconf 2.7.
2180 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2182 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2183 * support.h: Remove superfluous "1" from #if.
2184 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2186 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2188 * interp.c (StoreFPR): Control UndefinedResult() call on
2189 WARN_RESULT manifest.
2191 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2193 * gencode.c: Tidied instruction decoding, and added FP instruction
2194 support.
2196 * interp.c: Added dineroIII, and BSD profiling support. Also
2197 run-time FP handling.
2199 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2201 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2202 gencode.c, interp.c, support.h: created.