1 /* Target-dependent code for GNU/Linux on RISC-V processors.
2 Copyright (C) 2018 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "riscv-tdep.h"
22 #include "glibc-tdep.h"
23 #include "linux-tdep.h"
24 #include "solib-svr4.h"
26 #include "tramp-frame.h"
27 #include "trad-frame.h"
29 /* Define the general register mapping. The kernel puts the PC at offset 0,
30 gdb puts it at offset 32. Register x0 is always 0 and can be ignored.
31 Registers x1 to x31 are in the same place. */
33 static const struct regcache_map_entry riscv_linux_gregmap
[] =
35 { 1, RISCV_PC_REGNUM
, 0 },
36 { 31, RISCV_RA_REGNUM
, 0 }, /* x1 to x31 */
40 /* Define the general register regset. */
42 static const struct regset riscv_linux_gregset
=
44 riscv_linux_gregmap
, regcache_supply_regset
, regcache_collect_regset
47 /* Define hook for core file support. */
50 riscv_linux_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
51 iterate_over_regset_sections_cb
*cb
,
53 const struct regcache
*regcache
)
55 cb (".reg", (32 * riscv_isa_xlen (gdbarch
)), (32 * riscv_isa_xlen (gdbarch
)),
56 &riscv_linux_gregset
, NULL
, cb_data
);
58 /* TODO: Add FP register support. */
61 /* Signal trampoline support. */
63 static void riscv_linux_sigframe_init (const struct tramp_frame
*self
,
64 struct frame_info
*this_frame
,
65 struct trad_frame_cache
*this_cache
,
68 #define RISCV_INST_LI_A7_SIGRETURN 0x08b00893
69 #define RISCV_INST_ECALL 0x00000073
71 static const struct tramp_frame riscv_linux_sigframe
= {
75 { RISCV_INST_LI_A7_SIGRETURN
, ULONGEST_MAX
},
76 { RISCV_INST_ECALL
, ULONGEST_MAX
},
77 { TRAMP_SENTINEL_INSN
}
79 riscv_linux_sigframe_init
,
83 /* Runtime signal frames look like this:
90 unsigned long __uc_flags;
91 struct ucontext *uclink;
94 char __glibc_reserved[1024 / 8 - sizeof (sigset_t)];
95 mcontext_t uc_mcontext;
98 #define SIGFRAME_SIGINFO_SIZE 128
99 #define UCONTEXT_MCONTEXT_OFFSET 176
102 riscv_linux_sigframe_init (const struct tramp_frame
*self
,
103 struct frame_info
*this_frame
,
104 struct trad_frame_cache
*this_cache
,
107 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
108 int xlen
= riscv_isa_xlen (gdbarch
);
109 int flen
= riscv_isa_flen (gdbarch
);
110 CORE_ADDR frame_sp
= get_frame_sp (this_frame
);
111 CORE_ADDR mcontext_base
;
114 mcontext_base
= frame_sp
+ SIGFRAME_SIGINFO_SIZE
+ UCONTEXT_MCONTEXT_OFFSET
;
116 /* Handle the integer registers. The first one is PC, followed by x1
118 regs_base
= mcontext_base
;
119 trad_frame_set_reg_addr (this_cache
, RISCV_PC_REGNUM
, regs_base
);
120 for (int i
= 1; i
< 32; i
++)
121 trad_frame_set_reg_addr (this_cache
, RISCV_ZERO_REGNUM
+ i
,
122 regs_base
+ (i
* xlen
));
124 /* Handle the FP registers. First comes the 32 FP registers, followed by
126 regs_base
+= 32 * xlen
;
127 for (int i
= 0; i
< 32; i
++)
128 trad_frame_set_reg_addr (this_cache
, RISCV_FIRST_FP_REGNUM
+ i
,
129 regs_base
+ (i
* flen
));
130 regs_base
+= 32 * flen
;
131 trad_frame_set_reg_addr (this_cache
, RISCV_CSR_FCSR_REGNUM
, regs_base
);
133 /* Choice of the bottom of the sigframe is somewhat arbitrary. */
134 trad_frame_set_id (this_cache
, frame_id_build (frame_sp
, func
));
137 /* Initialize RISC-V Linux ABI info. */
140 riscv_linux_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
142 linux_init_abi (info
, gdbarch
);
144 set_gdbarch_software_single_step (gdbarch
, riscv_software_single_step
);
146 set_solib_svr4_fetch_link_map_offsets (gdbarch
,
147 (riscv_isa_xlen (gdbarch
) == 4
148 ? svr4_ilp32_fetch_link_map_offsets
149 : svr4_lp64_fetch_link_map_offsets
));
151 /* GNU/Linux uses SVR4-style shared libraries. */
152 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
154 /* GNU/Linux uses the dynamic linker included in the GNU C Library. */
155 set_gdbarch_skip_solib_resolver (gdbarch
, glibc_skip_solib_resolver
);
157 /* Enable TLS support. */
158 set_gdbarch_fetch_tls_load_module_address (gdbarch
,
159 svr4_fetch_objfile_link_map
);
161 set_gdbarch_iterate_over_regset_sections
162 (gdbarch
, riscv_linux_iterate_over_regset_sections
);
164 tramp_frame_prepend_unwinder (gdbarch
, &riscv_linux_sigframe
);
167 /* Initialize RISC-V Linux target support. */
170 _initialize_riscv_linux_tdep (void)
172 gdbarch_register_osabi (bfd_arch_riscv
, 0, GDB_OSABI_LINUX
,
173 riscv_linux_init_abi
);