Updated Malay translation for the bfd sub-directory
[binutils-gdb.git] / opcodes / i386-dis-evex-prefix.h
blob16fb269839012a1b4949b8f8aa174593a57b89a7
1 /* PREFIX_EVEX_0F2E */
3 { "%XEvucomis%XS", { XMScalar, EXd, EXxEVexS }, 0 },
4 { "vucomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 },
5 { "%XEvucomis%XD", { XMScalar, EXq, EXxEVexS }, 0 },
6 { "vucomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 },
7 },
8 /* PREFIX_EVEX_0F2F */
10 { "%XEvcomis%XS", { XMScalar, EXd, EXxEVexS }, 0 },
11 { "vcomxs%XS", { XMScalar, EXd, EXxEVexS }, 0 },
12 { "%XEvcomis%XD", { XMScalar, EXq, EXxEVexS }, 0 },
13 { "vcomxs%XD", { XMScalar, EXq, EXxEVexS }, 0 },
15 /* PREFIX_EVEX_0F5B */
17 { VEX_W_TABLE (EVEX_W_0F5B_P_0) },
18 { "%XEvcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 },
19 { "%XEvcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 },
21 /* PREFIX_EVEX_0F6F */
23 { Bad_Opcode },
24 { VEX_W_TABLE (EVEX_W_0F6F_P_1) },
25 { VEX_W_TABLE (EVEX_W_0F6F_P_2) },
26 { VEX_W_TABLE (EVEX_W_0F6F_P_3) },
28 /* PREFIX_EVEX_0F70 */
30 { Bad_Opcode },
31 { "%XEvpshufhw", { XM, EXx, Ib }, 0 },
32 { VEX_W_TABLE (EVEX_W_0F70_P_2) },
33 { "%XEvpshuflw", { XM, EXx, Ib }, 0 },
35 /* PREFIX_EVEX_0F78 */
37 { VEX_W_TABLE (EVEX_W_0F78_P_0) },
38 { "vcvttss2usi", { Gdq, EXd, EXxEVexS }, 0 },
39 { VEX_W_TABLE (EVEX_W_0F78_P_2) },
40 { "vcvttsd2usi", { Gdq, EXq, EXxEVexS }, 0 },
42 /* PREFIX_EVEX_0F79 */
44 { VEX_W_TABLE (EVEX_W_0F79_P_0) },
45 { "vcvtss2usi", { Gdq, EXd, EXxEVexR }, 0 },
46 { VEX_W_TABLE (EVEX_W_0F79_P_2) },
47 { "vcvtsd2usi", { Gdq, EXq, EXxEVexR }, 0 },
49 /* PREFIX_EVEX_0F7A */
51 { Bad_Opcode },
52 { VEX_W_TABLE (EVEX_W_0F7A_P_1) },
53 { VEX_W_TABLE (EVEX_W_0F7A_P_2) },
54 { VEX_W_TABLE (EVEX_W_0F7A_P_3) },
56 /* PREFIX_EVEX_0F7B */
58 { Bad_Opcode },
59 { "vcvtusi2ssY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
60 { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
61 { "vcvtusi2sdY{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
63 /* PREFIX_EVEX_0F7E */
65 { Bad_Opcode },
66 { VEX_W_TABLE (EVEX_W_0F7E_P_1) },
67 { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) },
69 /* PREFIX_EVEX_0F7F */
71 { Bad_Opcode },
72 { VEX_W_TABLE (EVEX_W_0F7F_P_1) },
73 { VEX_W_TABLE (EVEX_W_0F7F_P_2) },
74 { VEX_W_TABLE (EVEX_W_0F7F_P_3) },
76 /* PREFIX_EVEX_0FC2 */
78 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
79 { "vcmps%XS", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
80 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
81 { "vcmps%XD", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
83 /* PREFIX_EVEX_0FE6 */
85 { Bad_Opcode },
86 { VEX_W_TABLE (EVEX_W_0FE6_P_1) },
87 { "%XEvcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
88 { "%XEvcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
90 /* PREFIX_EVEX_0F3810 */
92 { Bad_Opcode },
93 { VEX_W_TABLE (EVEX_W_0F3810_P_1) },
94 { VEX_W_TABLE (EVEX_W_0F3810_P_2) },
96 /* PREFIX_EVEX_0F3811 */
98 { Bad_Opcode },
99 { VEX_W_TABLE (EVEX_W_0F3811_P_1) },
100 { VEX_W_TABLE (EVEX_W_0F3811_P_2) },
102 /* PREFIX_EVEX_0F3812 */
104 { Bad_Opcode },
105 { VEX_W_TABLE (EVEX_W_0F3812_P_1) },
106 { VEX_W_TABLE (EVEX_W_0F3812_P_2) },
108 /* PREFIX_EVEX_0F3813 */
110 { Bad_Opcode },
111 { VEX_W_TABLE (EVEX_W_0F3813_P_1) },
112 { "%XEvcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 },
114 /* PREFIX_EVEX_0F3814 */
116 { Bad_Opcode },
117 { VEX_W_TABLE (EVEX_W_0F3814_P_1) },
118 { "vprorv%DQ", { XM, Vex, EXx }, 0 },
120 /* PREFIX_EVEX_0F3815 */
122 { Bad_Opcode },
123 { VEX_W_TABLE (EVEX_W_0F3815_P_1) },
124 { "vprolv%DQ", { XM, Vex, EXx }, 0 },
126 /* PREFIX_EVEX_0F3820 */
128 { Bad_Opcode },
129 { VEX_W_TABLE (EVEX_W_0F3820_P_1) },
130 { "%XEvpmovsxbw", { XM, EXxmmq }, 0 },
132 /* PREFIX_EVEX_0F3821 */
134 { Bad_Opcode },
135 { VEX_W_TABLE (EVEX_W_0F3821_P_1) },
136 { "%XEvpmovsxbd", { XM, EXxmmqd }, 0 },
138 /* PREFIX_EVEX_0F3822 */
140 { Bad_Opcode },
141 { VEX_W_TABLE (EVEX_W_0F3822_P_1) },
142 { "%XEvpmovsxbq", { XM, EXxmmdw }, 0 },
144 /* PREFIX_EVEX_0F3823 */
146 { Bad_Opcode },
147 { VEX_W_TABLE (EVEX_W_0F3823_P_1) },
148 { "%XEvpmovsxwd", { XM, EXxmmq }, 0 },
150 /* PREFIX_EVEX_0F3824 */
152 { Bad_Opcode },
153 { VEX_W_TABLE (EVEX_W_0F3824_P_1) },
154 { "%XEvpmovsxwq", { XM, EXxmmqd }, 0 },
156 /* PREFIX_EVEX_0F3825 */
158 { Bad_Opcode },
159 { VEX_W_TABLE (EVEX_W_0F3825_P_1) },
160 { VEX_W_TABLE (EVEX_W_0F3825_P_2) },
162 /* PREFIX_EVEX_0F3826 */
164 { Bad_Opcode },
165 { "vptestnm%BW", { MaskG, Vex, EXx }, 0 },
166 { "vptestm%BW", { MaskG, Vex, EXx }, 0 },
168 /* PREFIX_EVEX_0F3827 */
170 { Bad_Opcode },
171 { "vptestnm%DQ", { MaskG, Vex, EXx }, 0 },
172 { "vptestm%DQ", { MaskG, Vex, EXx }, 0 },
174 /* PREFIX_EVEX_0F3828 */
176 { Bad_Opcode },
177 { "vpmovm2Y%BW", { XM, MaskR }, 0 },
178 { VEX_W_TABLE (EVEX_W_0F3828_P_2) },
180 /* PREFIX_EVEX_0F3829 */
182 { Bad_Opcode },
183 { "vpmov%BW2mY", { MaskG, Ux }, 0 },
184 { VEX_W_TABLE (EVEX_W_0F3829_P_2) },
186 /* PREFIX_EVEX_0F382A */
188 { Bad_Opcode },
189 { VEX_W_TABLE (EVEX_W_0F382A_P_1) },
190 { VEX_W_TABLE (EVEX_W_0F382A_P_2) },
192 /* PREFIX_EVEX_0F3830 */
194 { Bad_Opcode },
195 { VEX_W_TABLE (EVEX_W_0F3830_P_1) },
196 { "%XEvpmovzxbw", { XM, EXxmmq }, 0 },
198 /* PREFIX_EVEX_0F3831 */
200 { Bad_Opcode },
201 { VEX_W_TABLE (EVEX_W_0F3831_P_1) },
202 { "%XEvpmovzxbd", { XM, EXxmmqd }, 0 },
204 /* PREFIX_EVEX_0F3832 */
206 { Bad_Opcode },
207 { VEX_W_TABLE (EVEX_W_0F3832_P_1) },
208 { "%XEvpmovzxbq", { XM, EXxmmdw }, 0 },
210 /* PREFIX_EVEX_0F3833 */
212 { Bad_Opcode },
213 { VEX_W_TABLE (EVEX_W_0F3833_P_1) },
214 { "%XEvpmovzxwd", { XM, EXxmmq }, 0 },
216 /* PREFIX_EVEX_0F3834 */
218 { Bad_Opcode },
219 { VEX_W_TABLE (EVEX_W_0F3834_P_1) },
220 { "%XEvpmovzxwq", { XM, EXxmmqd }, 0 },
222 /* PREFIX_EVEX_0F3835 */
224 { Bad_Opcode },
225 { VEX_W_TABLE (EVEX_W_0F3835_P_1) },
226 { VEX_W_TABLE (EVEX_W_0F3835_P_2) },
228 /* PREFIX_EVEX_0F3838 */
230 { Bad_Opcode },
231 { "vpmovm2Y%DQ", { XM, MaskR }, 0 },
232 { "%XEvpminsb", { XM, Vex, EXx }, 0 },
234 /* PREFIX_EVEX_0F3839 */
236 { Bad_Opcode },
237 { "vpmov%DQ2mY", { MaskG, Ux }, 0 },
238 { "%XEvpmins%DQ", { XM, Vex, EXx }, 0 },
240 /* PREFIX_EVEX_0F383A */
242 { Bad_Opcode },
243 { VEX_W_TABLE (EVEX_W_0F383A_P_1) },
244 { "%XEvpminuw", { XM, Vex, EXx }, 0 },
246 /* PREFIX_EVEX_0F3852 */
248 { "vdpphp%XS", { XM, Vex, EXx }, 0 },
249 { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
250 { VEX_W_TABLE (VEX_W_0F3852) },
251 { "vp4dpws%XSd", { XM, Vex, Mxmm }, 0 },
253 /* PREFIX_EVEX_0F3853 */
255 { Bad_Opcode },
256 { Bad_Opcode },
257 { VEX_W_TABLE (VEX_W_0F3853) },
258 { "vp4dpws%XSds", { XM, Vex, Mxmm }, 0 },
260 /* PREFIX_EVEX_0F3868 */
262 { Bad_Opcode },
263 { Bad_Opcode },
264 { Bad_Opcode },
265 { "vp2intersectY%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 },
267 /* PREFIX_EVEX_0F3872 */
269 { Bad_Opcode },
270 { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 },
271 { VEX_W_TABLE (EVEX_W_0F3872_P_2) },
272 { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 },
274 /* PREFIX_EVEX_0F3874 */
276 { "vcvtbiasp%XH2bf8", { XMxmmq, Vex, EXxh }, 0 },
277 { "vcvtnep%XH2bf8%XY", { XMxmmq, EXxh }, 0 },
278 { Bad_Opcode },
279 { "vcvtne2p%XH2bf8", { XM, Vex, EXxh }, 0 },
281 /* PREFIX_EVEX_0F389A */
283 { Bad_Opcode },
284 { Bad_Opcode },
285 { "%XEvfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
286 { "v4fmaddp%XS", { XM, Vex, Mxmm }, 0 },
288 /* PREFIX_EVEX_0F389B */
290 { Bad_Opcode },
291 { Bad_Opcode },
292 { "%XEvfmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
293 { "v4fmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 },
295 /* PREFIX_EVEX_0F38AA */
297 { Bad_Opcode },
298 { Bad_Opcode },
299 { "%XEvfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
300 { "v4fnmaddp%XS", { XM, Vex, Mxmm }, 0 },
302 /* PREFIX_EVEX_0F38AB */
304 { Bad_Opcode },
305 { Bad_Opcode },
306 { "%XEvfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
307 { "v4fnmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 },
309 /* PREFIX_EVEX_0F3A08 */
311 { "vrndscalep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
312 { Bad_Opcode },
313 { "vrndscalep%XS", { XM, EXx, EXxEVexS, Ib }, 0 },
314 { "vrndscalenep%XB", { XM, EXxh, Ib }, 0 },
316 /* PREFIX_EVEX_0F3A0A */
318 { "vrndscales%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
319 { Bad_Opcode },
320 { "vrndscales%XS", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
322 /* PREFIX_EVEX_0F3A26 */
324 { "vgetmantp%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
325 { Bad_Opcode },
326 { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
327 { "vgetmantp%XB", { XM, EXxh, Ib }, 0 },
329 /* PREFIX_EVEX_0F3A27 */
331 { "vgetmants%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
332 { Bad_Opcode },
333 { "vgetmants%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
335 /* PREFIX_EVEX_0F3A42_W_0 */
337 { Bad_Opcode },
338 { "%XEvmpsadbw", { XM, Vex, EXx, Ib }, 0 },
339 { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 },
341 /* PREFIX_EVEX_0F3A52 */
343 { "vminmaxp%XH", { XM, Vex, EXxh, EXxEVexS, Ib }, 0 },
344 { Bad_Opcode },
345 { "vminmaxp%XW", { XM, Vex, EXx, EXxEVexS, Ib }, 0 },
346 { "vminmaxp%XB", { XM, Vex, EXxh, Ib }, 0 },
348 /* PREFIX_EVEX_0F3A53 */
350 { "vminmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
351 { Bad_Opcode },
352 { "vminmaxs%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
354 /* PREFIX_EVEX_0F3A56 */
356 { "vreducep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
357 { Bad_Opcode },
358 { "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
359 { "vreducenep%XB", { XM, EXxh, Ib }, 0 },
361 /* PREFIX_EVEX_0F3A57 */
363 { "vreduces%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
364 { Bad_Opcode },
365 { "vreduces%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
367 /* PREFIX_EVEX_0F3A66 */
369 { "vfpclassp%XH%XZ", { MaskG, EXxh, Ib }, 0 },
370 { Bad_Opcode },
371 { "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, 0 },
372 { "vfpclassp%XB%XZ", { MaskG, EXxh, Ib }, 0 },
374 /* PREFIX_EVEX_0F3A67 */
376 { "vfpclasss%XH", { MaskG, EXw, Ib }, 0 },
377 { Bad_Opcode },
378 { "vfpclasss%XW", { MaskG, EXdq, Ib }, 0 },
380 /* PREFIX_EVEX_0F3AC2 */
382 { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 },
383 { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 },
384 { Bad_Opcode },
385 { "vcmpp%XB", { MaskG, Vex, EXxh, CMP }, 0 },
387 /* PREFIX_EVEX_MAP4_4x */
389 { "%CFcmov%CCS", { VexGv, { CFCMOV_Fixup, 0 }, { CFCMOV_Fixup, 1 } }, 0 },
390 { Bad_Opcode },
391 { "%CFcmov%CCS", { VexGv, { CFCMOV_Fixup, 0 }, { CFCMOV_Fixup, 1 } }, 0 },
392 { "set%ZU%CC", { Eb }, 0 },
394 /* PREFIX_EVEX_MAP4_F0 */
396 { "crc32A", { Gdq, Eb }, 0 },
397 { "invept", { Gm, Mo }, 0 },
399 /* PREFIX_EVEX_MAP4_F1 */
401 { "crc32Q", { Gdq, Ev }, 0 },
402 { "invvpid", { Gm, Mo }, 0 },
403 { "crc32Q", { Gdq, Ev }, 0 },
405 /* PREFIX_EVEX_MAP4_F2 */
407 { Bad_Opcode },
408 { "invpcid", { Gm, M }, 0 },
410 /* PREFIX_EVEX_MAP4_F8 */
412 { Bad_Opcode },
413 { MOD_TABLE (MOD_EVEX_MAP4_F8_P_1) },
414 { "movdir64b", { Gva, M }, 0 },
415 { MOD_TABLE (MOD_EVEX_MAP4_F8_P_3) },
417 /* PREFIX_EVEX_MAP5_10 */
419 { Bad_Opcode },
420 { "vmovs%XH", { XMScalar, VexScalarR, EXw }, 0 },
422 /* PREFIX_EVEX_MAP5_11 */
424 { Bad_Opcode },
425 { "vmovs%XH", { EXwS, VexScalarR, XMScalar }, 0 },
427 /* PREFIX_EVEX_MAP5_18 */
429 { "vcvtbiasp%XH2hf8", { XMxmmq, Vex, EXxh }, 0 },
430 { "vcvtnep%XH2hf8%XY", { XMxmmq, EXxh }, 0 },
431 { Bad_Opcode },
432 { "vcvtne2p%XH2hf8", { XM, Vex, EXxh }, 0 },
434 /* PREFIX_EVEX_MAP5_1B */
436 { "vcvtbiasp%XH2hf8s", { XMxmmq, Vex, EXxh }, 0 },
437 { "vcvtnep%XH2hf8s%XY", { XMxmmq, EXxh }, 0 },
438 { Bad_Opcode },
439 { "vcvtne2p%XH2hf8s", { XM, Vex, EXxh }, 0 },
441 /* PREFIX_EVEX_MAP5_1D */
443 { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
444 { Bad_Opcode },
445 { "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
447 /* PREFIX_EVEX_MAP5_1E */
449 { Bad_Opcode },
450 { Bad_Opcode },
451 { Bad_Opcode },
452 { "vcvthf82p%XH", { XM, EXxmmq }, 0 },
454 /* PREFIX_EVEX_MAP5_2A */
456 { Bad_Opcode },
457 { "vcvtsi2shY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
459 /* PREFIX_EVEX_MAP5_2C */
461 { Bad_Opcode },
462 { "vcvttsh2si", { Gdq, EXw, EXxEVexS }, 0 },
464 /* PREFIX_EVEX_MAP5_2D */
466 { Bad_Opcode },
467 { "vcvtsh2si", { Gdq, EXw, EXxEVexR }, 0 },
469 /* PREFIX_EVEX_MAP5_2E */
471 { "vucomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 },
472 { "vucomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 },
474 /* PREFIX_EVEX_MAP5_2F */
476 { "vcomisY%XH", { XMScalar, EXw, EXxEVexS }, 0 },
477 { "vcomxs%XH", { XMScalar, EXw, EXxEVexS }, 0 },
478 { "vcoms%XB", { XMScalar, EXw, EXxEVexS }, 0 },
480 /* PREFIX_EVEX_MAP5_51 */
482 { "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 },
483 { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
484 { "vsqrtnep%XB", { XM, EXxh }, 0 },
486 /* PREFIX_EVEX_MAP5_58 */
488 { "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
489 { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
490 { "vaddnep%XB", { XM, Vex, EXxh }, 0 },
492 /* PREFIX_EVEX_MAP5_59 */
494 { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
495 { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
496 { "vmulnep%XB", { XM, Vex, EXxh }, 0 },
498 /* PREFIX_EVEX_MAP5_5A */
500 { "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
501 { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
502 { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
503 { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
505 /* PREFIX_EVEX_MAP5_5B */
507 { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) },
508 { "vcvttp%XH2dq", { XM, EXxmmqh, EXxEVexS }, 0 },
509 { "vcvtp%XH2dq", { XM, EXxmmqh, EXxEVexR }, 0 },
511 /* PREFIX_EVEX_MAP5_5C */
513 { "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
514 { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
515 { "vsubnep%XB", { XM, Vex, EXxh }, 0 },
517 /* PREFIX_EVEX_MAP5_5D */
519 { "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
520 { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
521 { "vminp%XB", { XM, Vex, EXxh }, 0 },
523 /* PREFIX_EVEX_MAP5_5E */
525 { "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
526 { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
527 { "vdivnep%XB", { XM, Vex, EXxh }, 0 },
529 /* PREFIX_EVEX_MAP5_5F */
531 { "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
532 { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
533 { "vmaxp%XB", { XM, Vex, EXxh }, 0 },
535 /* PREFIX_EVEX_MAP5_68 */
537 { "vcvttp%XH2ibs", { XM, EXxh, EXxEVexS }, 0 },
538 { Bad_Opcode },
539 { "vcvttp%XS2ibs", { XM, EXx, EXxEVexS }, 0 },
540 { "vcvtt%XB2ibs", { XM, EXxh }, 0 },
542 /* PREFIX_EVEX_MAP5_69 */
544 { "vcvtp%XH2ibs", { XM, EXxh, EXxEVexR }, 0 },
545 { Bad_Opcode },
546 { "vcvtp%XS2ibs", { XM, EXx, EXxEVexR }, 0 },
547 { "vcvtne%XB2ibs", { XM, EXxh }, 0 },
549 /* PREFIX_EVEX_MAP5_6A */
551 { "vcvttp%XH2iubs", { XM, EXxh, EXxEVexS }, 0 },
552 { Bad_Opcode },
553 { "vcvttp%XS2iubs", { XM, EXx, EXxEVexS }, 0 },
554 { "vcvtt%XB2iubs", { XM, EXxh }, 0 },
556 /* PREFIX_EVEX_MAP5_6B */
558 { "vcvtp%XH2iubs", { XM, EXxh, EXxEVexR }, 0 },
559 { Bad_Opcode },
560 { "vcvtp%XS2iubs", { XM, EXx, EXxEVexR }, 0 },
561 { "vcvtne%XB2iubs", { XM, EXxh }, 0 },
563 /* PREFIX_EVEX_MAP5_6C */
565 { VEX_W_TABLE (EVEX_W_MAP5_6C_P_0) },
566 { "vcvttss2usis", { Gdq, EXd, EXxEVexS }, 0 },
567 { VEX_W_TABLE (EVEX_W_MAP5_6C_P_2) },
568 { "vcvttsd2usis", { Gdq, EXq, EXxEVexS }, 0 },
570 /* PREFIX_EVEX_MAP5_6D */
572 { VEX_W_TABLE (EVEX_W_MAP5_6D_P_0) },
573 { "vcvttss2sis", { Gdq, EXd, EXxEVexS }, 0 },
574 { VEX_W_TABLE (EVEX_W_MAP5_6D_P_2) },
575 { "vcvttsd2sis", { Gdq, EXq, EXxEVexS }, 0 },
577 /* PREFIX_EVEX_MAP5_6E_L_0 */
579 { Bad_Opcode },
580 { VEX_W_TABLE (EVEX_W_MAP5_6E_P_1) },
581 { "vmovwY", { XMScalar, Edw }, 0 },
583 /* PREFIX_EVEX_MAP5_74 */
585 { "vcvtbiasp%XH2bf8s", { XMxmmq, Vex, EXxh }, 0 },
586 { "vcvtnep%XH2bf8s%XY", { XMxmmq, EXxh }, 0 },
587 { Bad_Opcode },
588 { "vcvtne2p%XH2bf8s", { XM, Vex, EXxh }, 0 },
590 /* PREFIX_EVEX_MAP5_78 */
592 { "vcvttp%XH2udq", { XM, EXxmmqh, EXxEVexS }, 0 },
593 { "vcvttsh2usi", { Gdq, EXw, EXxEVexS }, 0 },
594 { "vcvttp%XH2uqq", { XM, EXxmmqdh, EXxEVexS }, 0 },
596 /* PREFIX_EVEX_MAP5_79 */
598 { "vcvtp%XH2udq", { XM, EXxmmqh, EXxEVexR }, 0 },
599 { "vcvtsh2usi", { Gdq, EXw, EXxEVexR }, 0 },
600 { "vcvtp%XH2uqq", { XM, EXxmmqdh, EXxEVexR }, 0 },
602 /* PREFIX_EVEX_MAP5_7A */
604 { Bad_Opcode },
605 { Bad_Opcode },
606 { "vcvttp%XH2qq", { XM, EXxmmqdh, EXxEVexS }, 0 },
607 { VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) },
609 /* PREFIX_EVEX_MAP5_7B */
611 { Bad_Opcode },
612 { "vcvtusi2shY{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
613 { "vcvtp%XH2qq", { XM, EXxmmqdh, EXxEVexR }, 0 },
615 /* PREFIX_EVEX_MAP5_7C */
617 { "vcvttp%XH2uw", { XM, EXxh, EXxEVexS }, 0 },
618 { Bad_Opcode },
619 { "vcvttp%XH2w", { XM, EXxh, EXxEVexS }, 0 },
621 /* PREFIX_EVEX_MAP5_7D */
623 { "vcvtp%XH2uw", { XM, EXxh, EXxEVexR }, 0 },
624 { "vcvtw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
625 { "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 },
626 { "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
628 /* PREFIX_EVEX_MAP5_7E_L_0 */
630 { Bad_Opcode },
631 { VEX_W_TABLE (EVEX_W_MAP5_7E_P_1) },
632 { "vmovw", { Edw, XMScalar }, 0 },
634 /* PREFIX_EVEX_MAP6_13 */
636 { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
637 { Bad_Opcode },
638 { "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
640 /* PREFIX_EVEX_MAP6_2C */
642 { "vscalefnep%XB", { XM, Vex, EXxh }, 0 },
643 { Bad_Opcode },
644 { "vscalefp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
646 /* PREFIX_EVEX_MAP6_42 */
648 { "vgetexpp%XB", { XM, EXxh }, 0 },
649 { Bad_Opcode },
650 { "vgetexpp%XH", { XM, EXxh, EXxEVexS }, 0 },
652 /* PREFIX_EVEX_MAP6_4C */
654 { "vrcpp%XB", { XM, EXxh }, 0 },
655 { Bad_Opcode },
656 { "vrcpp%XH", { XM, EXxh }, 0 },
658 /* PREFIX_EVEX_MAP6_4E */
660 { "vrsqrtp%XB", { XM, EXxh }, 0 },
661 { Bad_Opcode },
662 { "vrsqrtp%XH", { XM, EXxh }, 0 },
664 /* PREFIX_EVEX_MAP6_56 */
666 { Bad_Opcode },
667 { "vfmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
668 { Bad_Opcode },
669 { "vfcmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
671 /* PREFIX_EVEX_MAP6_57 */
673 { Bad_Opcode },
674 { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
675 { Bad_Opcode },
676 { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
678 /* PREFIX_EVEX_MAP6_98 */
680 { "vfmadd132nep%XB", { XM, Vex, EXxh }, 0 },
681 { Bad_Opcode },
682 { "vfmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
684 /* PREFIX_EVEX_MAP6_9A */
686 { "vfmsub132nep%XB", { XM, Vex, EXxh }, 0 },
687 { Bad_Opcode },
688 { "vfmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
690 /* PREFIX_EVEX_MAP6_9C */
692 { "vfnmadd132nep%XB", { XM, Vex, EXxh }, 0 },
693 { Bad_Opcode },
694 { "vfnmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
696 /* PREFIX_EVEX_MAP6_9E */
698 { "vfnmsub132nep%XB", { XM, Vex, EXxh }, 0 },
699 { Bad_Opcode },
700 { "vfnmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
702 /* PREFIX_EVEX_MAP6_A8 */
704 { "vfmadd213nep%XB", { XM, Vex, EXxh }, 0 },
705 { Bad_Opcode },
706 { "vfmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
708 /* PREFIX_EVEX_MAP6_AA */
710 { "vfmsub213nep%XB", { XM, Vex, EXxh }, 0 },
711 { Bad_Opcode },
712 { "vfmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
714 /* PREFIX_EVEX_MAP6_AC */
716 { "vfnmadd213nep%XB", { XM, Vex, EXxh }, 0 },
717 { Bad_Opcode },
718 { "vfnmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
720 /* PREFIX_EVEX_MAP6_AE */
722 { "vfnmsub213nep%XB", { XM, Vex, EXxh }, 0 },
723 { Bad_Opcode },
724 { "vfnmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
726 /* PREFIX_EVEX_MAP6_B8 */
728 { "vfmadd231nep%XB", { XM, Vex, EXxh }, 0 },
729 { Bad_Opcode },
730 { "vfmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
732 /* PREFIX_EVEX_MAP6_BA */
734 { "vfmsub231nep%XB", { XM, Vex, EXxh }, 0 },
735 { Bad_Opcode },
736 { "vfmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
738 /* PREFIX_EVEX_MAP6_BC */
740 { "vfnmadd231nep%XB", { XM, Vex, EXxh }, 0 },
741 { Bad_Opcode },
742 { "vfnmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
744 /* PREFIX_EVEX_MAP6_BE */
746 { "vfnmsub231nep%XB", { XM, Vex, EXxh }, 0 },
747 { Bad_Opcode },
748 { "vfnmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
750 /* PREFIX_EVEX_MAP6_D6 */
752 { Bad_Opcode },
753 { "vfmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
754 { Bad_Opcode },
755 { "vfcmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
757 /* PREFIX_EVEX_MAP6_D7 */
759 { Bad_Opcode },
760 { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
761 { Bad_Opcode },
762 { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },