gdb/sparc-ravenscar-thread.c

   1 /* Ravenscar SPARC target support.
   2
   3    Copyright (C) 2004-2022 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "defs.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "sparc-tdep.h"
  24 #include "inferior.h"
  25 #include "ravenscar-thread.h"
  26 #include "sparc-ravenscar-thread.h"
  27 #include "gdbarch.h"
  28
  29 /* Register offsets from a referenced address (exempli gratia the
  30    Thread_Descriptor).  The referenced address depends on the register
  31    number.  The Thread_Descriptor layout and the stack layout are documented
  32    in the GNAT sources, in sparc-bb.h.  */
  33
  34 static const int sparc_register_offsets[] =
  35 {
  36   /* G0 - G7 */
  37   -1,   0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C,
  38   /* O0 - O7 */
  39   0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C,
  40   /* L0 - L7 */
  41   0x00, 0x04, 0x08, 0x0C, 0x10, 0x14, 0x18, 0x1C,
  42   /* I0 - I7 */
  43   0x20, 0x24, 0x28, 0x2C, 0x30, 0x34, 0x38, 0x3C,
  44   /* F0 - F31 */
  45   0x50, 0x54, 0x58, 0x5C, 0x60, 0x64, 0x68, 0x6C,
  46   0x70, 0x74, 0x78, 0x7C, 0x80, 0x84, 0x88, 0x8C,
  47   0x90, 0x94, 0x99, 0x9C, 0xA0, 0xA4, 0xA8, 0xAC,
  48   0xB0, 0xB4, 0xBB, 0xBC, 0xC0, 0xC4, 0xC8, 0xCC,
  49   /* Y  PSR   WIM   TBR   PC    NPC   FPSR  CPSR */
  50   0x40, 0x20, 0x44, -1,   0x1C, -1,   0x4C, -1
  51 };
  52
  53 static struct ravenscar_arch_ops sparc_ravenscar_ops (sparc_register_offsets,
  54                                                       SPARC_L0_REGNUM,
  55                                                       SPARC_I7_REGNUM);
  56
  57 /* Register ravenscar_arch_ops in GDBARCH.  */
  58
  59 void
  60 register_sparc_ravenscar_ops (struct gdbarch *gdbarch)
  61 {
  62   set_gdbarch_ravenscar_ops (gdbarch, &sparc_ravenscar_ops);
  63 }