gdb/i386-tdep.h

   1 /* Target-dependent code for the i386.
   2
   3    Copyright (C) 2001-2024 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef I386_TDEP_H
  21 #define I386_TDEP_H
  22
  23 #include "gdbarch.h"
  24 #include "infrun.h"
  25 #include "expression.h"
  26 #include "gdbsupport/x86-xstate.h"
  27
  28 class frame_info_ptr;
  29 struct gdbarch;
  30 struct reggroup;
  31 struct regset;
  32 struct regcache;
  33
  34 /* GDB's i386 target supports both the 32-bit Intel Architecture
  35    (IA-32) and the 64-bit AMD x86-64 architecture.  Internally it uses
  36    a similar register layout for both.
  37
  38    - General purpose registers
  39    - FPU data registers
  40    - FPU control registers
  41    - SSE data registers
  42    - SSE control register
  43
  44    The general purpose registers for the x86-64 architecture are quite
  45    different from IA-32.  Therefore, gdbarch_fp0_regnum
  46    determines the register number at which the FPU data registers
  47    start.  The number of FPU data and control registers is the same
  48    for both architectures.  The number of SSE registers however,
  49    differs and is determined by the num_xmm_regs member of `struct
  50    gdbarch_tdep'.  */
  51
  52 /* Convention for returning structures.  */
  53
  54 enum struct_return
  55 {
  56   pcc_struct_return,            /* Return "short" structures in memory.  */
  57   reg_struct_return             /* Return "short" structures in registers.  */
  58 };
  59
  60 /* i386 architecture specific information.  */
  61 struct i386_gdbarch_tdep : gdbarch_tdep_base
  62 {
  63   /* General-purpose registers.  */
  64   int *gregset_reg_offset = 0;
  65   int gregset_num_regs = 0;
  66   size_t sizeof_gregset = 0;
  67
  68   /* Floating-point registers.  */
  69   size_t sizeof_fpregset = 0;
  70
  71   /* Register number for %st(0).  The register numbers for the other
  72      registers follow from this one.  Set this to -1 to indicate the
  73      absence of an FPU.  */
  74   int st0_regnum = 0;
  75
  76   /* Number of MMX registers.  */
  77   int num_mmx_regs = 0;
  78
  79   /* Register number for %mm0.  Set this to -1 to indicate the absence
  80      of MMX support.  */
  81   int mm0_regnum = 0;
  82
  83   /* Number of pseudo YMM registers.  */
  84   int num_ymm_regs = 0;
  85
  86   /* Register number for %ymm0.  Set this to -1 to indicate the absence
  87      of pseudo YMM register support.  */
  88   int ymm0_regnum = 0;
  89
  90   /* Number of AVX512 OpMask registers (K-registers)  */
  91   int num_k_regs = 0;
  92
  93   /* Register number for %k0.  Set this to -1 to indicate the absence
  94      of AVX512 OpMask register support.  */
  95   int k0_regnum = 0;
  96
  97   /* Number of pseudo ZMM registers ($zmm0-$zmm31).  */
  98   int num_zmm_regs = 0;
  99
 100   /* Register number for %zmm0.  Set this to -1 to indicate the absence
 101      of pseudo ZMM register support.  */
 102   int zmm0_regnum = 0;
 103
 104   /* Number of byte registers.  */
 105   int num_byte_regs = 0;
 106
 107   /* Register pseudo number for %al.  */
 108   int al_regnum = 0;
 109
 110   /* Number of pseudo word registers.  */
 111   int num_word_regs = 0;
 112
 113   /* Register number for %ax.  */
 114   int ax_regnum = 0;
 115
 116   /* Number of pseudo dword registers.  */
 117   int num_dword_regs = 0;
 118
 119   /* Register number for %eax.  Set this to -1 to indicate the absence
 120      of pseudo dword register support.  */
 121   int eax_regnum = 0;
 122
 123   /* Number of core registers.  */
 124   int num_core_regs = 0;
 125
 126   /* Number of SSE registers.  */
 127   int num_xmm_regs = 0;
 128
 129   /* Number of SSE registers added in AVX512.  */
 130   int num_xmm_avx512_regs = 0;
 131
 132   /* Register number of XMM16, the first XMM register added in AVX512.  */
 133   int xmm16_regnum = 0;
 134
 135   /* Number of YMM registers added in AVX512.  */
 136   int num_ymm_avx512_regs = 0;
 137
 138   /* Register number of YMM16, the first YMM register added in AVX512.  */
 139   int ymm16_regnum = 0;
 140
 141   /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
 142      register), excluding the x87 bit, which are supported by this GDB.  */
 143
 144   uint64_t xcr0 = 0;
 145
 146   /* Offset of XCR0 in XSAVE extended state.  */
 147   int xsave_xcr0_offset = 0;
 148
 149   /* Layout of the XSAVE area extended region.  */
 150   x86_xsave_layout xsave_layout;
 151
 152   /* Register names.  */
 153   const char * const *register_names = nullptr;
 154
 155   /* Register number for %ymm0h.  Set this to -1 to indicate the absence
 156      of upper YMM register support.  */
 157   int ymm0h_regnum = 0;
 158
 159   /* Upper YMM register names.  Only used for tdesc_numbered_register.  */
 160   const char * const *ymmh_register_names = nullptr;
 161
 162   /* Register number for %ymm16h.  Set this to -1 to indicate the absence
 163   of support for YMM16-31.  */
 164   int ymm16h_regnum = 0;
 165
 166   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
 167   const char * const *ymm16h_register_names = nullptr;
 168
 169   /* Register number for %bnd0r.  Set this to -1 to indicate the absence
 170      bound registers.  */
 171   int bnd0r_regnum = 0;
 172
 173   /* Register number for pseudo register %bnd0.  Set this to -1 to indicate the absence
 174      bound registers.  */
 175   int bnd0_regnum = 0;
 176
 177   /* Register number for %bndcfgu. Set this to -1 to indicate the absence
 178      bound control registers.  */
 179   int bndcfgu_regnum = 0;
 180
 181   /* MPX register names.  Only used for tdesc_numbered_register.  */
 182   const char * const *mpx_register_names = nullptr;
 183
 184   /* Register number for %zmm0h.  Set this to -1 to indicate the absence
 185      of ZMM_HI256 register support.  */
 186   int zmm0h_regnum = 0;
 187
 188   /* OpMask register names.  */
 189   const char * const *k_register_names = nullptr;
 190
 191   /* ZMM register names.  Only used for tdesc_numbered_register.  */
 192   const char * const *zmmh_register_names = nullptr;
 193
 194   /* XMM16-31 register names.  Only used for tdesc_numbered_register.  */
 195   const char * const *xmm_avx512_register_names = nullptr;
 196
 197   /* YMM16-31 register names.  Only used for tdesc_numbered_register.  */
 198   const char * const *ymm_avx512_register_names = nullptr;
 199
 200   /* Number of PKEYS registers.  */
 201   int num_pkeys_regs = 0;
 202
 203   /* Register number for PKRU register.  */
 204   int pkru_regnum = 0;
 205
 206   /* PKEYS register names.  */
 207   const char * const *pkeys_register_names = nullptr;
 208
 209   /* Register number for %fsbase.  Set this to -1 to indicate the
 210      absence of segment base registers.  */
 211   int fsbase_regnum = 0;
 212
 213   /* Target description.  */
 214   const struct target_desc *tdesc = nullptr;
 215
 216   /* Register group function.  */
 217   gdbarch_register_reggroup_p_ftype *register_reggroup_p = nullptr;
 218
 219   /* Offset of saved PC in jmp_buf.  */
 220   int jb_pc_offset = 0;
 221
 222   /* Convention for returning structures.  */
 223   enum struct_return struct_return {};
 224
 225   /* Address range where sigtramp lives.  */
 226   CORE_ADDR sigtramp_start = 0;
 227   CORE_ADDR sigtramp_end = 0;
 228
 229   /* Detect sigtramp.  */
 230   int (*sigtramp_p) (const frame_info_ptr &) = nullptr;
 231
 232   /* Get address of sigcontext for sigtramp.  */
 233   CORE_ADDR (*sigcontext_addr) (const frame_info_ptr &) = nullptr;
 234
 235   /* Offset of registers in `struct sigcontext'.  */
 236   int *sc_reg_offset = 0;
 237   int sc_num_regs = 0;
 238
 239   /* Offset of saved PC and SP in `struct sigcontext'.  Usage of these
 240      is deprecated, please use `sc_reg_offset' instead.  */
 241   int sc_pc_offset = 0;
 242   int sc_sp_offset = 0;
 243
 244   /* ISA-specific data types.  */
 245   struct type *i386_mmx_type = nullptr;
 246   struct type *i386_ymm_type = nullptr;
 247   struct type *i386_zmm_type = nullptr;
 248   struct type *i387_ext_type = nullptr;
 249   struct type *i386_bnd_type = nullptr;
 250
 251   /* Process record/replay target.  */
 252   /* The map for registers because the AMD64's registers order
 253      in GDB is not same as I386 instructions.  */
 254   const int *record_regmap = nullptr;
 255   /* Parse intx80 args.  */
 256   int (*i386_intx80_record) (struct regcache *regcache) = nullptr;
 257   /* Parse sysenter args.  */
 258   int (*i386_sysenter_record) (struct regcache *regcache) = nullptr;
 259   /* Parse syscall args.  */
 260   int (*i386_syscall_record) (struct regcache *regcache) = nullptr;
 261
 262   /* Regsets. */
 263   const struct regset *fpregset = nullptr;
 264 };
 265
 266 /* Floating-point registers.  */
 267
 268 /* All FPU control registers (except for FIOFF and FOOFF) are 16-bit
 269    (at most) in the FPU, but are zero-extended to 32 bits in GDB's
 270    register cache.  */
 271
 272 /* Return non-zero if REGNUM matches the FP register and the FP
 273    register set is active.  */
 274 extern int i386_fp_regnum_p (struct gdbarch *, int);
 275 extern int i386_fpc_regnum_p (struct gdbarch *, int);
 276
 277 /* Register numbers of various important registers.  */
 278
 279 enum i386_regnum
 280 {
 281   I386_EAX_REGNUM,              /* %eax */
 282   I386_ECX_REGNUM,              /* %ecx */
 283   I386_EDX_REGNUM,              /* %edx */
 284   I386_EBX_REGNUM,              /* %ebx */
 285   I386_ESP_REGNUM,              /* %esp */
 286   I386_EBP_REGNUM,              /* %ebp */
 287   I386_ESI_REGNUM,              /* %esi */
 288   I386_EDI_REGNUM,              /* %edi */
 289   I386_EIP_REGNUM,              /* %eip */
 290   I386_EFLAGS_REGNUM,           /* %eflags */
 291   I386_CS_REGNUM,               /* %cs */
 292   I386_SS_REGNUM,               /* %ss */
 293   I386_DS_REGNUM,               /* %ds */
 294   I386_ES_REGNUM,               /* %es */
 295   I386_FS_REGNUM,               /* %fs */
 296   I386_GS_REGNUM,               /* %gs */
 297   I386_ST0_REGNUM,              /* %st(0) */
 298   I386_MXCSR_REGNUM = 40,       /* %mxcsr */
 299   I386_YMM0H_REGNUM,            /* %ymm0h */
 300   I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
 301   I386_BND0R_REGNUM,
 302   I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
 303   I386_BNDCFGU_REGNUM,
 304   I386_BNDSTATUS_REGNUM,
 305   I386_K0_REGNUM,               /* %k0 */
 306   I386_K7_REGNUM = I386_K0_REGNUM + 7,
 307   I386_ZMM0H_REGNUM,            /* %zmm0h */
 308   I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
 309   I386_PKRU_REGNUM,
 310   I386_FSBASE_REGNUM,
 311   I386_GSBASE_REGNUM
 312 };
 313
 314 /* Register numbers of RECORD_REGMAP.  */
 315
 316 enum record_i386_regnum
 317 {
 318   X86_RECORD_REAX_REGNUM,
 319   X86_RECORD_RECX_REGNUM,
 320   X86_RECORD_REDX_REGNUM,
 321   X86_RECORD_REBX_REGNUM,
 322   X86_RECORD_RESP_REGNUM,
 323   X86_RECORD_REBP_REGNUM,
 324   X86_RECORD_RESI_REGNUM,
 325   X86_RECORD_REDI_REGNUM,
 326   X86_RECORD_R8_REGNUM,
 327   X86_RECORD_R9_REGNUM,
 328   X86_RECORD_R10_REGNUM,
 329   X86_RECORD_R11_REGNUM,
 330   X86_RECORD_R12_REGNUM,
 331   X86_RECORD_R13_REGNUM,
 332   X86_RECORD_R14_REGNUM,
 333   X86_RECORD_R15_REGNUM,
 334   X86_RECORD_REIP_REGNUM,
 335   X86_RECORD_EFLAGS_REGNUM,
 336   X86_RECORD_CS_REGNUM,
 337   X86_RECORD_SS_REGNUM,
 338   X86_RECORD_DS_REGNUM,
 339   X86_RECORD_ES_REGNUM,
 340   X86_RECORD_FS_REGNUM,
 341   X86_RECORD_GS_REGNUM,
 342 };
 343
 344 #define I386_NUM_GREGS  16
 345 #define I386_NUM_XREGS  9
 346
 347 #define I386_SSE_NUM_REGS       (I386_MXCSR_REGNUM + 1)
 348 #define I386_AVX_NUM_REGS       (I386_YMM7H_REGNUM + 1)
 349 #define I386_MPX_NUM_REGS       (I386_BNDSTATUS_REGNUM + 1)
 350 #define I386_AVX512_NUM_REGS    (I386_ZMM7H_REGNUM + 1)
 351 #define I386_PKEYS_NUM_REGS     (I386_PKRU_REGNUM + 1)
 352 #define I386_NUM_REGS           (I386_GSBASE_REGNUM + 1)
 353
 354 /* Size of the largest register.  */
 355 #define I386_MAX_REGISTER_SIZE  64
 356
 357 /* Types for i386-specific registers.  */
 358 extern struct type *i387_ext_type (struct gdbarch *gdbarch);
 359
 360 /* Checks of different registers.  */
 361 extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
 362 extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
 363 extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
 364 extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 365 extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
 366 extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
 367 extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
 368 extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
 369 extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
 370 extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
 371 extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
 372 extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
 373
 374 extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
 375                                               int regnum);
 376 extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
 377                                                int regnum);
 378
 379 extern value *i386_pseudo_register_read_value (gdbarch *gdbarch,
 380                                                const frame_info_ptr &next_frame,
 381                                                int regnum);
 382
 383 extern void i386_pseudo_register_write (gdbarch *gdbarch,
 384                                         const frame_info_ptr &next_frame, int regnum,
 385                                         gdb::array_view<const gdb_byte> buf);
 386
 387 extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
 388                                             struct agent_expr *ax,
 389                                             int regnum);
 390
 391 /* Segment selectors.  */
 392 #define I386_SEL_RPL    0x0003  /* Requester's Privilege Level mask.  */
 393 #define I386_SEL_UPL    0x0003  /* User Privilege Level.  */
 394 #define I386_SEL_KPL    0x0000  /* Kernel Privilege Level.  */
 395
 396 /* The length of the longest i386 instruction (according to
 397    include/asm-i386/kprobes.h in Linux 2.6.  */
 398 #define I386_MAX_INSN_LEN (16)
 399
 400 /* Functions exported from i386-tdep.c.  */
 401 extern CORE_ADDR i386_pe_skip_trampoline_code (const frame_info_ptr &frame,
 402                                                CORE_ADDR pc, char *name);
 403 extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
 404                                           CORE_ADDR pc);
 405
 406 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
 407    calling convention.  */
 408 extern CORE_ADDR i386_thiscall_push_dummy_call (struct gdbarch *gdbarch,
 409                                                 struct value *function,
 410                                                 struct regcache *regcache,
 411                                                 CORE_ADDR bp_addr,
 412                                                 int nargs, struct value **args,
 413                                                 CORE_ADDR sp,
 414                                                 function_call_return_method
 415                                                 return_method,
 416                                                 CORE_ADDR struct_addr,
 417                                                 bool thiscall);
 418
 419 /* Return whether the THIS_FRAME corresponds to a sigtramp routine.  */
 420 extern int i386_sigtramp_p (const frame_info_ptr &this_frame);
 421
 422 /* Return non-zero if REGNUM is a member of the specified group.  */
 423 extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
 424                                      const struct reggroup *group);
 425
 426 /* Supply register REGNUM from the general-purpose register set REGSET
 427    to register cache REGCACHE.  If REGNUM is -1, do this for all
 428    registers in REGSET.  */
 429 extern void i386_supply_gregset (const struct regset *regset,
 430                                  struct regcache *regcache, int regnum,
 431                                  const void *gregs, size_t len);
 432
 433 /* General-purpose register set. */
 434 extern const struct regset i386_gregset;
 435
 436 /* Floating-point register set. */
 437 extern const struct regset i386_fpregset;
 438
 439 /* Default iterator over core file register note sections.  */
 440 extern void
 441   i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
 442                                      iterate_over_regset_sections_cb *cb,
 443                                      void *cb_data,
 444                                      const struct regcache *regcache);
 445
 446 typedef buf_displaced_step_copy_insn_closure
 447   i386_displaced_step_copy_insn_closure;
 448
 449 extern displaced_step_copy_insn_closure_up i386_displaced_step_copy_insn
 450   (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
 451    struct regcache *regs);
 452 extern void i386_displaced_step_fixup
 453   (struct gdbarch *gdbarch, displaced_step_copy_insn_closure *closure,
 454    CORE_ADDR from, CORE_ADDR to, regcache *regs, bool completed_p);
 455
 456 /* Initialize a basic ELF architecture variant.  */
 457 extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
 458
 459 /* Initialize a SVR4 architecture variant.  */
 460 extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
 461
 462 /* Convert SVR4 register number REG to the appropriate register number
 463    used by GDB.  */
 464 extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
 465
 466 extern int i386_process_record (struct gdbarch *gdbarch,
 467                                 struct regcache *regcache, CORE_ADDR addr);
 468 extern const struct target_desc *i386_target_description (uint64_t xcr0,
 469                                                           bool segments);
 470
 471 /* Return true iff the current target is MPX enabled.  */
 472 extern int i386_mpx_enabled (void);
 473 \f
 474
 475 /* Functions and variables exported from i386-bsd-tdep.c.  */
 476
 477 extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
 478 extern CORE_ADDR i386obsd_sigtramp_start_addr;
 479 extern CORE_ADDR i386obsd_sigtramp_end_addr;
 480 extern int i386obsd_sc_reg_offset[];
 481 extern int i386bsd_sc_reg_offset[];
 482
 483 /* SystemTap related functions.  */
 484
 485 extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
 486                                         const char *s);
 487
 488 extern expr::operation_up i386_stap_parse_special_token
 489      (struct gdbarch *gdbarch, struct stap_parse_info *p);
 490
 491 #endif /* i386-tdep.h */