sim/lm32/model.c

   1 /* Simulator model support for lm32bf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2019 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, see <http://www.gnu.org/licenses/>.
  21
  22 */
  23
  24 #define WANT_CPU lm32bf
  25 #define WANT_CPU_LM32BF
  26
  27 #include "sim-main.h"
  28
  29 /* The profiling data is recorded here, but is accessed via the profiling
  30    mechanism.  After all, this is information for profiling.  */
  31
  32 #if WITH_PROFILE_MODEL_P
  33
  34 /* Model handlers for each insn.  */
  35
  36 static int
  37 model_lm32_add (SIM_CPU *current_cpu, void *sem_arg)
  38 {
  39 #define FLD(f) abuf->fields.sfmt_user.f
  40   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
  41   const IDESC * UNUSED idesc = abuf->idesc;
  42   int cycles = 0;
  43   {
  44     int referenced = 0;
  45     int UNUSED insn_referenced = abuf->written;
  46     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
  47   }
  48   return cycles;
  49 #undef FLD
  50 }
  51
  52 static int
  53 model_lm32_addi (SIM_CPU *current_cpu, void *sem_arg)
  54 {
  55 #define FLD(f) abuf->fields.sfmt_addi.f
  56   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
  57   const IDESC * UNUSED idesc = abuf->idesc;
  58   int cycles = 0;
  59   {
  60     int referenced = 0;
  61     int UNUSED insn_referenced = abuf->written;
  62     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
  63   }
  64   return cycles;
  65 #undef FLD
  66 }
  67
  68 static int
  69 model_lm32_and (SIM_CPU *current_cpu, void *sem_arg)
  70 {
  71 #define FLD(f) abuf->fields.sfmt_user.f
  72   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
  73   const IDESC * UNUSED idesc = abuf->idesc;
  74   int cycles = 0;
  75   {
  76     int referenced = 0;
  77     int UNUSED insn_referenced = abuf->written;
  78     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
  79   }
  80   return cycles;
  81 #undef FLD
  82 }
  83
  84 static int
  85 model_lm32_andi (SIM_CPU *current_cpu, void *sem_arg)
  86 {
  87 #define FLD(f) abuf->fields.sfmt_andi.f
  88   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
  89   const IDESC * UNUSED idesc = abuf->idesc;
  90   int cycles = 0;
  91   {
  92     int referenced = 0;
  93     int UNUSED insn_referenced = abuf->written;
  94     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
  95   }
  96   return cycles;
  97 #undef FLD
  98 }
  99
 100 static int
 101 model_lm32_andhii (SIM_CPU *current_cpu, void *sem_arg)
 102 {
 103 #define FLD(f) abuf->fields.sfmt_andi.f
 104   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 105   const IDESC * UNUSED idesc = abuf->idesc;
 106   int cycles = 0;
 107   {
 108     int referenced = 0;
 109     int UNUSED insn_referenced = abuf->written;
 110     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 111   }
 112   return cycles;
 113 #undef FLD
 114 }
 115
 116 static int
 117 model_lm32_b (SIM_CPU *current_cpu, void *sem_arg)
 118 {
 119 #define FLD(f) abuf->fields.sfmt_be.f
 120   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 121   const IDESC * UNUSED idesc = abuf->idesc;
 122   int cycles = 0;
 123   {
 124     int referenced = 0;
 125     int UNUSED insn_referenced = abuf->written;
 126     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 127   }
 128   return cycles;
 129 #undef FLD
 130 }
 131
 132 static int
 133 model_lm32_bi (SIM_CPU *current_cpu, void *sem_arg)
 134 {
 135 #define FLD(f) abuf->fields.sfmt_bi.f
 136   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 137   const IDESC * UNUSED idesc = abuf->idesc;
 138   int cycles = 0;
 139   {
 140     int referenced = 0;
 141     int UNUSED insn_referenced = abuf->written;
 142     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 143   }
 144   return cycles;
 145 #undef FLD
 146 }
 147
 148 static int
 149 model_lm32_be (SIM_CPU *current_cpu, void *sem_arg)
 150 {
 151 #define FLD(f) abuf->fields.sfmt_be.f
 152   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 153   const IDESC * UNUSED idesc = abuf->idesc;
 154   int cycles = 0;
 155   {
 156     int referenced = 0;
 157     int UNUSED insn_referenced = abuf->written;
 158     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 159   }
 160   return cycles;
 161 #undef FLD
 162 }
 163
 164 static int
 165 model_lm32_bg (SIM_CPU *current_cpu, void *sem_arg)
 166 {
 167 #define FLD(f) abuf->fields.sfmt_be.f
 168   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 169   const IDESC * UNUSED idesc = abuf->idesc;
 170   int cycles = 0;
 171   {
 172     int referenced = 0;
 173     int UNUSED insn_referenced = abuf->written;
 174     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 175   }
 176   return cycles;
 177 #undef FLD
 178 }
 179
 180 static int
 181 model_lm32_bge (SIM_CPU *current_cpu, void *sem_arg)
 182 {
 183 #define FLD(f) abuf->fields.sfmt_be.f
 184   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 185   const IDESC * UNUSED idesc = abuf->idesc;
 186   int cycles = 0;
 187   {
 188     int referenced = 0;
 189     int UNUSED insn_referenced = abuf->written;
 190     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 191   }
 192   return cycles;
 193 #undef FLD
 194 }
 195
 196 static int
 197 model_lm32_bgeu (SIM_CPU *current_cpu, void *sem_arg)
 198 {
 199 #define FLD(f) abuf->fields.sfmt_be.f
 200   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 201   const IDESC * UNUSED idesc = abuf->idesc;
 202   int cycles = 0;
 203   {
 204     int referenced = 0;
 205     int UNUSED insn_referenced = abuf->written;
 206     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 207   }
 208   return cycles;
 209 #undef FLD
 210 }
 211
 212 static int
 213 model_lm32_bgu (SIM_CPU *current_cpu, void *sem_arg)
 214 {
 215 #define FLD(f) abuf->fields.sfmt_be.f
 216   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 217   const IDESC * UNUSED idesc = abuf->idesc;
 218   int cycles = 0;
 219   {
 220     int referenced = 0;
 221     int UNUSED insn_referenced = abuf->written;
 222     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 223   }
 224   return cycles;
 225 #undef FLD
 226 }
 227
 228 static int
 229 model_lm32_bne (SIM_CPU *current_cpu, void *sem_arg)
 230 {
 231 #define FLD(f) abuf->fields.sfmt_be.f
 232   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 233   const IDESC * UNUSED idesc = abuf->idesc;
 234   int cycles = 0;
 235   {
 236     int referenced = 0;
 237     int UNUSED insn_referenced = abuf->written;
 238     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 239   }
 240   return cycles;
 241 #undef FLD
 242 }
 243
 244 static int
 245 model_lm32_call (SIM_CPU *current_cpu, void *sem_arg)
 246 {
 247 #define FLD(f) abuf->fields.sfmt_be.f
 248   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 249   const IDESC * UNUSED idesc = abuf->idesc;
 250   int cycles = 0;
 251   {
 252     int referenced = 0;
 253     int UNUSED insn_referenced = abuf->written;
 254     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 255   }
 256   return cycles;
 257 #undef FLD
 258 }
 259
 260 static int
 261 model_lm32_calli (SIM_CPU *current_cpu, void *sem_arg)
 262 {
 263 #define FLD(f) abuf->fields.sfmt_bi.f
 264   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 265   const IDESC * UNUSED idesc = abuf->idesc;
 266   int cycles = 0;
 267   {
 268     int referenced = 0;
 269     int UNUSED insn_referenced = abuf->written;
 270     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 271   }
 272   return cycles;
 273 #undef FLD
 274 }
 275
 276 static int
 277 model_lm32_cmpe (SIM_CPU *current_cpu, void *sem_arg)
 278 {
 279 #define FLD(f) abuf->fields.sfmt_user.f
 280   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 281   const IDESC * UNUSED idesc = abuf->idesc;
 282   int cycles = 0;
 283   {
 284     int referenced = 0;
 285     int UNUSED insn_referenced = abuf->written;
 286     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 287   }
 288   return cycles;
 289 #undef FLD
 290 }
 291
 292 static int
 293 model_lm32_cmpei (SIM_CPU *current_cpu, void *sem_arg)
 294 {
 295 #define FLD(f) abuf->fields.sfmt_addi.f
 296   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 297   const IDESC * UNUSED idesc = abuf->idesc;
 298   int cycles = 0;
 299   {
 300     int referenced = 0;
 301     int UNUSED insn_referenced = abuf->written;
 302     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 303   }
 304   return cycles;
 305 #undef FLD
 306 }
 307
 308 static int
 309 model_lm32_cmpg (SIM_CPU *current_cpu, void *sem_arg)
 310 {
 311 #define FLD(f) abuf->fields.sfmt_user.f
 312   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 313   const IDESC * UNUSED idesc = abuf->idesc;
 314   int cycles = 0;
 315   {
 316     int referenced = 0;
 317     int UNUSED insn_referenced = abuf->written;
 318     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 319   }
 320   return cycles;
 321 #undef FLD
 322 }
 323
 324 static int
 325 model_lm32_cmpgi (SIM_CPU *current_cpu, void *sem_arg)
 326 {
 327 #define FLD(f) abuf->fields.sfmt_addi.f
 328   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 329   const IDESC * UNUSED idesc = abuf->idesc;
 330   int cycles = 0;
 331   {
 332     int referenced = 0;
 333     int UNUSED insn_referenced = abuf->written;
 334     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 335   }
 336   return cycles;
 337 #undef FLD
 338 }
 339
 340 static int
 341 model_lm32_cmpge (SIM_CPU *current_cpu, void *sem_arg)
 342 {
 343 #define FLD(f) abuf->fields.sfmt_user.f
 344   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 345   const IDESC * UNUSED idesc = abuf->idesc;
 346   int cycles = 0;
 347   {
 348     int referenced = 0;
 349     int UNUSED insn_referenced = abuf->written;
 350     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 351   }
 352   return cycles;
 353 #undef FLD
 354 }
 355
 356 static int
 357 model_lm32_cmpgei (SIM_CPU *current_cpu, void *sem_arg)
 358 {
 359 #define FLD(f) abuf->fields.sfmt_addi.f
 360   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 361   const IDESC * UNUSED idesc = abuf->idesc;
 362   int cycles = 0;
 363   {
 364     int referenced = 0;
 365     int UNUSED insn_referenced = abuf->written;
 366     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 367   }
 368   return cycles;
 369 #undef FLD
 370 }
 371
 372 static int
 373 model_lm32_cmpgeu (SIM_CPU *current_cpu, void *sem_arg)
 374 {
 375 #define FLD(f) abuf->fields.sfmt_user.f
 376   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 377   const IDESC * UNUSED idesc = abuf->idesc;
 378   int cycles = 0;
 379   {
 380     int referenced = 0;
 381     int UNUSED insn_referenced = abuf->written;
 382     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 383   }
 384   return cycles;
 385 #undef FLD
 386 }
 387
 388 static int
 389 model_lm32_cmpgeui (SIM_CPU *current_cpu, void *sem_arg)
 390 {
 391 #define FLD(f) abuf->fields.sfmt_andi.f
 392   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 393   const IDESC * UNUSED idesc = abuf->idesc;
 394   int cycles = 0;
 395   {
 396     int referenced = 0;
 397     int UNUSED insn_referenced = abuf->written;
 398     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 399   }
 400   return cycles;
 401 #undef FLD
 402 }
 403
 404 static int
 405 model_lm32_cmpgu (SIM_CPU *current_cpu, void *sem_arg)
 406 {
 407 #define FLD(f) abuf->fields.sfmt_user.f
 408   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 409   const IDESC * UNUSED idesc = abuf->idesc;
 410   int cycles = 0;
 411   {
 412     int referenced = 0;
 413     int UNUSED insn_referenced = abuf->written;
 414     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 415   }
 416   return cycles;
 417 #undef FLD
 418 }
 419
 420 static int
 421 model_lm32_cmpgui (SIM_CPU *current_cpu, void *sem_arg)
 422 {
 423 #define FLD(f) abuf->fields.sfmt_andi.f
 424   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 425   const IDESC * UNUSED idesc = abuf->idesc;
 426   int cycles = 0;
 427   {
 428     int referenced = 0;
 429     int UNUSED insn_referenced = abuf->written;
 430     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 431   }
 432   return cycles;
 433 #undef FLD
 434 }
 435
 436 static int
 437 model_lm32_cmpne (SIM_CPU *current_cpu, void *sem_arg)
 438 {
 439 #define FLD(f) abuf->fields.sfmt_user.f
 440   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 441   const IDESC * UNUSED idesc = abuf->idesc;
 442   int cycles = 0;
 443   {
 444     int referenced = 0;
 445     int UNUSED insn_referenced = abuf->written;
 446     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 447   }
 448   return cycles;
 449 #undef FLD
 450 }
 451
 452 static int
 453 model_lm32_cmpnei (SIM_CPU *current_cpu, void *sem_arg)
 454 {
 455 #define FLD(f) abuf->fields.sfmt_addi.f
 456   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 457   const IDESC * UNUSED idesc = abuf->idesc;
 458   int cycles = 0;
 459   {
 460     int referenced = 0;
 461     int UNUSED insn_referenced = abuf->written;
 462     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 463   }
 464   return cycles;
 465 #undef FLD
 466 }
 467
 468 static int
 469 model_lm32_divu (SIM_CPU *current_cpu, void *sem_arg)
 470 {
 471 #define FLD(f) abuf->fields.sfmt_user.f
 472   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 473   const IDESC * UNUSED idesc = abuf->idesc;
 474   int cycles = 0;
 475   {
 476     int referenced = 0;
 477     int UNUSED insn_referenced = abuf->written;
 478     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 479   }
 480   return cycles;
 481 #undef FLD
 482 }
 483
 484 static int
 485 model_lm32_lb (SIM_CPU *current_cpu, void *sem_arg)
 486 {
 487 #define FLD(f) abuf->fields.sfmt_addi.f
 488   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 489   const IDESC * UNUSED idesc = abuf->idesc;
 490   int cycles = 0;
 491   {
 492     int referenced = 0;
 493     int UNUSED insn_referenced = abuf->written;
 494     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 495   }
 496   return cycles;
 497 #undef FLD
 498 }
 499
 500 static int
 501 model_lm32_lbu (SIM_CPU *current_cpu, void *sem_arg)
 502 {
 503 #define FLD(f) abuf->fields.sfmt_addi.f
 504   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 505   const IDESC * UNUSED idesc = abuf->idesc;
 506   int cycles = 0;
 507   {
 508     int referenced = 0;
 509     int UNUSED insn_referenced = abuf->written;
 510     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 511   }
 512   return cycles;
 513 #undef FLD
 514 }
 515
 516 static int
 517 model_lm32_lh (SIM_CPU *current_cpu, void *sem_arg)
 518 {
 519 #define FLD(f) abuf->fields.sfmt_addi.f
 520   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 521   const IDESC * UNUSED idesc = abuf->idesc;
 522   int cycles = 0;
 523   {
 524     int referenced = 0;
 525     int UNUSED insn_referenced = abuf->written;
 526     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 527   }
 528   return cycles;
 529 #undef FLD
 530 }
 531
 532 static int
 533 model_lm32_lhu (SIM_CPU *current_cpu, void *sem_arg)
 534 {
 535 #define FLD(f) abuf->fields.sfmt_addi.f
 536   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 537   const IDESC * UNUSED idesc = abuf->idesc;
 538   int cycles = 0;
 539   {
 540     int referenced = 0;
 541     int UNUSED insn_referenced = abuf->written;
 542     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 543   }
 544   return cycles;
 545 #undef FLD
 546 }
 547
 548 static int
 549 model_lm32_lw (SIM_CPU *current_cpu, void *sem_arg)
 550 {
 551 #define FLD(f) abuf->fields.sfmt_addi.f
 552   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 553   const IDESC * UNUSED idesc = abuf->idesc;
 554   int cycles = 0;
 555   {
 556     int referenced = 0;
 557     int UNUSED insn_referenced = abuf->written;
 558     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 559   }
 560   return cycles;
 561 #undef FLD
 562 }
 563
 564 static int
 565 model_lm32_modu (SIM_CPU *current_cpu, void *sem_arg)
 566 {
 567 #define FLD(f) abuf->fields.sfmt_user.f
 568   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 569   const IDESC * UNUSED idesc = abuf->idesc;
 570   int cycles = 0;
 571   {
 572     int referenced = 0;
 573     int UNUSED insn_referenced = abuf->written;
 574     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 575   }
 576   return cycles;
 577 #undef FLD
 578 }
 579
 580 static int
 581 model_lm32_mul (SIM_CPU *current_cpu, void *sem_arg)
 582 {
 583 #define FLD(f) abuf->fields.sfmt_user.f
 584   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 585   const IDESC * UNUSED idesc = abuf->idesc;
 586   int cycles = 0;
 587   {
 588     int referenced = 0;
 589     int UNUSED insn_referenced = abuf->written;
 590     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 591   }
 592   return cycles;
 593 #undef FLD
 594 }
 595
 596 static int
 597 model_lm32_muli (SIM_CPU *current_cpu, void *sem_arg)
 598 {
 599 #define FLD(f) abuf->fields.sfmt_addi.f
 600   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 601   const IDESC * UNUSED idesc = abuf->idesc;
 602   int cycles = 0;
 603   {
 604     int referenced = 0;
 605     int UNUSED insn_referenced = abuf->written;
 606     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 607   }
 608   return cycles;
 609 #undef FLD
 610 }
 611
 612 static int
 613 model_lm32_nor (SIM_CPU *current_cpu, void *sem_arg)
 614 {
 615 #define FLD(f) abuf->fields.sfmt_user.f
 616   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 617   const IDESC * UNUSED idesc = abuf->idesc;
 618   int cycles = 0;
 619   {
 620     int referenced = 0;
 621     int UNUSED insn_referenced = abuf->written;
 622     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 623   }
 624   return cycles;
 625 #undef FLD
 626 }
 627
 628 static int
 629 model_lm32_nori (SIM_CPU *current_cpu, void *sem_arg)
 630 {
 631 #define FLD(f) abuf->fields.sfmt_andi.f
 632   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 633   const IDESC * UNUSED idesc = abuf->idesc;
 634   int cycles = 0;
 635   {
 636     int referenced = 0;
 637     int UNUSED insn_referenced = abuf->written;
 638     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 639   }
 640   return cycles;
 641 #undef FLD
 642 }
 643
 644 static int
 645 model_lm32_or (SIM_CPU *current_cpu, void *sem_arg)
 646 {
 647 #define FLD(f) abuf->fields.sfmt_user.f
 648   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 649   const IDESC * UNUSED idesc = abuf->idesc;
 650   int cycles = 0;
 651   {
 652     int referenced = 0;
 653     int UNUSED insn_referenced = abuf->written;
 654     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 655   }
 656   return cycles;
 657 #undef FLD
 658 }
 659
 660 static int
 661 model_lm32_ori (SIM_CPU *current_cpu, void *sem_arg)
 662 {
 663 #define FLD(f) abuf->fields.sfmt_andi.f
 664   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 665   const IDESC * UNUSED idesc = abuf->idesc;
 666   int cycles = 0;
 667   {
 668     int referenced = 0;
 669     int UNUSED insn_referenced = abuf->written;
 670     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 671   }
 672   return cycles;
 673 #undef FLD
 674 }
 675
 676 static int
 677 model_lm32_orhii (SIM_CPU *current_cpu, void *sem_arg)
 678 {
 679 #define FLD(f) abuf->fields.sfmt_andi.f
 680   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 681   const IDESC * UNUSED idesc = abuf->idesc;
 682   int cycles = 0;
 683   {
 684     int referenced = 0;
 685     int UNUSED insn_referenced = abuf->written;
 686     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 687   }
 688   return cycles;
 689 #undef FLD
 690 }
 691
 692 static int
 693 model_lm32_rcsr (SIM_CPU *current_cpu, void *sem_arg)
 694 {
 695 #define FLD(f) abuf->fields.sfmt_rcsr.f
 696   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 697   const IDESC * UNUSED idesc = abuf->idesc;
 698   int cycles = 0;
 699   {
 700     int referenced = 0;
 701     int UNUSED insn_referenced = abuf->written;
 702     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 703   }
 704   return cycles;
 705 #undef FLD
 706 }
 707
 708 static int
 709 model_lm32_sb (SIM_CPU *current_cpu, void *sem_arg)
 710 {
 711 #define FLD(f) abuf->fields.sfmt_addi.f
 712   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 713   const IDESC * UNUSED idesc = abuf->idesc;
 714   int cycles = 0;
 715   {
 716     int referenced = 0;
 717     int UNUSED insn_referenced = abuf->written;
 718     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 719   }
 720   return cycles;
 721 #undef FLD
 722 }
 723
 724 static int
 725 model_lm32_sextb (SIM_CPU *current_cpu, void *sem_arg)
 726 {
 727 #define FLD(f) abuf->fields.sfmt_user.f
 728   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 729   const IDESC * UNUSED idesc = abuf->idesc;
 730   int cycles = 0;
 731   {
 732     int referenced = 0;
 733     int UNUSED insn_referenced = abuf->written;
 734     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 735   }
 736   return cycles;
 737 #undef FLD
 738 }
 739
 740 static int
 741 model_lm32_sexth (SIM_CPU *current_cpu, void *sem_arg)
 742 {
 743 #define FLD(f) abuf->fields.sfmt_user.f
 744   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 745   const IDESC * UNUSED idesc = abuf->idesc;
 746   int cycles = 0;
 747   {
 748     int referenced = 0;
 749     int UNUSED insn_referenced = abuf->written;
 750     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 751   }
 752   return cycles;
 753 #undef FLD
 754 }
 755
 756 static int
 757 model_lm32_sh (SIM_CPU *current_cpu, void *sem_arg)
 758 {
 759 #define FLD(f) abuf->fields.sfmt_addi.f
 760   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 761   const IDESC * UNUSED idesc = abuf->idesc;
 762   int cycles = 0;
 763   {
 764     int referenced = 0;
 765     int UNUSED insn_referenced = abuf->written;
 766     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 767   }
 768   return cycles;
 769 #undef FLD
 770 }
 771
 772 static int
 773 model_lm32_sl (SIM_CPU *current_cpu, void *sem_arg)
 774 {
 775 #define FLD(f) abuf->fields.sfmt_user.f
 776   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 777   const IDESC * UNUSED idesc = abuf->idesc;
 778   int cycles = 0;
 779   {
 780     int referenced = 0;
 781     int UNUSED insn_referenced = abuf->written;
 782     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 783   }
 784   return cycles;
 785 #undef FLD
 786 }
 787
 788 static int
 789 model_lm32_sli (SIM_CPU *current_cpu, void *sem_arg)
 790 {
 791 #define FLD(f) abuf->fields.sfmt_addi.f
 792   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 793   const IDESC * UNUSED idesc = abuf->idesc;
 794   int cycles = 0;
 795   {
 796     int referenced = 0;
 797     int UNUSED insn_referenced = abuf->written;
 798     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 799   }
 800   return cycles;
 801 #undef FLD
 802 }
 803
 804 static int
 805 model_lm32_sr (SIM_CPU *current_cpu, void *sem_arg)
 806 {
 807 #define FLD(f) abuf->fields.sfmt_user.f
 808   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 809   const IDESC * UNUSED idesc = abuf->idesc;
 810   int cycles = 0;
 811   {
 812     int referenced = 0;
 813     int UNUSED insn_referenced = abuf->written;
 814     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 815   }
 816   return cycles;
 817 #undef FLD
 818 }
 819
 820 static int
 821 model_lm32_sri (SIM_CPU *current_cpu, void *sem_arg)
 822 {
 823 #define FLD(f) abuf->fields.sfmt_addi.f
 824   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 825   const IDESC * UNUSED idesc = abuf->idesc;
 826   int cycles = 0;
 827   {
 828     int referenced = 0;
 829     int UNUSED insn_referenced = abuf->written;
 830     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 831   }
 832   return cycles;
 833 #undef FLD
 834 }
 835
 836 static int
 837 model_lm32_sru (SIM_CPU *current_cpu, void *sem_arg)
 838 {
 839 #define FLD(f) abuf->fields.sfmt_user.f
 840   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 841   const IDESC * UNUSED idesc = abuf->idesc;
 842   int cycles = 0;
 843   {
 844     int referenced = 0;
 845     int UNUSED insn_referenced = abuf->written;
 846     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 847   }
 848   return cycles;
 849 #undef FLD
 850 }
 851
 852 static int
 853 model_lm32_srui (SIM_CPU *current_cpu, void *sem_arg)
 854 {
 855 #define FLD(f) abuf->fields.sfmt_addi.f
 856   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 857   const IDESC * UNUSED idesc = abuf->idesc;
 858   int cycles = 0;
 859   {
 860     int referenced = 0;
 861     int UNUSED insn_referenced = abuf->written;
 862     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 863   }
 864   return cycles;
 865 #undef FLD
 866 }
 867
 868 static int
 869 model_lm32_sub (SIM_CPU *current_cpu, void *sem_arg)
 870 {
 871 #define FLD(f) abuf->fields.sfmt_user.f
 872   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 873   const IDESC * UNUSED idesc = abuf->idesc;
 874   int cycles = 0;
 875   {
 876     int referenced = 0;
 877     int UNUSED insn_referenced = abuf->written;
 878     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 879   }
 880   return cycles;
 881 #undef FLD
 882 }
 883
 884 static int
 885 model_lm32_sw (SIM_CPU *current_cpu, void *sem_arg)
 886 {
 887 #define FLD(f) abuf->fields.sfmt_addi.f
 888   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 889   const IDESC * UNUSED idesc = abuf->idesc;
 890   int cycles = 0;
 891   {
 892     int referenced = 0;
 893     int UNUSED insn_referenced = abuf->written;
 894     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 895   }
 896   return cycles;
 897 #undef FLD
 898 }
 899
 900 static int
 901 model_lm32_user (SIM_CPU *current_cpu, void *sem_arg)
 902 {
 903 #define FLD(f) abuf->fields.sfmt_user.f
 904   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 905   const IDESC * UNUSED idesc = abuf->idesc;
 906   int cycles = 0;
 907   {
 908     int referenced = 0;
 909     int UNUSED insn_referenced = abuf->written;
 910     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 911   }
 912   return cycles;
 913 #undef FLD
 914 }
 915
 916 static int
 917 model_lm32_wcsr (SIM_CPU *current_cpu, void *sem_arg)
 918 {
 919 #define FLD(f) abuf->fields.sfmt_wcsr.f
 920   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 921   const IDESC * UNUSED idesc = abuf->idesc;
 922   int cycles = 0;
 923   {
 924     int referenced = 0;
 925     int UNUSED insn_referenced = abuf->written;
 926     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 927   }
 928   return cycles;
 929 #undef FLD
 930 }
 931
 932 static int
 933 model_lm32_xor (SIM_CPU *current_cpu, void *sem_arg)
 934 {
 935 #define FLD(f) abuf->fields.sfmt_user.f
 936   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 937   const IDESC * UNUSED idesc = abuf->idesc;
 938   int cycles = 0;
 939   {
 940     int referenced = 0;
 941     int UNUSED insn_referenced = abuf->written;
 942     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 943   }
 944   return cycles;
 945 #undef FLD
 946 }
 947
 948 static int
 949 model_lm32_xori (SIM_CPU *current_cpu, void *sem_arg)
 950 {
 951 #define FLD(f) abuf->fields.sfmt_andi.f
 952   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 953   const IDESC * UNUSED idesc = abuf->idesc;
 954   int cycles = 0;
 955   {
 956     int referenced = 0;
 957     int UNUSED insn_referenced = abuf->written;
 958     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 959   }
 960   return cycles;
 961 #undef FLD
 962 }
 963
 964 static int
 965 model_lm32_xnor (SIM_CPU *current_cpu, void *sem_arg)
 966 {
 967 #define FLD(f) abuf->fields.sfmt_user.f
 968   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 969   const IDESC * UNUSED idesc = abuf->idesc;
 970   int cycles = 0;
 971   {
 972     int referenced = 0;
 973     int UNUSED insn_referenced = abuf->written;
 974     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 975   }
 976   return cycles;
 977 #undef FLD
 978 }
 979
 980 static int
 981 model_lm32_xnori (SIM_CPU *current_cpu, void *sem_arg)
 982 {
 983 #define FLD(f) abuf->fields.sfmt_andi.f
 984   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
 985   const IDESC * UNUSED idesc = abuf->idesc;
 986   int cycles = 0;
 987   {
 988     int referenced = 0;
 989     int UNUSED insn_referenced = abuf->written;
 990     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
 991   }
 992   return cycles;
 993 #undef FLD
 994 }
 995
 996 static int
 997 model_lm32_break (SIM_CPU *current_cpu, void *sem_arg)
 998 {
 999 #define FLD(f) abuf->fields.sfmt_empty.f
1000   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1001   const IDESC * UNUSED idesc = abuf->idesc;
1002   int cycles = 0;
1003   {
1004     int referenced = 0;
1005     int UNUSED insn_referenced = abuf->written;
1006     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
1007   }
1008   return cycles;
1009 #undef FLD
1010 }
1011
1012 static int
1013 model_lm32_scall (SIM_CPU *current_cpu, void *sem_arg)
1014 {
1015 #define FLD(f) abuf->fields.sfmt_empty.f
1016   const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1017   const IDESC * UNUSED idesc = abuf->idesc;
1018   int cycles = 0;
1019   {
1020     int referenced = 0;
1021     int UNUSED insn_referenced = abuf->written;
1022     cycles += lm32bf_model_lm32_u_exec (current_cpu, idesc, 0, referenced);
1023   }
1024   return cycles;
1025 #undef FLD
1026 }
1027
1028 /* We assume UNIT_NONE == 0 because the tables don't always terminate
1029    entries with it.  */
1030
1031 /* Model timing data for `lm32'.  */
1032
1033 static const INSN_TIMING lm32_timing[] = {
1034   { LM32BF_INSN_X_INVALID, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1035   { LM32BF_INSN_X_AFTER, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1036   { LM32BF_INSN_X_BEFORE, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1037   { LM32BF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1038   { LM32BF_INSN_X_CHAIN, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1039   { LM32BF_INSN_X_BEGIN, 0, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1040   { LM32BF_INSN_ADD, model_lm32_add, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1041   { LM32BF_INSN_ADDI, model_lm32_addi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1042   { LM32BF_INSN_AND, model_lm32_and, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1043   { LM32BF_INSN_ANDI, model_lm32_andi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1044   { LM32BF_INSN_ANDHII, model_lm32_andhii, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1045   { LM32BF_INSN_B, model_lm32_b, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1046   { LM32BF_INSN_BI, model_lm32_bi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1047   { LM32BF_INSN_BE, model_lm32_be, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1048   { LM32BF_INSN_BG, model_lm32_bg, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1049   { LM32BF_INSN_BGE, model_lm32_bge, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1050   { LM32BF_INSN_BGEU, model_lm32_bgeu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1051   { LM32BF_INSN_BGU, model_lm32_bgu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1052   { LM32BF_INSN_BNE, model_lm32_bne, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1053   { LM32BF_INSN_CALL, model_lm32_call, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1054   { LM32BF_INSN_CALLI, model_lm32_calli, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1055   { LM32BF_INSN_CMPE, model_lm32_cmpe, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1056   { LM32BF_INSN_CMPEI, model_lm32_cmpei, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1057   { LM32BF_INSN_CMPG, model_lm32_cmpg, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1058   { LM32BF_INSN_CMPGI, model_lm32_cmpgi, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1059   { LM32BF_INSN_CMPGE, model_lm32_cmpge, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1060   { LM32BF_INSN_CMPGEI, model_lm32_cmpgei, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1061   { LM32BF_INSN_CMPGEU, model_lm32_cmpgeu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1062   { LM32BF_INSN_CMPGEUI, model_lm32_cmpgeui, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1063   { LM32BF_INSN_CMPGU, model_lm32_cmpgu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1064   { LM32BF_INSN_CMPGUI, model_lm32_cmpgui, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1065   { LM32BF_INSN_CMPNE, model_lm32_cmpne, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1066   { LM32BF_INSN_CMPNEI, model_lm32_cmpnei, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1067   { LM32BF_INSN_DIVU, model_lm32_divu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1068   { LM32BF_INSN_LB, model_lm32_lb, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1069   { LM32BF_INSN_LBU, model_lm32_lbu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1070   { LM32BF_INSN_LH, model_lm32_lh, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1071   { LM32BF_INSN_LHU, model_lm32_lhu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1072   { LM32BF_INSN_LW, model_lm32_lw, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1073   { LM32BF_INSN_MODU, model_lm32_modu, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1074   { LM32BF_INSN_MUL, model_lm32_mul, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1075   { LM32BF_INSN_MULI, model_lm32_muli, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1076   { LM32BF_INSN_NOR, model_lm32_nor, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1077   { LM32BF_INSN_NORI, model_lm32_nori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1078   { LM32BF_INSN_OR, model_lm32_or, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1079   { LM32BF_INSN_ORI, model_lm32_ori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1080   { LM32BF_INSN_ORHII, model_lm32_orhii, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1081   { LM32BF_INSN_RCSR, model_lm32_rcsr, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1082   { LM32BF_INSN_SB, model_lm32_sb, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1083   { LM32BF_INSN_SEXTB, model_lm32_sextb, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1084   { LM32BF_INSN_SEXTH, model_lm32_sexth, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1085   { LM32BF_INSN_SH, model_lm32_sh, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1086   { LM32BF_INSN_SL, model_lm32_sl, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1087   { LM32BF_INSN_SLI, model_lm32_sli, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1088   { LM32BF_INSN_SR, model_lm32_sr, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1089   { LM32BF_INSN_SRI, model_lm32_sri, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1090   { LM32BF_INSN_SRU, model_lm32_sru, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1091   { LM32BF_INSN_SRUI, model_lm32_srui, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1092   { LM32BF_INSN_SUB, model_lm32_sub, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1093   { LM32BF_INSN_SW, model_lm32_sw, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1094   { LM32BF_INSN_USER, model_lm32_user, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1095   { LM32BF_INSN_WCSR, model_lm32_wcsr, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1096   { LM32BF_INSN_XOR, model_lm32_xor, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1097   { LM32BF_INSN_XORI, model_lm32_xori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1098   { LM32BF_INSN_XNOR, model_lm32_xnor, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1099   { LM32BF_INSN_XNORI, model_lm32_xnori, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1100   { LM32BF_INSN_BREAK, model_lm32_break, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1101   { LM32BF_INSN_SCALL, model_lm32_scall, { { (int) UNIT_LM32_U_EXEC, 1, 1 } } },
1102 };
1103
1104 #endif /* WITH_PROFILE_MODEL_P */
1105
1106 static void
1107 lm32_model_init (SIM_CPU *cpu)
1108 {
1109   CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_LM32_DATA));
1110 }
1111
1112 #if WITH_PROFILE_MODEL_P
1113 #define TIMING_DATA(td) td
1114 #else
1115 #define TIMING_DATA(td) 0
1116 #endif
1117
1118 static const SIM_MODEL lm32_models[] =
1119 {
1120   { "lm32", & lm32_mach, MODEL_LM32, TIMING_DATA (& lm32_timing[0]), lm32_model_init },
1121   { 0 }
1122 };
1123
1124 /* The properties of this cpu's implementation.  */
1125
1126 static const SIM_MACH_IMP_PROPERTIES lm32bf_imp_properties =
1127 {
1128   sizeof (SIM_CPU),
1129 #if WITH_SCACHE
1130   sizeof (SCACHE)
1131 #else
1132   0
1133 #endif
1134 };
1135
1136
1137 static void
1138 lm32bf_prepare_run (SIM_CPU *cpu)
1139 {
1140   if (CPU_IDESC (cpu) == NULL)
1141     lm32bf_init_idesc_table (cpu);
1142 }
1143
1144 static const CGEN_INSN *
1145 lm32bf_get_idata (SIM_CPU *cpu, int inum)
1146 {
1147   return CPU_IDESC (cpu) [inum].idata;
1148 }
1149
1150 static void
1151 lm32_init_cpu (SIM_CPU *cpu)
1152 {
1153   CPU_REG_FETCH (cpu) = lm32bf_fetch_register;
1154   CPU_REG_STORE (cpu) = lm32bf_store_register;
1155   CPU_PC_FETCH (cpu) = lm32bf_h_pc_get;
1156   CPU_PC_STORE (cpu) = lm32bf_h_pc_set;
1157   CPU_GET_IDATA (cpu) = lm32bf_get_idata;
1158   CPU_MAX_INSNS (cpu) = LM32BF_INSN__MAX;
1159   CPU_INSN_NAME (cpu) = cgen_insn_name;
1160   CPU_FULL_ENGINE_FN (cpu) = lm32bf_engine_run_full;
1161 #if WITH_FAST
1162   CPU_FAST_ENGINE_FN (cpu) = lm32bf_engine_run_fast;
1163 #else
1164   CPU_FAST_ENGINE_FN (cpu) = lm32bf_engine_run_full;
1165 #endif
1166 }
1167
1168 const SIM_MACH lm32_mach =
1169 {
1170   "lm32", "lm32", MACH_LM32,
1171   32, 32, & lm32_models[0], & lm32bf_imp_properties,
1172   lm32_init_cpu,
1173   lm32bf_prepare_run
1174 };
1175