| blob | 5a38f1bd5264a574ae95c8569dc3d02fd185466b |
1 ; Renesas M32C CPU description. -*- Scheme -*-
2 ;
3 ; Copyright 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
4 ;
5 ; Contributed by Red Hat Inc; developed under contract from Renesas.
6 ;
7 ; This file is part of the GNU Binutils.
8 ;
9 ; This program is free software; you can redistribute it and/or modify
10 ; it under the terms of the GNU General Public License as published by
11 ; the Free Software Foundation; either version 3 of the License, or
12 ; (at your option) any later version.
13 ;
14 ; This program is distributed in the hope that it will be useful,
15 ; but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ; GNU General Public License for more details.
18 ;
19 ; You should have received a copy of the GNU General Public License
20 ; along with this program; if not, write to the Free Software
21 ; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
22 ; MA 02110-1301, USA.
24 (include "simplify.inc")
26 (define-arch
27 (name m32c)
28 (comment "Renesas M32C")
29 (default-alignment forced)
30 (insn-lsb0? #f)
31 (machs m16c m32c)
32 (isas m16c m32c)
33 )
35 (define-isa
36 (name m16c)
38 (default-insn-bitsize 32)
40 ; Number of bytes of insn we can initially fetch.
41 (base-insn-bitsize 32)
43 ; Used in computing bit numbers.
44 (default-insn-word-bitsize 32)
46 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
48 ; fetches 1 insn at a time.
49 (liw-insns 1)
51 ; executes 1 insn at a time.
52 (parallel-insns 1)
53 )
55 (define-isa
56 (name m32c)
58 (default-insn-bitsize 32)
60 ; Number of bytes of insn we can initially fetch.
61 (base-insn-bitsize 32)
63 ; Used in computing bit numbers.
64 (default-insn-word-bitsize 32)
66 (decode-assist (0 1 2 3 4 5 6 7)) ; Initial bitnumbers to decode insns by.
68 ; fetches 1 insn at a time.
69 (liw-insns 1)
71 ; executes 1 insn at a time.
72 (parallel-insns 1)
73 )
75 (define-cpu
76 ; cpu names must be distinct from the architecture name and machine names.
77 ; The "b" suffix stands for "base" and is the convention.
78 ; The "f" suffix stands for "family" and is the convention.
79 (name m16cbf)
80 (comment "Renesas M16C base family")
81 (insn-endian big)
82 (data-endian little)
83 (word-bitsize 16)
84 )
86 (define-cpu
87 ; cpu names must be distinct from the architecture name and machine names.
88 ; The "b" suffix stands for "base" and is the convention.
89 ; The "f" suffix stands for "family" and is the convention.
90 (name m32cbf)
91 (comment "Renesas M32C base family")
92 (insn-endian big)
93 (data-endian little)
94 (word-bitsize 16)
95 )
97 (define-mach
98 (name m16c)
99 (comment "Generic M16C cpu")
100 (cpu m32cbf)
101 )
103 (define-mach
104 (name m32c)
105 (comment "Generic M32C cpu")
106 (cpu m32cbf)
107 )
109 ; Model descriptions.
111 (define-model
112 (name m16c)
113 (comment "m16c") (attrs)
114 (mach m16c)
116 ; `state' is a list of variables for recording model state
117 ; (state)
118 (unit u-exec "Execution Unit" ()
119 1 1 ; issue done
120 () ; state
121 () ; inputs
122 () ; outputs
123 () ; profile action (default)
124 )
125 )
127 (define-model
128 (name m32c)
129 (comment "m32c") (attrs)
130 (mach m32c)
132 ; `state' is a list of variables for recording model state
133 ; (state)
134 (unit u-exec "Execution Unit" ()
135 1 1 ; issue done
136 () ; state
137 () ; inputs
138 () ; outputs
139 () ; profile action (default)
140 )
141 )
143 (define-attr
144 (type enum)
145 (name RL_TYPE)
146 (values NONE JUMP 1ADDR 2ADDR)
147 (default NONE)
148 )
150 ; Macros to simplify MACH attribute specification.
152 (define-pmacro all-isas () (ISA m16c,m32c))
153 (define-pmacro m16c-isa () (ISA m16c))
154 (define-pmacro m32c-isa () (ISA m32c))
156 (define-pmacro MACH16 (MACH m16c))
157 (define-pmacro MACH32 (MACH m32c))
159 (define-pmacro (machine size)
160 (MACH (.sym m size c)) (ISA (.sym m size c)))
162 (define-pmacro RL_JUMP (RL_TYPE JUMP))
163 (define-pmacro RL_1ADDR (RL_TYPE 1ADDR))
164 (define-pmacro RL_2ADDR (RL_TYPE 2ADDR))
166 \f
167 ;=============================================================
168 ; Fields
169 ;-------------------------------------------------------------
170 ; Main opcodes
171 ;
172 (dnf f-0-1 "opcode" (all-isas) 0 1)
173 (dnf f-0-2 "opcode" (all-isas) 0 2)
174 (dnf f-0-3 "opcode" (all-isas) 0 3)
175 (dnf f-0-4 "opcode" (all-isas) 0 4)
176 (dnf f-1-3 "opcode" (all-isas) 1 3)
177 (dnf f-2-2 "opcode" (all-isas) 2 2)
178 (dnf f-3-4 "opcode" (all-isas) 3 4)
179 (dnf f-3-1 "opcode" (all-isas) 3 1)
180 (dnf f-4-1 "opcode" (all-isas) 4 1)
181 (dnf f-4-3 "opcode" (all-isas) 4 3)
182 (dnf f-4-4 "opcode" (all-isas) 4 4)
183 (dnf f-4-6 "opcode" (all-isas) 4 6)
184 (dnf f-5-1 "opcode" (all-isas) 5 1)
185 (dnf f-5-3 "opcode" (all-isas) 5 3)
186 (dnf f-6-2 "opcode" (all-isas) 6 2)
187 (dnf f-7-1 "opcode" (all-isas) 7 1)
188 (dnf f-8-1 "opcode" (all-isas) 8 1)
189 (dnf f-8-2 "opcode" (all-isas) 8 2)
190 (dnf f-8-3 "opcode" (all-isas) 8 3)
191 (dnf f-8-4 "opcode" (all-isas) 8 4)
192 (dnf f-8-8 "opcode" (all-isas) 8 8)
193 (dnf f-9-3 "opcode" (all-isas) 9 3)
194 (dnf f-9-1 "opcode" (all-isas) 9 1)
195 (dnf f-10-1 "opcode" (all-isas) 10 1)
196 (dnf f-10-2 "opcode" (all-isas) 10 2)
197 (dnf f-10-3 "opcode" (all-isas) 10 3)
198 (dnf f-11-1 "opcode" (all-isas) 11 1)
199 (dnf f-12-1 "opcode" (all-isas) 12 1)
200 (dnf f-12-2 "opcode" (all-isas) 12 2)
201 (dnf f-12-3 "opcode" (all-isas) 12 3)
202 (dnf f-12-4 "opcode" (all-isas) 12 4)
203 (dnf f-12-6 "opcode" (all-isas) 12 6)
204 (dnf f-13-3 "opcode" (all-isas) 13 3)
205 (dnf f-14-1 "opcode" (all-isas) 14 1)
206 (dnf f-14-2 "opcode" (all-isas) 14 2)
207 (dnf f-15-1 "opcode" (all-isas) 15 1)
208 (dnf f-16-1 "opcode" (all-isas) 16 1)
209 (dnf f-16-2 "opcode" (all-isas) 16 2)
210 (dnf f-16-4 "opcode" (all-isas) 16 4)
211 (dnf f-16-8 "opcode" (all-isas) 16 8)
212 (dnf f-18-1 "opcode" (all-isas) 18 1)
213 (dnf f-18-2 "opcode" (all-isas) 18 2)
214 (dnf f-18-3 "opcode" (all-isas) 18 3)
215 (dnf f-20-1 "opcode" (all-isas) 20 1)
216 (dnf f-20-3 "opcode" (all-isas) 20 3)
217 (dnf f-20-2 "opcode" (all-isas) 20 2)
218 (dnf f-20-4 "opcode" (all-isas) 20 4)
219 (dnf f-21-3 "opcode" (all-isas) 21 3)
220 (dnf f-24-2 "opcode" (all-isas) 24 2)
221 (dnf f-24-8 "opcode" (all-isas) 24 8)
222 (dnf f-32-16 "opcode" (all-isas) 32 16)
224 ;-------------------------------------------------------------
225 ; Registers
226 ;-------------------------------------------------------------
228 (dnf f-src16-rn "source Rn for m16c" (MACH16 m16c-isa) 10 2)
229 (dnf f-src16-an "source An for m16c" (MACH16 m16c-isa) 11 1)
231 (dnf f-src32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 11 1)
232 (dnf f-src32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 19 1)
234 ; QI mode gr encoding for m32c is different than for m16c. The hardware
235 ; is indexed using the m16c encoding, so perform the transformation here.
236 ; register m16c m32c
237 ; ----------------------
238 ; r0l 00'b 10'b
239 ; r0h 01'b 00'b
240 ; r1l 10'b 11'b
241 ; r1h 11'b 01'b
242 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
243 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
244 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
245 )
246 ; QI mode gr encoding for m32c is different than for m16c. The hardware
247 ; is indexed using the m16c encoding, so perform the transformation here.
248 ; register m16c m32c
249 ; ----------------------
250 ; r0l 00'b 10'b
251 ; r0h 01'b 00'b
252 ; r1l 10'b 11'b
253 ; r1h 11'b 01'b
254 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
255 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
256 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
257 )
258 ; HI mode gr encoding for m32c is different than for m16c. The hardware
259 ; is indexed using the m16c encoding, so perform the transformation here.
260 ; register m16c m32c
261 ; ----------------------
262 ; r0 00'b 10'b
263 ; r1 01'b 11'b
264 ; r2 10'b 00'b
265 ; r3 11'b 01'b
266 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
267 ((value pc) (mod USI (add value 2) 4)) ; insert
268 ((value pc) (mod USI (add value 2) 4)) ; extract
269 )
271 ; HI mode gr encoding for m32c is different than for m16c. The hardware
272 ; is indexed using the m16c encoding, so perform the transformation here.
273 ; register m16c m32c
274 ; ----------------------
275 ; r0 00'b 10'b
276 ; r1 01'b 11'b
277 ; r2 10'b 00'b
278 ; r3 11'b 01'b
279 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
280 ((value pc) (mod USI (add value 2) 4)) ; insert
281 ((value pc) (mod USI (add value 2) 4)) ; extract
282 )
284 ; SI mode gr encoding for m32c is as follows:
285 ; register encoding index
286 ; -------------------------
287 ; r2r0 10'b 0
288 ; r3r1 11'b 1
289 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
290 ((value pc) (add USI value 2)) ; insert
291 ((value pc) (sub USI value 2)) ; extract
292 )
293 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
294 ((value pc) (add USI value 2)) ; insert
295 ((value pc) (sub USI value 2)) ; extract
296 )
298 (dnf f-dst32-rn-ext-unprefixed "destination Rn for m32c" (MACH32 m32c-isa) 9 1)
300 (dnf f-dst16-rn "destination Rn for m16c" (MACH16 m16c-isa) 14 2)
301 (dnf f-dst16-rn-ext "destination Rn for m16c" (MACH16 m16c-isa) 14 1)
302 (dnf f-dst16-rn-QI-s "destination Rn for m16c" (MACH16 m16c-isa) 5 1)
304 (dnf f-dst16-an "destination An for m16c" (MACH16 m16c-isa) 15 1)
305 (dnf f-dst16-an-s "destination An for m16c" (MACH16 m16c-isa) 4 1)
307 (dnf f-dst32-an-unprefixed "destination An for m32c" (MACH32 m32c-isa) 9 1)
308 (dnf f-dst32-an-prefixed "destination An for m32c" (MACH32 m32c-isa) 17 1)
310 ; QI mode gr encoding for m32c is different than for m16c. The hardware
311 ; is indexed using the m16c encoding, so perform the transformation here.
312 ; register m16c m32c
313 ; ----------------------
314 ; r0l 00'b 10'b
315 ; r0h 01'b 00'b
316 ; r1l 10'b 11'b
317 ; r1h 11'b 01'b
318 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
319 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
320 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
321 )
322 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
323 ((value pc) (or USI (and (sll (inv value) 1) 2) (and (srl value 1) 1))) ; insert
324 ((value pc) (or USI (and (inv (srl value 1)) 1) (and (sll value 1) 2))) ; extract
325 )
326 ; HI mode gr encoding for m32c is different than for m16c. The hardware
327 ; is indexed using the m16c encoding, so perform the transformation here.
328 ; register m16c m32c
329 ; ----------------------
330 ; r0 00'b 10'b
331 ; r1 01'b 11'b
332 ; r2 10'b 00'b
333 ; r3 11'b 01'b
334 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
335 ((value pc) (mod USI (add value 2) 4)) ; insert
336 ((value pc) (mod USI (add value 2) 4)) ; extract
337 )
338 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
339 ((value pc) (mod USI (add value 2) 4)) ; insert
340 ((value pc) (mod USI (add value 2) 4)) ; extract
341 )
342 ; SI mode gr encoding for m32c is as follows:
343 ; register encoding index
344 ; -------------------------
345 ; r2r0 10'b 0
346 ; r3r1 11'b 1
347 (df f-dst32-rn-unprefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 8 2 UINT
348 ((value pc) (add USI value 2)) ; insert
349 ((value pc) (sub USI value 2)) ; extract
350 )
351 (df f-dst32-rn-prefixed-SI "destination Rn SI for m32c" (MACH32 m32c-isa) 16 2 UINT
352 ((value pc) (add USI value 2)) ; insert
353 ((value pc) (sub USI value 2)) ; extract
354 )
356 (dnf f-dst16-1-S "destination R0[hl] for m16c" (MACH16 m16c-isa) 5 1)
358 ;-------------------------------------------------------------
359 ; Immediates embedded in the base insn
360 ;-------------------------------------------------------------
362 (df f-imm-8-s4 "4 bit signed" (all-isas) 8 4 INT #f #f)
363 (df f-imm-12-s4 "4 bit signed" (all-isas) 12 4 INT #f #f)
364 (df f-imm-13-u3 "3 bit unsigned" (all-isas) 13 3 UINT #f #f)
365 (df f-imm-20-s4 "4 bit signed" (all-isas) 20 4 INT #f #f)
367 (df f-imm1-S "1 bit immediate for short format binary insns" (MACH32 m32c-isa) 2 1 UINT
368 ((value pc) (sub USI value 1)) ; insert
369 ((value pc) (add USI value 1)) ; extract
370 )
372 (dnmf f-imm3-S "3 bit unsigned for short format insns" (all-isas) UINT
373 (f-2-2 f-7-1)
374 (sequence () ; insert
375 (set (ifield f-7-1) (and (sub (ifield f-imm3-S) 1) 1))
376 (set (ifield f-2-2) (and (srl (sub (ifield f-imm3-S) 1) 1) #x3))
377 )
378 (sequence () ; extract
379 (set (ifield f-imm3-S) (add (or (sll (ifield f-2-2) 1)
380 (ifield f-7-1))
381 1))
382 )
383 )
385 ;-------------------------------------------------------------
386 ; Immediates and displacements beyond the base insn
387 ;-------------------------------------------------------------
389 (df f-dsp-8-u6 "6 bit unsigned" (all-isas) 8 6 UINT #f #f)
390 (df f-dsp-8-u8 "8 bit unsigned" (all-isas) 8 8 UINT #f #f)
391 (df f-dsp-8-s8 "8 bit signed" (all-isas) 8 8 INT #f #f)
392 (df f-dsp-10-u6 "6 bit unsigned" (all-isas) 10 6 UINT #f #f)
393 (df f-dsp-16-u8 "8 bit unsigned" (all-isas) 16 8 UINT #f #f)
394 (df f-dsp-16-s8 "8 bit signed" (all-isas) 16 8 INT #f #f)
395 (df f-dsp-24-u8 "8 bit unsigned" (all-isas) 24 8 UINT #f #f)
396 (df f-dsp-24-s8 "8 bit signed" (all-isas) 24 8 INT #f #f)
397 (df f-dsp-32-u8 "8 bit unsigned" (all-isas) 32 8 UINT #f #f)
398 (df f-dsp-32-s8 "8 bit signed" (all-isas) 32 8 INT #f #f)
399 (df f-dsp-40-u8 "8 bit unsigned" (all-isas) 40 8 UINT #f #f)
400 (df f-dsp-40-s8 "8 bit signed" (all-isas) 40 8 INT #f #f)
401 (df f-dsp-48-u8 "8 bit unsigned" (all-isas) 48 8 UINT #f #f)
402 (df f-dsp-48-s8 "8 bit signed" (all-isas) 48 8 INT #f #f)
403 (df f-dsp-56-u8 "8 bit unsigned" (all-isas) 56 8 UINT #f #f)
404 (df f-dsp-56-s8 "8 bit signed" (all-isas) 56 8 INT #f #f)
405 (df f-dsp-64-u8 "8 bit unsigned" (all-isas) 64 8 UINT #f #f)
406 (df f-dsp-64-s8 "8 bit signed" (all-isas) 64 8 INT #f #f)
408 ; Insn opcode endianness is big, but the immediate fields are stored
409 ; in little endian. Handle this here at the field level for all immediate
410 ; fields longer that 1 byte.
411 ;
412 ; CGEN can't handle a field which spans a 32 bit word boundary, so
413 ; handle those as multi ifields.
414 ;
415 ; Take care in expressions using 'srl' or 'sll' as part of some larger
416 ; expression meant to yield sign-extended values. CGEN translates
417 ; uses of those operators into C expressions whose type is 'unsigned
418 ; int', which tends to make the whole expression 'unsigned int'.
419 ; Expressions like (set (ifield foo) X), however, just take X and
420 ; store it in some member of 'struct cgen_fields', all of whose
421 ; members are 'long'. On machines where 'long' is larger than
422 ; 'unsigned int', assigning a "sign-extended" unsigned int to a long
423 ; just produces a very large positive value. insert_normal will
424 ; range-check the field's value and produce odd error messages like
425 ; this:
426 ;
427 ; Error: operand out of range (4160684031 not between -2147483648 and 2147483647) `add.l #-265,-270[fb]'
428 ;
429 ; Annoyingly, the code will work fine on machines where 'long' and
430 ; 'unsigned int' are the same size: the assignment will produce a
431 ; negative number.
432 ;
433 ; Just tell yourself over and over: overflow detection is expensive,
434 ; and you're glad C doesn't do it, because it never happens in real
435 ; life.
437 (df f-dsp-8-u16 "16 bit unsigned" (all-isas) 8 16 UINT
438 ((value pc) (or UHI
439 (and (srl value 8) #x00ff)
440 (and (sll value 8) #xff00))) ; insert
441 ((value pc) (or UHI
442 (and UHI (srl UHI value 8) #x00ff)
443 (and UHI (sll UHI value 8) #xff00))) ; extract
444 )
446 (df f-dsp-8-s16 "8 bit signed" (all-isas) 8 16 INT
447 ((value pc) (ext INT
448 (trunc HI
449 (or (and (srl value 8) #x00ff)
450 (and (sll value 8) #xff00))))) ; insert
451 ((value pc) (ext INT
452 (trunc HI
453 (or (and (srl value 8) #x00ff)
454 (and (sll value 8) #xff00))))) ; extract
455 )
457 (df f-dsp-16-u16 "16 bit unsigned" (all-isas) 16 16 UINT
458 ((value pc) (or UHI
459 (and (srl value 8) #x00ff)
460 (and (sll value 8) #xff00))) ; insert
461 ((value pc) (or UHI
462 (and UHI (srl UHI value 8) #x00ff)
463 (and UHI (sll UHI value 8) #xff00))) ; extract
464 )
466 (df f-dsp-16-s16 "16 bit signed" (all-isas) 16 16 INT
467 ((value pc) (ext INT
468 (trunc HI
469 (or (and (srl value 8) #x00ff)
470 (and (sll value 8) #xff00))))) ; insert
471 ((value pc) (ext INT
472 (trunc HI
473 (or (and (srl value 8) #x00ff)
474 (and (sll value 8) #xff00))))) ; extract
475 )
477 (dnmf f-dsp-24-u16 "16 bit unsigned" (all-isas) UINT
478 (f-dsp-24-u8 f-dsp-32-u8)
479 (sequence () ; insert
480 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u16) #xff))
481 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-24-u16) 8) #xff))
482 )
483 (sequence () ; extract
484 (set (ifield f-dsp-24-u16) (or (sll (ifield f-dsp-32-u8) 8)
485 (ifield f-dsp-24-u8)))
486 )
487 )
489 (dnmf f-dsp-24-s16 "16 bit signed" (all-isas) INT
490 (f-dsp-24-u8 f-dsp-32-u8)
491 (sequence () ; insert
492 (set (ifield f-dsp-24-u8)
493 (and (ifield f-dsp-24-s16) #xff))
494 (set (ifield f-dsp-32-u8)
495 (and (srl (ifield f-dsp-24-s16) 8) #xff))
496 )
497 (sequence () ; extract
498 (set (ifield f-dsp-24-s16)
499 (ext INT
500 (trunc HI (or (sll (ifield f-dsp-32-u8) 8)
501 (ifield f-dsp-24-u8)))))
502 )
503 )
505 (df f-dsp-32-u16 "16 bit unsigned" (all-isas) 32 16 UINT
506 ((value pc) (or UHI
507 (and (srl value 8) #x00ff)
508 (and (sll value 8) #xff00))) ; insert
509 ((value pc) (or UHI
510 (and UHI (srl UHI value 8) #x00ff)
511 (and UHI (sll UHI value 8) #xff00))) ; extract
512 )
514 (df f-dsp-32-s16 "16 bit signed" (all-isas) 32 16 INT
515 ((value pc) (ext INT
516 (trunc HI
517 (or (and (srl value 8) #x00ff)
518 (and (sll value 8) #xff00))))) ; insert
519 ((value pc) (ext INT
520 (trunc HI
521 (or (and (srl value 8) #x00ff)
522 (and (sll value 8) #xff00))))) ; extract
523 )
525 (df f-dsp-40-u16 "16 bit unsigned" (all-isas) 40 16 UINT
526 ((value pc) (or UHI
527 (and (srl value 8) #x00ff)
528 (and (sll value 8) #xff00))) ; insert
529 ((value pc) (or UHI
530 (and UHI (srl UHI value 8) #x00ff)
531 (and UHI (sll UHI value 8) #xff00))) ; extract
532 )
534 (df f-dsp-40-s16 "16 bit signed" (all-isas) 40 16 INT
535 ((value pc) (ext INT
536 (trunc HI
537 (or (and (srl value 8) #x00ff)
538 (and (sll value 8) #xff00))))) ; insert
539 ((value pc) (ext INT
540 (trunc HI
541 (or (and (srl value 8) #x00ff)
542 (and (sll value 8) #xff00))))) ; extract
543 )
545 (df f-dsp-48-u16 "16 bit unsigned" (all-isas) 48 16 UINT
546 ((value pc) (or UHI
547 (and (srl value 8) #x00ff)
548 (and (sll value 8) #xff00))) ; insert
549 ((value pc) (or UHI
550 (and UHI (srl UHI value 8) #x00ff)
551 (and UHI (sll UHI value 8) #xff00))) ; extract
552 )
554 (df f-dsp-48-s16 "16 bit signed" (all-isas) 48 16 INT
555 ((value pc) (ext INT
556 (trunc HI
557 (or (and (srl value 8) #x00ff)
558 (and (sll value 8) #xff00))))) ; insert
559 ((value pc) (ext INT
560 (trunc HI
561 (or (and (srl value 8) #x00ff)
562 (and (sll value 8) #xff00))))) ; extract
563 )
565 (df f-dsp-64-u16 "16 bit unsigned" (all-isas) 64 16 UINT
566 ((value pc) (or UHI
567 (and (srl value 8) #x00ff)
568 (and (sll value 8) #xff00))) ; insert
569 ((value pc) (or UHI
570 (and UHI (srl UHI value 8) #x00ff)
571 (and UHI (sll UHI value 8) #xff00))) ; extract
572 )
573 (df f-dsp-8-s24 "24 bit signed" (all-isas) 8 24 INT
574 ((value pc) (or SI
575 (or (and (srl value 16) #xff) (and value #xff00))
576 (sll (ext INT (trunc QI (and value #xff))) 16)))
577 ((value pc) (or SI
578 (or (and (srl value 16) #xff) (and value #xff00))
579 (sll (ext INT (trunc QI (and value #xff))) 16)))
580 )
582 (df f-dsp-8-u24 "24 bit unsigned" (all-isas) 8 24 UINT
583 ((value pc) (or SI
584 (or (srl value 16) (and value #xff00))
585 (sll (and value #xff) 16)))
586 ((value pc) (or SI
587 (or (srl value 16) (and value #xff00))
588 (sll (and value #xff) 16)))
589 )
591 (dnmf f-dsp-16-u24 "24 bit unsigned" (all-isas) UINT
592 (f-dsp-16-u16 f-dsp-32-u8)
593 (sequence () ; insert
594 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-u24) #xffff))
595 (set (ifield f-dsp-32-u8) (and (srl (ifield f-dsp-16-u24) 16) #xff))
596 )
597 (sequence () ; extract
598 (set (ifield f-dsp-16-u24) (or (sll (ifield f-dsp-32-u8) 16)
599 (ifield f-dsp-16-u16)))
600 )
601 )
603 (dnmf f-dsp-24-u24 "24 bit unsigned" (all-isas) UINT
604 (f-dsp-24-u8 f-dsp-32-u16)
605 (sequence () ; insert
606 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-u24) #xff))
607 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-24-u24) 8) #xffff))
608 )
609 (sequence () ; extract
610 (set (ifield f-dsp-24-u24) (or (sll (ifield f-dsp-32-u16) 8)
611 (ifield f-dsp-24-u8)))
612 )
613 )
615 (df f-dsp-32-u24 "24 bit unsigned" (all-isas) 32 24 UINT
616 ((value pc) (or USI
617 (or USI
618 (and (srl value 16) #x0000ff)
619 (and value #x00ff00))
620 (and (sll value 16) #xff0000))) ; insert
621 ((value pc) (or USI
622 (or USI
623 (and USI (srl value 16) #x0000ff)
624 (and USI value #x00ff00))
625 (and USI (sll value 16) #xff0000))) ; extract
626 )
628 (df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT
629 ((value pc) (or USI
630 (or USI
631 (and (srl value 16) #x0000ff)
632 (and value #x00ff00))
633 (and (sll value 16) #x0f0000))) ; insert
634 ((value pc) (or USI
635 (or USI
636 (and USI (srl value 16) #x0000ff)
637 (and USI value #x00ff00))
638 (and USI (sll value 16) #x0f0000))) ; extract
639 )
641 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
642 ((value pc) (or USI
643 (or USI
644 (and (srl value 16) #x0000ff)
645 (and value #x00ff00))
646 (and (sll value 16) #xff0000))) ; insert
647 ((value pc) (or USI
648 (or USI
649 (and USI (srl value 16) #x0000ff)
650 (and USI value #x00ff00))
651 (and USI (sll value 16) #xff0000))) ; extract
652 )
654 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT
655 (f-dsp-40-u24 f-dsp-64-u8)
656 (sequence () ; insert
657 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-40-s32) 24) #xff))
658 (set (ifield f-dsp-40-u24) (and (ifield f-dsp-40-s32) #xffffff))
659 )
660 (sequence () ; extract
661 (set (ifield f-dsp-40-s32) (or (and (ifield f-dsp-40-u24) #xffffff)
662 (and (sll (ifield f-dsp-64-u8) 24) #xff000000)))
663 )
664 )
666 (dnmf f-dsp-48-u20 "20 bit unsigned" (all-isas) UINT
667 (f-dsp-48-u16 f-dsp-64-u8)
668 (sequence () ; insert
669 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u20) 16) #x0f))
670 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u20) #xffff))
671 )
672 (sequence () ; extract
673 (set (ifield f-dsp-48-u20) (or (and (ifield f-dsp-48-u16) #xffff)
674 (and (sll (ifield f-dsp-64-u8) 16) #x0f0000)))
675 )
676 )
677 (dnmf f-dsp-48-u24 "24 bit unsigned" (all-isas) UINT
678 (f-dsp-48-u16 f-dsp-64-u8)
679 (sequence () ; insert
680 (set (ifield f-dsp-64-u8) (and (srl (ifield f-dsp-48-u24) 16) #xff))
681 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u24) #xffff))
682 )
683 (sequence () ; extract
684 (set (ifield f-dsp-48-u24) (or (and (ifield f-dsp-48-u16) #xffff)
685 (and (sll (ifield f-dsp-64-u8) 16) #xff0000)))
686 )
687 )
689 (dnmf f-dsp-16-s32 "32 bit signed" (all-isas) INT
690 (f-dsp-16-u16 f-dsp-32-u16)
691 (sequence () ; insert
692 (set (ifield f-dsp-32-u16) (and (srl (ifield f-dsp-16-s32) 16) #xffff))
693 (set (ifield f-dsp-16-u16) (and (ifield f-dsp-16-s32) #xffff))
694 )
695 (sequence () ; extract
696 (set (ifield f-dsp-16-s32) (or (and (ifield f-dsp-16-u16) #xffff)
697 (and (sll (ifield f-dsp-32-u16) 16) #xffff0000)))
698 )
699 )
701 (dnmf f-dsp-24-s32 "32 bit signed" (all-isas) INT
702 (f-dsp-24-u8 f-dsp-32-u24)
703 (sequence () ; insert
704 (set (ifield f-dsp-32-u24) (and (srl (ifield f-dsp-24-s32) 8) #xffffff))
705 (set (ifield f-dsp-24-u8) (and (ifield f-dsp-24-s32) #xff))
706 )
707 (sequence () ; extract
708 (set (ifield f-dsp-24-s32) (or (and (ifield f-dsp-24-u8) #xff)
709 (and (sll (ifield f-dsp-32-u24) 8) #xffffff00)))
710 )
711 )
713 (df f-dsp-32-s32 "32 bit signed" (all-isas) 32 32 INT
714 ((value pc)
716 ;; insert
717 (ext INT
718 (or SI
719 (or SI
720 (and (srl value 24) #x000000ff)
721 (and (srl value 8) #x0000ff00))
722 (or SI
723 (and (sll value 8) #x00ff0000)
724 (and (sll value 24) #xff000000)))))
726 ;; extract
727 ((value pc)
728 (ext INT
729 (or SI
730 (or SI
731 (and (srl value 24) #x000000ff)
732 (and (srl value 8) #x0000ff00))
733 (or SI
734 (and (sll value 8) #x00ff0000)
735 (and (sll value 24) #xff000000)))))
736 )
738 (dnmf f-dsp-48-u32 "32 bit unsigned" (all-isas) UINT
739 (f-dsp-48-u16 f-dsp-64-u16)
740 (sequence () ; insert
741 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-u32) 16) #xffff))
742 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-u32) #xffff))
743 )
744 (sequence () ; extract
745 (set (ifield f-dsp-48-u32) (or (and (ifield f-dsp-48-u16) #xffff)
746 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
747 )
748 )
750 (dnmf f-dsp-48-s32 "32 bit signed" (all-isas) INT
751 (f-dsp-48-u16 f-dsp-64-u16)
752 (sequence () ; insert
753 (set (ifield f-dsp-64-u16) (and (srl (ifield f-dsp-48-s32) 16) #xffff))
754 (set (ifield f-dsp-48-u16) (and (ifield f-dsp-48-s32) #xffff))
755 )
756 (sequence () ; extract
757 (set (ifield f-dsp-48-s32) (or (and (ifield f-dsp-48-u16) #xffff)
758 (and (sll (ifield f-dsp-64-u16) 16) #xffff0000)))
759 )
760 )
762 (dnmf f-dsp-56-s16 "16 bit signed" (all-isas) INT
763 (f-dsp-56-u8 f-dsp-64-u8)
764 (sequence () ; insert
765 (set (ifield f-dsp-56-u8)
766 (and (ifield f-dsp-56-s16) #xff))
767 (set (ifield f-dsp-64-u8)
768 (and (srl (ifield f-dsp-56-s16) 8) #xff))
769 )
770 (sequence () ; extract
771 (set (ifield f-dsp-56-s16)
772 (ext INT
773 (trunc HI (or (sll (ifield f-dsp-64-u8) 8)
774 (ifield f-dsp-56-u8)))))
775 )
776 )
778 (df f-dsp-64-s16 " 16 bit signed" (all-isas) 64 16 INT
779 ((value pc) (ext INT
780 (trunc HI
781 (or (and (srl value 8) #x00ff)
782 (and (sll value 8) #xff00))))) ; insert
783 ((value pc) (ext INT
784 (trunc HI
785 (or (and (srl value 8) #x00ff)
786 (and (sll value 8) #xff00))))) ; extract
787 )
789 ;-------------------------------------------------------------
790 ; Bit indices
791 ;-------------------------------------------------------------
793 (dnf f-bitno16-S "bit index for m16c" (all-isas) 5 3)
794 (dnf f-bitno32-prefixed "bit index for m32c" (all-isas) 21 3)
795 (dnf f-bitno32-unprefixed "bit index for m32c" (all-isas) 13 3)
797 (dnmf f-bitbase16-u11-S "unsigned bit,base:11" (all-isas) UINT
798 (f-bitno16-S f-dsp-8-u8)
799 (sequence () ; insert
800 (set (ifield f-bitno16-S) (and f-bitbase16-u11-S #x7))
801 (set (ifield f-dsp-8-u8) (and (srl (ifield f-bitbase16-u11-S) 3) #xff))
802 )
803 (sequence () ; extract
804 (set (ifield f-bitbase16-u11-S) (or (sll (ifield f-dsp-8-u8) 3)
805 (ifield f-bitno16-S)))
806 )
807 )
809 (dnmf f-bitbase32-16-u11-unprefixed "unsigned bit,base:11" (all-isas) UINT
810 (f-bitno32-unprefixed f-dsp-16-u8)
811 (sequence () ; insert
812 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u11-unprefixed #x7))
813 (set (ifield f-dsp-16-u8) (and (srl (ifield f-bitbase32-16-u11-unprefixed) 3) #xff))
814 )
815 (sequence () ; extract
816 (set (ifield f-bitbase32-16-u11-unprefixed) (or (sll (ifield f-dsp-16-u8) 3)
817 (ifield f-bitno32-unprefixed)))
818 )
819 )
820 (dnmf f-bitbase32-16-s11-unprefixed "signed bit,base:11" (all-isas) INT
821 (f-bitno32-unprefixed f-dsp-16-s8)
822 (sequence () ; insert
823 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s11-unprefixed #x7))
824 (set (ifield f-dsp-16-s8) (sra INT (ifield f-bitbase32-16-s11-unprefixed) 3))
825 )
826 (sequence () ; extract
827 (set (ifield f-bitbase32-16-s11-unprefixed) (or (sll (ifield f-dsp-16-s8) 3)
828 (ifield f-bitno32-unprefixed)))
829 )
830 )
831 (dnmf f-bitbase32-16-u19-unprefixed "unsigned bit,base:19" (all-isas) UINT
832 (f-bitno32-unprefixed f-dsp-16-u16)
833 (sequence () ; insert
834 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u19-unprefixed #x7))
835 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u19-unprefixed) 3) #xffff))
836 )
837 (sequence () ; extract
838 (set (ifield f-bitbase32-16-u19-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
839 (ifield f-bitno32-unprefixed)))
840 )
841 )
842 (dnmf f-bitbase32-16-s19-unprefixed "signed bit,base:11" (all-isas) INT
843 (f-bitno32-unprefixed f-dsp-16-s16)
844 (sequence () ; insert
845 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-s19-unprefixed #x7))
846 (set (ifield f-dsp-16-s16) (sra INT (ifield f-bitbase32-16-s19-unprefixed) 3))
847 )
848 (sequence () ; extract
849 (set (ifield f-bitbase32-16-s19-unprefixed) (or (sll (ifield f-dsp-16-s16) 3)
850 (ifield f-bitno32-unprefixed)))
851 )
852 )
853 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
854 (dnmf f-bitbase32-16-u27-unprefixed "unsigned bit,base:27" (all-isas) UINT
855 (f-bitno32-unprefixed f-dsp-16-u16 f-dsp-32-u8)
856 (sequence () ; insert
857 (set (ifield f-bitno32-unprefixed) (and f-bitbase32-16-u27-unprefixed #x7))
858 (set (ifield f-dsp-16-u16) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 3) #xffff))
859 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-16-u27-unprefixed) 19) #xff))
860 )
861 (sequence () ; extract
862 (set (ifield f-bitbase32-16-u27-unprefixed) (or (sll (ifield f-dsp-16-u16) 3)
863 (or (sll (ifield f-dsp-32-u8) 19)
864 (ifield f-bitno32-unprefixed))))
865 )
866 )
867 (dnmf f-bitbase32-24-u11-prefixed "unsigned bit,base:11" (all-isas) UINT
868 (f-bitno32-prefixed f-dsp-24-u8)
869 (sequence () ; insert
870 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u11-prefixed #x7))
871 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u11-prefixed) 3) #xff))
872 )
873 (sequence () ; extract
874 (set (ifield f-bitbase32-24-u11-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
875 (ifield f-bitno32-prefixed)))
876 )
877 )
878 (dnmf f-bitbase32-24-s11-prefixed "signed bit,base:11" (all-isas) INT
879 (f-bitno32-prefixed f-dsp-24-s8)
880 (sequence () ; insert
881 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s11-prefixed #x7))
882 (set (ifield f-dsp-24-s8) (sra INT (ifield f-bitbase32-24-s11-prefixed) 3))
883 )
884 (sequence () ; extract
885 (set (ifield f-bitbase32-24-s11-prefixed) (or (sll (ifield f-dsp-24-s8) 3)
886 (ifield f-bitno32-prefixed)))
887 )
888 )
889 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
890 (dnmf f-bitbase32-24-u19-prefixed "unsigned bit,base:19" (all-isas) UINT
891 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u8)
892 (sequence () ; insert
893 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u19-prefixed #x7))
894 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 3) #xff))
895 (set (ifield f-dsp-32-u8) (and (srl (ifield f-bitbase32-24-u19-prefixed) 11) #xff))
896 )
897 (sequence () ; extract
898 (set (ifield f-bitbase32-24-u19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
899 (or (sll (ifield f-dsp-32-u8) 11)
900 (ifield f-bitno32-prefixed))))
901 )
902 )
903 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
904 (dnmf f-bitbase32-24-s19-prefixed "signed bit,base:11" (all-isas) INT
905 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-s8)
906 (sequence () ; insert
907 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-s19-prefixed #x7))
908 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-s19-prefixed) 3) #xff))
909 (set (ifield f-dsp-32-s8) (sra INT (ifield f-bitbase32-24-s19-prefixed) 11))
910 )
911 (sequence () ; extract
912 (set (ifield f-bitbase32-24-s19-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
913 (or (sll (ifield f-dsp-32-s8) 11)
914 (ifield f-bitno32-prefixed))))
915 )
916 )
917 ; SID decoder doesn't handle multi-ifield referencing another multi-ifield :-(
918 (dnmf f-bitbase32-24-u27-prefixed "unsigned bit,base:27" (all-isas) UINT
919 (f-bitno32-prefixed f-dsp-24-u8 f-dsp-32-u16)
920 (sequence () ; insert
921 (set (ifield f-bitno32-prefixed) (and f-bitbase32-24-u27-prefixed #x7))
922 (set (ifield f-dsp-24-u8) (and (srl (ifield f-bitbase32-24-u27-prefixed) 3) #xff))
923 (set (ifield f-dsp-32-u16) (and (srl (ifield f-bitbase32-24-u27-prefixed) 11) #xffff))
924 )
925 (sequence () ; extract
926 (set (ifield f-bitbase32-24-u27-prefixed) (or (sll (ifield f-dsp-24-u8) 3)
927 (or (sll (ifield f-dsp-32-u16) 11)
928 (ifield f-bitno32-prefixed))))
929 )
930 )
932 ;-------------------------------------------------------------
933 ; Labels
934 ;-------------------------------------------------------------
936 (df f-lab-5-3 "3 bit pc relative unsigned offset" (PCREL-ADDR all-isas) 5 3 UINT
937 ((value pc) (sub SI value (add SI pc 2))) ; insert
938 ((value pc) (add SI value (add SI pc 2))) ; extract
939 )
940 (dnmf f-lab32-jmp-s "unsigned 3 bit pc relative offset" (PCREL-ADDR all-isas) UINT
941 (f-2-2 f-7-1)
942 (sequence ((SI val)) ; insert
943 (set val (sub (sub (ifield f-lab32-jmp-s) pc) 2))
944 (set (ifield f-7-1) (and val #x1))
945 (set (ifield f-2-2) (srl val 1))
946 )
947 (sequence () ; extract
948 (set (ifield f-lab32-jmp-s) (add pc (add (or (sll (ifield f-2-2) 1)
949 (ifield f-7-1))
950 2)))
951 )
952 )
953 (df f-lab-8-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 8 8 INT
954 ((value pc) (sub SI value (add SI pc 1))) ; insert
955 ((value pc) (add SI value (add SI pc 1))) ; extract
956 )
957 (df f-lab-8-16 "16 bit pc relative signed offset" (PCREL-ADDR SIGN-OPT all-isas) 8 16 UINT
958 ((value pc) (or SI (sll (and (sub value (add pc 1)) #xff) 8)
959 (srl (and (sub value (add pc 1)) #xff00) 8)))
960 ((value pc) (add SI (sub (xor (or (srl (and value #xff00) 8)
961 (sll (and value #xff) 8))
962 #x8000)
963 #x8000)
964 (add pc 1)))
965 )
966 (df f-lab-8-24 "24 bit absolute" (all-isas ABS-ADDR) 8 24 UINT
967 ((value pc) (or SI
968 (or (srl value 16) (and value #xff00))
969 (sll (and value #xff) 16)))
970 ((value pc) (or SI
971 (or (srl value 16) (and value #xff00))
972 (sll (and value #xff) 16)))
973 )
974 (df f-lab-16-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 16 8 INT
975 ((value pc) (sub SI value (add SI pc 2))) ; insert
976 ((value pc) (add SI value (add SI pc 2))) ; extract
977 )
978 (df f-lab-24-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 24 8 INT
979 ((value pc) (sub SI value (add SI pc 2))) ; insert
980 ((value pc) (add SI value (add SI pc 2))) ; extract
981 )
982 (df f-lab-32-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 32 8 INT
983 ((value pc) (sub SI value (add SI pc 2))) ; insert
984 ((value pc) (add SI value (add SI pc 2))) ; extract
985 )
986 (df f-lab-40-8 "8 bit pc relative signed offset" (PCREL-ADDR all-isas) 40 8 INT
987 ((value pc) (sub SI value (add SI pc 2))) ; insert
988 ((value pc) (add SI value (add SI pc 2))) ; extract
989 )
991 ;-------------------------------------------------------------
992 ; Condition codes
993 ;-------------------------------------------------------------
995 (dnf f-cond16 "condition code" (all-isas) 12 4)
996 (dnf f-cond16j-5 "condition code" (all-isas) 5 3)
998 (dnmf f-cond32 "condition code" (all-isas) UINT
999 (f-9-1 f-13-3)
1000 (sequence () ; insert
1001 (set (ifield f-9-1) (and (srl (ifield f-cond32) 3) 1))
1002 (set (ifield f-13-3) (and (ifield f-cond32) #x7))
1003 )
1004 (sequence () ; extract
1005 (set (ifield f-cond32) (or (sll (ifield f-9-1) 3)
1006 (ifield f-13-3)))
1007 )
1008 )
1010 (dnmf f-cond32j "condition code" (all-isas) UINT
1011 (f-1-3 f-7-1)
1012 (sequence () ; insert
1013 (set (ifield f-1-3) (and (srl (ifield f-cond32j) 1) #x7))
1014 (set (ifield f-7-1) (and (ifield f-cond32j) #x1))
1015 )
1016 (sequence () ; extract
1017 (set (ifield f-cond32j) (or (sll (ifield f-1-3) 1)
1018 (ifield f-7-1)))
1019 )
1020 )
1021 \f
1022 ;=============================================================
1023 ; Hardware
1024 ;
1025 (dnh h-pc "program counter" (PC all-isas) (pc USI) () () ())
1027 ;-------------------------------------------------------------
1028 ; General registers
1029 ; The actual registers are 16 bits
1030 ;-------------------------------------------------------------
1032 (define-hardware
1033 (name h-gr)
1034 (comment "general 16 bit registers")
1035 (attrs all-isas CACHE-ADDR)
1036 (type register HI (4))
1037 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3))))
1039 ; Define different views of the grs as VIRTUAL with getter/setter specs
1040 ;
1041 (define-hardware
1042 (name h-gr-QI)
1043 (comment "general 8 bit registers")
1044 (attrs all-isas VIRTUAL)
1045 (type register QI (4))
1046 (indices keyword "" (("r0l" 0) ("r0h" 1) ("r1l" 2) ("r1h" 3)))
1047 (get (index) (and (if SI (mod index 2)
1048 (srl (reg h-gr (div index 2)) 8)
1049 (reg h-gr (div index 2)))
1050 #xff))
1051 (set (index newval) (set (reg h-gr (div index 2))
1052 (if SI (mod index 2)
1053 (or (and (reg h-gr (div index 2)) #xff)
1054 (sll (and newval #xff) 8))
1055 (or (and (reg h-gr (div index 2)) #xff00)
1056 (and newval #xff))))))
1058 (define-hardware
1059 (name h-gr-HI)
1060 (comment "general 16 bit registers")
1061 (attrs all-isas VIRTUAL)
1062 (type register HI (4))
1063 (indices keyword "" (("r0" 0) ("r1" 1) ("r2" 2) ("r3" 3)))
1064 (get (index) (reg h-gr index))
1065 (set (index newval) (set (reg h-gr index) newval)))
1067 (define-hardware
1068 (name h-gr-SI)
1069 (comment "general 32 bit registers")
1070 (attrs all-isas VIRTUAL)
1071 (type register SI (2))
1072 (indices keyword "" (("r2r0" 0) ("r3r1" 1)))
1073 (get (index) (or SI
1074 (and (reg h-gr index) #xffff)
1075 (and (sll (reg h-gr (add index 2)) 16) #xffff0000)))
1076 (set (index newval) (sequence ()
1077 (set (reg h-gr index) (and newval #xffff))
1078 (set (reg h-gr (add index 2)) (srl newval 16)))))
1080 (define-hardware
1081 (name h-gr-ext-QI)
1082 (comment "general 16 bit registers")
1083 (attrs all-isas VIRTUAL)
1084 (type register HI (2))
1085 (indices keyword "" (("r0l" 0) ("r1l" 1)))
1086 (get (index) (reg h-gr-QI (mul index 2)))
1087 (set (index newval) (set (reg h-gr (mul index 2)) newval)))
1089 (define-hardware
1090 (name h-gr-ext-HI)
1091 (comment "general 16 bit registers")
1092 (attrs all-isas VIRTUAL)
1093 (type register SI (2))
1094 (indices keyword "" (("r0" 0) ("r1" 1)))
1095 (get (index) (reg h-gr (mul index 2)))
1096 (set (index newval) (set (reg h-gr-SI index) newval)))
1098 (define-hardware
1099 (name h-r0l)
1100 (comment "r0l register")
1101 (attrs all-isas VIRTUAL)
1102 (type register QI)
1103 (indices keyword "" (("r0l" 0)))
1104 (get () (reg h-gr-QI 0))
1105 (set (newval) (set (reg h-gr-QI 0) newval)))
1107 (define-hardware
1108 (name h-r0h)
1109 (comment "r0h register")
1110 (attrs all-isas VIRTUAL)
1111 (type register QI)
1112 (indices keyword "" (("r0h" 0)))
1113 (get () (reg h-gr-QI 1))
1114 (set (newval) (set (reg h-gr-QI 1) newval)))
1116 (define-hardware
1117 (name h-r1l)
1118 (comment "r1l register")
1119 (attrs all-isas VIRTUAL)
1120 (type register QI)
1121 (indices keyword "" (("r1l" 0)))
1122 (get () (reg h-gr-QI 2))
1123 (set (newval) (set (reg h-gr-QI 2) newval)))
1125 (define-hardware
1126 (name h-r1h)
1127 (comment "r1h register")
1128 (attrs all-isas VIRTUAL)
1129 (type register QI)
1130 (indices keyword "" (("r1h" 0)))
1131 (get () (reg h-gr-QI 3))
1132 (set (newval) (set (reg h-gr-QI 3) newval)))
1134 (define-hardware
1135 (name h-r0)
1136 (comment "r0 register")
1137 (attrs all-isas VIRTUAL)
1138 (type register HI)
1139 (indices keyword "" (("r0" 0)))
1140 (get () (reg h-gr 0))
1141 (set (newval) (set (reg h-gr 0) newval)))
1143 (define-hardware
1144 (name h-r1)
1145 (comment "r1 register")
1146 (attrs all-isas VIRTUAL)
1147 (type register HI)
1148 (indices keyword "" (("r1" 0)))
1149 (get () (reg h-gr 1))
1150 (set (newval) (set (reg h-gr 1) newval)))
1152 (define-hardware
1153 (name h-r2)
1154 (comment "r2 register")
1155 (attrs all-isas VIRTUAL)
1156 (type register HI)
1157 (indices keyword "" (("r2" 0)))
1158 (get () (reg h-gr 2))
1159 (set (newval) (set (reg h-gr 2) newval)))
1161 (define-hardware
1162 (name h-r3)
1163 (comment "r3 register")
1164 (attrs all-isas VIRTUAL)
1165 (type register HI)
1166 (indices keyword "" (("r3" 0)))
1167 (get () (reg h-gr 3))
1168 (set (newval) (set (reg h-gr 3) newval)))
1170 (define-hardware
1171 (name h-r0l-r0h)
1172 (comment "r0l or r0h")
1173 (attrs all-isas VIRTUAL)
1174 (type register QI (2))
1175 (indices keyword "" (("r0l" 0) ("r0h" 1)))
1176 (get (index) (reg h-gr-QI index))
1177 (set (index newval) (set (reg h-gr-QI index) newval)))
1179 (define-hardware
1180 (name h-r2r0)
1181 (comment "r2r0 register")
1182 (attrs all-isas VIRTUAL)
1183 (type register SI)
1184 (indices keyword "" (("r2r0" 0)))
1185 (get () (or (sll (reg h-gr 2) 16) (reg h-gr 0)))
1186 (set (newval)
1187 (sequence ()
1188 (set (reg h-gr 0) newval)
1189 (set (reg h-gr 2) (sra newval 16)))))
1191 (define-hardware
1192 (name h-r3r1)
1193 (comment "r3r1 register")
1194 (attrs all-isas VIRTUAL)
1195 (type register SI)
1196 (indices keyword "" (("r3r1" 0)))
1197 (get () (or (sll (reg h-gr 3) 16) (reg h-gr 1)))
1198 (set (newval)
1199 (sequence ()
1200 (set (reg h-gr 1) newval)
1201 (set (reg h-gr 3) (sra newval 16)))))
1203 (define-hardware
1204 (name h-r1r2r0)
1205 (comment "r1r2r0 register")
1206 (attrs all-isas VIRTUAL)
1207 (type register DI)
1208 (indices keyword "" (("r1r2r0" 0)))
1209 (get () (or DI (sll DI (reg h-gr 1) 32) (or (sll (reg h-gr 2) 16) (reg h-gr 0))))
1210 (set (newval)
1211 (sequence ()
1212 (set (reg h-gr 0) newval)
1213 (set (reg h-gr 2) (sra newval 16))
1214 (set (reg h-gr 1) (sra newval 32)))))
1216 ;-------------------------------------------------------------
1217 ; Address registers
1218 ;-------------------------------------------------------------
1220 (define-hardware
1221 (name h-ar)
1222 (comment "address registers")
1223 (attrs all-isas)
1224 (type register USI (2))
1225 (indices keyword "" (("a0" 0) ("a1" 1)))
1226 (get (index) (c-call USI "h_ar_get_handler" index))
1227 (set (index newval) (c-call VOID "h_ar_set_handler" index newval)))
1229 ; Define different views of the ars as VIRTUAL with getter/setter specs
1230 (define-hardware
1231 (name h-ar-QI)
1232 (comment "8 bit view of address register")
1233 (attrs all-isas VIRTUAL)
1234 (type register QI (2))
1235 (indices keyword "" (("a0" 0) ("a1" 1)))
1236 (get (index) (reg h-ar index))
1237 (set (index newval) (set (reg h-ar index) newval)))
1239 (define-hardware
1240 (name h-ar-HI)
1241 (comment "16 bit view of address register")
1242 (attrs all-isas VIRTUAL)
1243 (type register HI (2))
1244 (indices keyword "" (("a0" 0) ("a1" 1)))
1245 (get (index) (reg h-ar index))
1246 (set (index newval) (set (reg h-ar index) newval)))
1248 (define-hardware
1249 (name h-ar-SI)
1250 (comment "32 bit view of address register")
1251 (attrs all-isas VIRTUAL)
1252 (type register SI)
1253 (indices keyword "" (("a1a0" 0)))
1254 (get () (or SI (sll SI (ext SI (reg h-ar 1)) 16) (ext SI (reg h-ar 0))))
1255 (set (newval) (sequence ()
1256 (set (reg h-ar 0) (and newval #xffff))
1257 (set (reg h-ar 1) (and (srl newval 16) #xffff)))))
1259 (define-hardware
1260 (name h-a0)
1261 (comment "16 bit view of address register")
1262 (attrs all-isas VIRTUAL)
1263 (type register HI)
1264 (indices keyword "" (("a0" 0)))
1265 (get () (reg h-ar 0))
1266 (set (newval) (set (reg h-ar 0) newval)))
1268 (define-hardware
1269 (name h-a1)
1270 (comment "16 bit view of address register")
1271 (attrs all-isas VIRTUAL)
1272 (type register HI)
1273 (indices keyword "" (("a1" 1)))
1274 (get () (reg h-ar 1))
1275 (set (newval) (set (reg h-ar 1) newval)))
1277 ; SB Register
1278 (define-hardware
1279 (name h-sb)
1280 (comment "SB register")
1281 (attrs all-isas)
1282 (type register USI)
1283 (get () (c-call USI "h_sb_get_handler"))
1284 (set (newval) (c-call VOID "h_sb_set_handler" newval))
1285 )
1287 ; FB Register
1288 (define-hardware
1289 (name h-fb)
1290 (comment "FB register")
1291 (attrs all-isas)
1292 (type register USI)
1293 (get () (c-call USI "h_fb_get_handler"))
1294 (set (newval) (c-call VOID "h_fb_set_handler" newval))
1295 )
1297 ; SP Register
1298 (define-hardware
1299 (name h-sp)
1300 (comment "SP register")
1301 (attrs all-isas)
1302 (type register USI)
1303 (get () (c-call USI "h_sp_get_handler"))
1304 (set (newval) (c-call VOID "h_sp_set_handler" newval))
1305 )
1307 ;-------------------------------------------------------------
1308 ; condition-code bits
1309 ;-------------------------------------------------------------
1311 (define-hardware
1312 (name h-sbit)
1313 (comment "sign bit")
1314 (attrs all-isas)
1315 (type register BI)
1316 )
1318 (define-hardware
1319 (name h-zbit)
1320 (comment "zero bit")
1321 (attrs all-isas)
1322 (type register BI)
1323 )
1325 (define-hardware
1326 (name h-obit)
1327 (comment "overflow bit")
1328 (attrs all-isas)
1329 (type register BI)
1330 )
1332 (define-hardware
1333 (name h-cbit)
1334 (comment "carry bit")
1335 (attrs all-isas)
1336 (type register BI)
1337 )
1339 (define-hardware
1340 (name h-ubit)
1341 (comment "stack pointer select bit")
1342 (attrs all-isas)
1343 (type register BI)
1344 )
1346 (define-hardware
1347 (name h-ibit)
1348 (comment "interrupt enable bit")
1349 (attrs all-isas)
1350 (type register BI)
1351 )
1353 (define-hardware
1354 (name h-bbit)
1355 (comment "register bank select bit")
1356 (attrs all-isas)
1357 (type register BI)
1358 )
1360 (define-hardware
1361 (name h-dbit)
1362 (comment "debug bit")
1363 (attrs all-isas)
1364 (type register BI)
1365 )
1367 (define-hardware
1368 (name h-dct0)
1369 (comment "dma transfer count 000")
1370 (attrs all-isas)
1371 (type register UHI)
1372 )
1373 (define-hardware
1374 (name h-dct1)
1375 (comment "dma transfer count 001")
1376 (attrs all-isas)
1377 (type register UHI)
1378 )
1379 (define-hardware
1380 (name h-svf)
1381 (comment "save flag 011")
1382 (attrs all-isas)
1383 (type register UHI)
1384 )
1385 (define-hardware
1386 (name h-drc0)
1387 (comment "dma transfer count reload 100")
1388 (attrs all-isas)
1389 (type register UHI)
1390 )
1391 (define-hardware
1392 (name h-drc1)
1393 (comment "dma transfer count reload 101")
1394 (attrs all-isas)
1395 (type register UHI)
1396 )
1397 (define-hardware
1398 (name h-dmd0)
1399 (comment "dma mode 110")
1400 (attrs all-isas)
1401 (type register UQI)
1402 )
1403 (define-hardware
1404 (name h-dmd1)
1405 (comment "dma mode 111")
1406 (attrs all-isas)
1407 (type register UQI)
1408 )
1409 (define-hardware
1410 (name h-intb)
1411 (comment "interrupt table 000")
1412 (attrs all-isas)
1413 (type register USI)
1414 )
1415 (define-hardware
1416 (name h-svp)
1417 (comment "save pc 100")
1418 (attrs all-isas)
1419 (type register UHI)
1420 )
1421 (define-hardware
1422 (name h-vct)
1423 (comment "vector 101")
1424 (attrs all-isas)
1425 (type register USI)
1426 )
1427 (define-hardware
1428 (name h-isp)
1429 (comment "interrupt stack ptr 111")
1430 (attrs all-isas)
1431 (type register USI)
1432 )
1433 (define-hardware
1434 (name h-dma0)
1435 (comment "dma mem addr 010")
1436 (attrs all-isas)
1437 (type register USI)
1438 )
1439 (define-hardware
1440 (name h-dma1)
1441 (comment "dma mem addr 011")
1442 (attrs all-isas)
1443 (type register USI)
1444 )
1445 (define-hardware
1446 (name h-dra0)
1447 (comment "dma mem addr reload 100")
1448 (attrs all-isas)
1449 (type register USI)
1450 )
1451 (define-hardware
1452 (name h-dra1)
1453 (comment "dma mem addr reload 101")
1454 (attrs all-isas)
1455 (type register USI)
1456 )
1457 (define-hardware
1458 (name h-dsa0)
1459 (comment "dma sfr addr 110")
1460 (attrs all-isas)
1461 (type register USI)
1462 )
1463 (define-hardware
1464 (name h-dsa1)
1465 (comment "dma sfr addr 111")
1466 (attrs all-isas)
1467 (type register USI)
1468 )
1470 ;-------------------------------------------------------------
1471 ; Condition code operand hardware
1472 ;-------------------------------------------------------------
1474 (define-hardware
1475 (name h-cond16)
1476 (comment "condition code hardware for m16c")
1477 (attrs m16c-isa MACH16)
1478 (type immediate UQI)
1479 (values keyword ""
1480 (("geu" #x00) ("c" #x00)
1481 ("gtu" #x01)
1482 ("eq" #x02) ("z" #x02)
1483 ("n" #x03)
1484 ("le" #x04)
1485 ("o" #x05)
1486 ("ge" #x06)
1487 ("ltu" #xf8) ("nc" #xf8)
1488 ("leu" #xf9)
1489 ("ne" #xfa) ("nz" #xfa)
1490 ("pz" #xfb)
1491 ("gt" #xfc)
1492 ("no" #xfd)
1493 ("lt" #xfe)
1494 )
1495 )
1496 )
1497 (define-hardware
1498 (name h-cond16c)
1499 (comment "condition code hardware for m16c")
1500 (attrs m16c-isa MACH16)
1501 (type immediate UQI)
1502 (values keyword ""
1503 (("geu" #x00) ("c" #x00)
1504 ("gtu" #x01)
1505 ("eq" #x02) ("z" #x02)
1506 ("n" #x03)
1507 ("ltu" #x04) ("nc" #x04)
1508 ("leu" #x05)
1509 ("ne" #x06) ("nz" #x06)
1510 ("pz" #x07)
1511 ("le" #x08)
1512 ("o" #x09)
1513 ("ge" #x0a)
1514 ("gt" #x0c)
1515 ("no" #x0d)
1516 ("lt" #x0e)
1517 )
1518 )
1519 )
1520 (define-hardware
1521 (name h-cond16j)
1522 (comment "condition code hardware for m16c")
1523 (attrs m16c-isa MACH16)
1524 (type immediate UQI)
1525 (values keyword ""
1526 (("le" #x08)
1527 ("o" #x09)
1528 ("ge" #x0a)
1529 ("gt" #x0c)
1530 ("no" #x0d)
1531 ("lt" #x0e)
1532 )
1533 )
1534 )
1535 (define-hardware
1536 (name h-cond16j-5)
1537 (comment "condition code hardware for m16c")
1538 (attrs m16c-isa MACH16)
1539 (type immediate UQI)
1540 (values keyword ""
1541 (("geu" #x00) ("c" #x00)
1542 ("gtu" #x01)
1543 ("eq" #x02) ("z" #x02)
1544 ("n" #x03)
1545 ("ltu" #x04) ("nc" #x04)
1546 ("leu" #x05)
1547 ("ne" #x06) ("nz" #x06)
1548 ("pz" #x07)
1549 )
1550 )
1551 )
1553 (define-hardware
1554 (name h-cond32)
1555 (comment "condition code hardware for m32c")
1556 (attrs m32c-isa MACH32)
1557 (type immediate UQI)
1558 (values keyword ""
1559 (("ltu" #x00) ("nc" #x00)
1560 ("leu" #x01)
1561 ("ne" #x02) ("nz" #x02)
1562 ("pz" #x03)
1563 ("no" #x04)
1564 ("gt" #x05)
1565 ("ge" #x06)
1566 ("geu" #x08) ("c" #x08)
1567 ("gtu" #x09)
1568 ("eq" #x0a) ("z" #x0a)
1569 ("n" #x0b)
1570 ("o" #x0c)
1571 ("le" #x0d)
1572 ("lt" #x0e)
1573 )
1574 )
1575 )
1577 (define-hardware
1578 (name h-cr1-32)
1579 (comment "control registers")
1580 (attrs m32c-isa MACH32)
1581 (type immediate UQI)
1582 (values keyword "" (("dct0" 0) ("dct1" 1) ("flg" 2) ("svf" 3) ("drc0" 4)
1583 ("drc1" 5) ("dmd0" 6) ("dmd1" 7))))
1584 (define-hardware
1585 (name h-cr2-32)
1586 (comment "control registers")
1587 (attrs m32c-isa MACH32)
1588 (type immediate UQI)
1589 (values keyword "" (("intb" 0) ("sp" 1) ("sb" 2) ("fb" 3) ("svp" 4)
1590 ("vct" 5) ("isp" 7))))
1592 (define-hardware
1593 (name h-cr3-32)
1594 (comment "control registers")
1595 (attrs m32c-isa MACH32)
1596 (type immediate UQI)
1597 (values keyword "" (("dma0" 2) ("dma1" 3) ("dra0" 4)
1598 ("dra1" 5) ("dsa0" 6) ("dsa1" 7))))
1599 (define-hardware
1600 (name h-cr-16)
1601 (comment "control registers")
1602 (attrs m16c-isa MACH16)
1603 (type immediate UQI)
1604 (values keyword "" (("intbl" 1) ("intbh" 2) ("flg" 3) ("isp" 4)
1605 ("sp" 5) ("sb" 6) ("fb" 7))))
1607 (define-hardware
1608 (name h-flags)
1609 (comment "flag hardware for m32c")
1610 (attrs all-isas)
1611 (type immediate UQI)
1612 (values keyword ""
1613 (("c" #x0)
1614 ("d" #x1)
1615 ("z" #x2)
1616 ("s" #x3)
1617 ("b" #x4)
1618 ("o" #x5)
1619 ("i" #x6)
1620 ("u" #x7)
1621 )
1622 )
1623 )
1625 ;-------------------------------------------------------------
1626 ; Misc helper hardware
1627 ;-------------------------------------------------------------
1629 (define-hardware
1630 (name h-shimm)
1631 (comment "shift immediate")
1632 (attrs all-isas)
1633 (type immediate (INT 4))
1634 (values keyword "" (("1" 0) ("2" 1) ("3" 2) ("4" 3) ("5" 4) ("6" 5) ("7" 6)
1635 ("8" 7) ("-1" -8) ("-2" -7) ("-3" -6) ("-4" -5) ("-5" -4)
1636 ("-6" -3) ("-7" -2) ("-8" -1)
1637 )))
1638 (define-hardware
1639 (name h-bit-index)
1640 (comment "bit index for the next insn")
1641 (attrs m32c-isa MACH32)
1642 (type register UHI)
1643 )
1644 (define-hardware
1645 (name h-src-index)
1646 (comment "source index for the next insn")
1647 (attrs m32c-isa MACH32)
1648 (type register UHI)
1649 )
1650 (define-hardware
1651 (name h-dst-index)
1652 (comment "destination index for the next insn")
1653 (attrs m32c-isa MACH32)
1654 (type register UHI)
1655 )
1656 (define-hardware
1657 (name h-src-indirect)
1658 (comment "indirect src for the next insn")
1659 (attrs all-isas)
1660 (type register UHI)
1661 )
1662 (define-hardware
1663 (name h-dst-indirect)
1664 (comment "indirect dst for the next insn")
1665 (attrs all-isas)
1666 (type register UHI)
1667 )
1668 (define-hardware
1669 (name h-none)
1670 (comment "for storing unused values")
1671 (attrs m32c-isa MACH32)
1672 (type register SI)
1673 )
1674 \f
1675 ;=============================================================
1676 ; Operands
1677 ;-------------------------------------------------------------
1678 ; Source Registers
1679 ;-------------------------------------------------------------
1681 (dnop Src16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-src16-rn)
1682 (dnop Src16RnHI "general register QH view" (MACH16 m16c-isa) h-gr-HI f-src16-rn)
1684 (dnop Src32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-unprefixed-QI)
1685 (dnop Src32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-unprefixed-HI)
1686 (dnop Src32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-unprefixed-SI)
1688 (dnop Src32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-src32-rn-prefixed-QI)
1689 (dnop Src32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-src32-rn-prefixed-HI)
1690 (dnop Src32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-src32-rn-prefixed-SI)
1692 (dnop Src16An "address register" (MACH16 m16c-isa) h-ar f-src16-an)
1693 (dnop Src16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-src16-an)
1694 (dnop Src16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-src16-an)
1696 (dnop Src32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1697 (dnop Src32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-unprefixed)
1698 (dnop Src32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-unprefixed)
1699 (dnop Src32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-unprefixed)
1701 (dnop Src32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1702 (dnop Src32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-src32-an-prefixed)
1703 (dnop Src32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-src32-an-prefixed)
1704 (dnop Src32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-src32-an-prefixed)
1706 ; Destination Registers
1707 ;
1708 (dnop Dst16RnQI "general register QI view" (MACH16 m16c-isa) h-gr-QI f-dst16-rn)
1709 (dnop Dst16RnHI "general register HI view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1710 (dnop Dst16RnSI "general register SI view" (MACH16 m16c-isa) h-gr-SI f-dst16-rn)
1711 (dnop Dst16RnExtQI "general register QI/HI view for 'ext' insns" (MACH16 m16c-isa) h-gr-ext-QI f-dst16-rn-ext)
1713 (dnop Dst32R0QI-S "general register QI view" (MACH32 m32c-isa) h-r0l f-nil)
1714 (dnop Dst32R0HI-S "general register HI view" (MACH32 m32c-isa) h-r0 f-nil)
1716 (dnop Dst32RnUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1717 (dnop Dst32RnUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-unprefixed-HI)
1718 (dnop Dst32RnUnprefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-unprefixed-SI)
1719 (dnop Dst32RnExtUnprefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-ext-QI f-dst32-rn-ext-unprefixed)
1720 (dnop Dst32RnExtUnprefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-ext-HI f-dst32-rn-ext-unprefixed)
1722 (dnop Dst32RnPrefixedQI "general register QI view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1723 (dnop Dst32RnPrefixedHI "general register HI view" (MACH32 m32c-isa) h-gr-HI f-dst32-rn-prefixed-HI)
1724 (dnop Dst32RnPrefixedSI "general register SI view" (MACH32 m32c-isa) h-gr-SI f-dst32-rn-prefixed-SI)
1726 (dnop Dst16RnQI-S "general register QI view" (MACH16 m16c-isa) h-r0l-r0h f-dst16-rn-QI-s)
1728 (dnop Dst16AnQI-S "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-rn-QI-s)
1730 (dnop Bit16Rn "general register bit view" (MACH16 m16c-isa) h-gr-HI f-dst16-rn)
1732 (dnop Bit32RnPrefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-prefixed-QI)
1733 (dnop Bit32RnUnprefixed "general register bit view" (MACH32 m32c-isa) h-gr-QI f-dst32-rn-unprefixed-QI)
1735 (dnop R0 "r0" (all-isas) h-r0 f-nil)
1736 (dnop R1 "r1" (all-isas) h-r1 f-nil)
1737 (dnop R2 "r2" (all-isas) h-r2 f-nil)
1738 (dnop R3 "r3" (all-isas) h-r3 f-nil)
1739 (dnop R0l "r0l" (all-isas) h-r0l f-nil)
1740 (dnop R0h "r0h" (all-isas) h-r0h f-nil)
1741 (dnop R2R0 "r2r0" (all-isas) h-r2r0 f-nil)
1742 (dnop R3R1 "r3r1" (all-isas) h-r3r1 f-nil)
1743 (dnop R1R2R0 "r1r2r0" (all-isas) h-r1r2r0 f-nil)
1745 (dnop Dst16An "address register" (MACH16 m16c-isa) h-ar f-dst16-an)
1746 (dnop Dst16AnQI "address register QI view" (MACH16 m16c-isa) h-ar-QI f-dst16-an)
1747 (dnop Dst16AnHI "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an)
1748 (dnop Dst16AnSI "address register SI view" (MACH16 m16c-isa) h-ar-SI f-dst16-an)
1749 (dnop Dst16An-S "address register HI view" (MACH16 m16c-isa) h-ar-HI f-dst16-an-s)
1751 (dnop Dst32AnUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1752 (dnop Dst32AnUnprefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-unprefixed)
1753 (dnop Dst32AnUnprefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-unprefixed)
1754 (dnop Dst32AnUnprefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1756 (dnop Dst32AnExtUnprefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1758 (dnop Dst32AnPrefixed "address register" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1759 (dnop Dst32AnPrefixedQI "address register QI view" (MACH32 m32c-isa) h-ar-QI f-dst32-an-prefixed)
1760 (dnop Dst32AnPrefixedHI "address register HI view" (MACH32 m32c-isa) h-ar-HI f-dst32-an-prefixed)
1761 (dnop Dst32AnPrefixedSI "address register SI view" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1763 (dnop Bit16An "address register bit view" (MACH16 m16c-isa) h-ar f-dst16-an)
1765 (dnop Bit32AnPrefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-prefixed)
1766 (dnop Bit32AnUnprefixed "address register bit" (MACH32 m32c-isa) h-ar f-dst32-an-unprefixed)
1768 (dnop A0 "a0" (all-isas) h-a0 f-nil)
1769 (dnop A1 "a1" (all-isas) h-a1 f-nil)
1771 (dnop sb "SB register" (all-isas SEM-ONLY) h-sb f-nil)
1772 (dnop fb "FB register" (all-isas SEM-ONLY) h-fb f-nil)
1773 (dnop sp "SP register" (all-isas SEM-ONLY) h-sp f-nil)
1775 (define-full-operand SrcDst16-r0l-r0h-S-normal "r0l/r0h pair" (MACH16 m16c-isa)
1776 h-sint DFLT f-5-1
1777 ((parse "r0l_r0h") (print "r0l_r0h")) () ()
1778 )
1780 (define-full-operand Regsetpop "popm regset" (all-isas) h-uint
1781 DFLT f-8-8 ((parse "pop_regset") (print "pop_regset")) () ())
1782 (define-full-operand Regsetpush "pushm regset" (all-isas) h-uint
1783 DFLT f-8-8 ((parse "push_regset") (print "push_regset")) () ())
1785 (dnop Rn16-push-S "r0[lh]" (MACH16 m16c-isa) h-gr-QI f-4-1)
1786 (dnop An16-push-S "a[01]" (MACH16 m16c-isa) h-ar-HI f-4-1)
1788 ;-------------------------------------------------------------
1789 ; Offsets and absolutes
1790 ;-------------------------------------------------------------
1792 (define-full-operand Dsp-8-u6 "unsigned 6 bit displacement at offset 8 bits" (all-isas)
1793 h-uint DFLT f-dsp-8-u6
1794 ((parse "unsigned6")) () ()
1795 )
1796 (define-full-operand Dsp-8-u8 "unsigned 8 bit displacement at offset 8 bits" (all-isas)
1797 h-uint DFLT f-dsp-8-u8
1798 ((parse "unsigned8")) () ()
1799 )
1800 (define-full-operand Dsp-8-u16 "unsigned 16 bit displacement at offset 8 bits" (all-isas)
1801 h-uint DFLT f-dsp-8-u16
1802 ((parse "unsigned16")) () ()
1803 )
1804 (define-full-operand Dsp-8-s8 "signed 8 bit displacement at offset 8 bits" (all-isas)
1805 h-sint DFLT f-dsp-8-s8
1806 ((parse "signed8")) () ()
1807 )
1808 (define-full-operand Dsp-8-s24 "signed 24 bit displacement at offset 8 bits" (all-isas)
1809 h-sint DFLT f-dsp-8-s24
1810 ((parse "signed24")) () ()
1811 )
1812 (define-full-operand Dsp-8-u24 "unsigned 24 bit displacement at offset 8 bits" (all-isas)
1813 h-uint DFLT f-dsp-8-u24
1814 ((parse "unsigned24")) () ()
1815 )
1816 (define-full-operand Dsp-10-u6 "unsigned 6 bit displacement at offset 10 bits" (all-isas)
1817 h-uint DFLT f-dsp-10-u6
1818 ((parse "unsigned6")) () ()
1819 )
1820 (define-full-operand Dsp-16-u8 "unsigned 8 bit displacement at offset 16 bits" (all-isas)
1821 h-uint DFLT f-dsp-16-u8
1822 ((parse "unsigned8")) () ()
1823 )
1824 (define-full-operand Dsp-16-u16 "unsigned 16 bit displacement at offset 16 bits" (all-isas)
1825 h-uint DFLT f-dsp-16-u16
1826 ((parse "unsigned16")) () ()
1827 )
1828 (define-full-operand Dsp-16-u20 "unsigned 20 bit displacement at offset 16 bits" (all-isas)
1829 h-uint DFLT f-dsp-16-u24
1830 ((parse "unsigned20")) () ()
1831 )
1832 (define-full-operand Dsp-16-u24 "unsigned 24 bit displacement at offset 16 bits" (all-isas)
1833 h-uint DFLT f-dsp-16-u24
1834 ((parse "unsigned24")) () ()
1835 )
1836 (define-full-operand Dsp-16-s8 "signed 8 bit displacement at offset 16 bits" (all-isas)
1837 h-sint DFLT f-dsp-16-s8
1838 ((parse "signed8")) () ()
1839 )
1840 (define-full-operand Dsp-16-s16 "signed 16 bit displacement at offset 16 bits" (all-isas)
1841 h-sint DFLT f-dsp-16-s16
1842 ((parse "signed16")) () ()
1843 )
1844 (define-full-operand Dsp-24-u8 "unsigned 8 bit displacement at offset 24 bits" (all-isas)
1845 h-uint DFLT f-dsp-24-u8
1846 ((parse "unsigned8")) () ()
1847 )
1848 (define-full-operand Dsp-24-u16 "unsigned 16 bit displacement at offset 24 bits" (all-isas)
1849 h-uint DFLT f-dsp-24-u16
1850 ((parse "unsigned16")) () ()
1851 )
1852 (define-full-operand Dsp-24-u20 "unsigned 20 bit displacement at offset 24 bits" (all-isas)
1853 h-uint DFLT f-dsp-24-u24
1854 ((parse "unsigned20")) () ()
1855 )
1856 (define-full-operand Dsp-24-u24 "unsigned 24 bit displacement at offset 24 bits" (all-isas)
1857 h-uint DFLT f-dsp-24-u24
1858 ((parse "unsigned24")) () ()
1859 )
1860 (define-full-operand Dsp-24-s8 "signed 8 bit displacement at offset 24 bits" (all-isas)
1861 h-sint DFLT f-dsp-24-s8
1862 ((parse "signed8")) () ()
1863 )
1864 (define-full-operand Dsp-24-s16 "signed 16 bit displacement at offset 24 bits" (all-isas)
1865 h-sint DFLT f-dsp-24-s16
1866 ((parse "signed16")) () ()
1867 )
1868 (define-full-operand Dsp-32-u8 "unsigned 8 bit displacement at offset 32 bits" (all-isas)
1869 h-uint DFLT f-dsp-32-u8
1870 ((parse "unsigned8")) () ()
1871 )
1872 (define-full-operand Dsp-32-u16 "unsigned 16 bit displacement at offset 32 bits" (all-isas)
1873 h-uint DFLT f-dsp-32-u16
1874 ((parse "unsigned16")) () ()
1875 )
1876 (define-full-operand Dsp-32-u24 "unsigned 24 bit displacement at offset 32 bits" (all-isas)
1877 h-uint DFLT f-dsp-32-u24
1878 ((parse "unsigned24")) () ()
1879 )
1880 (define-full-operand Dsp-32-u20 "unsigned 20 bit displacement at offset 32 bits" (all-isas)
1881 h-uint DFLT f-dsp-32-u24
1882 ((parse "unsigned20")) () ()
1883 )
1884 (define-full-operand Dsp-32-s8 "signed 8 bit displacement at offset 32 bits" (all-isas)
1885 h-sint DFLT f-dsp-32-s8
1886 ((parse "signed8")) () ()
1887 )
1888 (define-full-operand Dsp-32-s16 "signed 16 bit displacement at offset 32 bits" (all-isas)
1889 h-sint DFLT f-dsp-32-s16
1890 ((parse "signed16")) () ()
1891 )
1892 (define-full-operand Dsp-40-u8 "unsigned 8 bit displacement at offset 40 bits" (all-isas)
1893 h-uint DFLT f-dsp-40-u8
1894 ((parse "unsigned8")) () ()
1895 )
1896 (define-full-operand Dsp-40-s8 "signed 8 bit displacement at offset 40 bits" (all-isas)
1897 h-sint DFLT f-dsp-40-s8
1898 ((parse "signed8")) () ()
1899 )
1900 (define-full-operand Dsp-40-u16 "unsigned 16 bit displacement at offset 40 bits" (all-isas)
1901 h-uint DFLT f-dsp-40-u16
1902 ((parse "unsigned16")) () ()
1903 )
1904 (define-full-operand Dsp-40-s16 "signed 16 bit displacement at offset 40 bits" (all-isas)
1905 h-sint DFLT f-dsp-40-s16
1906 ((parse "signed16")) () ()
1907 )
1908 (define-full-operand Dsp-40-u20 "unsigned 20 bit displacement at offset 40 bits" (all-isas)
1909 h-uint DFLT f-dsp-40-u20
1910 ((parse "unsigned20")) () ()
1911 )
1912 (define-full-operand Dsp-40-u24 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1913 h-uint DFLT f-dsp-40-u24
1914 ((parse "unsigned24")) () ()
1915 )
1916 (define-full-operand Dsp-48-u8 "unsigned 8 bit displacement at offset 48 bits" (all-isas)
1917 h-uint DFLT f-dsp-48-u8
1918 ((parse "unsigned8")) () ()
1919 )
1920 (define-full-operand Dsp-48-s8 "signed 8 bit displacement at offset 48 bits" (all-isas)
1921 h-sint DFLT f-dsp-48-s8
1922 ((parse "signed8")) () ()
1923 )
1924 (define-full-operand Dsp-48-u16 "unsigned 16 bit displacement at offset 48 bits" (all-isas)
1925 h-uint DFLT f-dsp-48-u16
1926 ((parse "unsigned16")) () ()
1927 )
1928 (define-full-operand Dsp-48-s16 "signed 16 bit displacement at offset 48 bits" (all-isas)
1929 h-sint DFLT f-dsp-48-s16
1930 ((parse "signed16")) () ()
1931 )
1932 (define-full-operand Dsp-48-u20 "unsigned 24 bit displacement at offset 40 bits" (all-isas)
1933 h-uint DFLT f-dsp-48-u20
1934 ((parse "unsigned24")) () ()
1935 )
1936 (define-full-operand Dsp-48-u24 "unsigned 24 bit displacement at offset 48 bits" (all-isas)
1937 h-uint DFLT f-dsp-48-u24
1938 ((parse "unsigned24")) () ()
1939 )
1941 (define-full-operand Imm-8-s4 "signed 4 bit immediate at offset 8 bits" (all-isas)
1942 h-sint DFLT f-imm-8-s4
1943 ((parse "signed4")) () ()
1944 )
1945 (define-full-operand Imm-8-s4n "negated 4 bit immediate at offset 8 bits" (all-isas)
1946 h-sint DFLT f-imm-8-s4
1947 ((parse "signed4n") (print "signed4n")) () ()
1948 )
1949 (define-full-operand Imm-sh-8-s4 "signed 4 bit shift immediate at offset 8 bits" (all-isas)
1950 h-shimm DFLT f-imm-8-s4
1951 () () ()
1952 )
1953 (define-full-operand Imm-8-QI "signed 8 bit immediate at offset 8 bits" (all-isas)
1954 h-sint DFLT f-dsp-8-s8
1955 ((parse "signed8")) () ()
1956 )
1957 (define-full-operand Imm-8-HI "signed 16 bit immediate at offset 8 bits" (all-isas)
1958 h-sint DFLT f-dsp-8-s16
1959 ((parse "signed16")) () ()
1960 )
1961 (define-full-operand Imm-12-s4 "signed 4 bit immediate at offset 12 bits" (all-isas)
1962 h-sint DFLT f-imm-12-s4
1963 ((parse "signed4")) () ()
1964 )
1965 (define-full-operand Imm-12-s4n "negated 4 bit immediate at offset 12 bits" (all-isas)
1966 h-sint DFLT f-imm-12-s4
1967 ((parse "signed4n") (print "signed4n")) () ()
1968 )
1969 (define-full-operand Imm-sh-12-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1970 h-shimm DFLT f-imm-12-s4
1971 () () ()
1972 )
1973 (define-full-operand Imm-13-u3 "signed 3 bit immediate at offset 13 bits" (all-isas)
1974 h-sint DFLT f-imm-13-u3
1975 ((parse "signed4")) () ()
1976 )
1977 (define-full-operand Imm-20-s4 "signed 4 bit immediate at offset 20 bits" (all-isas)
1978 h-sint DFLT f-imm-20-s4
1979 ((parse "signed4")) () ()
1980 )
1981 (define-full-operand Imm-sh-20-s4 "signed 4 bit shift immediate at offset 12 bits" (all-isas)
1982 h-shimm DFLT f-imm-20-s4
1983 () () ()
1984 )
1985 (define-full-operand Imm-16-QI "signed 8 bit immediate at offset 16 bits" (all-isas)
1986 h-sint DFLT f-dsp-16-s8
1987 ((parse "signed8")) () ()
1988 )
1989 (define-full-operand Imm-16-HI "signed 16 bit immediate at offset 16 bits" (all-isas)
1990 h-sint DFLT f-dsp-16-s16
1991 ((parse "signed16")) () ()
1992 )
1993 (define-full-operand Imm-16-SI "signed 32 bit immediate at offset 16 bits" (all-isas)
1994 h-sint DFLT f-dsp-16-s32
1995 ((parse "signed32")) () ()
1996 )
1997 (define-full-operand Imm-24-QI "signed 8 bit immediate at offset 24 bits" (all-isas)
1998 h-sint DFLT f-dsp-24-s8
1999 ((parse "signed8")) () ()
2000 )
2001 (define-full-operand Imm-24-HI "signed 16 bit immediate at offset 24 bits" (all-isas)
2002 h-sint DFLT f-dsp-24-s16
2003 ((parse "signed16")) () ()
2004 )
2005 (define-full-operand Imm-24-SI "signed 32 bit immediate at offset 24 bits" (all-isas)
2006 h-sint DFLT f-dsp-24-s32
2007 ((parse "signed32")) () ()
2008 )
2009 (define-full-operand Imm-32-QI "signed 8 bit immediate at offset 32 bits" (all-isas)
2010 h-sint DFLT f-dsp-32-s8
2011 ((parse "signed8")) () ()
2012 )
2013 (define-full-operand Imm-32-SI "signed 32 bit immediate at offset 32 bits" (all-isas)
2014 h-sint DFLT f-dsp-32-s32
2015 ((parse "signed32")) () ()
2016 )
2017 (define-full-operand Imm-32-HI "signed 16 bit immediate at offset 32 bits" (all-isas)
2018 h-sint DFLT f-dsp-32-s16
2019 ((parse "signed16")) () ()
2020 )
2021 (define-full-operand Imm-40-QI "signed 8 bit immediate at offset 40 bits" (all-isas)
2022 h-sint DFLT f-dsp-40-s8
2023 ((parse "signed8")) () ()
2024 )
2025 (define-full-operand Imm-40-HI "signed 16 bit immediate at offset 40 bits" (all-isas)
2026 h-sint DFLT f-dsp-40-s16
2027 ((parse "signed16")) () ()
2028 )
2029 (define-full-operand Imm-40-SI "signed 32 bit immediate at offset 40 bits" (all-isas)
2030 h-sint DFLT f-dsp-40-s32
2031 ((parse "signed32")) () ()
2032 )
2033 (define-full-operand Imm-48-QI "signed 8 bit immediate at offset 48 bits" (all-isas)
2034 h-sint DFLT f-dsp-48-s8
2035 ((parse "signed8")) () ()
2036 )
2037 (define-full-operand Imm-48-HI "signed 16 bit immediate at offset 48 bits" (all-isas)
2038 h-sint DFLT f-dsp-48-s16
2039 ((parse "signed16")) () ()
2040 )
2041 (define-full-operand Imm-48-SI "signed 32 bit immediate at offset 48 bits" (all-isas)
2042 h-sint DFLT f-dsp-48-s32
2043 ((parse "signed32")) () ()
2044 )
2045 (define-full-operand Imm-56-QI "signed 8 bit immediate at offset 56 bits" (all-isas)
2046 h-sint DFLT f-dsp-56-s8
2047 ((parse "signed8")) () ()
2048 )
2049 (define-full-operand Imm-56-HI "signed 16 bit immediate at offset 56 bits" (all-isas)
2050 h-sint DFLT f-dsp-56-s16
2051 ((parse "signed16")) () ()
2052 )
2053 (define-full-operand Imm-64-HI "signed 16 bit immediate at offset 64 bits" (all-isas)
2054 h-sint DFLT f-dsp-64-s16
2055 ((parse "signed16")) () ()
2056 )
2057 (define-full-operand Imm1-S "signed 1 bit immediate for short format binary insns" (m32c-isa)
2058 h-sint DFLT f-imm1-S
2059 ((parse "imm1_S")) () ()
2060 )
2061 (define-full-operand Imm3-S "signed 3 bit immediate for short format binary insns" (m32c-isa)
2062 h-sint DFLT f-imm3-S
2063 ((parse "imm3_S")) () ()
2064 )
2065 (define-full-operand Bit3-S "3 bit bit number" (m32c-isa)
2066 h-sint DFLT f-imm3-S
2067 ((parse "bit3_S")) () ()
2068 )
2070 ;-------------------------------------------------------------
2071 ; Bit numbers
2072 ;-------------------------------------------------------------
2074 (define-full-operand Bitno16R "bit number for indexing registers" (m16c-isa)
2075 h-uint DFLT f-dsp-16-u8
2076 ((parse "Bitno16R")) () ()
2077 )
2078 (dnop Bitno32Prefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-prefixed)
2079 (dnop Bitno32Unprefixed "bit number for indexing objects" (m32c-isa) h-uint f-bitno32-unprefixed)
2081 (define-full-operand BitBase16-16-u8 "unsigned bit,base:8 at offset 16for m16c" (m16c-isa)
2082 h-uint DFLT f-dsp-16-u8
2083 ((parse "unsigned_bitbase8") (print "unsigned_bitbase")) () ()
2084 )
2085 (define-full-operand BitBase16-16-s8 "signed bit,base:8 at offset 16for m16c" (m16c-isa)
2086 h-sint DFLT f-dsp-16-s8
2087 ((parse "signed_bitbase8") (print "signed_bitbase")) () ()
2088 )
2089 (define-full-operand BitBase16-16-u16 "unsigned bit,base:16 at offset 16 for m16c" (m16c-isa)
2090 h-uint DFLT f-dsp-16-u16
2091 ((parse "unsigned_bitbase16") (print "unsigned_bitbase")) () ()
2092 )
2093 (define-full-operand BitBase16-8-u11-S "signed bit,base:11 at offset 16 for m16c" (m16c-isa)
2094 h-uint DFLT f-bitbase16-u11-S
2095 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2096 )
2098 (define-full-operand BitBase32-16-u11-Unprefixed "unsigned bit,base:11 at offset 16 for m32c" (m32c-isa)
2099 h-uint DFLT f-bitbase32-16-u11-unprefixed
2100 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2101 )
2102 (define-full-operand BitBase32-16-s11-Unprefixed "signed bit,base:11 at offset 16 for m32c" (m32c-isa)
2103 h-sint DFLT f-bitbase32-16-s11-unprefixed
2104 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2105 )
2106 (define-full-operand BitBase32-16-u19-Unprefixed "unsigned bit,base:19 at offset 16 for m32c" (m32c-isa)
2107 h-uint DFLT f-bitbase32-16-u19-unprefixed
2108 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2109 )
2110 (define-full-operand BitBase32-16-s19-Unprefixed "signed bit,base:19 at offset 16 for m32c" (m32c-isa)
2111 h-sint DFLT f-bitbase32-16-s19-unprefixed
2112 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2113 )
2114 (define-full-operand BitBase32-16-u27-Unprefixed "unsigned bit,base:27 at offset 16 for m32c" (m32c-isa)
2115 h-uint DFLT f-bitbase32-16-u27-unprefixed
2116 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2117 )
2118 (define-full-operand BitBase32-24-u11-Prefixed "unsigned bit,base:11 at offset 24 for m32c" (m32c-isa)
2119 h-uint DFLT f-bitbase32-24-u11-prefixed
2120 ((parse "unsigned_bitbase11") (print "unsigned_bitbase")) () ()
2121 )
2122 (define-full-operand BitBase32-24-s11-Prefixed "signed bit,base:11 at offset 24 for m32c" (m32c-isa)
2123 h-sint DFLT f-bitbase32-24-s11-prefixed
2124 ((parse "signed_bitbase11") (print "signed_bitbase")) () ()
2125 )
2126 (define-full-operand BitBase32-24-u19-Prefixed "unsigned bit,base:19 at offset 24 for m32c" (m32c-isa)
2127 h-uint DFLT f-bitbase32-24-u19-prefixed
2128 ((parse "unsigned_bitbase19") (print "unsigned_bitbase")) () ()
2129 )
2130 (define-full-operand BitBase32-24-s19-Prefixed "signed bit,base:19 at offset 24 for m32c" (m32c-isa)
2131 h-sint DFLT f-bitbase32-24-s19-prefixed
2132 ((parse "signed_bitbase19") (print "signed_bitbase")) () ()
2133 )
2134 (define-full-operand BitBase32-24-u27-Prefixed "unsigned bit,base:27 at offset 24 for m32c" (m32c-isa)
2135 h-uint DFLT f-bitbase32-24-u27-prefixed
2136 ((parse "unsigned_bitbase27") (print "unsigned_bitbase")) () ()
2137 )
2138 ;-------------------------------------------------------------
2139 ; Labels
2140 ;-------------------------------------------------------------
2142 (define-full-operand Lab-5-3 "3 bit label" (all-isas RELAX)
2143 h-iaddr DFLT f-lab-5-3
2144 ((parse "lab_5_3")) () () )
2146 (define-full-operand Lab32-jmp-s "3 bit label" (all-isas RELAX)
2147 h-iaddr DFLT f-lab32-jmp-s
2148 ((parse "lab_5_3")) () () )
2150 (dnop Lab-8-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-8-8)
2151 (dnop Lab-8-16 "16 bit label" (all-isas RELAX) h-iaddr f-lab-8-16)
2152 (dnop Lab-8-24 "24 bit label" (all-isas RELAX) h-iaddr f-lab-8-24)
2153 (dnop Lab-16-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-16-8)
2154 (dnop Lab-24-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-24-8)
2155 (dnop Lab-32-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-32-8)
2156 (dnop Lab-40-8 "8 bit label" (all-isas RELAX) h-iaddr f-lab-40-8)
2158 ;-------------------------------------------------------------
2159 ; Condition code bits
2160 ;-------------------------------------------------------------
2162 (dnop sbit "negative bit" (SEM-ONLY all-isas) h-sbit f-nil)
2163 (dnop obit "overflow bit" (SEM-ONLY all-isas) h-obit f-nil)
2164 (dnop zbit "zero bit" (SEM-ONLY all-isas) h-zbit f-nil)
2165 (dnop cbit "carry bit" (SEM-ONLY all-isas) h-cbit f-nil)
2166 (dnop ubit "stack ptr select bit" (SEM-ONLY all-isas) h-ubit f-nil)
2167 (dnop ibit "interrupt enable bit" (SEM-ONLY all-isas) h-ibit f-nil)
2168 (dnop bbit "reg bank select bit" (SEM-ONLY all-isas) h-bbit f-nil)
2169 (dnop dbit "debug bit" (SEM-ONLY all-isas) h-dbit f-nil)
2171 ;-------------------------------------------------------------
2172 ; Condition operands
2173 ;-------------------------------------------------------------
2175 (define-pmacro (cond-operand mach offset)
2176 (dnop (.sym cond mach - offset) "condition" ((.sym m mach c-isa)) (.sym h-cond mach) (.sym f-dsp- offset -u8))
2177 )
2179 (cond-operand 16 16)
2180 (cond-operand 16 24)
2181 (cond-operand 16 32)
2182 (cond-operand 32 16)
2183 (cond-operand 32 24)
2184 (cond-operand 32 32)
2185 (cond-operand 32 40)
2187 (dnop cond16c "condition" (m16c-isa) h-cond16c f-cond16)
2188 (dnop cond16j "condition" (m16c-isa) h-cond16j f-cond16)
2189 (dnop cond16j5 "condition" (m16c-isa) h-cond16j-5 f-cond16j-5)
2190 (dnop cond32 "condition" (m32c-isa) h-cond32 f-cond32)
2191 (dnop cond32j "condition" (m32c-isa) h-cond32 f-cond32j)
2192 (dnop sccond32 "scCND condition" (m32c-isa) h-cond32 f-cond16)
2193 (dnop flags16 "flags" (m16c-isa) h-flags f-9-3)
2194 (dnop flags32 "flags" (m32c-isa) h-flags f-13-3)
2195 (dnop cr16 "control" (m16c-isa) h-cr-16 f-9-3)
2196 (dnop cr1-Unprefixed-32 "control" (m32c-isa) h-cr1-32 f-13-3)
2197 (dnop cr1-Prefixed-32 "control" (m32c-isa) h-cr1-32 f-21-3)
2198 (dnop cr2-32 "control" (m32c-isa) h-cr2-32 f-13-3)
2199 (dnop cr3-Unprefixed-32 "control" (m32c-isa) h-cr3-32 f-13-3)
2200 (dnop cr3-Prefixed-32 "control" (m32c-isa) h-cr3-32 f-21-3)
2202 ;-------------------------------------------------------------
2203 ; Suffixes
2204 ;-------------------------------------------------------------
2206 (define-full-operand Z "Suffix for zero format insns" (all-isas)
2207 h-sint DFLT f-nil
2208 ((parse "Z") (print "Z")) () ()
2209 )
2210 (define-full-operand S "Suffix for short format insns" (all-isas)
2211 h-sint DFLT f-nil
2212 ((parse "S") (print "S")) () ()
2213 )
2214 (define-full-operand Q "Suffix for quick format insns" (all-isas)
2215 h-sint DFLT f-nil
2216 ((parse "Q") (print "Q")) () ()
2217 )
2218 (define-full-operand G "Suffix for general format insns" (all-isas)
2219 h-sint DFLT f-nil
2220 ((parse "G") (print "G")) () ()
2221 )
2222 (define-full-operand X "Empty suffix" (all-isas)
2223 h-sint DFLT f-nil
2224 ((parse "X") (print "X")) () ()
2225 )
2226 (define-full-operand size "any size specifier" (all-isas)
2227 h-sint DFLT f-nil
2228 ((parse "size") (print "size")) () ()
2229 )
2230 ;-------------------------------------------------------------
2231 ; Misc
2232 ;-------------------------------------------------------------
2234 (dnop BitIndex "Bit Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-bit-index f-nil)
2235 (dnop SrcIndex "Source Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-src-index f-nil)
2236 (dnop DstIndex "Destination Index for the next insn" (SEM-ONLY MACH32 m32c-isa) h-dst-index f-nil)
2237 (dnop NoRemainder "Place holder for when the remainder is not kept" (SEM-ONLY MACH32 m32c-isa) h-none f-nil)
2238 \f
2239 ;=============================================================
2240 ; Derived Operands
2242 ; Memory reference macros that clip addresses appropriately. Refer to
2243 ; memory at ADDRESS in MODE, clipped appropriately for either the m16c
2244 ; or m32c.
2245 (define-pmacro (mem16 mode address)
2246 (mem mode (and #xffff address)))
2248 (define-pmacro (mem20 mode address)
2249 (mem mode (and #xfffff address)))
2251 (define-pmacro (mem32 mode address)
2252 (mem mode (and #xffffff address)))
2254 ; Like mem16 and mem32, but takes MACH as a parameter. MACH must be
2255 ; either 16 or 32.
2256 (define-pmacro (mem-mach mach mode address)
2257 ((.sym mem mach) mode address))
2259 ;-------------------------------------------------------------
2260 ; Source
2261 ;-------------------------------------------------------------
2262 ; Rn direct
2263 ;-------------------------------------------------------------
2265 (define-pmacro (src16-Rn-direct-operand xmode)
2266 (begin
2267 (define-derived-operand
2268 (name (.sym src16-Rn-direct- xmode))
2269 (comment (.str "m16c Rn direct source " xmode))
2270 (attrs (machine 16))
2271 (mode xmode)
2272 (args ((.sym Src16Rn xmode)))
2273 (syntax (.str "$Src16Rn" xmode))
2274 (base-ifield f-8-4)
2275 (encoding (+ (f-8-2 0) (.sym Src16Rn xmode)))
2276 (ifield-assertion (eq f-8-2 0))
2277 (getter (trunc xmode (.sym Src16Rn xmode)))
2278 (setter (set (.sym Src16Rn xmode) newval))
2279 )
2280 )
2281 )
2282 (src16-Rn-direct-operand QI)
2283 (src16-Rn-direct-operand HI)
2285 (define-pmacro (src32-Rn-direct-operand group base xmode)
2286 (begin
2287 (define-derived-operand
2288 (name (.sym src32-Rn-direct- group - xmode))
2289 (comment (.str "m32c Rn direct source " xmode))
2290 (attrs (machine 32))
2291 (mode xmode)
2292 (args ((.sym Src32Rn group xmode)))
2293 (syntax (.str "$Src32Rn" group xmode))
2294 (base-ifield (.sym f- base -11))
2295 (encoding (+ ((.sym f- base -3) 4) (.sym Src32Rn group xmode)))
2296 (ifield-assertion (eq (.sym f- base -3) 4))
2297 (getter (trunc xmode (.sym Src32Rn group xmode)))
2298 (setter (set (.sym Src32Rn group xmode) newval))
2299 )
2300 )
2301 )
2303 (src32-Rn-direct-operand Unprefixed 1 QI)
2304 (src32-Rn-direct-operand Prefixed 9 QI)
2305 (src32-Rn-direct-operand Unprefixed 1 HI)
2306 (src32-Rn-direct-operand Prefixed 9 HI)
2307 (src32-Rn-direct-operand Unprefixed 1 SI)
2308 (src32-Rn-direct-operand Prefixed 9 SI)
2310 ;-------------------------------------------------------------
2311 ; An direct
2312 ;-------------------------------------------------------------
2314 (define-pmacro (src16-An-direct-operand xmode)
2315 (begin
2316 (define-derived-operand
2317 (name (.sym src16-An-direct- xmode))
2318 (comment (.str "m16c An direct destination " xmode))
2319 (attrs (machine 16))
2320 (mode xmode)
2321 (args ((.sym Src16An xmode)))
2322 (syntax (.str "$Src16An" xmode))
2323 (base-ifield f-8-4)
2324 (encoding (+ (f-8-2 1) (f-10-1 0) (.sym Src16An xmode)))
2325 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 0)))
2326 (getter (trunc xmode (.sym Src16An xmode)))
2327 (setter (set (.sym Src16An xmode) newval))
2328 )
2329 )
2330 )
2331 (src16-An-direct-operand QI)
2332 (src16-An-direct-operand HI)
2334 (define-pmacro (src32-An-direct-operand group base1 base2 xmode)
2335 (begin
2336 (define-derived-operand
2337 (name (.sym src32-An-direct- group - xmode))
2338 (comment (.str "m32c An direct destination " xmode))
2339 (attrs (machine 32))
2340 (mode xmode)
2341 (args ((.sym Src32An group xmode)))
2342 (syntax (.str "$Src32An" group xmode))
2343 (base-ifield (.sym f- base1 -11))
2344 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Src32An group xmode)))
2345 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
2346 (getter (trunc xmode (.sym Src32An group xmode)))
2347 (setter (set (.sym Src32An group xmode) newval))
2348 )
2349 )
2350 )
2352 (src32-An-direct-operand Unprefixed 1 10 QI)
2353 (src32-An-direct-operand Unprefixed 1 10 HI)
2354 (src32-An-direct-operand Unprefixed 1 10 SI)
2355 (src32-An-direct-operand Prefixed 9 18 QI)
2356 (src32-An-direct-operand Prefixed 9 18 HI)
2357 (src32-An-direct-operand Prefixed 9 18 SI)
2359 ;-------------------------------------------------------------
2360 ; An indirect
2361 ;-------------------------------------------------------------
2363 (define-pmacro (src16-An-indirect-operand xmode)
2364 (begin
2365 (define-derived-operand
2366 (name (.sym src16-An-indirect- xmode))
2367 (comment (.str "m16c An indirect destination " xmode))
2368 (attrs (machine 16))
2369 (mode xmode)
2370 (args (Src16An))
2371 (syntax "[$Src16An]")
2372 (base-ifield f-8-4)
2373 (encoding (+ (f-8-2 1) (f-10-1 1) Src16An))
2374 (ifield-assertion (andif (eq f-8-2 1) (eq f-10-1 1)))
2375 (getter (mem16 xmode Src16An))
2376 (setter (set (mem16 xmode Src16An) newval))
2377 )
2378 )
2379 )
2380 (src16-An-indirect-operand QI)
2381 (src16-An-indirect-operand HI)
2383 (define-pmacro (src32-An-indirect-operand group base1 base2 xmode)
2384 (begin
2385 (define-derived-operand
2386 (name (.sym src32-An-indirect- group - xmode))
2387 (comment (.str "m32c An indirect destination " xmode))
2388 (attrs (machine 32))
2389 (mode xmode)
2390 (args ((.sym Src32An group)))
2391 (syntax (.str "[$Src32An" group "]"))
2392 (base-ifield (.sym f- base1 -11))
2393 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Src32An group)))
2394 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
2395 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group)
2396 (const 0)))
2397 (setter (c-call DFLT (.str "operand_setter_" xmode) newval
2398 (.sym Src32An group) (const 0)))
2399 ; (getter (mem32 xmode (.sym Src32An group)))
2400 ; (setter (set (mem32 xmode (.sym Src32An group)) newval))
2401 )
2402 )
2403 )
2405 (src32-An-indirect-operand Unprefixed 1 10 QI)
2406 (src32-An-indirect-operand Unprefixed 1 10 HI)
2407 (src32-An-indirect-operand Unprefixed 1 10 SI)
2408 (src32-An-indirect-operand Prefixed 9 18 QI)
2409 (src32-An-indirect-operand Prefixed 9 18 HI)
2410 (src32-An-indirect-operand Prefixed 9 18 SI)
2412 ;-------------------------------------------------------------
2413 ; dsp:d[r] relative
2414 ;-------------------------------------------------------------
2416 (define-pmacro (src16-relative-operand xmode)
2417 (begin
2418 (define-derived-operand
2419 (name (.sym src16-16-8-SB-relative- xmode))
2420 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
2421 (attrs (machine 16))
2422 (mode xmode)
2423 (args (Dsp-16-u8))
2424 (syntax "${Dsp-16-u8}[sb]")
2425 (base-ifield f-8-4)
2426 (encoding (+ (f-8-4 #xA) Dsp-16-u8))
2427 (ifield-assertion (eq f-8-4 #xA))
2428 (getter (mem16 xmode (add Dsp-16-u8 (reg h-sb))))
2429 (setter (set (mem16 xmode (add Dsp-16-u8 (reg h-sb))) newval))
2430 )
2431 (define-derived-operand
2432 (name (.sym src16-16-16-SB-relative- xmode))
2433 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
2434 (attrs (machine 16))
2435 (mode xmode)
2436 (args (Dsp-16-u16))
2437 (syntax "${Dsp-16-u16}[sb]")
2438 (base-ifield f-8-4)
2439 (encoding (+ (f-8-4 #xE) Dsp-16-u16))
2440 (ifield-assertion (eq f-8-4 #xE))
2441 (getter (mem16 xmode (add Dsp-16-u16 (reg h-sb))))
2442 (setter (set (mem16 xmode (add Dsp-16-u16 (reg h-sb))) newval))
2443 )
2444 (define-derived-operand
2445 (name (.sym src16-16-8-FB-relative- xmode))
2446 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
2447 (attrs (machine 16))
2448 (mode xmode)
2449 (args (Dsp-16-s8))
2450 (syntax "${Dsp-16-s8}[fb]")
2451 (base-ifield f-8-4)
2452 (encoding (+ (f-8-4 #xB) Dsp-16-s8))
2453 (ifield-assertion (eq f-8-4 #xB))
2454 (getter (mem16 xmode (add Dsp-16-s8 (reg h-fb))))
2455 (setter (set (mem16 xmode (add Dsp-16-s8 (reg h-fb))) newval))
2456 )
2457 (define-derived-operand
2458 (name (.sym src16-16-8-An-relative- xmode))
2459 (comment (.str "m16c dsp:8[An] relative destination " xmode))
2460 (attrs (machine 16))
2461 (mode xmode)
2462 (args (Src16An Dsp-16-u8))
2463 (syntax "${Dsp-16-u8}[$Src16An]")
2464 (base-ifield f-8-4)
2465 (encoding (+ (f-8-2 2) (f-10-1 0) Dsp-16-u8 Src16An))
2466 (ifield-assertion (andif (eq f-8-2 2) (eq f-10-1 0)))
2467 (getter (mem16 xmode (add Dsp-16-u8 Src16An)))
2468 (setter (set (mem16 xmode (add Dsp-16-u8 Src16An)) newval))
2469 )
2470 (define-derived-operand
2471 (name (.sym src16-16-16-An-relative- xmode))
2472 (comment (.str "m16c dsp:16[An] relative destination " xmode))
2473 (attrs (machine 16))
2474 (mode xmode)
2475 (args (Src16An Dsp-16-u16))
2476 (syntax "${Dsp-16-u16}[$Src16An]")
2477 (base-ifield f-8-4)
2478 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u16 Src16An))
2479 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2480 (getter (mem16 xmode (add Dsp-16-u16 Src16An)))
2481 (setter (set (mem16 xmode (add Dsp-16-u16 Src16An)) newval))
2482 )
2483 (define-derived-operand
2484 (name (.sym src16-16-20-An-relative- xmode))
2485 (comment (.str "m16c dsp:20[An] relative destination " xmode))
2486 (attrs (machine 16))
2487 (mode xmode)
2488 (args (Src16An Dsp-16-u20))
2489 (syntax "${Dsp-16-u20}[$Src16An]")
2490 (base-ifield f-8-4)
2491 (encoding (+ (f-8-2 3) (f-10-1 0) Dsp-16-u20 Src16An))
2492 (ifield-assertion (andif (eq f-8-2 3) (eq f-10-1 0)))
2493 (getter (mem20 xmode (add Dsp-16-u20 Src16An)))
2494 (setter (set (mem20 xmode (add Dsp-16-u20 Src16An)) newval))
2495 )
2496 )
2497 )
2499 (src16-relative-operand QI)
2500 (src16-relative-operand HI)
2502 (define-pmacro (src32-relative-operand offset group base1 base2 xmode)
2503 (begin
2504 (define-derived-operand
2505 (name (.sym src32- offset -8-SB-relative- group - xmode))
2506 (comment (.str "m32c dsp:8[sb] relative destination " xmode))
2507 (attrs (machine 32))
2508 (mode xmode)
2509 (args ((.sym Dsp- offset -u8)))
2510 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
2511 (base-ifield (.sym f- base1 -11))
2512 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
2513 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
2514 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u8)))
2515 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u8)))
2516 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
2517 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
2518 )
2519 (define-derived-operand
2520 (name (.sym src32- offset -16-SB-relative- group - xmode))
2521 (comment (.str "m32c dsp:16[sb] relative destination " xmode))
2522 (attrs (machine 32))
2523 (mode xmode)
2524 (args ((.sym Dsp- offset -u16)))
2525 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
2526 (base-ifield (.sym f- base1 -11))
2527 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
2528 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
2529 (getter (c-call xmode (.str "operand_getter_" xmode) sb (.sym Dsp- offset -u16)))
2530 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb (.sym Dsp- offset -u16)))
2531 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
2532 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
2533 )
2534 (define-derived-operand
2535 (name (.sym src32- offset -8-FB-relative- group - xmode))
2536 (comment (.str "m32c dsp:8[fb] relative destination " xmode))
2537 (attrs (machine 32))
2538 (mode xmode)
2539 (args ((.sym Dsp- offset -s8)))
2540 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
2541 (base-ifield (.sym f- base1 -11))
2542 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
2543 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
2544 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s8)))
2545 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s8)))
2546 ; (getter (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
2547 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
2548 )
2549 (define-derived-operand
2550 (name (.sym src32- offset -16-FB-relative- group - xmode))
2551 (comment (.str "m32c dsp:16[fb] relative destination " xmode))
2552 (attrs (machine 32))
2553 (mode xmode)
2554 (args ((.sym Dsp- offset -s16)))
2555 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
2556 (base-ifield (.sym f- base1 -11))
2557 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
2558 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
2559 (getter (c-call xmode (.str "operand_getter_" xmode) fb (.sym Dsp- offset -s16)))
2560 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb (.sym Dsp- offset -s16)))
2561 ; (getter (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))))
2562 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
2563 )
2564 (define-derived-operand
2565 (name (.sym src32- offset -8-An-relative- group - xmode))
2566 (comment (.str "m32c dsp:8[An] relative destination " xmode))
2567 (attrs (machine 32))
2568 (mode xmode)
2569 (args ((.sym Src32An group) (.sym Dsp- offset -u8)))
2570 (syntax (.str "${Dsp-" offset "-u8}[$Src32An" group "]"))
2571 (base-ifield (.sym f- base1 -11))
2572 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Src32An group)))
2573 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
2574 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u8)))
2575 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u8)))
2576 ; (getter (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))))
2577 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u8) (.sym Src32An group))) newval))
2578 )
2579 (define-derived-operand
2580 (name (.sym src32- offset -16-An-relative- group - xmode))
2581 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2582 (attrs (machine 32))
2583 (mode xmode)
2584 (args ((.sym Src32An group) (.sym Dsp- offset -u16)))
2585 (syntax (.str "${Dsp-" offset "-u16}[$Src32An" group "]"))
2586 (base-ifield (.sym f- base1 -11))
2587 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Src32An group)))
2588 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
2589 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u16)))
2590 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u16)))
2591 ; (getter (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))))
2592 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u16) (.sym Src32An group))) newval))
2593 )
2594 (define-derived-operand
2595 (name (.sym src32- offset -24-An-relative- group - xmode))
2596 (comment (.str "m32c dsp:16[An] relative destination " xmode))
2597 (attrs (machine 32))
2598 (mode xmode)
2599 (args ((.sym Src32An group) (.sym Dsp- offset -u24)))
2600 (syntax (.str "${Dsp-" offset "-u24}[$Src32An" group "]"))
2601 (base-ifield (.sym f- base1 -11))
2602 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Src32An group)))
2603 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
2604 (getter (c-call xmode (.str "operand_getter_" xmode) (.sym Src32An group) (.sym Dsp- offset -u24) ))
2605 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (.sym Src32An group) (.sym Dsp- offset -u24)))
2606 ; (getter (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))))
2607 ; (setter (set (mem32 xmode (add (.sym Dsp- offset -u24) (.sym Src32An group))) newval))
2608 )
2609 )
2610 )
2612 (src32-relative-operand 16 Unprefixed 1 10 QI)
2613 (src32-relative-operand 16 Unprefixed 1 10 HI)
2614 (src32-relative-operand 16 Unprefixed 1 10 SI)
2615 (src32-relative-operand 24 Prefixed 9 18 QI)
2616 (src32-relative-operand 24 Prefixed 9 18 HI)
2617 (src32-relative-operand 24 Prefixed 9 18 SI)
2619 ;-------------------------------------------------------------
2620 ; Absolute address
2621 ;-------------------------------------------------------------
2623 (define-pmacro (src16-absolute xmode)
2624 (begin
2625 (define-derived-operand
2626 (name (.sym src16-16-16-absolute- xmode))
2627 (comment (.str "m16c absolute address " xmode))
2628 (attrs (machine 16))
2629 (mode xmode)
2630 (args (Dsp-16-u16))
2631 (syntax (.str "${Dsp-16-u16}"))
2632 (base-ifield f-8-4)
2633 (encoding (+ (f-8-4 #xF) Dsp-16-u16))
2634 (ifield-assertion (eq f-8-4 #xF))
2635 (getter (mem16 xmode Dsp-16-u16))
2636 (setter (set (mem16 xmode Dsp-16-u16) newval))
2637 )
2638 )
2639 )
2641 (src16-absolute QI)
2642 (src16-absolute HI)
2644 (define-pmacro (src32-absolute offset group base1 base2 xmode)
2645 (begin
2646 (define-derived-operand
2647 (name (.sym src32- offset -16-absolute- group - xmode))
2648 (comment (.str "m32c absolute address " xmode))
2649 (attrs (machine 32))
2650 (mode xmode)
2651 (args ((.sym Dsp- offset -u16)))
2652 (syntax (.str "${Dsp-" offset "-u16}"))
2653 (base-ifield (.sym f- base1 -11))
2654 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2655 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2656 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u16)))
2657 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u16)))
2658 ; (getter (mem32 xmode (.sym Dsp- offset -u16)))
2659 ; (setter (set (mem32 xmode (.sym Dsp- offset -u16)) newval))
2660 )
2661 (define-derived-operand
2662 (name (.sym src32- offset -24-absolute- group - xmode))
2663 (comment (.str "m32c absolute address " xmode))
2664 (attrs (machine 32))
2665 (mode xmode)
2666 (args ((.sym Dsp- offset -u24)))
2667 (syntax (.str "${Dsp-" offset "-u24}"))
2668 (base-ifield (.sym f- base1 -11))
2669 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2670 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2671 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) (.sym Dsp- offset -u24)))
2672 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) (.sym Dsp- offset -u24)))
2673 ; (getter (mem32 xmode (.sym Dsp- offset -u24)))
2674 ; (setter (set (mem32 xmode (.sym Dsp- offset -u24)) newval))
2675 )
2676 )
2677 )
2679 (src32-absolute 16 Unprefixed 1 10 QI)
2680 (src32-absolute 16 Unprefixed 1 10 HI)
2681 (src32-absolute 16 Unprefixed 1 10 SI)
2682 (src32-absolute 24 Prefixed 9 18 QI)
2683 (src32-absolute 24 Prefixed 9 18 HI)
2684 (src32-absolute 24 Prefixed 9 18 SI)
2686 ;-------------------------------------------------------------
2687 ; An indirect indirect
2688 ;
2689 ; Double indirect addressing uses the lower 3 bytes of the value stored
2690 ; at the address referenced by 'op' as the effective address.
2691 ;-------------------------------------------------------------
2693 (define-pmacro (indirect-addr op) (and USI (mem32 USI op) #x00ffffff))
2695 ; (define-pmacro (src-An-indirect-indirect-operand xmode)
2696 ; (define-derived-operand
2697 ; (name (.sym src32-An-indirect-indirect- xmode))
2698 ; (comment (.str "m32c An indirect indirect destination " xmode))
2699 ; (attrs (machine 32))
2700 ; (mode xmode)
2701 ; (args (Src32AnPrefixed))
2702 ; (syntax (.str "[[$Src32AnPrefixed]]"))
2703 ; (base-ifield f-9-11)
2704 ; (encoding (+ (f-9-3 0) (f-18-1 0) Src32AnPrefixed))
2705 ; (ifield-assertion (andif (eq f-9-3 0) (eq f-18-1 0)))
2706 ; (getter (mem32 xmode (indirect-addr Src32AnPrefixed)))
2707 ; (setter (set (mem32 xmode (indirect-addr Src32AnPrefixed)) newval))
2708 ; )
2709 ; )
2711 ; (src-An-indirect-indirect-operand QI)
2712 ; (src-An-indirect-indirect-operand HI)
2713 ; (src-An-indirect-indirect-operand SI)
2715 ;-------------------------------------------------------------
2716 ; Relative indirect
2717 ;-------------------------------------------------------------
2719 (define-pmacro (src-relative-indirect-operand xmode)
2720 (begin
2721 ; (define-derived-operand
2722 ; (name (.sym src32-24-8-SB-relative-indirect- xmode))
2723 ; (comment (.str "m32c dsp:8[sb] relative source " xmode))
2724 ; (attrs (machine 32))
2725 ; (mode xmode)
2726 ; (args (Dsp-24-u8))
2727 ; (syntax "[${Dsp-24-u8}[sb]]")
2728 ; (base-ifield f-9-11)
2729 ; (encoding (+ (f-9-3 1) (f-18-2 2) Dsp-24-u8))
2730 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 2)))
2731 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))))
2732 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 (reg h-sb)))) newval))
2733 ; )
2734 ; (define-derived-operand
2735 ; (name (.sym src32-24-16-SB-relative-indirect- xmode))
2736 ; (comment (.str "m32c dsp:16[sb] relative source " xmode))
2737 ; (attrs (machine 32))
2738 ; (mode xmode)
2739 ; (args (Dsp-24-u16))
2740 ; (syntax "[${Dsp-24-u16}[sb]]")
2741 ; (base-ifield f-9-11)
2742 ; (encoding (+ (f-9-3 2) (f-18-2 2) Dsp-24-u16))
2743 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 2)))
2744 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))))
2745 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 (reg h-sb)))) newval))
2746 ; )
2747 ; (define-derived-operand
2748 ; (name (.sym src32-24-8-FB-relative-indirect- xmode))
2749 ; (comment (.str "m32c dsp:8[fb] relative source " xmode))
2750 ; (attrs (machine 32))
2751 ; (mode xmode)
2752 ; (args (Dsp-24-s8))
2753 ; (syntax "[${Dsp-24-s8}[fb]]")
2754 ; (base-ifield f-9-11)
2755 ; (encoding (+ (f-9-3 1) (f-18-2 3) Dsp-24-s8))
2756 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-2 3)))
2757 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))))
2758 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s8 (reg h-fb)))) newval))
2759 ; )
2760 ; (define-derived-operand
2761 ; (name (.sym src32-24-16-FB-relative-indirect- xmode))
2762 ; (comment (.str "m32c dsp:16[fb] relative source " xmode))
2763 ; (attrs (machine 32))
2764 ; (mode xmode)
2765 ; (args (Dsp-24-s16))
2766 ; (syntax "[${Dsp-24-s16}[fb]]")
2767 ; (base-ifield f-9-11)
2768 ; (encoding (+ (f-9-3 2) (f-18-2 3) Dsp-24-s16))
2769 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-2 3)))
2770 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))))
2771 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-s16 (reg h-fb)))) newval))
2772 ; )
2773 ; (define-derived-operand
2774 ; (name (.sym src32-24-8-An-relative-indirect- xmode))
2775 ; (comment (.str "m32c dsp:8[An] relative indirect source " xmode))
2776 ; (attrs (machine 32))
2777 ; (mode xmode)
2778 ; (args (Src32AnPrefixed Dsp-24-u8))
2779 ; (syntax "[${Dsp-24-u8}[$Src32AnPrefixed]]")
2780 ; (base-ifield f-9-11)
2781 ; (encoding (+ (f-9-3 1) (f-18-1 0) Dsp-24-u8 Src32AnPrefixed))
2782 ; (ifield-assertion (andif (eq f-9-3 1) (eq f-18-1 0)))
2783 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))))
2784 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u8 Src32AnPrefixed))) newval))
2785 ; )
2786 ; (define-derived-operand
2787 ; (name (.sym src32-24-16-An-relative-indirect- xmode))
2788 ; (comment (.str "m32c dsp:16[An] relative source " xmode))
2789 ; (attrs (machine 32))
2790 ; (mode xmode)
2791 ; (args (Src32AnPrefixed Dsp-24-u16))
2792 ; (syntax "[${Dsp-24-u16}[$Src32AnPrefixed]]")
2793 ; (base-ifield f-9-11)
2794 ; (encoding (+ (f-9-3 2) (f-18-1 0) Dsp-24-u16 Src32AnPrefixed))
2795 ; (ifield-assertion (andif (eq f-9-3 2) (eq f-18-1 0)))
2796 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))))
2797 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u16 Src32AnPrefixed))) newval))
2798 ; )
2799 ; (define-derived-operand
2800 ; (name (.sym src32-24-24-An-relative-indirect- xmode))
2801 ; (comment (.str "m32c dsp:24[An] relative source " xmode))
2802 ; (attrs (machine 32))
2803 ; (mode xmode)
2804 ; (args (Src32AnPrefixed Dsp-24-u24))
2805 ; (syntax "[${Dsp-24-u24}[$Src32AnPrefixed]]")
2806 ; (base-ifield f-9-11)
2807 ; (encoding (+ (f-9-3 3) (f-18-1 0) Dsp-24-u24 Src32AnPrefixed))
2808 ; (ifield-assertion (andif (eq f-9-3 3) (eq f-18-1 0)))
2809 ; (getter (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))))
2810 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-24-u24 Src32AnPrefixed))) newval))
2811 ; )
2812 )
2813 )
2815 ; (src-relative-indirect-operand QI)
2816 ; (src-relative-indirect-operand HI)
2817 ; (src-relative-indirect-operand SI)
2819 ;-------------------------------------------------------------
2820 ; Absolute Indirect address
2821 ;-------------------------------------------------------------
2823 (define-pmacro (src32-absolute-indirect offset base1 base2 xmode)
2824 (begin
2825 ; (define-derived-operand
2826 ; (name (.sym src32- offset -16-absolute-indirect-derived- xmode))
2827 ; (comment (.str "m32c absolute indirect address " xmode))
2828 ; (attrs (machine 32))
2829 ; (mode xmode)
2830 ; (args ((.sym Dsp- offset -u16)))
2831 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
2832 ; (base-ifield (.sym f- base1 -11))
2833 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
2834 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
2835 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
2836 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
2837 ; )
2838 ; (define-derived-operand
2839 ; (name (.sym src32- offset -24-absolute-indirect-derived- xmode))
2840 ; (comment (.str "m32c absolute indirect address " xmode))
2841 ; (attrs (machine 32))
2842 ; (mode xmode)
2843 ; (args ((.sym Dsp- offset -u24)))
2844 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
2845 ; (base-ifield (.sym f- base1 -11))
2846 ; (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
2847 ; (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
2848 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
2849 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
2850 ; )
2851 )
2852 )
2854 (src32-absolute-indirect 24 9 18 QI)
2855 (src32-absolute-indirect 24 9 18 HI)
2856 (src32-absolute-indirect 24 9 18 SI)
2858 ;-------------------------------------------------------------
2859 ; Register relative source operands for short format insns
2860 ;-------------------------------------------------------------
2862 (define-pmacro (src-2-S-operands mach xmode base opc1 opc2 opc3)
2863 (begin
2864 (define-derived-operand
2865 (name (.sym src mach -2-S-8-SB-relative- xmode))
2866 (comment (.str "m" mach "c SB relative address"))
2867 (attrs (machine mach))
2868 (mode xmode)
2869 (args (Dsp-8-u8))
2870 (syntax "${Dsp-8-u8}[sb]")
2871 (base-ifield (.sym f- base -2))
2872 (encoding (+ ((.sym f- base -2) opc1) Dsp-8-u8))
2873 (ifield-assertion (eq (.sym f- base -2) opc1))
2874 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
2875 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
2876 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))))
2877 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-sb) Dsp-8-u8))) newval))
2878 )
2879 (define-derived-operand
2880 (name (.sym src mach -2-S-8-FB-relative- xmode))
2881 (comment (.str "m" mach "c FB relative address"))
2882 (attrs (machine mach))
2883 (mode xmode)
2884 (args (Dsp-8-s8))
2885 (syntax "${Dsp-8-s8}[fb]")
2886 (base-ifield (.sym f- base -2))
2887 (encoding (+ ((.sym f- base -2) opc2) Dsp-8-s8))
2888 (ifield-assertion (eq (.sym f- base -2) opc2))
2889 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
2890 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
2891 ; (getter (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))))
2892 ; (setter (set (mem-mach mach xmode (indirect-addr (add (reg h-fb) Dsp-8-s8))) newval))
2893 )
2894 (define-derived-operand
2895 (name (.sym src mach -2-S-16-absolute- xmode))
2896 (comment (.str "m" mach "c absolute address"))
2897 (attrs (machine mach))
2898 (mode xmode)
2899 (args (Dsp-8-u16))
2900 (syntax "${Dsp-8-u16}")
2901 (base-ifield (.sym f- base -2))
2902 (encoding (+ ((.sym f- base -2) opc3) Dsp-8-u16))
2903 (ifield-assertion (eq (.sym f- base -2) opc3))
2904 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
2905 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
2906 ; (getter (mem-mach mach xmode Dsp-8-u16))
2907 ; (setter (set (mem-mach mach xmode Dsp-8-u16) newval))
2908 )
2909 )
2910 )
2912 (src-2-S-operands 16 QI 6 1 2 3)
2913 (src-2-S-operands 32 QI 2 2 3 1)
2914 (src-2-S-operands 32 HI 2 2 3 1)
2916 ;=============================================================
2917 ; Derived Operands
2918 ;-------------------------------------------------------------
2919 ; Destination
2920 ;-------------------------------------------------------------
2921 ; Rn direct
2922 ;-------------------------------------------------------------
2924 (define-pmacro (dst16-Rn-direct-operand xmode)
2925 (begin
2926 (define-derived-operand
2927 (name (.sym dst16-Rn-direct- xmode))
2928 (comment (.str "m16c Rn direct destination " xmode))
2929 (attrs (machine 16))
2930 (mode xmode)
2931 (args ((.sym Dst16Rn xmode)))
2932 (syntax (.str "$Dst16Rn" xmode))
2933 (base-ifield f-12-4)
2934 (encoding (+ (f-12-2 0) (.sym Dst16Rn xmode)))
2935 (ifield-assertion (eq f-12-2 0))
2936 (getter (trunc xmode (.sym Dst16Rn xmode)))
2937 (setter (set (.sym Dst16Rn xmode) newval))
2938 )
2939 )
2940 )
2942 (dst16-Rn-direct-operand QI)
2943 (dst16-Rn-direct-operand HI)
2944 (dst16-Rn-direct-operand SI)
2946 (define-derived-operand
2947 (name dst16-Rn-direct-Ext-QI)
2948 (comment "m16c Rn direct destination QI")
2949 (attrs (machine 16))
2950 (mode HI)
2951 (args (Dst16RnExtQI))
2952 (syntax "$Dst16RnExtQI")
2953 (base-ifield f-12-4)
2954 (encoding (+ (f-12-2 0) Dst16RnExtQI (f-15-1 0)))
2955 (ifield-assertion (andif (eq f-12-2 0) (eq f-15-1 0)))
2956 (getter (trunc QI (.sym Dst16RnExtQI)))
2957 (setter (set Dst16RnExtQI newval))
2958 )
2960 (define-pmacro (dst32-Rn-direct-operand group base xmode)
2961 (begin
2962 (define-derived-operand
2963 (name (.sym dst32-Rn-direct- group - xmode))
2964 (comment (.str "m32c Rn direct destination " xmode))
2965 (attrs (machine 32))
2966 (mode xmode)
2967 (args ((.sym Dst32Rn group xmode)))
2968 (syntax (.str "$Dst32Rn" group xmode))
2969 (base-ifield (.sym f- base -6))
2970 (encoding (+ ((.sym f- base -3) 4) (.sym Dst32Rn group xmode)))
2971 (ifield-assertion (eq (.sym f- base -3) 4))
2972 (getter (trunc xmode (.sym Dst32Rn group xmode)))
2973 (setter (set (.sym Dst32Rn group xmode) newval))
2974 )
2975 )
2976 )
2978 (dst32-Rn-direct-operand Unprefixed 4 QI)
2979 (dst32-Rn-direct-operand Prefixed 12 QI)
2980 (dst32-Rn-direct-operand Unprefixed 4 HI)
2981 (dst32-Rn-direct-operand Prefixed 12 HI)
2982 (dst32-Rn-direct-operand Unprefixed 4 SI)
2983 (dst32-Rn-direct-operand Prefixed 12 SI)
2985 (define-pmacro (dst32-Rn-direct-Ext-operand group base1 base2 smode dmode)
2986 (begin
2987 (define-derived-operand
2988 (name (.sym dst32-Rn-direct- group - smode))
2989 (comment (.str "m32c Rn direct destination " smode))
2990 (attrs (machine 32))
2991 (mode dmode)
2992 (args ((.sym Dst32Rn group smode)))
2993 (syntax (.str "$Dst32Rn" group smode))
2994 (base-ifield (.sym f- base1 -6))
2995 (encoding (+ ((.sym f- base1 -3) 4) ((.sym f- base2 -1) 1) (.sym Dst32Rn group smode)))
2996 (ifield-assertion (andif (eq (.sym f- base1 -3) 4) (eq (.sym f- base2 -1) 1)))
2997 (getter (trunc smode (.sym Dst32Rn group smode)))
2998 (setter (set (.sym Dst32Rn group smode) newval))
2999 )
3000 )
3001 )
3003 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 QI HI)
3004 (dst32-Rn-direct-Ext-operand ExtUnprefixed 4 8 HI SI)
3006 (define-derived-operand
3007 (name dst32-R3-direct-Unprefixed-HI)
3008 (comment "m32c R3 direct HI")
3009 (attrs (machine 32))
3010 (mode HI)
3011 (args (R3))
3012 (syntax "$R3")
3013 (base-ifield f-4-6)
3014 (encoding (+ (f-4-3 4) (f-8-2 #x1)))
3015 (ifield-assertion (andif (eq f-4-3 4) (eq f-8-2 #x1)))
3016 (getter (trunc HI R3))
3017 (setter (set R3 newval))
3018 )
3019 ;-------------------------------------------------------------
3020 ; An direct
3021 ;-------------------------------------------------------------
3023 (define-pmacro (dst16-An-direct-operand xmode)
3024 (begin
3025 (define-derived-operand
3026 (name (.sym dst16-An-direct- xmode))
3027 (comment (.str "m16c An direct destination " xmode))
3028 (attrs (machine 16))
3029 (mode xmode)
3030 (args ((.sym Dst16An xmode)))
3031 (syntax (.str "$Dst16An" xmode))
3032 (base-ifield f-12-4)
3033 (encoding (+ (f-12-2 1) (f-14-1 0) (.sym Dst16An xmode)))
3034 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3035 (getter (trunc xmode (.sym Dst16An xmode)))
3036 (setter (set (.sym Dst16An xmode) newval))
3037 )
3038 )
3039 )
3041 (dst16-An-direct-operand QI)
3042 (dst16-An-direct-operand HI)
3043 (dst16-An-direct-operand SI)
3045 (define-pmacro (dst32-An-direct-operand group base1 base2 xmode)
3046 (begin
3047 (define-derived-operand
3048 (name (.sym dst32-An-direct- group - xmode))
3049 (comment (.str "m32c An direct destination " xmode))
3050 (attrs (machine 32))
3051 (mode xmode)
3052 (args ((.sym Dst32An group xmode)))
3053 (syntax (.str "$Dst32An" group xmode))
3054 (base-ifield (.sym f- base1 -6))
3055 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Dst32An group xmode)))
3056 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3057 (getter (trunc xmode (.sym Dst32An group xmode)))
3058 (setter (set (.sym Dst32An group xmode) newval))
3059 )
3060 )
3061 )
3063 (dst32-An-direct-operand Unprefixed 4 8 QI)
3064 (dst32-An-direct-operand Prefixed 12 16 QI)
3065 (dst32-An-direct-operand Unprefixed 4 8 HI)
3066 (dst32-An-direct-operand Prefixed 12 16 HI)
3067 (dst32-An-direct-operand Unprefixed 4 8 SI)
3068 (dst32-An-direct-operand Prefixed 12 16 SI)
3070 ;-------------------------------------------------------------
3071 ; An indirect
3072 ;-------------------------------------------------------------
3074 (define-pmacro (dst16-An-indirect-operand xmode)
3075 (begin
3076 (define-derived-operand
3077 (name (.sym dst16-An-indirect- xmode))
3078 (comment (.str "m16c An indirect destination " xmode))
3079 (attrs (machine 16))
3080 (mode xmode)
3081 (args (Dst16An))
3082 (syntax "[$Dst16An]")
3083 (base-ifield f-12-4)
3084 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3085 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3086 (getter (mem16 xmode Dst16An))
3087 (setter (set (mem16 xmode Dst16An) newval))
3088 )
3089 )
3090 )
3092 (dst16-An-indirect-operand QI)
3093 (dst16-An-indirect-operand HI)
3094 (dst16-An-indirect-operand SI)
3096 (define-derived-operand
3097 (name dst16-An-indirect-Ext-QI)
3098 (comment "m16c An indirect destination QI")
3099 (attrs (machine 16))
3100 (mode HI)
3101 (args (Dst16An))
3102 (syntax "[$Dst16An]")
3103 (base-ifield f-12-4)
3104 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
3105 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3106 (getter (mem16 QI Dst16An))
3107 (setter (set (mem16 HI Dst16An) newval))
3108 )
3110 (define-pmacro (dst32-An-indirect-operand group base1 base2 smode dmode)
3111 (begin
3112 (define-derived-operand
3113 (name (.sym dst32-An-indirect- group - smode))
3114 (comment (.str "m32c An indirect destination " smode))
3115 (attrs (machine 32))
3116 (mode dmode)
3117 (args ((.sym Dst32An group)))
3118 (syntax (.str "[$Dst32An" group "]"))
3119 (base-ifield (.sym f- base1 -6))
3120 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Dst32An group)))
3121 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3122 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group)
3123 (const 0)))
3124 (setter (c-call DFLT (.str "operand_setter_" dmode) newval
3125 (.sym Dst32An group) (const 0)))
3126 ; (getter (mem32 smode (.sym Dst32An group)))
3127 ; (setter (set (mem32 dmode (.sym Dst32An group)) newval))
3128 )
3129 )
3130 )
3132 (dst32-An-indirect-operand Unprefixed 4 8 QI QI)
3133 (dst32-An-indirect-operand Prefixed 12 16 QI QI)
3134 (dst32-An-indirect-operand Unprefixed 4 8 HI HI)
3135 (dst32-An-indirect-operand Prefixed 12 16 HI HI)
3136 (dst32-An-indirect-operand Unprefixed 4 8 SI SI)
3137 (dst32-An-indirect-operand Prefixed 12 16 SI SI)
3138 (dst32-An-indirect-operand ExtUnprefixed 4 8 QI HI)
3139 (dst32-An-indirect-operand ExtUnprefixed 4 8 HI SI)
3141 ;-------------------------------------------------------------
3142 ; dsp:d[r] relative
3143 ;-------------------------------------------------------------
3145 (define-pmacro (dst16-relative-operand offset xmode)
3146 (begin
3147 (define-derived-operand
3148 (name (.sym dst16- offset -8-SB-relative- xmode))
3149 (comment (.str "m16c dsp:8[sb] relative destination " xmode))
3150 (attrs (machine 16))
3151 (mode xmode)
3152 (args ((.sym Dsp- offset -u8)))
3153 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3154 (base-ifield f-12-4)
3155 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3156 (ifield-assertion (eq f-12-4 #xA))
3157 (getter (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))))
3158 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3159 )
3160 (define-derived-operand
3161 (name (.sym dst16- offset -16-SB-relative- xmode))
3162 (comment (.str "m16c dsp:16[sb] relative destination " xmode))
3163 (attrs (machine 16))
3164 (mode xmode)
3165 (args ((.sym Dsp- offset -u16)))
3166 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3167 (base-ifield f-12-4)
3168 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3169 (ifield-assertion (eq f-12-4 #xE))
3170 (getter (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))))
3171 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3172 )
3173 (define-derived-operand
3174 (name (.sym dst16- offset -8-FB-relative- xmode))
3175 (comment (.str "m16c dsp:8[fb] relative destination " xmode))
3176 (attrs (machine 16))
3177 (mode xmode)
3178 (args ((.sym Dsp- offset -s8)))
3179 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3180 (base-ifield f-12-4)
3181 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3182 (ifield-assertion (eq f-12-4 #xB))
3183 (getter (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))))
3184 (setter (set (mem16 xmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3185 )
3186 (define-derived-operand
3187 (name (.sym dst16- offset -8-An-relative- xmode))
3188 (comment (.str "m16c dsp:8[An] relative destination " xmode))
3189 (attrs (machine 16))
3190 (mode xmode)
3191 (args (Dst16An (.sym Dsp- offset -u8)))
3192 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3193 (base-ifield f-12-4)
3194 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3195 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3196 (getter (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)))
3197 (setter (set (mem16 xmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3198 )
3199 (define-derived-operand
3200 (name (.sym dst16- offset -16-An-relative- xmode))
3201 (comment (.str "m16c dsp:16[An] relative destination " xmode))
3202 (attrs (machine 16))
3203 (mode xmode)
3204 (args (Dst16An (.sym Dsp- offset -u16)))
3205 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3206 (base-ifield f-12-4)
3207 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3208 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3209 (getter (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)))
3210 (setter (set (mem16 xmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3211 )
3212 (define-derived-operand
3213 (name (.sym dst16- offset -20-An-relative- xmode))
3214 (comment (.str "m16c dsp:20[An] relative destination " xmode))
3215 (attrs (machine 16))
3216 (mode xmode)
3217 (args (Dst16An (.sym Dsp- offset -u20)))
3218 (syntax (.str "${Dsp-" offset "-u20}[$Dst16An]"))
3219 (base-ifield f-12-4)
3220 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u20) Dst16An))
3221 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3222 (getter (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An)))
3223 (setter (set (mem16 xmode (add (.sym Dsp- offset -u20) Dst16An)) newval))
3224 )
3225 )
3226 )
3228 (dst16-relative-operand 16 QI)
3229 (dst16-relative-operand 24 QI)
3230 (dst16-relative-operand 32 QI)
3231 (dst16-relative-operand 40 QI)
3232 (dst16-relative-operand 48 QI)
3233 (dst16-relative-operand 16 HI)
3234 (dst16-relative-operand 24 HI)
3235 (dst16-relative-operand 32 HI)
3236 (dst16-relative-operand 40 HI)
3237 (dst16-relative-operand 48 HI)
3238 (dst16-relative-operand 16 SI)
3239 (dst16-relative-operand 24 SI)
3240 (dst16-relative-operand 32 SI)
3241 (dst16-relative-operand 40 SI)
3242 (dst16-relative-operand 48 SI)
3244 (define-pmacro (dst16-relative-Ext-operand offset smode dmode)
3245 (begin
3246 (define-derived-operand
3247 (name (.sym dst16- offset -8-SB-relative-Ext- smode))
3248 (comment (.str "m16c dsp:8[sb] relative destination " smode))
3249 (attrs (machine 16))
3250 (mode dmode)
3251 (args ((.sym Dsp- offset -u8)))
3252 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3253 (base-ifield f-12-4)
3254 (encoding (+ (f-12-4 #xA) (.sym Dsp- offset -u8)))
3255 (ifield-assertion (eq f-12-4 #xA))
3256 (getter (mem16 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3257 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3258 )
3259 (define-derived-operand
3260 (name (.sym dst16- offset -16-SB-relative-Ext- smode))
3261 (comment (.str "m16c dsp:16[sb] relative destination " smode))
3262 (attrs (machine 16))
3263 (mode dmode)
3264 (args ((.sym Dsp- offset -u16)))
3265 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3266 (base-ifield f-12-4)
3267 (encoding (+ (f-12-4 #xE) (.sym Dsp- offset -u16)))
3268 (ifield-assertion (eq f-12-4 #xE))
3269 (getter (mem16 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3270 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3271 )
3272 (define-derived-operand
3273 (name (.sym dst16- offset -8-FB-relative-Ext- smode))
3274 (comment (.str "m16c dsp:8[fb] relative destination " smode))
3275 (attrs (machine 16))
3276 (mode dmode)
3277 (args ((.sym Dsp- offset -s8)))
3278 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3279 (base-ifield f-12-4)
3280 (encoding (+ (f-12-4 #xB) (.sym Dsp- offset -s8)))
3281 (ifield-assertion (eq f-12-4 #xB))
3282 (getter (mem16 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3283 (setter (set (mem16 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3284 )
3285 (define-derived-operand
3286 (name (.sym dst16- offset -8-An-relative-Ext- smode))
3287 (comment (.str "m16c dsp:8[An] relative destination " smode))
3288 (attrs (machine 16))
3289 (mode dmode)
3290 (args (Dst16An (.sym Dsp- offset -u8)))
3291 (syntax (.str "${Dsp-" offset "-u8}[$Dst16An]"))
3292 (base-ifield f-12-4)
3293 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Dst16An))
3294 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3295 (getter (mem16 smode (add (.sym Dsp- offset -u8) Dst16An)))
3296 (setter (set (mem16 dmode (add (.sym Dsp- offset -u8) Dst16An)) newval))
3297 )
3298 (define-derived-operand
3299 (name (.sym dst16- offset -16-An-relative-Ext- smode))
3300 (comment (.str "m16c dsp:16[An] relative destination " smode))
3301 (attrs (machine 16))
3302 (mode dmode)
3303 (args (Dst16An (.sym Dsp- offset -u16)))
3304 (syntax (.str "${Dsp-" offset "-u16}[$Dst16An]"))
3305 (base-ifield f-12-4)
3306 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Dst16An))
3307 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3308 (getter (mem16 smode (add (.sym Dsp- offset -u16) Dst16An)))
3309 (setter (set (mem16 dmode (add (.sym Dsp- offset -u16) Dst16An)) newval))
3310 )
3311 )
3312 )
3314 (dst16-relative-Ext-operand 16 QI HI)
3316 (define-pmacro (dst32-relative-operand offset group base1 base2 smode dmode)
3317 (begin
3318 (define-derived-operand
3319 (name (.sym dst32- offset -8-SB-relative- group - smode))
3320 (comment (.str "m32c dsp:8[sb] relative destination " smode))
3321 (attrs (machine 32))
3322 (mode dmode)
3323 (args ((.sym Dsp- offset -u8)))
3324 (syntax (.str "${Dsp-" offset "-u8}[sb]"))
3325 (base-ifield (.sym f- base1 -6))
3326 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u8)))
3327 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3328 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u8)))
3329 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u8)))
3330 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (reg h-sb))))
3331 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (reg h-sb))) newval))
3332 )
3333 (define-derived-operand
3334 (name (.sym dst32- offset -16-SB-relative- group - smode))
3335 (comment (.str "m32c dsp:16[sb] relative destination " smode))
3336 (attrs (machine 32))
3337 (mode dmode)
3338 (args ((.sym Dsp- offset -u16)))
3339 (syntax (.str "${Dsp-" offset "-u16}[sb]"))
3340 (base-ifield (.sym f- base1 -6))
3341 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u16)))
3342 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
3343 (getter (c-call dmode (.str "operand_getter_" dmode) sb (.sym Dsp- offset -u16)))
3344 (setter (c-call DFLT (.str "operand_setter_" dmode) newval sb (.sym Dsp- offset -u16)))
3345 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (reg h-sb))))
3346 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (reg h-sb))) newval))
3347 )
3348 (define-derived-operand
3349 (name (.sym dst32- offset -8-FB-relative- group - smode))
3350 (comment (.str "m32c dsp:8[fb] relative destination " smode))
3351 (attrs (machine 32))
3352 (mode dmode)
3353 (args ((.sym Dsp- offset -s8)))
3354 (syntax (.str "${Dsp-" offset "-s8}[fb]"))
3355 (base-ifield (.sym f- base1 -6))
3356 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s8)))
3357 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
3358 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s8)))
3359 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s8)))
3360 ; (getter (mem32 smode (add (.sym Dsp- offset -s8) (reg h-fb))))
3361 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s8) (reg h-fb))) newval))
3362 )
3363 (define-derived-operand
3364 (name (.sym dst32- offset -16-FB-relative- group - smode))
3365 (comment (.str "m32c dsp:16[fb] relative destination " smode))
3366 (attrs (machine 32))
3367 (mode dmode)
3368 (args ((.sym Dsp- offset -s16)))
3369 (syntax (.str "${Dsp-" offset "-s16}[fb]"))
3370 (base-ifield (.sym f- base1 -6))
3371 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym Dsp- offset -s16)))
3372 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
3373 (getter (c-call dmode (.str "operand_getter_" dmode) fb (.sym Dsp- offset -s16)))
3374 (setter (c-call DFLT (.str "operand_setter_" dmode) newval fb (.sym Dsp- offset -s16)))
3375 ; (getter (mem32 smode (add (.sym Dsp- offset -s16) (reg h-fb))))
3376 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -s16) (reg h-fb))) newval))
3377 )
3378 (define-derived-operand
3379 (name (.sym dst32- offset -8-An-relative- group - smode))
3380 (comment (.str "m32c dsp:8[An] relative destination " smode))
3381 (attrs (machine 32))
3382 (mode dmode)
3383 (args ((.sym Dst32An group) (.sym Dsp- offset -u8)))
3384 (syntax (.str "${Dsp-" offset "-u8}[$Dst32An" group "]"))
3385 (base-ifield (.sym f- base1 -6))
3386 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u8) (.sym Dst32An group)))
3387 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
3388 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u8)))
3389 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u8)))
3390 ; (getter (mem32 smode (add (.sym Dsp- offset -u8) (.sym Dst32An group))))
3391 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u8) (.sym Dst32An group))) newval))
3392 )
3393 (define-derived-operand
3394 (name (.sym dst32- offset -16-An-relative- group - smode))
3395 (comment (.str "m32c dsp:16[An] relative destination " smode))
3396 (attrs (machine 32))
3397 (mode dmode)
3398 (args ((.sym Dst32An group) (.sym Dsp- offset -u16)))
3399 (syntax (.str "${Dsp-" offset "-u16}[$Dst32An" group "]"))
3400 (base-ifield (.sym f- base1 -6))
3401 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u16) (.sym Dst32An group)))
3402 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
3403 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u16)))
3404 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u16)))
3405 ; (getter (mem32 smode (add (.sym Dsp- offset -u16) (.sym Dst32An group))))
3406 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u16) (.sym Dst32An group))) newval))
3407 )
3408 (define-derived-operand
3409 (name (.sym dst32- offset -24-An-relative- group - smode))
3410 (comment (.str "m32c dsp:16[An] relative destination " smode))
3411 (attrs (machine 32))
3412 (mode dmode)
3413 (args ((.sym Dst32An group) (.sym Dsp- offset -u24)))
3414 (syntax (.str "${Dsp-" offset "-u24}[$Dst32An" group "]"))
3415 (base-ifield (.sym f- base1 -6))
3416 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym Dsp- offset -u24) (.sym Dst32An group)))
3417 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
3418 (getter (c-call dmode (.str "operand_getter_" dmode) (.sym Dst32An group) (.sym Dsp- offset -u24)))
3419 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (.sym Dst32An group) (.sym Dsp- offset -u24)))
3420 ; (getter (mem32 smode (add (.sym Dsp- offset -u24) (.sym Dst32An group))))
3421 ; (setter (set (mem32 dmode (add (.sym Dsp- offset -u24) (.sym Dst32An group))) newval))
3422 )
3423 )
3424 )
3426 (dst32-relative-operand 16 Unprefixed 4 8 QI QI)
3427 (dst32-relative-operand 24 Unprefixed 4 8 QI QI)
3428 (dst32-relative-operand 32 Unprefixed 4 8 QI QI)
3429 (dst32-relative-operand 40 Unprefixed 4 8 QI QI)
3430 (dst32-relative-operand 16 Unprefixed 4 8 HI HI)
3431 (dst32-relative-operand 24 Unprefixed 4 8 HI HI)
3432 (dst32-relative-operand 32 Unprefixed 4 8 HI HI)
3433 (dst32-relative-operand 40 Unprefixed 4 8 HI HI)
3434 (dst32-relative-operand 16 Unprefixed 4 8 SI SI)
3435 (dst32-relative-operand 24 Unprefixed 4 8 SI SI)
3436 (dst32-relative-operand 32 Unprefixed 4 8 SI SI)
3437 (dst32-relative-operand 40 Unprefixed 4 8 SI SI)
3439 (dst32-relative-operand 24 Prefixed 12 16 QI QI)
3440 (dst32-relative-operand 32 Prefixed 12 16 QI QI)
3441 (dst32-relative-operand 40 Prefixed 12 16 QI QI)
3442 (dst32-relative-operand 48 Prefixed 12 16 QI QI)
3443 (dst32-relative-operand 24 Prefixed 12 16 HI HI)
3444 (dst32-relative-operand 32 Prefixed 12 16 HI HI)
3445 (dst32-relative-operand 40 Prefixed 12 16 HI HI)
3446 (dst32-relative-operand 48 Prefixed 12 16 HI HI)
3447 (dst32-relative-operand 24 Prefixed 12 16 SI SI)
3448 (dst32-relative-operand 32 Prefixed 12 16 SI SI)
3449 (dst32-relative-operand 40 Prefixed 12 16 SI SI)
3450 (dst32-relative-operand 48 Prefixed 12 16 SI SI)
3452 (dst32-relative-operand 16 ExtUnprefixed 4 8 QI HI)
3453 (dst32-relative-operand 16 ExtUnprefixed 4 8 HI SI)
3455 ;-------------------------------------------------------------
3456 ; Absolute address
3457 ;-------------------------------------------------------------
3459 (define-pmacro (dst16-absolute offset xmode)
3460 (begin
3461 (define-derived-operand
3462 (name (.sym dst16- offset -16-absolute- xmode))
3463 (comment (.str "m16c absolute address " xmode))
3464 (attrs (machine 16))
3465 (mode xmode)
3466 (args ((.sym Dsp- offset -u16)))
3467 (syntax (.str "${Dsp-" offset "-u16}"))
3468 (base-ifield f-12-4)
3469 (encoding (+ (f-12-4 #xF) (.sym Dsp- offset -u16)))
3470 (ifield-assertion (eq f-12-4 #xF))
3471 (getter (mem16 xmode (.sym Dsp- offset -u16)))
3472 (setter (set (mem16 xmode (.sym Dsp- offset -u16)) newval))
3473 )
3474 )
3475 )
3477 (dst16-absolute 16 QI)
3478 (dst16-absolute 24 QI)
3479 (dst16-absolute 32 QI)
3480 (dst16-absolute 40 QI)
3481 (dst16-absolute 48 QI)
3482 (dst16-absolute 16 HI)
3483 (dst16-absolute 24 HI)
3484 (dst16-absolute 32 HI)
3485 (dst16-absolute 40 HI)
3486 (dst16-absolute 48 HI)
3487 (dst16-absolute 16 SI)
3488 (dst16-absolute 24 SI)
3489 (dst16-absolute 32 SI)
3490 (dst16-absolute 40 SI)
3491 (dst16-absolute 48 SI)
3493 (define-derived-operand
3494 (name dst16-16-16-absolute-Ext-QI)
3495 (comment "m16c absolute address QI")
3496 (attrs (machine 16))
3497 (mode HI)
3498 (args (Dsp-16-u16))
3499 (syntax "${Dsp-16-u16}")
3500 (base-ifield f-12-4)
3501 (encoding (+ (f-12-4 #xF) Dsp-16-u16))
3502 (ifield-assertion (eq f-12-4 #xF))
3503 (getter (mem16 QI Dsp-16-u16))
3504 (setter (set (mem16 HI Dsp-16-u16) newval))
3505 )
3507 (define-pmacro (dst32-absolute offset group base1 base2 smode dmode)
3508 (begin
3509 (define-derived-operand
3510 (name (.sym dst32- offset -16-absolute- group - smode))
3511 (comment (.str "m32c absolute address " smode))
3512 (attrs (machine 32))
3513 (mode dmode)
3514 (args ((.sym Dsp- offset -u16)))
3515 (syntax (.str "${Dsp-" offset "-u16}"))
3516 (base-ifield (.sym f- base1 -6))
3517 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym Dsp- offset -u16)))
3518 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
3519 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u16)))
3520 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u16)))
3521 ; (getter (mem32 smode (.sym Dsp- offset -u16)))
3522 ; (setter (set (mem32 dmode (.sym Dsp- offset -u16)) newval))
3523 )
3524 (define-derived-operand
3525 (name (.sym dst32- offset -24-absolute- group - smode))
3526 (comment (.str "m32c absolute address " smode))
3527 (attrs (machine 32))
3528 (mode dmode)
3529 (args ((.sym Dsp- offset -u24)))
3530 (syntax (.str "${Dsp-" offset "-u24}"))
3531 (base-ifield (.sym f- base1 -6))
3532 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym Dsp- offset -u24)))
3533 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
3534 (getter (c-call smode (.str "operand_getter_" smode) (const 0) (.sym Dsp- offset -u24)))
3535 (setter (c-call DFLT (.str "operand_setter_" dmode) newval (const 0) (.sym Dsp- offset -u24)))
3536 ; (getter (mem32 smode (.sym Dsp- offset -u24)))
3537 ; (setter (set (mem32 dmode (.sym Dsp- offset -u24)) newval))
3538 )
3539 )
3540 )
3542 (dst32-absolute 16 Unprefixed 4 8 QI QI)
3543 (dst32-absolute 24 Unprefixed 4 8 QI QI)
3544 (dst32-absolute 32 Unprefixed 4 8 QI QI)
3545 (dst32-absolute 40 Unprefixed 4 8 QI QI)
3546 (dst32-absolute 16 Unprefixed 4 8 HI HI)
3547 (dst32-absolute 24 Unprefixed 4 8 HI HI)
3548 (dst32-absolute 32 Unprefixed 4 8 HI HI)
3549 (dst32-absolute 40 Unprefixed 4 8 HI HI)
3550 (dst32-absolute 16 Unprefixed 4 8 SI SI)
3551 (dst32-absolute 24 Unprefixed 4 8 SI SI)
3552 (dst32-absolute 32 Unprefixed 4 8 SI SI)
3553 (dst32-absolute 40 Unprefixed 4 8 SI SI)
3555 (dst32-absolute 24 Prefixed 12 16 QI QI)
3556 (dst32-absolute 32 Prefixed 12 16 QI QI)
3557 (dst32-absolute 40 Prefixed 12 16 QI QI)
3558 (dst32-absolute 48 Prefixed 12 16 QI QI)
3559 (dst32-absolute 24 Prefixed 12 16 HI HI)
3560 (dst32-absolute 32 Prefixed 12 16 HI HI)
3561 (dst32-absolute 40 Prefixed 12 16 HI HI)
3562 (dst32-absolute 48 Prefixed 12 16 HI HI)
3563 (dst32-absolute 24 Prefixed 12 16 SI SI)
3564 (dst32-absolute 32 Prefixed 12 16 SI SI)
3565 (dst32-absolute 40 Prefixed 12 16 SI SI)
3566 (dst32-absolute 48 Prefixed 12 16 SI SI)
3568 (dst32-absolute 16 ExtUnprefixed 4 8 QI HI)
3569 (dst32-absolute 16 ExtUnprefixed 4 8 HI SI)
3571 ;-------------------------------------------------------------
3572 ; An indirect indirect
3573 ;-------------------------------------------------------------
3575 ;(define-pmacro (dst-An-indirect-indirect-operand xmode)
3576 ; (define-derived-operand
3577 ; (name (.sym dst32-An-indirect-indirect- xmode))
3578 ; (comment (.str "m32c An indirect indirect destination " xmode))
3579 ; (attrs (machine 32))
3580 ; (mode xmode)
3581 ; (args (Dst32AnPrefixed))
3582 ; (syntax (.str "[[$Dst32AnPrefixed]]"))
3583 ; (base-ifield f-12-6)
3584 ; (encoding (+ (f-12-3 0) (f-16-1 0) Dst32AnPrefixed))
3585 ; (ifield-assertion (andif (eq f-12-3 0) (eq f-16-1 0)))
3586 ; (getter (mem32 xmode (indirect-addr Dst32AnPrefixed)))
3587 ; (setter (set (mem32 xmode (indirect-addr Dst32AnPrefixed)) newval))
3588 ; )
3589 ;)
3591 ; (dst-An-indirect-indirect-operand QI)
3592 ; (dst-An-indirect-indirect-operand HI)
3593 ; (dst-An-indirect-indirect-operand SI)
3595 ;-------------------------------------------------------------
3596 ; Relative indirect
3597 ;-------------------------------------------------------------
3599 (define-pmacro (dst-relative-indirect-operand offset xmode)
3600 (begin
3601 ; (define-derived-operand
3602 ; (name (.sym dst32- offset -8-SB-relative-indirect- xmode))
3603 ; (comment (.str "m32c dsp:8[sb] relative destination " xmode))
3604 ; (attrs (machine 32))
3605 ; (mode xmode)
3606 ; (args ((.sym Dsp- offset -u8)))
3607 ; (syntax (.str "[${Dsp-" offset "-u8}[sb]]"))
3608 ; (base-ifield f-12-6)
3609 ; (encoding (+ (f-12-3 1) (f-16-2 2) (.sym Dsp- offset -u8)))
3610 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 2)))
3611 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))))
3612 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) (reg h-sb)))) newval))
3613 ; )
3614 ; (define-derived-operand
3615 ; (name (.sym dst32- offset -16-SB-relative-indirect- xmode))
3616 ; (comment (.str "m32c dsp:16[sb] relative destination " xmode))
3617 ; (attrs (machine 32))
3618 ; (mode xmode)
3619 ; (args ((.sym Dsp- offset -u16)))
3620 ; (syntax (.str "[${Dsp-" offset "-u16}[sb]]"))
3621 ; (base-ifield f-12-6)
3622 ; (encoding (+ (f-12-3 2) (f-16-2 2) (.sym Dsp- offset -u16)))
3623 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 2)))
3624 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))))
3625 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) (reg h-sb)))) newval))
3626 ; )
3627 ; (define-derived-operand
3628 ; (name (.sym dst32- offset -8-FB-relative-indirect- xmode))
3629 ; (comment (.str "m32c dsp:8[fb] relative destination " xmode))
3630 ; (attrs (machine 32))
3631 ; (mode xmode)
3632 ; (args ((.sym Dsp- offset -s8)))
3633 ; (syntax (.str "[${Dsp-" offset "-s8}[fb]]"))
3634 ; (base-ifield f-12-6)
3635 ; (encoding (+ (f-12-3 1) (f-16-2 3) (.sym Dsp- offset -s8)))
3636 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-2 3)))
3637 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))))
3638 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s8) (reg h-fb)))) newval))
3639 ; )
3640 ; (define-derived-operand
3641 ; (name (.sym dst32- offset -16-FB-relative-indirect- xmode))
3642 ; (comment (.str "m32c dsp:16[fb] relative destination " xmode))
3643 ; (attrs (machine 32))
3644 ; (mode xmode)
3645 ; (args ((.sym Dsp- offset -s16)))
3646 ; (syntax (.str "[${Dsp-" offset "-s16}[fb]]"))
3647 ; (base-ifield f-12-6)
3648 ; (encoding (+ (f-12-3 2) (f-16-2 3) (.sym Dsp- offset -s16)))
3649 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-2 3)))
3650 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))))
3651 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -s16) (reg h-fb)))) newval))
3652 ; )
3653 ; (define-derived-operand
3654 ; (name (.sym dst32- offset -8-An-relative-indirect- xmode))
3655 ; (comment (.str "m32c dsp:8[An] relative indirect destination " xmode))
3656 ; (attrs (machine 32))
3657 ; (mode xmode)
3658 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u8)))
3659 ; (syntax (.str "[${Dsp-" offset "-u8}[$Dst32AnPrefixed]]"))
3660 ; (base-ifield f-12-6)
3661 ; (encoding (+ (f-12-3 1) (f-16-1 0) (.sym Dsp- offset -u8) Dst32AnPrefixed))
3662 ; (ifield-assertion (andif (eq f-12-3 1) (eq f-16-1 0)))
3663 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))))
3664 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u8) Dst32AnPrefixed))) newval))
3665 ; )
3666 ; (define-derived-operand
3667 ; (name (.sym dst32- offset -16-An-relative-indirect- xmode))
3668 ; (comment (.str "m32c dsp:16[An] relative destination " xmode))
3669 ; (attrs (machine 32))
3670 ; (mode xmode)
3671 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u16)))
3672 ; (syntax (.str "[${Dsp-" offset "-u16}[$Dst32AnPrefixed]]"))
3673 ; (base-ifield f-12-6)
3674 ; (encoding (+ (f-12-3 2) (f-16-1 0) (.sym Dsp- offset -u16) Dst32AnPrefixed))
3675 ; (ifield-assertion (andif (eq f-12-3 2) (eq f-16-1 0)))
3676 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))))
3677 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u16) Dst32AnPrefixed))) newval))
3678 ; )
3679 ; (define-derived-operand
3680 ; (name (.sym dst32- offset -24-An-relative-indirect- xmode))
3681 ; (comment (.str "m32c dsp:24[An] relative destination " xmode))
3682 ; (attrs (machine 32))
3683 ; (mode xmode)
3684 ; (args (Dst32AnPrefixed (.sym Dsp- offset -u24)))
3685 ; (syntax (.str "[${Dsp-" offset "-u24}[$Dst32AnPrefixed]]"))
3686 ; (base-ifield f-12-6)
3687 ; (encoding (+ (f-12-3 3) (f-16-1 0) (.sym Dsp- offset -u24) Dst32AnPrefixed))
3688 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-1 0)))
3689 ; (getter (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))))
3690 ; (setter (set (mem32 xmode (indirect-addr (add (.sym Dsp- offset -u24) Dst32AnPrefixed))) newval))
3691 ; )
3692 )
3693 )
3695 ; (dst-relative-indirect-operand 24 QI)
3696 ; (dst-relative-indirect-operand 32 QI)
3697 ; (dst-relative-indirect-operand 40 QI)
3698 ; (dst-relative-indirect-operand 48 QI)
3699 ; (dst-relative-indirect-operand 24 HI)
3700 ; (dst-relative-indirect-operand 32 HI)
3701 ; (dst-relative-indirect-operand 40 HI)
3702 ; (dst-relative-indirect-operand 48 HI)
3703 ; (dst-relative-indirect-operand 24 SI)
3704 ; (dst-relative-indirect-operand 32 SI)
3705 ; (dst-relative-indirect-operand 40 SI)
3706 ; (dst-relative-indirect-operand 48 SI)
3708 ;-------------------------------------------------------------
3709 ; Absolute indirect
3710 ;-------------------------------------------------------------
3712 (define-pmacro (dst-absolute-indirect offset xmode)
3713 (begin
3714 ; (define-derived-operand
3715 ; (name (.sym dst32- offset -16-absolute-indirect-derived- xmode))
3716 ; (comment (.str "m32c absolute indirect address " xmode))
3717 ; (attrs (machine 32))
3718 ; (mode xmode)
3719 ; (args ((.sym Dsp- offset -u16)))
3720 ; (syntax (.str "[${Dsp-" offset "-u16}]"))
3721 ; (base-ifield f-12-6)
3722 ; (encoding (+ (f-12-3 3) (f-16-2 3) (.sym Dsp- offset -u16)))
3723 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 3)))
3724 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))))
3725 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u16))) newval))
3726 ; )
3727 ; (define-derived-operand
3728 ; (name (.sym dst32- offset -24-absolute-indirect-derived- xmode))
3729 ; (comment (.str "m32c absolute indirect address " xmode))
3730 ; (attrs (machine 32))
3731 ; (mode xmode)
3732 ; (args ((.sym Dsp- offset -u24)))
3733 ; (syntax (.str "[${Dsp-" offset "-u24}]"))
3734 ; (base-ifield f-12-6)
3735 ; (encoding (+ (f-12-3 3) (f-16-2 2) (.sym Dsp- offset -u24)))
3736 ; (ifield-assertion (andif (eq f-12-3 3) (eq f-16-2 2)))
3737 ; (getter (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))))
3738 ; (setter (set (mem32 xmode (indirect-addr (.sym Dsp- offset -u24))) newval))
3739 ; )
3740 )
3741 )
3743 (dst-absolute-indirect 24 QI)
3744 (dst-absolute-indirect 32 QI)
3745 (dst-absolute-indirect 40 QI)
3746 (dst-absolute-indirect 48 QI)
3747 (dst-absolute-indirect 24 HI)
3748 (dst-absolute-indirect 32 HI)
3749 (dst-absolute-indirect 40 HI)
3750 (dst-absolute-indirect 48 HI)
3751 (dst-absolute-indirect 24 SI)
3752 (dst-absolute-indirect 32 SI)
3753 (dst-absolute-indirect 40 SI)
3754 (dst-absolute-indirect 48 SI)
3756 ;-------------------------------------------------------------
3757 ; Bit operands
3758 ;-------------------------------------------------------------
3759 (define-pmacro (get-register-bit reg bitno)
3760 (and (srl reg bitno) 1)
3761 )
3763 (define-pmacro (set-register-bit reg bitno value)
3764 (set reg (or (and reg (inv (sll 1 bitno)))
3765 (sll (and QI value 1) bitno)))
3766 )
3768 (define-pmacro (get-memory-bit mach base bitno)
3769 (and (srl (mem-mach mach QI (add base (div bitno 8)))
3770 (mod bitno 8))
3771 1)
3772 )
3774 (define-pmacro (set-memory-bit mach base bitno value)
3775 (sequence ((USI addr))
3776 (set addr (add base (div bitno 8)))
3777 (set (mem-mach mach QI addr)
3778 (or (and (mem-mach mach QI addr)
3779 (inv (sll 1 (mod bitno 8))))
3780 (sll (and QI value 1) (mod bitno 8)))))
3781 )
3783 ;-------------------------------------------------------------
3784 ; Rn direct
3785 ;-------------------------------------------------------------
3787 (define-derived-operand
3788 (name bit16-Rn-direct)
3789 (comment "m16c Rn direct bit")
3790 (attrs (machine 16))
3791 (mode BI)
3792 (args (Bitno16R Bit16Rn))
3793 (syntax "$Bitno16R,$Bit16Rn")
3794 (base-ifield f-12-4)
3795 (encoding (+ (f-12-2 0) Bit16Rn Bitno16R))
3796 (ifield-assertion (eq f-12-2 0))
3797 (getter (get-register-bit Bit16Rn Bitno16R))
3798 (setter (set-register-bit Bit16Rn Bitno16R newval))
3799 )
3801 (define-pmacro (bit32-Rn-direct-operand group base)
3802 (begin
3803 (define-derived-operand
3804 (name (.sym bit32-Rn-direct- group))
3805 (comment "m32c Rn direct bit")
3806 (attrs (machine 32))
3807 (mode BI)
3808 (args ((.sym Bitno32 group) (.sym Bit32Rn group)))
3809 (syntax (.str "$Bitno32" group ",$Bit32Rn" group))
3810 (base-ifield (.sym f- base -6))
3811 (encoding (+ ((.sym f- base -3) 4) (.sym Bit32Rn group) (.sym Bitno32 group)))
3812 (ifield-assertion (eq (.sym f- base -3) 4))
3813 (getter (get-register-bit (.sym Bit32Rn group) (.sym Bitno32 group)))
3814 (setter (set-register-bit (.sym Bit32Rn group) (.sym Bitno32 group) newval))
3815 )
3816 )
3817 )
3819 (bit32-Rn-direct-operand Unprefixed 4)
3820 (bit32-Rn-direct-operand Prefixed 12)
3822 ;-------------------------------------------------------------
3823 ; An direct
3824 ;-------------------------------------------------------------
3826 (define-derived-operand
3827 (name bit16-An-direct)
3828 (comment "m16c An direct bit")
3829 (attrs (machine 16))
3830 (mode BI)
3831 (args (Bitno16R Bit16An))
3832 (syntax "$Bitno16R,$Bit16An")
3833 (base-ifield f-12-4)
3834 (encoding (+ (f-12-2 1) (f-14-1 0) Bit16An Bitno16R))
3835 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 0)))
3836 (getter (get-register-bit Bit16An Bitno16R))
3837 (setter (set-register-bit Bit16An Bitno16R newval))
3838 )
3840 (define-pmacro (bit32-An-direct-operand group base1 base2)
3841 (begin
3842 (define-derived-operand
3843 (name (.sym bit32-An-direct- group))
3844 (comment "m32c An direct bit")
3845 (attrs (machine 32))
3846 (mode BI)
3847 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3848 (syntax (.str "$Bitno32" group ",$Bit32An" group))
3849 (base-ifield (.sym f- base1 -6))
3850 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 1) (.sym Bit32An group) (.sym Bitno32 group)))
3851 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 1)))
3852 (getter (get-register-bit (.sym Bit32An group) (.sym Bitno32 group)))
3853 (setter (set-register-bit (.sym Bit32An group) (.sym Bitno32 group) newval))
3854 )
3855 )
3856 )
3858 (bit32-An-direct-operand Unprefixed 4 8)
3859 (bit32-An-direct-operand Prefixed 12 16)
3861 ;-------------------------------------------------------------
3862 ; An indirect
3863 ;-------------------------------------------------------------
3865 (define-derived-operand
3866 (name bit16-An-indirect)
3867 (comment "m16c An indirect bit")
3868 (attrs (machine 16))
3869 (mode BI)
3870 (args (Bit16An))
3871 (syntax "[$Bit16An]")
3872 (base-ifield f-12-4)
3873 (encoding (+ (f-12-2 1) (f-14-1 1) Bit16An))
3874 (ifield-assertion (andif (eq f-12-2 1) (eq f-14-1 1)))
3875 (getter (get-memory-bit 16 0 Bit16An))
3876 (setter (set-memory-bit 16 0 Bit16An newval))
3877 )
3879 (define-pmacro (bit32-An-indirect-operand group base1 base2)
3880 (begin
3881 (define-derived-operand
3882 (name (.sym bit32-An-indirect- group))
3883 (comment "m32c An indirect destination ")
3884 (attrs (machine 32))
3885 (mode BI)
3886 (args ((.sym Bitno32 group) (.sym Bit32An group)))
3887 (syntax (.str "$Bitno32" group ",[$Bit32An" group "]"))
3888 (base-ifield (.sym f- base1 -6))
3889 (encoding (+ ((.sym f- base1 -3) 0) ((.sym f- base2 -1) 0) (.sym Bit32An group) (.sym Bitno32 group)))
3890 (ifield-assertion (andif (eq (.sym f- base1 -3) 0) (eq (.sym f- base2 -1) 0)))
3891 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group)))
3892 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym Bitno32 group) newval))
3893 )
3894 )
3895 )
3897 (bit32-An-indirect-operand Unprefixed 4 8)
3898 (bit32-An-indirect-operand Prefixed 12 16)
3900 ;-------------------------------------------------------------
3901 ; dsp:d[r] relative
3902 ;-------------------------------------------------------------
3904 (define-pmacro (bit16-relative-operand offset)
3905 (begin
3906 (define-derived-operand
3907 (name (.sym bit16- offset -8-SB-relative))
3908 (comment (.str "m16c dsp:8[sb] relative bit " xmode))
3909 (attrs (machine 16))
3910 (mode BI)
3911 (args ((.sym BitBase16- offset -u8)))
3912 (syntax (.str "${BitBase16-" offset "-u8}[sb]"))
3913 (base-ifield f-12-4)
3914 (encoding (+ (f-12-4 #xA) (.sym BitBase16- offset -u8)))
3915 (ifield-assertion (eq f-12-4 #xA))
3916 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8)))
3917 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u8) newval))
3918 )
3919 (define-derived-operand
3920 (name (.sym bit16- offset -16-SB-relative))
3921 (comment (.str "m16c dsp:16[sb] relative bit " xmode))
3922 (attrs (machine 16))
3923 (mode BI)
3924 (args ((.sym BitBase16- offset -u16)))
3925 (syntax (.str "${BitBase16-" offset "-u16}[sb]"))
3926 (base-ifield f-12-4)
3927 (encoding (+ (f-12-4 #xE) (.sym BitBase16- offset -u16)))
3928 (ifield-assertion (eq f-12-4 #xE))
3929 (getter (get-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16)))
3930 (setter (set-memory-bit 16 (reg h-sb) (.sym BitBase16- offset -u16) newval))
3931 )
3932 (define-derived-operand
3933 (name (.sym bit16- offset -8-FB-relative))
3934 (comment (.str "m16c dsp:8[fb] relative bit " xmode))
3935 (attrs (machine 16))
3936 (mode BI)
3937 (args ((.sym BitBase16- offset -s8)))
3938 (syntax (.str "${BitBase16-" offset "-s8}[fb]"))
3939 (base-ifield f-12-4)
3940 (encoding (+ (f-12-4 #xB) (.sym BitBase16- offset -s8)))
3941 (ifield-assertion (eq f-12-4 #xB))
3942 (getter (get-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8)))
3943 (setter (set-memory-bit 16 (reg h-fb) (.sym BitBase16- offset -s8) newval))
3944 )
3945 (define-derived-operand
3946 (name (.sym bit16- offset -8-An-relative))
3947 (comment (.str "m16c dsp:8[An] relative bit " xmode))
3948 (attrs (machine 16))
3949 (mode BI)
3950 (args (Bit16An (.sym Dsp- offset -u8)))
3951 (syntax (.str "${Dsp-" offset "-u8}[$Bit16An]"))
3952 (base-ifield f-12-4)
3953 (encoding (+ (f-12-2 2) (f-14-1 0) (.sym Dsp- offset -u8) Bit16An))
3954 (ifield-assertion (andif (eq f-12-2 2) (eq f-14-1 0)))
3955 (getter (get-memory-bit 16 (.sym Dsp- offset -u8) Bit16An))
3956 (setter (set-memory-bit 16 (.sym Dsp- offset -u8) Bit16An newval))
3957 )
3958 (define-derived-operand
3959 (name (.sym bit16- offset -16-An-relative))
3960 (comment (.str "m16c dsp:16[An] relative bit " xmode))
3961 (attrs (machine 16))
3962 (mode BI)
3963 (args (Bit16An (.sym Dsp- offset -u16)))
3964 (syntax (.str "${Dsp-" offset "-u16}[$Bit16An]"))
3965 (base-ifield f-12-4)
3966 (encoding (+ (f-12-2 3) (f-14-1 0) (.sym Dsp- offset -u16) Bit16An))
3967 (ifield-assertion (andif (eq f-12-2 3) (eq f-14-1 0)))
3968 (getter (get-memory-bit 16 (.sym Dsp- offset -u16) Bit16An))
3969 (setter (set-memory-bit 16 (.sym Dsp- offset -u16) Bit16An newval))
3970 )
3971 )
3972 )
3974 (bit16-relative-operand 16)
3976 (define-pmacro (bit32-relative-operand offset group base1 base2)
3977 (begin
3978 (define-derived-operand
3979 (name (.sym bit32- offset -11-SB-relative- group))
3980 (comment "m32c bit,base:11[sb] relative bit")
3981 (attrs (machine 32))
3982 (mode BI)
3983 (args ((.sym BitBase32- offset -u11- group)))
3984 (syntax (.str "${BitBase32-" offset "-u11-" group "}[sb]"))
3985 (base-ifield (.sym f- base1 -12))
3986 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u11- group)))
3987 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 2)))
3988 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group)))
3989 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u11- group) newval))
3990 )
3991 (define-derived-operand
3992 (name (.sym bit32- offset -19-SB-relative- group))
3993 (comment "m32c bit,base:19[sb] relative bit")
3994 (attrs (machine 32))
3995 (mode BI)
3996 (args ((.sym BitBase32- offset -u19- group)))
3997 (syntax (.str "${BitBase32-" offset "-u19-" group "}[sb]"))
3998 (base-ifield (.sym f- base1 -12))
3999 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u19- group)))
4000 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 2)))
4001 (getter (get-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group)))
4002 (setter (set-memory-bit 32 (reg h-sb) (.sym BitBase32- offset -u19- group) newval))
4003 )
4004 (define-derived-operand
4005 (name (.sym bit32- offset -11-FB-relative- group))
4006 (comment "m32c bit,base:11[fb] relative bit")
4007 (attrs (machine 32))
4008 (mode BI)
4009 (args ((.sym BitBase32- offset -s11- group)))
4010 (syntax (.str "${BitBase32-" offset "-s11-" group "}[fb]"))
4011 (base-ifield (.sym f- base1 -12))
4012 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s11- group)))
4013 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -2) 3)))
4014 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group)))
4015 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s11- group) newval))
4016 )
4017 (define-derived-operand
4018 (name (.sym bit32- offset -19-FB-relative- group))
4019 (comment "m32c bit,base:19[fb] relative bit")
4020 (attrs (machine 32))
4021 (mode BI)
4022 (args ((.sym BitBase32- offset -s19- group)))
4023 (syntax (.str "${BitBase32-" offset "-s19-" group "}[fb]"))
4024 (base-ifield (.sym f- base1 -12))
4025 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -s19- group)))
4026 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -2) 3)))
4027 (getter (get-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group)))
4028 (setter (set-memory-bit 32 (reg h-fb) (.sym BitBase32- offset -s19- group) newval))
4029 )
4030 (define-derived-operand
4031 (name (.sym bit32- offset -11-An-relative- group))
4032 (comment "m32c bit,base:11[An] relative bit")
4033 (attrs (machine 32))
4034 (mode BI)
4035 (args ((.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
4036 (syntax (.str "${BitBase32-" offset "-u11-" group "}[$Bit32An" group "]"))
4037 (base-ifield (.sym f- base1 -12))
4038 (encoding (+ ((.sym f- base1 -3) 1) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u11- group) (.sym Bit32An group)))
4039 (ifield-assertion (andif (eq (.sym f- base1 -3) 1) (eq (.sym f- base2 -1) 0)))
4040 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group)))
4041 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u11- group) newval))
4042 )
4043 (define-derived-operand
4044 (name (.sym bit32- offset -19-An-relative- group))
4045 (comment "m32c bit,base:19[An] relative bit")
4046 (attrs (machine 32))
4047 (mode BI)
4048 (args ((.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
4049 (syntax (.str "${BitBase32-" offset "-u19-" group "}[$Bit32An" group "]"))
4050 (base-ifield (.sym f- base1 -12))
4051 (encoding (+ ((.sym f- base1 -3) 2) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u19- group) (.sym Bit32An group)))
4052 (ifield-assertion (andif (eq (.sym f- base1 -3) 2) (eq (.sym f- base2 -1) 0)))
4053 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group)))
4054 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u19- group) newval))
4055 )
4056 (define-derived-operand
4057 (name (.sym bit32- offset -27-An-relative- group))
4058 (comment "m32c bit,base:27[An] relative bit")
4059 (attrs (machine 32))
4060 (mode BI)
4061 (args ((.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
4062 (syntax (.str "${BitBase32-" offset "-u27-" group "}[$Bit32An" group "]"))
4063 (base-ifield (.sym f- base1 -12))
4064 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -1) 0) (.sym BitBase32- offset -u27- group) (.sym Bit32An group)))
4065 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -1) 0)))
4066 (getter (get-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group)))
4067 (setter (set-memory-bit 32 (.sym Bit32An group) (.sym BitBase32- offset -u27- group) newval))
4068 )
4069 )
4070 )
4072 (bit32-relative-operand 16 Unprefixed 4 8)
4073 (bit32-relative-operand 24 Prefixed 12 16)
4075 (define-derived-operand
4076 (name bit16-11-SB-relative-S)
4077 (comment "m16c bit,base:11[sb] relative bit")
4078 (attrs (machine 16))
4079 (mode BI)
4080 (args (BitBase16-8-u11-S))
4081 (syntax "${BitBase16-8-u11-S}[sb]")
4082 (base-ifield (.sym f-5-3))
4083 (encoding (+ BitBase16-8-u11-S))
4084 ; (ifield-assertion (#t))
4085 (getter (get-memory-bit 16 (reg h-sb) BitBase16-8-u11-S))
4086 (setter (set-memory-bit 16 (reg h-sb) BitBase16-8-u11-S newval))
4087 )
4089 (define-derived-operand
4090 (name Rn16-push-S-derived)
4091 (comment "m16c r0[lh] for push,pop short version")
4092 (attrs (machine 16))
4093 (mode QI)
4094 (args (Rn16-push-S))
4095 (syntax "${Rn16-push-S}")
4096 (base-ifield (.sym f-4-1))
4097 (encoding (+ Rn16-push-S))
4098 ; (ifield-assertion (#t))
4099 (getter (trunc QI Rn16-push-S))
4100 (setter (set Rn16-push-S newval))
4101 )
4103 (define-derived-operand
4104 (name An16-push-S-derived)
4105 (comment "m16c r0[lh] for push,pop short version")
4106 (attrs (machine 16))
4107 (mode HI)
4108 (args (An16-push-S))
4109 (syntax "${An16-push-S}")
4110 (base-ifield (.sym f-4-1))
4111 (encoding (+ An16-push-S))
4112 ; (ifield-assertion (#t))
4113 (getter (trunc QI An16-push-S))
4114 (setter (set An16-push-S newval))
4115 )
4117 ;-------------------------------------------------------------
4118 ; Absolute address
4119 ;-------------------------------------------------------------
4121 (define-pmacro (bit16-absolute offset)
4122 (begin
4123 (define-derived-operand
4124 (name (.sym bit16- offset -16-absolute))
4125 (comment "m16c absolute address")
4126 (attrs (machine 16))
4127 (mode BI)
4128 (args ((.sym BitBase16- offset -u16)))
4129 (syntax (.str "${BitBase16-" offset "-u16}"))
4130 (base-ifield f-12-4)
4131 (encoding (+ (f-12-4 #xF) (.sym BitBase16- offset -u16)))
4132 (ifield-assertion (eq f-12-4 #xF))
4133 (getter (get-memory-bit 16 0 (.sym BitBase16- offset -u16)))
4134 (setter (set-memory-bit 16 0 (.sym BitBase16- offset -u16) newval))
4135 )
4136 )
4137 )
4139 (bit16-absolute 16)
4141 (define-pmacro (bit32-absolute offset group base1 base2)
4142 (begin
4143 (define-derived-operand
4144 (name (.sym bit32- offset -19-absolute- group))
4145 (comment "m32c absolute address bit")
4146 (attrs (machine 32))
4147 (mode BI)
4148 (args ((.sym BitBase32- offset -u19- group)))
4149 (syntax (.str "${BitBase32-" offset "-u19-" group "}"))
4150 (base-ifield (.sym f- base1 -12))
4151 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 3) (.sym BitBase32- offset -u19- group)))
4152 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 3)))
4153 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u19- group)))
4154 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u19- group) newval))
4155 )
4156 (define-derived-operand
4157 (name (.sym bit32- offset -27-absolute- group))
4158 (comment "m32c absolute address bit")
4159 (attrs (machine 32))
4160 (mode BI)
4161 (args ((.sym BitBase32- offset -u27- group)))
4162 (syntax (.str "${BitBase32-" offset "-u27-" group "}"))
4163 (base-ifield (.sym f- base1 -12))
4164 (encoding (+ ((.sym f- base1 -3) 3) ((.sym f- base2 -2) 2) (.sym BitBase32- offset -u27- group)))
4165 (ifield-assertion (andif (eq (.sym f- base1 -3) 3) (eq (.sym f- base2 -2) 2)))
4166 (getter (get-memory-bit 32 0 (.sym BitBase32- offset -u27- group)))
4167 (setter (set-memory-bit 32 0 (.sym BitBase32- offset -u27- group) newval))
4168 )
4169 )
4170 )
4172 (bit32-absolute 16 Unprefixed 4 8)
4173 (bit32-absolute 24 Prefixed 12 16)
4175 ;-------------------------------------------------------------
4176 ; Destination operands for short fomat insns
4177 ;-------------------------------------------------------------
4179 (define-derived-operand
4180 (name dst16-3-S-R0l-direct-QI)
4181 (comment "m16c R0l direct QI")
4182 (attrs (machine 16))
4183 (mode QI)
4184 (args (R0l))
4185 (syntax "r0l")
4186 (base-ifield f-5-3)
4187 (encoding (+ (f-5-3 4)))
4188 (ifield-assertion (eq f-5-3 4))
4189 (getter (trunc QI R0l))
4190 (setter (set R0l newval))
4191 )
4192 (define-derived-operand
4193 (name dst16-3-S-R0h-direct-QI)
4194 (comment "m16c R0h direct QI")
4195 (attrs (machine 16))
4196 (mode QI)
4197 (args (R0h))
4198 (syntax "r0h")
4199 (base-ifield f-5-3)
4200 (encoding (+ (f-5-3 3)))
4201 (ifield-assertion (eq f-5-3 3))
4202 (getter (trunc QI R0h))
4203 (setter (set R0h newval))
4204 )
4205 (define-derived-operand
4206 (name dst16-3-S-8-8-SB-relative-QI)
4207 (comment "m16c SB relative QI")
4208 (attrs (machine 16))
4209 (mode QI)
4210 (args (Dsp-8-u8))
4211 (syntax "${Dsp-8-u8}[sb]")
4212 (base-ifield f-5-3)
4213 (encoding (+ (f-5-3 5) Dsp-8-u8))
4214 (ifield-assertion (eq f-5-3 5))
4215 (getter (mem16 QI (add Dsp-8-u8 (reg h-sb))))
4216 (setter (set (mem16 QI (add Dsp-8-u8 (reg h-sb))) newval))
4217 )
4218 (define-derived-operand
4219 (name dst16-3-S-8-8-FB-relative-QI)
4220 (comment "m16c FB relative QI")
4221 (attrs (machine 16))
4222 (mode QI)
4223 (args (Dsp-8-s8))
4224 (syntax "${Dsp-8-s8}[fb]")
4225 (base-ifield f-5-3)
4226 (encoding (+ (f-5-3 6) Dsp-8-s8))
4227 (ifield-assertion (eq f-5-3 6))
4228 (getter (mem16 QI (add Dsp-8-s8 (reg h-fb))))
4229 (setter (set (mem16 QI (add Dsp-8-s8 (reg h-fb))) newval))
4230 )
4231 (define-derived-operand
4232 (name dst16-3-S-8-16-absolute-QI)
4233 (comment "m16c absolute address QI")
4234 (attrs (machine 16))
4235 (mode QI)
4236 (args (Dsp-8-u16))
4237 (syntax "${Dsp-8-u16}")
4238 (base-ifield f-5-3)
4239 (encoding (+ (f-5-3 7) Dsp-8-u16))
4240 (ifield-assertion (eq f-5-3 7))
4241 (getter (mem16 QI Dsp-8-u16))
4242 (setter (set (mem16 QI Dsp-8-u16) newval))
4243 )
4244 (define-derived-operand
4245 (name dst16-3-S-16-8-SB-relative-QI)
4246 (comment "m16c SB relative QI")
4247 (attrs (machine 16))
4248 (mode QI)
4249 (args (Dsp-16-u8))
4250 (syntax "${Dsp-16-u8}[sb]")
4251 (base-ifield f-5-3)
4252 (encoding (+ (f-5-3 5) Dsp-16-u8))
4253 (ifield-assertion (eq f-5-3 5))
4254 (getter (mem16 QI (add Dsp-16-u8 (reg h-sb))))
4255 (setter (set (mem16 QI (add Dsp-16-u8 (reg h-sb))) newval))
4256 )
4257 (define-derived-operand
4258 (name dst16-3-S-16-8-FB-relative-QI)
4259 (comment "m16c FB relative QI")
4260 (attrs (machine 16))
4261 (mode QI)
4262 (args (Dsp-16-s8))
4263 (syntax "${Dsp-16-s8}[fb]")
4264 (base-ifield f-5-3)
4265 (encoding (+ (f-5-3 6) Dsp-16-s8))
4266 (ifield-assertion (eq f-5-3 6))
4267 (getter (mem16 QI (add Dsp-16-s8 (reg h-fb))))
4268 (setter (set (mem16 QI (add Dsp-16-s8 (reg h-fb))) newval))
4269 )
4270 (define-derived-operand
4271 (name dst16-3-S-16-16-absolute-QI)
4272 (comment "m16c absolute address QI")
4273 (attrs (machine 16))
4274 (mode QI)
4275 (args (Dsp-16-u16))
4276 (syntax "${Dsp-16-u16}")
4277 (base-ifield f-5-3)
4278 (encoding (+ (f-5-3 7) Dsp-16-u16))
4279 (ifield-assertion (eq f-5-3 7))
4280 (getter (mem16 QI Dsp-16-u16))
4281 (setter (set (mem16 QI Dsp-16-u16) newval))
4282 )
4283 (define-derived-operand
4284 (name srcdst16-r0l-r0h-S-derived)
4285 (comment "m16c r0l/r0h operand for short format insns")
4286 (attrs (machine 16))
4287 (mode SI)
4288 (args (SrcDst16-r0l-r0h-S-normal))
4289 (syntax "${SrcDst16-r0l-r0h-S-normal}")
4290 (base-ifield f-6-3)
4291 (encoding (+ (f-6-2 0) SrcDst16-r0l-r0h-S-normal))
4292 (ifield-assertion (eq f-6-2 0))
4293 (getter (trunc SI SrcDst16-r0l-r0h-S-normal))
4294 (setter ()) ; no setter
4295 )
4296 (define-derived-operand
4297 (name dst32-2-S-R0l-direct-QI)
4298 (comment "m32c R0l direct QI")
4299 (attrs (machine 32))
4300 (mode QI)
4301 (args (R0l))
4302 (syntax "r0l")
4303 (base-ifield f-2-2)
4304 (encoding (+ (f-2-2 0)))
4305 (ifield-assertion (eq f-2-2 0))
4306 (getter (trunc QI R0l))
4307 (setter (set R0l newval))
4308 )
4309 (define-derived-operand
4310 (name dst32-2-S-R0-direct-HI)
4311 (comment "m32c R0 direct HI")
4312 (attrs (machine 32))
4313 (mode HI)
4314 (args (R0))
4315 (syntax "r0")
4316 (base-ifield f-2-2)
4317 (encoding (+ (f-2-2 0)))
4318 (ifield-assertion (eq f-2-2 0))
4319 (getter (trunc HI R0))
4320 (setter (set R0 newval))
4321 )
4322 (define-derived-operand
4323 (name dst32-1-S-A0-direct-HI)
4324 (comment "m32c A0 direct HI")
4325 (attrs (machine 32))
4326 (mode HI)
4327 (args (A0))
4328 (syntax "a0")
4329 (base-ifield f-7-1)
4330 (encoding (+ (f-7-1 0)))
4331 (ifield-assertion (eq f-7-1 0))
4332 (getter (trunc HI A0))
4333 (setter (set A0 newval))
4334 )
4335 (define-derived-operand
4336 (name dst32-1-S-A1-direct-HI)
4337 (comment "m32c A1 direct HI")
4338 (attrs (machine 32))
4339 (mode HI)
4340 (args (A1))
4341 (syntax "a1")
4342 (base-ifield f-7-1)
4343 (encoding (+ (f-7-1 1)))
4344 (ifield-assertion (eq f-7-1 1))
4345 (getter (trunc HI A1))
4346 (setter (set A1 newval))
4347 )
4348 (define-pmacro (dst32-2-S-operands xmode)
4349 (begin
4350 (define-derived-operand
4351 (name (.sym dst32-2-S-8-SB-relative- xmode))
4352 (comment "m32c SB relative for short binary insns")
4353 (attrs (machine 32))
4354 (mode xmode)
4355 (args (Dsp-8-u8))
4356 (syntax "${Dsp-8-u8}[sb]")
4357 (base-ifield f-2-2)
4358 (encoding (+ (f-2-2 2) Dsp-8-u8))
4359 (ifield-assertion (eq f-2-2 2))
4360 (getter (c-call xmode (.str "operand_getter_" xmode) sb Dsp-8-u8))
4361 (setter (c-call DFLT (.str "operand_setter_" xmode) newval sb Dsp-8-u8))
4362 ; (getter (mem32 xmode (add Dsp-8-u8 (reg h-sb))))
4363 ; (setter (set (mem32 xmode (add Dsp-8-u8 (reg h-sb))) newval))
4364 )
4365 (define-derived-operand
4366 (name (.sym dst32-2-S-8-FB-relative- xmode))
4367 (comment "m32c FB relative for short binary insns")
4368 (attrs (machine 32))
4369 (mode xmode)
4370 (args (Dsp-8-s8))
4371 (syntax "${Dsp-8-s8}[fb]")
4372 (base-ifield f-2-2)
4373 (encoding (+ (f-2-2 3) Dsp-8-s8))
4374 (ifield-assertion (eq f-2-2 3))
4375 (getter (c-call xmode (.str "operand_getter_" xmode) fb Dsp-8-s8))
4376 (setter (c-call DFLT (.str "operand_setter_" xmode) newval fb Dsp-8-s8))
4377 ; (getter (mem32 xmode (add Dsp-8-s8 (reg h-fb))))
4378 ; (setter (set (mem32 xmode (add Dsp-8-s8 (reg h-fb))) newval))
4379 )
4380 (define-derived-operand
4381 (name (.sym dst32-2-S-16-absolute- xmode))
4382 (comment "m32c absolute address for short binary insns")
4383 (attrs (machine 32))
4384 (mode xmode)
4385 (args (Dsp-8-u16))
4386 (syntax "${Dsp-8-u16}")
4387 (base-ifield f-2-2)
4388 (encoding (+ (f-2-2 1) Dsp-8-u16))
4389 (ifield-assertion (eq f-2-2 1))
4390 (getter (c-call xmode (.str "operand_getter_" xmode) (const 0) Dsp-8-u16))
4391 (setter (c-call DFLT (.str "operand_setter_" xmode) newval (const 0) Dsp-8-u16))
4392 ; (getter (mem32 xmode Dsp-8-u16))
4393 ; (setter (set (mem32 xmode Dsp-8-u16) newval))
4394 )
4395 ; (define-derived-operand
4396 ; (name (.sym dst32-2-S-8-SB-relative-indirect- xmode))
4397 ; (comment "m32c SB relative for short binary insns")
4398 ; (attrs (machine 32))
4399 ; (mode xmode)
4400 ; (args (Dsp-16-u8))
4401 ; (syntax "[${Dsp-16-u8}[sb]]")
4402 ; (base-ifield f-10-2)
4403 ; (encoding (+ (f-10-2 2) Dsp-16-u8))
4404 ; (ifield-assertion (eq f-10-2 2))
4405 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))))
4406 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-u8 (reg h-sb)))) newval))
4407 ; )
4408 ; (define-derived-operand
4409 ; (name (.sym dst32-2-S-8-FB-relative-indirect- xmode))
4410 ; (comment "m32c FB relative for short binary insns")
4411 ; (attrs (machine 32))
4412 ; (mode xmode)
4413 ; (args (Dsp-16-s8))
4414 ; (syntax "[${Dsp-16-s8}[fb]]")
4415 ; (base-ifield f-10-2)
4416 ; (encoding (+ (f-10-2 3) Dsp-16-s8))
4417 ; (ifield-assertion (eq f-10-2 3))
4418 ; (getter (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))))
4419 ; (setter (set (mem32 xmode (indirect-addr (add Dsp-16-s8 (reg h-fb)))) newval))
4420 ; )
4421 ; (define-derived-operand
4422 ; (name (.sym dst32-2-S-16-absolute-indirect- xmode))
4423 ; (comment "m32c absolute address for short binary insns")
4424 ; (attrs (machine 32))
4425 ; (mode xmode)
4426 ; (args (Dsp-16-u16))
4427 ; (syntax "[${Dsp-16-u16}]")
4428 ; (base-ifield f-10-2)
4429 ; (encoding (+ (f-10-2 1) Dsp-16-u16))
4430 ; (ifield-assertion (eq f-10-2 1))
4431 ; (getter (mem32 xmode (indirect-addr Dsp-16-u16)))
4432 ; (setter (set (mem32 xmode (indirect-addr Dsp-16-u16)) newval))
4433 ; )
4434 )
4435 )
4437 (dst32-2-S-operands QI)
4438 (dst32-2-S-operands HI)
4439 (dst32-2-S-operands SI)
4441 ;=============================================================
4442 ; Anyof operands
4443 ;-------------------------------------------------------------
4444 ; Source operands with no additional fields
4445 ;-------------------------------------------------------------
4447 (define-pmacro (src16-basic-operand xmode)
4448 (begin
4449 (define-anyof-operand
4450 (name (.sym src16-basic- xmode))
4451 (comment (.str "m16c source operand of size " xmode " with no additional fields"))
4452 (attrs (machine 16))
4453 (mode xmode)
4454 (choices
4455 (.sym src16-Rn-direct- xmode)
4456 (.sym src16-An-direct- xmode)
4457 (.sym src16-An-indirect- xmode)
4458 )
4459 )
4460 )
4461 )
4462 (src16-basic-operand QI)
4463 (src16-basic-operand HI)
4465 (define-pmacro (src32-basic-operand xmode)
4466 (begin
4467 (define-anyof-operand
4468 (name (.sym src32-basic-Unprefixed- xmode))
4469 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4470 (attrs (machine 32))
4471 (mode xmode)
4472 (choices
4473 (.sym src32-Rn-direct-Unprefixed- xmode)
4474 (.sym src32-An-direct-Unprefixed- xmode)
4475 (.sym src32-An-indirect-Unprefixed- xmode)
4476 )
4477 )
4478 (define-anyof-operand
4479 (name (.sym src32-basic-Prefixed- xmode))
4480 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4481 (attrs (machine 32))
4482 (mode xmode)
4483 (choices
4484 (.sym src32-Rn-direct-Prefixed- xmode)
4485 (.sym src32-An-direct-Prefixed- xmode)
4486 (.sym src32-An-indirect-Prefixed- xmode)
4487 )
4488 )
4489 ; (define-anyof-operand
4490 ; (name (.sym src32-basic-indirect- xmode))
4491 ; (comment (.str "m32c destination operand of size " xmode " indirect with no additional fields"))
4492 ; (attrs (machine 32))
4493 ; (mode xmode)
4494 ; (choices
4495 ; (.sym src32-An-indirect-indirect- xmode)
4496 ; )
4497 ; )
4498 )
4499 )
4501 (src32-basic-operand QI)
4502 (src32-basic-operand HI)
4503 (src32-basic-operand SI)
4505 (define-anyof-operand
4506 (name src32-basic-ExtPrefixed-QI)
4507 (comment "m32c source operand of size QI with no additional fields")
4508 (attrs (machine 32))
4509 (mode QI)
4510 (choices
4511 src32-Rn-direct-Prefixed-QI
4512 src32-An-indirect-Prefixed-QI
4513 )
4514 )
4516 ;-------------------------------------------------------------
4517 ; Source operands with additional fields at offset 16 bits
4518 ;-------------------------------------------------------------
4520 (define-pmacro (src16-16-operand xmode)
4521 (begin
4522 (define-anyof-operand
4523 (name (.sym src16-16-8- xmode))
4524 (comment (.str "m16c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4525 (attrs (machine 16))
4526 (mode xmode)
4527 (choices
4528 (.sym src16-16-8-An-relative- xmode)
4529 (.sym src16-16-8-SB-relative- xmode)
4530 (.sym src16-16-8-FB-relative- xmode)
4531 )
4532 )
4533 (define-anyof-operand
4534 (name (.sym src16-16-16- xmode))
4535 (comment (.str "m16c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4536 (attrs (machine 16))
4537 (mode xmode)
4538 (choices
4539 (.sym src16-16-16-An-relative- xmode)
4540 (.sym src16-16-16-SB-relative- xmode)
4541 (.sym src16-16-16-absolute- xmode)
4542 )
4543 )
4544 )
4545 )
4546 (src16-16-operand QI)
4547 (src16-16-operand HI)
4549 (define-pmacro (src32-16-operand xmode)
4550 (begin
4551 (define-anyof-operand
4552 (name (.sym src32-16-8-Unprefixed- xmode))
4553 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 16"))
4554 (attrs (machine 32))
4555 (mode xmode)
4556 (choices
4557 (.sym src32-16-8-An-relative-Unprefixed- xmode)
4558 (.sym src32-16-8-SB-relative-Unprefixed- xmode)
4559 (.sym src32-16-8-FB-relative-Unprefixed- xmode)
4560 )
4561 )
4562 (define-anyof-operand
4563 (name (.sym src32-16-16-Unprefixed- xmode))
4564 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4565 (attrs (machine 32))
4566 (mode xmode)
4567 (choices
4568 (.sym src32-16-16-An-relative-Unprefixed- xmode)
4569 (.sym src32-16-16-SB-relative-Unprefixed- xmode)
4570 (.sym src32-16-16-FB-relative-Unprefixed- xmode)
4571 (.sym src32-16-16-absolute-Unprefixed- xmode)
4572 )
4573 )
4574 (define-anyof-operand
4575 (name (.sym src32-16-24-Unprefixed- xmode))
4576 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4577 (attrs (machine 32))
4578 (mode xmode)
4579 (choices
4580 (.sym src32-16-24-An-relative-Unprefixed- xmode)
4581 (.sym src32-16-24-absolute-Unprefixed- xmode)
4582 )
4583 )
4584 )
4585 )
4587 (src32-16-operand QI)
4588 (src32-16-operand HI)
4589 (src32-16-operand SI)
4591 ;-------------------------------------------------------------
4592 ; Source operands with additional fields at offset 24 bits
4593 ;-------------------------------------------------------------
4595 (define-pmacro (src-24-operand group xmode)
4596 (begin
4597 (define-anyof-operand
4598 (name (.sym src32-24-8- group - xmode))
4599 (comment (.str "m32c source operand of size " xmode " with additional 8 bit fields at offset 24"))
4600 (attrs (machine 32))
4601 (mode xmode)
4602 (choices
4603 (.sym src32-24-8-An-relative- group - xmode)
4604 (.sym src32-24-8-SB-relative- group - xmode)
4605 (.sym src32-24-8-FB-relative- group - xmode)
4606 )
4607 )
4608 (define-anyof-operand
4609 (name (.sym src32-24-16- group - xmode))
4610 (comment (.str "m32c source operand of size " xmode " with additional 16 bit fields at offset 16"))
4611 (attrs (machine 32))
4612 (mode xmode)
4613 (choices
4614 (.sym src32-24-16-An-relative- group - xmode)
4615 (.sym src32-24-16-SB-relative- group - xmode)
4616 (.sym src32-24-16-FB-relative- group - xmode)
4617 (.sym src32-24-16-absolute- group - xmode)
4618 )
4619 )
4620 (define-anyof-operand
4621 (name (.sym src32-24-24- group - xmode))
4622 (comment (.str "m32c source operand of size " xmode " with additional 24 bit fields at offset 16"))
4623 (attrs (machine 32))
4624 (mode xmode)
4625 (choices
4626 (.sym src32-24-24-An-relative- group - xmode)
4627 (.sym src32-24-24-absolute- group - xmode)
4628 )
4629 )
4630 )
4631 )
4633 (src-24-operand Prefixed QI)
4634 (src-24-operand Prefixed HI)
4635 (src-24-operand Prefixed SI)
4637 (define-pmacro (src-24-indirect-operand xmode)
4638 (begin
4639 ; (define-anyof-operand
4640 ; (name (.sym src32-24-8-indirect- xmode))
4641 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4642 ; (attrs (machine 32))
4643 ; (mode xmode)
4644 ; (choices
4645 ; (.sym src32-24-8-An-relative-indirect- xmode)
4646 ; (.sym src32-24-8-SB-relative-indirect- xmode)
4647 ; (.sym src32-24-8-FB-relative-indirect- xmode)
4648 ; )
4649 ; )
4650 ; (define-anyof-operand
4651 ; (name (.sym src32-24-16-indirect- xmode))
4652 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4653 ; (attrs (machine 32))
4654 ; (mode xmode)
4655 ; (choices
4656 ; (.sym src32-24-16-An-relative-indirect- xmode)
4657 ; (.sym src32-24-16-SB-relative-indirect- xmode)
4658 ; (.sym src32-24-16-FB-relative-indirect- xmode)
4659 ; )
4660 ; )
4661 ; (define-anyof-operand
4662 ; (name (.sym src32-24-24-indirect- xmode))
4663 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
4664 ; (attrs (machine 32))
4665 ; (mode xmode)
4666 ; (choices
4667 ; (.sym src32-24-24-An-relative-indirect- xmode)
4668 ; )
4669 ; )
4670 ; (define-anyof-operand
4671 ; (name (.sym src32-24-16-absolute-indirect- xmode))
4672 ; (comment (.str "m32c source operand of size " xmode " 16 bit absolute indirect"))
4673 ; (attrs (machine 32))
4674 ; (mode xmode)
4675 ; (choices
4676 ; (.sym src32-24-16-absolute-indirect-derived- xmode)
4677 ; )
4678 ; )
4679 ; (define-anyof-operand
4680 ; (name (.sym src32-24-24-absolute-indirect- xmode))
4681 ; (comment (.str "m32c source operand of size " xmode " 24 bit absolute indirect"))
4682 ; (attrs (machine 32))
4683 ; (mode xmode)
4684 ; (choices
4685 ; (.sym src32-24-24-absolute-indirect-derived- xmode)
4686 ; )
4687 ; )
4688 )
4689 )
4691 ; (src-24-indirect-operand QI)
4692 ; (src-24-indirect-operand HI)
4693 ; (src-24-indirect-operand SI)
4695 ;-------------------------------------------------------------
4696 ; Destination operands with no additional fields
4697 ;-------------------------------------------------------------
4699 (define-pmacro (dst16-basic-operand xmode)
4700 (begin
4701 (define-anyof-operand
4702 (name (.sym dst16-basic- xmode))
4703 (comment (.str "m16c destination operand of size " xmode " with no additional fields"))
4704 (attrs (machine 16))
4705 (mode xmode)
4706 (choices
4707 (.sym dst16-Rn-direct- xmode)
4708 (.sym dst16-An-direct- xmode)
4709 (.sym dst16-An-indirect- xmode)
4710 )
4711 )
4712 )
4713 )
4715 (dst16-basic-operand QI)
4716 (dst16-basic-operand HI)
4717 (dst16-basic-operand SI)
4719 (define-pmacro (dst32-basic-operand xmode)
4720 (begin
4721 (define-anyof-operand
4722 (name (.sym dst32-basic-Unprefixed- xmode))
4723 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4724 (attrs (machine 32))
4725 (mode xmode)
4726 (choices
4727 (.sym dst32-Rn-direct-Unprefixed- xmode)
4728 (.sym dst32-An-direct-Unprefixed- xmode)
4729 (.sym dst32-An-indirect-Unprefixed- xmode)
4730 )
4731 )
4732 (define-anyof-operand
4733 (name (.sym dst32-basic-Prefixed- xmode))
4734 (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
4735 (attrs (machine 32))
4736 (mode xmode)
4737 (choices
4738 (.sym dst32-Rn-direct-Prefixed- xmode)
4739 (.sym dst32-An-direct-Prefixed- xmode)
4740 (.sym dst32-An-indirect-Prefixed- xmode)
4741 )
4742 )
4743 )
4744 )
4746 (dst32-basic-operand QI)
4747 (dst32-basic-operand HI)
4748 (dst32-basic-operand SI)
4750 ;-------------------------------------------------------------
4751 ; Destination operands with possible additional fields at offset 16 bits
4752 ;-------------------------------------------------------------
4754 (define-pmacro (dst16-16-operand xmode)
4755 (begin
4756 (define-anyof-operand
4757 (name (.sym dst16-16- xmode))
4758 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4759 (attrs (machine 16))
4760 (mode xmode)
4761 (choices
4762 (.sym dst16-Rn-direct- xmode)
4763 (.sym dst16-An-direct- xmode)
4764 (.sym dst16-An-indirect- xmode)
4765 (.sym dst16-16-8-An-relative- xmode)
4766 (.sym dst16-16-16-An-relative- xmode)
4767 (.sym dst16-16-8-SB-relative- xmode)
4768 (.sym dst16-16-16-SB-relative- xmode)
4769 (.sym dst16-16-8-FB-relative- xmode)
4770 (.sym dst16-16-16-absolute- xmode)
4771 )
4772 )
4773 (define-anyof-operand
4774 (name (.sym dst16-16-8- xmode))
4775 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4776 (attrs (machine 16))
4777 (mode xmode)
4778 (choices
4779 (.sym dst16-16-8-An-relative- xmode)
4780 (.sym dst16-16-8-SB-relative- xmode)
4781 (.sym dst16-16-8-FB-relative- xmode)
4782 )
4783 )
4784 (define-anyof-operand
4785 (name (.sym dst16-16-16- xmode))
4786 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4787 (attrs (machine 16))
4788 (mode xmode)
4789 (choices
4790 (.sym dst16-16-16-An-relative- xmode)
4791 (.sym dst16-16-16-SB-relative- xmode)
4792 (.sym dst16-16-16-absolute- xmode)
4793 )
4794 )
4795 (define-anyof-operand
4796 (name (.sym dst16-16-16sa- xmode))
4797 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4798 (attrs (machine 16))
4799 (mode xmode)
4800 (choices
4801 (.sym dst16-16-16-SB-relative- xmode)
4802 (.sym dst16-16-16-absolute- xmode)
4803 )
4804 )
4805 (define-anyof-operand
4806 (name (.sym dst16-16-20ar- xmode))
4807 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 16"))
4808 (attrs (machine 16))
4809 (mode xmode)
4810 (choices
4811 (.sym dst16-16-20-An-relative- xmode)
4812 )
4813 )
4814 )
4815 )
4817 (dst16-16-operand QI)
4818 (dst16-16-operand HI)
4819 (dst16-16-operand SI)
4821 (define-anyof-operand
4822 (name dst16-16-Ext-QI)
4823 (comment "m16c destination operand of size QI for 'ext' insns with additional fields at offset 16")
4824 (attrs (machine 16))
4825 (mode QI)
4826 (choices
4827 dst16-Rn-direct-Ext-QI
4828 dst16-An-indirect-Ext-QI
4829 dst16-16-8-An-relative-Ext-QI
4830 dst16-16-16-An-relative-Ext-QI
4831 dst16-16-8-SB-relative-Ext-QI
4832 dst16-16-16-SB-relative-Ext-QI
4833 dst16-16-8-FB-relative-Ext-QI
4834 dst16-16-16-absolute-Ext-QI
4835 )
4836 )
4838 (define-derived-operand
4839 (name dst16-An-indirect-Mova-HI)
4840 (comment "m16c addressof An indirect destination HI")
4841 (attrs (ISA m16c))
4842 (mode HI)
4843 (args (Dst16An))
4844 (syntax "[$Dst16An]")
4845 (base-ifield f-12-4)
4846 (encoding (+ (f-12-2 1) (f-14-1 1) Dst16An))
4847 (ifield-assertion
4848 (andif (eq f-12-2 1) (eq f-14-1 1)))
4849 (getter Dst16An)
4850 (setter (nop))
4851 )
4853 (define-derived-operand
4854 (name dst16-16-8-An-relative-Mova-HI)
4855 (comment
4856 "m16c addressof dsp:8[An] relative destination HI")
4857 (attrs (ISA m16c))
4858 (mode HI)
4859 (args (Dst16An Dsp-16-u8))
4860 (syntax "${Dsp-16-u8}[$Dst16An]")
4861 (base-ifield f-12-4)
4862 (encoding
4863 (+ (f-12-2 2) (f-14-1 0) Dsp-16-u8 Dst16An))
4864 (ifield-assertion
4865 (andif (eq f-12-2 2) (eq f-14-1 0)))
4866 (getter (add Dsp-16-u8 Dst16An))
4867 (setter (nop))
4868 )
4869 (define-derived-operand
4870 (name dst16-16-16-An-relative-Mova-HI)
4871 (comment
4872 "m16c addressof dsp:16[An] relative destination HI")
4873 (attrs (ISA m16c))
4874 (mode HI)
4875 (args (Dst16An Dsp-16-u16))
4876 (syntax "${Dsp-16-u16}[$Dst16An]")
4877 (base-ifield f-12-4)
4878 (encoding
4879 (+ (f-12-2 3) (f-14-1 0) Dsp-16-u16 Dst16An))
4880 (ifield-assertion
4881 (andif (eq f-12-2 3) (eq f-14-1 0)))
4882 (getter (add Dsp-16-u16 Dst16An))
4883 (setter (nop))
4884 )
4885 (define-derived-operand
4886 (name dst16-16-8-SB-relative-Mova-HI)
4887 (comment
4888 "m16c addressof dsp:8[sb] relative destination HI")
4889 (attrs (ISA m16c))
4890 (mode HI)
4891 (args (Dsp-16-u8))
4892 (syntax "${Dsp-16-u8}[sb]")
4893 (base-ifield f-12-4)
4894 (encoding (+ (f-12-4 10) Dsp-16-u8))
4895 (ifield-assertion (eq f-12-4 10))
4896 (getter (add Dsp-16-u8 (reg h-sb)))
4897 (setter (nop))
4898 )
4899 (define-derived-operand
4900 (name dst16-16-16-SB-relative-Mova-HI)
4901 (comment
4902 "m16c addressof dsp:16[sb] relative destination HI")
4903 (attrs (ISA m16c))
4904 (mode HI)
4905 (args (Dsp-16-u16))
4906 (syntax "${Dsp-16-u16}[sb]")
4907 (base-ifield f-12-4)
4908 (encoding (+ (f-12-4 14) Dsp-16-u16))
4909 (ifield-assertion (eq f-12-4 14))
4910 (getter (add Dsp-16-u16 (reg h-sb)))
4911 (setter (nop))
4912 )
4913 (define-derived-operand
4914 (name dst16-16-8-FB-relative-Mova-HI)
4915 (comment
4916 "m16c addressof dsp:8[fb] relative destination HI")
4917 (attrs (ISA m16c))
4918 (mode HI)
4919 (args (Dsp-16-s8))
4920 (syntax "${Dsp-16-s8}[fb]")
4921 (base-ifield f-12-4)
4922 (encoding (+ (f-12-4 11) Dsp-16-s8))
4923 (ifield-assertion (eq f-12-4 11))
4924 (getter (add Dsp-16-s8 (reg h-fb)))
4925 (setter (nop))
4926 )
4927 (define-derived-operand
4928 (name dst16-16-16-absolute-Mova-HI)
4929 (comment "m16c addressof absolute address HI")
4930 (attrs (ISA m16c))
4931 (mode HI)
4932 (args (Dsp-16-u16))
4933 (syntax "${Dsp-16-u16}")
4934 (base-ifield f-12-4)
4935 (encoding (+ (f-12-4 15) Dsp-16-u16))
4936 (ifield-assertion (eq f-12-4 15))
4937 (getter Dsp-16-u16)
4938 (setter (nop))
4939 )
4941 (define-anyof-operand
4942 (name dst16-16-Mova-HI)
4943 (comment "m16c addressof destination operand of size HI with additional fields at offset 16")
4944 (attrs (machine 16))
4945 (mode HI)
4946 (choices
4947 dst16-An-indirect-Mova-HI
4948 dst16-16-8-An-relative-Mova-HI
4949 dst16-16-16-An-relative-Mova-HI
4950 dst16-16-8-SB-relative-Mova-HI
4951 dst16-16-16-SB-relative-Mova-HI
4952 dst16-16-8-FB-relative-Mova-HI
4953 dst16-16-16-absolute-Mova-HI
4954 )
4955 )
4957 (define-derived-operand
4958 (name dst32-An-indirect-Unprefixed-Mova-SI)
4959 (comment "m32c addressof An indirect destination SI")
4960 (attrs (ISA m32c))
4961 (mode SI)
4962 (args (Dst32AnUnprefixed))
4963 (syntax "[$Dst32AnUnprefixed]")
4964 (base-ifield f-4-6)
4965 (encoding
4966 (+ (f-4-3 0) (f-8-1 0) Dst32AnUnprefixed))
4967 (ifield-assertion
4968 (andif (eq f-4-3 0) (eq f-8-1 0)))
4969 (getter Dst32AnUnprefixed)
4970 (setter (nop))
4971 )
4973 (define-derived-operand
4974 (name dst32-16-8-An-relative-Unprefixed-Mova-SI)
4975 (comment "m32c addressof dsp:8[An] relative destination SI")
4976 (attrs (ISA m32c))
4977 (mode SI)
4978 (args (Dst32AnUnprefixed Dsp-16-u8))
4979 (syntax "${Dsp-16-u8}[$Dst32AnUnprefixed]")
4980 (base-ifield f-4-6)
4981 (encoding
4982 (+ (f-4-3 1)
4983 (f-8-1 0)
4984 Dsp-16-u8
4985 Dst32AnUnprefixed))
4986 (ifield-assertion
4987 (andif (eq f-4-3 1) (eq f-8-1 0)))
4988 (getter (add Dsp-16-u8 Dst32AnUnprefixed))
4989 (setter (nop))
4990 )
4992 (define-derived-operand
4993 (name dst32-16-16-An-relative-Unprefixed-Mova-SI)
4994 (comment
4995 "m32c addressof dsp:16[An] relative destination SI")
4996 (attrs (ISA m32c))
4997 (mode SI)
4998 (args (Dst32AnUnprefixed Dsp-16-u16))
4999 (syntax "${Dsp-16-u16}[$Dst32AnUnprefixed]")
5000 (base-ifield f-4-6)
5001 (encoding
5002 (+ (f-4-3 2)
5003 (f-8-1 0)
5004 Dsp-16-u16
5005 Dst32AnUnprefixed))
5006 (ifield-assertion
5007 (andif (eq f-4-3 2) (eq f-8-1 0)))
5008 (getter (add Dsp-16-u16 Dst32AnUnprefixed))
5009 (setter (nop))
5010 )
5012 (define-derived-operand
5013 (name dst32-16-24-An-relative-Unprefixed-Mova-SI)
5014 (comment "addressof m32c dsp:16[An] relative destination SI")
5015 (attrs (ISA m32c))
5016 (mode SI)
5017 (args (Dst32AnUnprefixed Dsp-16-u24))
5018 (syntax "${Dsp-16-u24}[$Dst32AnUnprefixed]")
5019 (base-ifield f-4-6)
5020 (encoding
5021 (+ (f-4-3 3)
5022 (f-8-1 0)
5023 Dsp-16-u24
5024 Dst32AnUnprefixed))
5025 (ifield-assertion
5026 (andif (eq f-4-3 3) (eq f-8-1 0)))
5027 (getter (add Dsp-16-u24 Dst32AnUnprefixed))
5028 (setter (nop))
5029 )
5031 (define-derived-operand
5032 (name dst32-16-8-SB-relative-Unprefixed-Mova-SI)
5033 (comment "m32c addressof dsp:8[sb] relative destination SI")
5034 (attrs (ISA m32c))
5035 (mode SI)
5036 (args (Dsp-16-u8))
5037 (syntax "${Dsp-16-u8}[sb]")
5038 (base-ifield f-4-6)
5039 (encoding (+ (f-4-3 1) (f-8-2 2) Dsp-16-u8))
5040 (ifield-assertion
5041 (andif (eq f-4-3 1) (eq f-8-2 2)))
5042 (getter (add Dsp-16-u8 (reg h-sb)))
5043 (setter (nop))
5044 )
5046 (define-derived-operand
5047 (name dst32-16-16-SB-relative-Unprefixed-Mova-SI)
5048 (comment "m32c addressof dsp:16[sb] relative destination SI")
5049 (attrs (ISA m32c))
5050 (mode SI)
5051 (args (Dsp-16-u16))
5052 (syntax "${Dsp-16-u16}[sb]")
5053 (base-ifield f-4-6)
5054 (encoding (+ (f-4-3 2) (f-8-2 2) Dsp-16-u16))
5055 (ifield-assertion
5056 (andif (eq f-4-3 2) (eq f-8-2 2)))
5057 (getter (add Dsp-16-u16 (reg h-sb)))
5058 (setter (nop))
5059 )
5061 (define-derived-operand
5062 (name dst32-16-8-FB-relative-Unprefixed-Mova-SI)
5063 (comment "m32c addressof dsp:8[fb] relative destination SI")
5064 (attrs (ISA m32c))
5065 (mode SI)
5066 (args (Dsp-16-s8))
5067 (syntax "${Dsp-16-s8}[fb]")
5068 (base-ifield f-4-6)
5069 (encoding (+ (f-4-3 1) (f-8-2 3) Dsp-16-s8))
5070 (ifield-assertion
5071 (andif (eq f-4-3 1) (eq f-8-2 3)))
5072 (getter (add Dsp-16-s8 (reg h-fb)))
5073 (setter (nop))
5074 )
5076 (define-derived-operand
5077 (name dst32-16-16-FB-relative-Unprefixed-Mova-SI)
5078 (comment "m32c addressof dsp:16[fb] relative destination SI")
5079 (attrs (ISA m32c))
5080 (mode SI)
5081 (args (Dsp-16-s16))
5082 (syntax "${Dsp-16-s16}[fb]")
5083 (base-ifield f-4-6)
5084 (encoding (+ (f-4-3 2) (f-8-2 3) Dsp-16-s16))
5085 (ifield-assertion
5086 (andif (eq f-4-3 2) (eq f-8-2 3)))
5087 (getter (add Dsp-16-s16 (reg h-fb)))
5088 (setter (nop))
5089 )
5091 (define-derived-operand
5092 (name dst32-16-16-absolute-Unprefixed-Mova-SI)
5093 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5094 (mode SI)
5095 (args (Dsp-16-u16))
5096 (syntax "${Dsp-16-u16}")
5097 (base-ifield f-4-6)
5098 (encoding (+ (f-4-3 3) (f-8-2 3) Dsp-16-u16))
5099 (ifield-assertion
5100 (andif (eq f-4-3 3) (eq f-8-2 3)))
5101 (getter Dsp-16-u16)
5102 (setter (nop))
5103 )
5105 (define-derived-operand
5106 (name dst32-16-24-absolute-Unprefixed-Mova-SI)
5107 (comment "m32c addressof absolute address SI") (attrs (ISA m32c))
5108 (mode SI)
5109 (args (Dsp-16-u24))
5110 (syntax "${Dsp-16-u24}")
5111 (base-ifield f-4-6)
5112 (encoding (+ (f-4-3 3) (f-8-2 2) Dsp-16-u24))
5113 (ifield-assertion
5114 (andif (eq f-4-3 3) (eq f-8-2 2)))
5115 (getter Dsp-16-u24)
5116 (setter (nop))
5117 )
5119 (define-anyof-operand
5120 (name dst32-16-Unprefixed-Mova-SI)
5121 (comment
5122 "m32c addressof destination operand of size SI with additional fields at offset 16")
5123 (attrs (ISA m32c))
5124 (mode SI)
5125 (choices
5126 dst32-An-indirect-Unprefixed-Mova-SI
5127 dst32-16-8-An-relative-Unprefixed-Mova-SI
5128 dst32-16-16-An-relative-Unprefixed-Mova-SI
5129 dst32-16-24-An-relative-Unprefixed-Mova-SI
5130 dst32-16-8-SB-relative-Unprefixed-Mova-SI
5131 dst32-16-16-SB-relative-Unprefixed-Mova-SI
5132 dst32-16-8-FB-relative-Unprefixed-Mova-SI
5133 dst32-16-16-FB-relative-Unprefixed-Mova-SI
5134 dst32-16-16-absolute-Unprefixed-Mova-SI
5135 dst32-16-24-absolute-Unprefixed-Mova-SI))
5137 (define-pmacro (dst32-16-operand xmode)
5138 (begin
5139 (define-anyof-operand
5140 (name (.sym dst32-16-Unprefixed- xmode))
5141 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5142 (attrs (machine 32))
5143 (mode xmode)
5144 (choices
5145 (.sym dst32-Rn-direct-Unprefixed- xmode)
5146 (.sym dst32-An-direct-Unprefixed- xmode)
5147 (.sym dst32-An-indirect-Unprefixed- xmode)
5148 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5149 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5150 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5151 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5152 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5153 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5154 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5155 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5156 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5157 )
5158 )
5159 (define-anyof-operand
5160 (name (.sym dst32-16-8-Unprefixed- xmode))
5161 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5162 (attrs (machine 32))
5163 (mode xmode)
5164 (choices
5165 (.sym dst32-16-8-An-relative-Unprefixed- xmode)
5166 (.sym dst32-16-8-SB-relative-Unprefixed- xmode)
5167 (.sym dst32-16-8-FB-relative-Unprefixed- xmode)
5168 )
5169 )
5170 (define-anyof-operand
5171 (name (.sym dst32-16-16-Unprefixed- xmode))
5172 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5173 (attrs (machine 32))
5174 (mode xmode)
5175 (choices
5176 (.sym dst32-16-16-An-relative-Unprefixed- xmode)
5177 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5178 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5179 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5180 )
5181 )
5182 (define-anyof-operand
5183 (name (.sym dst32-16-16sa-Unprefixed- xmode))
5184 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5185 (attrs (machine 32))
5186 (mode xmode)
5187 (choices
5188 (.sym dst32-16-16-SB-relative-Unprefixed- xmode)
5189 (.sym dst32-16-16-FB-relative-Unprefixed- xmode)
5190 (.sym dst32-16-16-absolute-Unprefixed- xmode)
5191 )
5192 )
5193 (define-anyof-operand
5194 (name (.sym dst32-16-24-Unprefixed- xmode))
5195 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 16"))
5196 (attrs (machine 32))
5197 (mode xmode)
5198 (choices
5199 (.sym dst32-16-24-An-relative-Unprefixed- xmode)
5200 (.sym dst32-16-24-absolute-Unprefixed- xmode)
5201 )
5202 )
5203 )
5204 )
5206 (dst32-16-operand QI)
5207 (dst32-16-operand HI)
5208 (dst32-16-operand SI)
5210 (define-pmacro (dst32-16-Ext-operand smode dmode)
5211 (begin
5212 (define-anyof-operand
5213 (name (.sym dst32-16-ExtUnprefixed- smode))
5214 (comment (.str "m32c destination operand of size " smode " with additional fields at offset 16"))
5215 (attrs (machine 32))
5216 (mode dmode)
5217 (choices
5218 (.sym dst32-Rn-direct-ExtUnprefixed- smode)
5219 (.sym dst32-An-direct-Unprefixed- dmode) ; ExtUnprefixed mode not required for this operand -- use the normal dmode version
5220 (.sym dst32-An-indirect-ExtUnprefixed- smode)
5221 (.sym dst32-16-8-An-relative-ExtUnprefixed- smode)
5222 (.sym dst32-16-16-An-relative-ExtUnprefixed- smode)
5223 (.sym dst32-16-24-An-relative-ExtUnprefixed- smode)
5224 (.sym dst32-16-8-SB-relative-ExtUnprefixed- smode)
5225 (.sym dst32-16-16-SB-relative-ExtUnprefixed- smode)
5226 (.sym dst32-16-8-FB-relative-ExtUnprefixed- smode)
5227 (.sym dst32-16-16-FB-relative-ExtUnprefixed- smode)
5228 (.sym dst32-16-16-absolute-ExtUnprefixed- smode)
5229 (.sym dst32-16-24-absolute-ExtUnprefixed- smode)
5230 )
5231 )
5232 )
5233 )
5235 (dst32-16-Ext-operand QI HI)
5236 (dst32-16-Ext-operand HI SI)
5238 (define-anyof-operand
5239 (name dst32-16-Unprefixed-Mulex-HI)
5240 (comment "m32c destination operand of size HI with additional fields at offset 16")
5241 (attrs (machine 32))
5242 (mode HI)
5243 (choices
5244 dst32-R3-direct-Unprefixed-HI
5245 dst32-An-direct-Unprefixed-HI
5246 dst32-An-indirect-Unprefixed-HI
5247 dst32-16-8-An-relative-Unprefixed-HI
5248 dst32-16-16-An-relative-Unprefixed-HI
5249 dst32-16-24-An-relative-Unprefixed-HI
5250 dst32-16-8-SB-relative-Unprefixed-HI
5251 dst32-16-16-SB-relative-Unprefixed-HI
5252 dst32-16-8-FB-relative-Unprefixed-HI
5253 dst32-16-16-FB-relative-Unprefixed-HI
5254 dst32-16-16-absolute-Unprefixed-HI
5255 dst32-16-24-absolute-Unprefixed-HI
5256 )
5257 )
5258 ;-------------------------------------------------------------
5259 ; Destination operands with possible additional fields at offset 24 bits
5260 ;-------------------------------------------------------------
5262 (define-pmacro (dst16-24-operand xmode)
5263 (begin
5264 (define-anyof-operand
5265 (name (.sym dst16-24- xmode))
5266 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 24"))
5267 (attrs (machine 16))
5268 (mode xmode)
5269 (choices
5270 (.sym dst16-Rn-direct- xmode)
5271 (.sym dst16-An-direct- xmode)
5272 (.sym dst16-An-indirect- xmode)
5273 (.sym dst16-24-8-An-relative- xmode)
5274 (.sym dst16-24-16-An-relative- xmode)
5275 (.sym dst16-24-8-SB-relative- xmode)
5276 (.sym dst16-24-16-SB-relative- xmode)
5277 (.sym dst16-24-8-FB-relative- xmode)
5278 (.sym dst16-24-16-absolute- xmode)
5279 )
5280 )
5281 )
5282 )
5284 (dst16-24-operand QI)
5285 (dst16-24-operand HI)
5287 (define-pmacro (dst32-24-operand xmode)
5288 (begin
5289 (define-anyof-operand
5290 (name (.sym dst32-24-Unprefixed- xmode))
5291 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5292 (attrs (machine 32))
5293 (mode xmode)
5294 (choices
5295 (.sym dst32-Rn-direct-Unprefixed- xmode)
5296 (.sym dst32-An-direct-Unprefixed- xmode)
5297 (.sym dst32-An-indirect-Unprefixed- xmode)
5298 (.sym dst32-24-8-An-relative-Unprefixed- xmode)
5299 (.sym dst32-24-16-An-relative-Unprefixed- xmode)
5300 (.sym dst32-24-24-An-relative-Unprefixed- xmode)
5301 (.sym dst32-24-8-SB-relative-Unprefixed- xmode)
5302 (.sym dst32-24-16-SB-relative-Unprefixed- xmode)
5303 (.sym dst32-24-8-FB-relative-Unprefixed- xmode)
5304 (.sym dst32-24-16-FB-relative-Unprefixed- xmode)
5305 (.sym dst32-24-16-absolute-Unprefixed- xmode)
5306 (.sym dst32-24-24-absolute-Unprefixed- xmode)
5307 )
5308 )
5309 (define-anyof-operand
5310 (name (.sym dst32-24-Prefixed- xmode))
5311 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5312 (attrs (machine 32))
5313 (mode xmode)
5314 (choices
5315 (.sym dst32-Rn-direct-Prefixed- xmode)
5316 (.sym dst32-An-direct-Prefixed- xmode)
5317 (.sym dst32-An-indirect-Prefixed- xmode)
5318 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5319 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5320 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5321 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5322 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5323 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5324 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5325 (.sym dst32-24-16-absolute-Prefixed- xmode)
5326 (.sym dst32-24-24-absolute-Prefixed- xmode)
5327 )
5328 )
5329 (define-anyof-operand
5330 (name (.sym dst32-24-8-Prefixed- xmode))
5331 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5332 (attrs (machine 32))
5333 (mode xmode)
5334 (choices
5335 (.sym dst32-24-8-An-relative-Prefixed- xmode)
5336 (.sym dst32-24-8-SB-relative-Prefixed- xmode)
5337 (.sym dst32-24-8-FB-relative-Prefixed- xmode)
5338 )
5339 )
5340 (define-anyof-operand
5341 (name (.sym dst32-24-16-Prefixed- xmode))
5342 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5343 (attrs (machine 32))
5344 (mode xmode)
5345 (choices
5346 (.sym dst32-24-16-An-relative-Prefixed- xmode)
5347 (.sym dst32-24-16-SB-relative-Prefixed- xmode)
5348 (.sym dst32-24-16-FB-relative-Prefixed- xmode)
5349 (.sym dst32-24-16-absolute-Prefixed- xmode)
5350 )
5351 )
5352 (define-anyof-operand
5353 (name (.sym dst32-24-24-Prefixed- xmode))
5354 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5355 (attrs (machine 32))
5356 (mode xmode)
5357 (choices
5358 (.sym dst32-24-24-An-relative-Prefixed- xmode)
5359 (.sym dst32-24-24-absolute-Prefixed- xmode)
5360 )
5361 )
5362 ; (define-anyof-operand
5363 ; (name (.sym dst32-24-indirect- xmode))
5364 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5365 ; (attrs (machine 32))
5366 ; (mode xmode)
5367 ; (choices
5368 ; (.sym dst32-An-indirect-indirect- xmode)
5369 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5370 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5371 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5372 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5373 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5374 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5375 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5376 ; )
5377 ; )
5378 ; (define-anyof-operand
5379 ; (name (.sym dst32-basic-indirect- xmode))
5380 ; (comment (.str "m32c destination operand of size " xmode " with no additional fields"))
5381 ; (attrs (machine 32))
5382 ; (mode xmode)
5383 ; (choices
5384 ; (.sym dst32-An-indirect-indirect- xmode)
5385 ; )
5386 ; )
5387 ; (define-anyof-operand
5388 ; (name (.sym dst32-24-8-indirect- xmode))
5389 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5390 ; (attrs (machine 32))
5391 ; (mode xmode)
5392 ; (choices
5393 ; (.sym dst32-24-8-An-relative-indirect- xmode)
5394 ; (.sym dst32-24-8-SB-relative-indirect- xmode)
5395 ; (.sym dst32-24-8-FB-relative-indirect- xmode)
5396 ; )
5397 ; )
5398 ; (define-anyof-operand
5399 ; (name (.sym dst32-24-16-indirect- xmode))
5400 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5401 ; (attrs (machine 32))
5402 ; (mode xmode)
5403 ; (choices
5404 ; (.sym dst32-24-16-An-relative-indirect- xmode)
5405 ; (.sym dst32-24-16-SB-relative-indirect- xmode)
5406 ; (.sym dst32-24-16-FB-relative-indirect- xmode)
5407 ; )
5408 ; )
5409 ; (define-anyof-operand
5410 ; (name (.sym dst32-24-24-indirect- xmode))
5411 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 24"))
5412 ; (attrs (machine 32))
5413 ; (mode xmode)
5414 ; (choices
5415 ; (.sym dst32-24-24-An-relative-indirect- xmode)
5416 ; )
5417 ; )
5418 ; (define-anyof-operand
5419 ; (name (.sym dst32-24-absolute-indirect- xmode))
5420 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5421 ; (attrs (machine 32))
5422 ; (mode xmode)
5423 ; (choices
5424 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5425 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5426 ; )
5427 ; )
5428 ; (define-anyof-operand
5429 ; (name (.sym dst32-24-16-absolute-indirect- xmode))
5430 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5431 ; (attrs (machine 32))
5432 ; (mode xmode)
5433 ; (choices
5434 ; (.sym dst32-24-16-absolute-indirect-derived- xmode)
5435 ; )
5436 ; )
5437 ; (define-anyof-operand
5438 ; (name (.sym dst32-24-24-absolute-indirect- xmode))
5439 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5440 ; (attrs (machine 32))
5441 ; (mode xmode)
5442 ; (choices
5443 ; (.sym dst32-24-24-absolute-indirect-derived- xmode)
5444 ; )
5445 ; )
5446 )
5447 )
5449 (dst32-24-operand QI)
5450 (dst32-24-operand HI)
5451 (dst32-24-operand SI)
5453 ;-------------------------------------------------------------
5454 ; Destination operands with possible additional fields at offset 32 bits
5455 ;-------------------------------------------------------------
5457 (define-pmacro (dst16-32-operand xmode)
5458 (begin
5459 (define-anyof-operand
5460 (name (.sym dst16-32- xmode))
5461 (comment (.str "m16c destination operand of size " xmode " with additional fields at offset 32"))
5462 (attrs (machine 16))
5463 (mode xmode)
5464 (choices
5465 (.sym dst16-Rn-direct- xmode)
5466 (.sym dst16-An-direct- xmode)
5467 (.sym dst16-An-indirect- xmode)
5468 (.sym dst16-32-8-An-relative- xmode)
5469 (.sym dst16-32-16-An-relative- xmode)
5470 (.sym dst16-32-8-SB-relative- xmode)
5471 (.sym dst16-32-16-SB-relative- xmode)
5472 (.sym dst16-32-8-FB-relative- xmode)
5473 (.sym dst16-32-16-absolute- xmode)
5474 )
5475 )
5476 )
5477 )
5478 (dst16-32-operand QI)
5479 (dst16-32-operand HI)
5481 ; This macro actually handles operands at offset 32, 40 and 48 bits
5482 (define-pmacro (dst32-32plus-operand offset xmode)
5483 (begin
5484 (define-anyof-operand
5485 (name (.sym dst32- offset -Unprefixed- xmode))
5486 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5487 (attrs (machine 32))
5488 (mode xmode)
5489 (choices
5490 (.sym dst32-Rn-direct-Unprefixed- xmode)
5491 (.sym dst32-An-direct-Unprefixed- xmode)
5492 (.sym dst32-An-indirect-Unprefixed- xmode)
5493 (.sym dst32- offset -8-An-relative-Unprefixed- xmode)
5494 (.sym dst32- offset -16-An-relative-Unprefixed- xmode)
5495 (.sym dst32- offset -24-An-relative-Unprefixed- xmode)
5496 (.sym dst32- offset -8-SB-relative-Unprefixed- xmode)
5497 (.sym dst32- offset -16-SB-relative-Unprefixed- xmode)
5498 (.sym dst32- offset -8-FB-relative-Unprefixed- xmode)
5499 (.sym dst32- offset -16-FB-relative-Unprefixed- xmode)
5500 (.sym dst32- offset -16-absolute-Unprefixed- xmode)
5501 (.sym dst32- offset -24-absolute-Unprefixed- xmode)
5502 )
5503 )
5504 (define-anyof-operand
5505 (name (.sym dst32- offset -Prefixed- xmode))
5506 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5507 (attrs (machine 32))
5508 (mode xmode)
5509 (choices
5510 (.sym dst32-Rn-direct-Prefixed- xmode)
5511 (.sym dst32-An-direct-Prefixed- xmode)
5512 (.sym dst32-An-indirect-Prefixed- xmode)
5513 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5514 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5515 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5516 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5517 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5518 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5519 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5520 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5521 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5522 )
5523 )
5524 ; (define-anyof-operand
5525 ; (name (.sym dst32- offset -indirect- xmode))
5526 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5527 ; (attrs (machine 32))
5528 ; (mode xmode)
5529 ; (choices
5530 ; (.sym dst32-An-indirect-indirect- xmode)
5531 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5532 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5533 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5534 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5535 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5536 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5537 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5538 ; )
5539 ; )
5540 ; (define-anyof-operand
5541 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5542 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5543 ; (attrs (machine 32))
5544 ; (mode xmode)
5545 ; (choices
5546 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5547 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5548 ; )
5549 ; )
5550 )
5551 )
5553 (dst32-32plus-operand 32 QI)
5554 (dst32-32plus-operand 32 HI)
5555 (dst32-32plus-operand 32 SI)
5556 (dst32-32plus-operand 40 QI)
5557 (dst32-32plus-operand 40 HI)
5558 (dst32-32plus-operand 40 SI)
5560 ;-------------------------------------------------------------
5561 ; Destination operands with possible additional fields at offset 48 bits
5562 ;-------------------------------------------------------------
5564 (define-pmacro (dst32-48-operand offset xmode)
5565 (begin
5566 (define-anyof-operand
5567 (name (.sym dst32- offset -Prefixed- xmode))
5568 (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5569 (attrs (machine 32))
5570 (mode xmode)
5571 (choices
5572 (.sym dst32-Rn-direct-Prefixed- xmode)
5573 (.sym dst32-An-direct-Prefixed- xmode)
5574 (.sym dst32-An-indirect-Prefixed- xmode)
5575 (.sym dst32- offset -8-An-relative-Prefixed- xmode)
5576 (.sym dst32- offset -16-An-relative-Prefixed- xmode)
5577 (.sym dst32- offset -24-An-relative-Prefixed- xmode)
5578 (.sym dst32- offset -8-SB-relative-Prefixed- xmode)
5579 (.sym dst32- offset -16-SB-relative-Prefixed- xmode)
5580 (.sym dst32- offset -8-FB-relative-Prefixed- xmode)
5581 (.sym dst32- offset -16-FB-relative-Prefixed- xmode)
5582 (.sym dst32- offset -16-absolute-Prefixed- xmode)
5583 (.sym dst32- offset -24-absolute-Prefixed- xmode)
5584 )
5585 )
5586 ; (define-anyof-operand
5587 ; (name (.sym dst32- offset -indirect- xmode))
5588 ; (comment (.str "m32c destination operand of size " xmode " with additional fields at offset 32"))
5589 ; (attrs (machine 32))
5590 ; (mode xmode)
5591 ; (choices
5592 ; (.sym dst32-An-indirect-indirect- xmode)
5593 ; (.sym dst32- offset -8-An-relative-indirect- xmode)
5594 ; (.sym dst32- offset -16-An-relative-indirect- xmode)
5595 ; (.sym dst32- offset -24-An-relative-indirect- xmode)
5596 ; (.sym dst32- offset -8-SB-relative-indirect- xmode)
5597 ; (.sym dst32- offset -16-SB-relative-indirect- xmode)
5598 ; (.sym dst32- offset -8-FB-relative-indirect- xmode)
5599 ; (.sym dst32- offset -16-FB-relative-indirect- xmode)
5600 ; )
5601 ; )
5602 ; (define-anyof-operand
5603 ; (name (.sym dst32- offset -absolute-indirect- xmode))
5604 ; (comment (.str "m32c destination operand of size " xmode " absolute indirect"))
5605 ; (attrs (machine 32))
5606 ; (mode xmode)
5607 ; (choices
5608 ; (.sym dst32- offset -16-absolute-indirect-derived- xmode)
5609 ; (.sym dst32- offset -24-absolute-indirect-derived- xmode)
5610 ; )
5611 ; )
5612 )
5613 )
5615 (dst32-48-operand 48 QI)
5616 (dst32-48-operand 48 HI)
5617 (dst32-48-operand 48 SI)
5619 ;-------------------------------------------------------------
5620 ; Bit operands for m16c
5621 ;-------------------------------------------------------------
5623 (define-pmacro (bit16-operand offset)
5624 (begin
5625 (define-anyof-operand
5626 (name (.sym bit16- offset))
5627 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5628 (attrs (machine 16))
5629 (mode BI)
5630 (choices
5631 bit16-Rn-direct
5632 bit16-An-direct
5633 bit16-An-indirect
5634 (.sym bit16- offset -8-An-relative)
5635 (.sym bit16- offset -16-An-relative)
5636 (.sym bit16- offset -8-SB-relative)
5637 (.sym bit16- offset -16-SB-relative)
5638 (.sym bit16- offset -8-FB-relative)
5639 (.sym bit16- offset -16-absolute)
5640 )
5641 )
5642 (define-anyof-operand
5643 (name (.sym bit16- offset -basic))
5644 (comment (.str "m16c bit operand with no additional fields"))
5645 (attrs (machine 16))
5646 (mode BI)
5647 (choices
5648 bit16-An-indirect
5649 )
5650 )
5651 (define-anyof-operand
5652 (name (.sym bit16- offset -8))
5653 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5654 (attrs (machine 16))
5655 (mode BI)
5656 (choices
5657 bit16-Rn-direct
5658 bit16-An-direct
5659 (.sym bit16- offset -8-An-relative)
5660 (.sym bit16- offset -8-SB-relative)
5661 (.sym bit16- offset -8-FB-relative)
5662 )
5663 )
5664 (define-anyof-operand
5665 (name (.sym bit16- offset -16))
5666 (comment (.str "m16c bit operand with possible additional fields at offset 24"))
5667 (attrs (machine 16))
5668 (mode BI)
5669 (choices
5670 (.sym bit16- offset -16-An-relative)
5671 (.sym bit16- offset -16-SB-relative)
5672 (.sym bit16- offset -16-absolute)
5673 )
5674 )
5675 )
5676 )
5678 (bit16-operand 16)
5680 ;-------------------------------------------------------------
5681 ; Bit operands for m32c
5682 ;-------------------------------------------------------------
5684 (define-pmacro (bit32-operand offset group)
5685 (begin
5686 (define-anyof-operand
5687 (name (.sym bit32- offset - group))
5688 (comment (.str "m32c bit operand with possible additional fields at offset 24"))
5689 (attrs (machine 32))
5690 (mode BI)
5691 (choices
5692 (.sym bit32-Rn-direct- group)
5693 (.sym bit32-An-direct- group)
5694 (.sym bit32-An-indirect- group)
5695 (.sym bit32- offset -11-An-relative- group)
5696 (.sym bit32- offset -19-An-relative- group)
5697 (.sym bit32- offset -27-An-relative- group)
5698 (.sym bit32- offset -11-SB-relative- group)
5699 (.sym bit32- offset -19-SB-relative- group)
5700 (.sym bit32- offset -11-FB-relative- group)
5701 (.sym bit32- offset -19-FB-relative- group)
5702 (.sym bit32- offset -19-absolute- group)
5703 (.sym bit32- offset -27-absolute- group)
5704 )
5705 )
5706 )
5707 )
5709 (bit32-operand 16 Unprefixed)
5710 (bit32-operand 24 Prefixed)
5712 (define-anyof-operand
5713 (name bit32-basic-Unprefixed)
5714 (comment "m32c bit operand with no additional fields")
5715 (attrs (machine 32))
5716 (mode BI)
5717 (choices
5718 bit32-Rn-direct-Unprefixed
5719 bit32-An-direct-Unprefixed
5720 bit32-An-indirect-Unprefixed
5721 )
5722 )
5724 (define-anyof-operand
5725 (name bit32-16-8-Unprefixed)
5726 (comment "m32c bit operand with 8 bit additional fields")
5727 (attrs (machine 32))
5728 (mode BI)
5729 (choices
5730 bit32-16-11-An-relative-Unprefixed
5731 bit32-16-11-SB-relative-Unprefixed
5732 bit32-16-11-FB-relative-Unprefixed
5733 )
5734 )
5736 (define-anyof-operand
5737 (name bit32-16-16-Unprefixed)
5738 (comment "m32c bit operand with 16 bit additional fields")
5739 (attrs (machine 32))
5740 (mode BI)
5741 (choices
5742 bit32-16-19-An-relative-Unprefixed
5743 bit32-16-19-SB-relative-Unprefixed
5744 bit32-16-19-FB-relative-Unprefixed
5745 bit32-16-19-absolute-Unprefixed
5746 )
5747 )
5749 (define-anyof-operand
5750 (name bit32-16-24-Unprefixed)
5751 (comment "m32c bit operand with 24 bit additional fields")
5752 (attrs (machine 32))
5753 (mode BI)
5754 (choices
5755 bit32-16-27-An-relative-Unprefixed
5756 bit32-16-27-absolute-Unprefixed
5757 )
5758 )
5760 ;-------------------------------------------------------------
5761 ; Operands for short format binary insns
5762 ;-------------------------------------------------------------
5764 (define-anyof-operand
5765 (name src16-2-S)
5766 (comment "m16c source operand of size QI for short format insns")
5767 (attrs (machine 16))
5768 (mode QI)
5769 (choices
5770 src16-2-S-8-SB-relative-QI
5771 src16-2-S-8-FB-relative-QI
5772 src16-2-S-16-absolute-QI
5773 )
5774 )
5776 (define-anyof-operand
5777 (name src32-2-S-QI)
5778 (comment "m32c source operand of size QI for short format insns")
5779 (attrs (machine 32))
5780 (mode QI)
5781 (choices
5782 src32-2-S-8-SB-relative-QI
5783 src32-2-S-8-FB-relative-QI
5784 src32-2-S-16-absolute-QI
5785 )
5786 )
5788 (define-anyof-operand
5789 (name src32-2-S-HI)
5790 (comment "m32c source operand of size QI for short format insns")
5791 (attrs (machine 32))
5792 (mode HI)
5793 (choices
5794 src32-2-S-8-SB-relative-HI
5795 src32-2-S-8-FB-relative-HI
5796 src32-2-S-16-absolute-HI
5797 )
5798 )
5800 (define-anyof-operand
5801 (name Dst16-3-S-8)
5802 (comment "m16c destination operand of size QI for short format insns")
5803 (attrs (machine 16))
5804 (mode QI)
5805 (choices
5806 dst16-3-S-R0l-direct-QI
5807 dst16-3-S-R0h-direct-QI
5808 dst16-3-S-8-8-SB-relative-QI
5809 dst16-3-S-8-8-FB-relative-QI
5810 dst16-3-S-8-16-absolute-QI
5811 )
5812 )
5814 (define-anyof-operand
5815 (name Dst16-3-S-16)
5816 (comment "m16c destination operand of size QI for short format insns")
5817 (attrs (machine 16))
5818 (mode QI)
5819 (choices
5820 dst16-3-S-R0l-direct-QI
5821 dst16-3-S-R0h-direct-QI
5822 dst16-3-S-16-8-SB-relative-QI
5823 dst16-3-S-16-8-FB-relative-QI
5824 dst16-3-S-16-16-absolute-QI
5825 )
5826 )
5828 (define-anyof-operand
5829 (name srcdst16-r0l-r0h-S)
5830 (comment "m16c r0l/r0h operand of size QI for short format insns")
5831 (attrs (machine 16))
5832 (mode SI)
5833 (choices
5834 srcdst16-r0l-r0h-S-derived
5835 )
5836 )
5838 (define-anyof-operand
5839 (name dst32-2-S-basic-QI)
5840 (comment "m32c r0l operand of size QI for short format binary insns")
5841 (attrs (machine 32))
5842 (mode QI)
5843 (choices
5844 dst32-2-S-R0l-direct-QI
5845 )
5846 )
5848 (define-anyof-operand
5849 (name dst32-2-S-basic-HI)
5850 (comment "m32c r0 operand of size HI for short format binary insns")
5851 (attrs (machine 32))
5852 (mode HI)
5853 (choices
5854 dst32-2-S-R0-direct-HI
5855 )
5856 )
5858 (define-pmacro (dst32-2-S-operands xmode)
5859 (begin
5860 (define-anyof-operand
5861 (name (.sym dst32-2-S-8- xmode))
5862 (comment "m32c operand of size " xmode " for short format binary insns")
5863 (attrs (machine 32))
5864 (mode xmode)
5865 (choices
5866 (.sym dst32-2-S-8-SB-relative- xmode)
5867 (.sym dst32-2-S-8-FB-relative- xmode)
5868 )
5869 )
5870 (define-anyof-operand
5871 (name (.sym dst32-2-S-16- xmode))
5872 (comment "m32c operand of size " xmode " for short format binary insns")
5873 (attrs (machine 32))
5874 (mode xmode)
5875 (choices
5876 (.sym dst32-2-S-16-absolute- xmode)
5877 )
5878 )
5879 ; (define-anyof-operand
5880 ; (name (.sym dst32-2-S-8-indirect- xmode))
5881 ; (comment "m32c operand of size " xmode " for short format binary insns")
5882 ; (attrs (machine 32))
5883 ; (mode xmode)
5884 ; (choices
5885 ; (.sym dst32-2-S-8-SB-relative-indirect- xmode)
5886 ; (.sym dst32-2-S-8-FB-relative-indirect- xmode)
5887 ; )
5888 ; )
5889 ; (define-anyof-operand
5890 ; (name (.sym dst32-2-S-absolute-indirect- xmode))
5891 ; (comment "m32c operand of size " xmode " for short format binary insns")
5892 ; (attrs (machine 32))
5893 ; (mode xmode)
5894 ; (choices
5895 ; (.sym dst32-2-S-16-absolute-indirect- xmode)
5896 ; )
5897 ; )
5898 )
5899 )
5901 (dst32-2-S-operands QI)
5902 (dst32-2-S-operands HI)
5903 (dst32-2-S-operands SI)
5905 (define-anyof-operand
5906 (name dst32-an-S)
5907 (comment "m32c An operand for short format binary insns")
5908 (attrs (machine 32))
5909 (mode HI)
5910 (choices
5911 dst32-1-S-A0-direct-HI
5912 dst32-1-S-A1-direct-HI
5913 )
5914 )
5916 (define-anyof-operand
5917 (name bit16-11-S)
5918 (comment "m16c bit operand for short format insns")
5919 (attrs (machine 16))
5920 (mode BI)
5921 (choices
5922 bit16-11-SB-relative-S
5923 )
5924 )
5926 (define-anyof-operand
5927 (name Rn16-push-S-anyof)
5928 (comment "m16c bit operand for short format insns")
5929 (attrs (machine 16))
5930 (mode QI)
5931 (choices
5932 Rn16-push-S-derived
5933 )
5934 )
5936 (define-anyof-operand
5937 (name An16-push-S-anyof)
5938 (comment "m16c bit operand for short format insns")
5939 (attrs (machine 16))
5940 (mode HI)
5941 (choices
5942 An16-push-S-derived
5943 )
5944 )
5946 ;=============================================================
5947 ; Common macros for instruction definitions
5948 ;
5949 (define-pmacro (set-z x)
5950 (sequence ()
5951 (set zbit (zflag x)))
5953 )
5955 (define-pmacro (set-s x)
5956 (sequence ()
5957 (set sbit (nflag x)))
5958 )
5960 (define-pmacro (set-z-and-s x)
5961 (sequence ()
5962 (set-z x)
5963 (set-s x))
5964 )
5965 \f
5966 ;=============================================================
5967 ; Unary insn macros
5968 ;-------------------------------------------------------------
5970 (define-pmacro (unary-insn-defn-g mach group mode wstr op encoding sem opg)
5971 (dni (.sym op mach wstr - group)
5972 (.str op wstr opg " dst" mach "-" group "-" mode)
5973 ((machine mach) RL_1ADDR)
5974 (.str op wstr opg " ${dst" mach "-" group "-" mode "}")
5975 encoding
5976 (sem mode (.sym dst mach - group - mode))
5977 ())
5978 )
5980 (define-pmacro (unary-insn-defn mach group mode wstr op encoding sem)
5981 (unary-insn-defn-g mach group mode wstr op encoding sem "")
5982 )
5985 (define-pmacro (unary16-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
5986 (unary-insn-defn-g 16 16 mode wstr op
5987 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16- mode))
5988 sem opg)
5989 )
5990 (define-pmacro (unary16-defn mode wstr wbit op opc1 opc2 opc3 sem)
5991 (unary-16-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
5992 )
5994 (define-pmacro (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem opg)
5995 (begin
5996 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
5997 ; define the absolute-indirect insns first in order to prevent them from being selected
5998 ; when the mode is register-indirect
5999 ; (unary-insn-defn 32 24-absolute-indirect mode wstr op
6000 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
6001 ; sem)
6002 (unary-insn-defn-g 32 16-Unprefixed mode wstr op
6003 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3))
6004 sem opg)
6005 ; (unary-insn-defn 32 24-indirect mode wstr op
6006 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (.sym dst32-24-indirect- mode) (f-18-2 opc2) (f-20-4 opc3))
6007 ; sem)
6008 )
6009 )
6010 (define-pmacro (unary32-defn mode wstr wbit op opc1 opc2 opc3 sem)
6011 (unary32-defn-g mode wstr wbit op opc1 opc2 opc3 sem "")
6012 )
6014 (define-pmacro (unary-insn-mach-g mach op opc1 opc2 opc3 sem opg)
6015 (begin
6016 (.apply (.sym unary mach -defn-g) (QI .b 0 op opc1 opc2 opc3 sem opg))
6017 (.apply (.sym unary mach -defn-g) (HI .w 1 op opc1 opc2 opc3 sem opg))
6018 )
6019 )
6020 (define-pmacro (unary-insn-mach mach op opc1 opc2 opc3 sem)
6021 (unary-insn-mach-g mach op opc1 opc2 opc3 sem "")
6022 )
6024 (define-pmacro (unary-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6025 (begin
6026 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "")
6027 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "")
6028 )
6029 )
6031 (define-pmacro (unary-insn-g op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6032 (begin
6033 (unary-insn-mach-g 16 op opc16-1 opc16-2 opc16-3 sem "$G")
6034 (unary-insn-mach-g 32 op opc32-1 opc32-2 opc32-3 sem "$G")
6035 )
6036 )
6038 ;-------------------------------------------------------------
6039 ; Sign/zero extension macros
6040 ;-------------------------------------------------------------
6042 (define-pmacro (ext-insn-defn mach group smode dmode wstr op encoding sem)
6043 (dni (.sym op mach wstr - group)
6044 (.str op wstr " dst" mach "-" group "-" smode)
6045 ((machine mach))
6046 (.str op wstr " ${dst" mach "-" group "-" smode "}")
6047 encoding
6048 (sem smode dmode (.sym dst mach - group - smode) (.sym dst mach - group - smode))
6049 ())
6050 )
6052 (define-pmacro (ext16-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
6053 (ext-insn-defn 16 16-Ext smode dmode wstr op
6054 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-Ext- smode))
6055 sem)
6056 )
6058 (define-pmacro (ext32-defn smode dmode wstr wbit op opc1 opc2 opc3 sem)
6059 (ext-insn-defn 32 16-ExtUnprefixed smode dmode wstr op
6060 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst32-16-ExtUnprefixed- smode))
6061 sem)
6062 )
6064 (define-pmacro (ext32-binary-insn src-group dst-group op wstr encoding sem)
6065 (dni (.sym op 32 wstr - src-group - dst-group)
6066 (.str op 32 wstr " src32-" src-group "-QI,dst32-" dst-group "-HI")
6067 ((machine 32))
6068 (.str op wstr " ${src32-" src-group "-QI},${dst32-" dst-group "-HI}")
6069 encoding
6070 (sem QI HI (.sym src32- src-group -QI) (.sym dst32 - dst-group -HI))
6071 ())
6072 )
6074 (define-pmacro (ext32-binary-defn op wstr opc1 opc2 sem)
6075 (begin
6076 (ext32-binary-insn basic-ExtPrefixed 24-Prefixed op wstr
6077 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-basic-ExtPrefixed-QI dst32-24-Prefixed-HI (f-20-4 opc2))
6078 sem)
6079 (ext32-binary-insn 24-24-Prefixed 48-Prefixed op wstr
6080 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-24-Prefixed-QI dst32-48-Prefixed-HI (f-20-4 opc2))
6081 sem)
6082 (ext32-binary-insn 24-16-Prefixed 40-Prefixed op wstr
6083 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-16-Prefixed-QI dst32-40-Prefixed-HI (f-20-4 opc2))
6084 sem)
6085 (ext32-binary-insn 24-8-Prefixed 32-Prefixed op wstr
6086 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 0) src32-24-8-Prefixed-QI dst32-32-Prefixed-HI (f-20-4 opc2))
6087 sem)
6088 )
6089 )
6091 ;=============================================================
6092 ; Binary Arithmetic macros
6093 ;
6094 ;-------------------------------------------------------------
6095 ;<arith>.size:S src2,r0[l] -- for m32c
6096 ;-------------------------------------------------------------
6098 (define-pmacro (binary-arith32-S-src2 op xmode wstr wbit opc1 opc2 sem)
6099 (dni (.sym op 32 wstr .S-src2-r0- xmode)
6100 (.str op 32 wstr ":S src2,r0[l]")
6101 ((machine 32))
6102 (.str op wstr"$S ${src32-2-S-" xmode "},${Dst32R0" xmode "-S}")
6103 (+ opc1 opc2 (.sym src32-2-S- xmode) (f-7-1 wbit))
6104 (sem xmode (.sym src32-2-S- xmode) (.sym Dst32R0 xmode -S))
6105 ())
6106 )
6108 ;-------------------------------------------------------------
6109 ;<arith>.b:S src2,r0l/r0h -- for m16c
6110 ;-------------------------------------------------------------
6112 (define-pmacro (binary-arith16-b-S-src2 op opc1 opc2 sem)
6113 (begin
6114 (dni (.sym op 16 .b.S-src2)
6115 (.str op ".b:S src2,r0[lh]")
6116 ((machine 16))
6117 (.str op ".b$S ${src16-2-S},${Dst16RnQI-S}")
6118 (+ opc1 opc2 Dst16RnQI-S src16-2-S)
6119 (sem QI src16-2-S Dst16RnQI-S)
6120 ())
6121 (dni (.sym op 16 .b.S-r0l-r0h)
6122 (.str op ".b:S r0l/r0h")
6123 ((machine 16))
6124 (.str op ".b$S ${srcdst16-r0l-r0h-S}")
6125 (+ opc1 opc2 srcdst16-r0l-r0h-S)
6126 (if (eq srcdst16-r0l-r0h-S 0)
6127 (sem QI R0h R0l)
6128 (sem QI R0l R0h))
6129 ())
6130 )
6131 )
6133 ;-------------------------------------------------------------
6134 ;<arith>.b:S #imm8,dst3 -- for m16c
6135 ;-------------------------------------------------------------
6137 (define-pmacro (binary-arith16-b-S-imm8-dst3 op sz opc1 opc2 sem)
6138 (dni (.sym op 16 .b.S-imm8-dst3)
6139 (.str op sz ":S imm8,dst3")
6140 ((machine 16))
6141 (.str op sz "$S #${Imm-8-QI},${Dst16-3-S-16}")
6142 (+ opc1 opc2 Dst16-3-S-16 Imm-8-QI)
6143 (sem QI Imm-8-QI Dst16-3-S-16)
6144 ())
6145 )
6147 ;-------------------------------------------------------------
6148 ;<arith>.size:Q #imm4,sp -- for m16c
6149 ;-------------------------------------------------------------
6151 (define-pmacro (binary-arith16-Q-sp op opc1 opc2 opc3 sem)
6152 (dni (.sym op 16 -wQ-sp)
6153 (.str op ".w:q #imm4,sp")
6154 ((machine 16))
6155 (.str op ".w$Q #${Imm-12-s4},sp")
6156 (+ opc1 opc2 opc3 Imm-12-s4)
6157 (sem QI Imm-12-s4 sp)
6158 ())
6159 )
6161 ;-------------------------------------------------------------
6162 ;<arith>.size:G #imm,sp -- for m16c
6163 ;-------------------------------------------------------------
6165 (define-pmacro (binary-arith16-G-sp-defn mode wstr wbit op opc1 opc2 opc3 opc4 sem)
6166 (dni (.sym op 16 wstr - G-sp)
6167 (.str op wstr " imm-sp " mode)
6168 ((machine 16))
6169 (.str op wstr "$G #${Imm-16-" mode "},sp")
6170 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16- mode))
6171 (sem mode (.sym Imm-16- mode) sp)
6172 ())
6173 )
6175 (define-pmacro (binary-arith16-G-sp op opc1 opc2 opc3 opc4 sem)
6176 (begin
6177 (binary-arith16-G-sp-defn QI .b 0 op opc1 opc2 opc3 opc4 sem)
6178 (binary-arith16-G-sp-defn HI .w 1 op opc1 opc2 opc3 opc4 sem)
6179 )
6180 )
6182 ;-------------------------------------------------------------
6183 ;<arith>.size:G #imm,dst -- for m16c and m32c
6184 ;-------------------------------------------------------------
6186 (define-pmacro (binary-arith-imm-dst-defn mach src dstgroup dmode wstr op suffix encoding sem)
6187 (dni (.sym op mach wstr - imm-G - dstgroup)
6188 (.str op wstr " " mach "-imm-G-" dstgroup "-" dmode)
6189 ((machine mach) RL_1ADDR)
6190 (.str op wstr "$"suffix " #${" src "},${dst" mach "-" dstgroup "-" dmode "}")
6191 encoding
6192 (sem dmode src (.sym dst mach - dstgroup - dmode))
6193 ())
6194 )
6196 ; m16c variants
6197 (define-pmacro (binary-arith16-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6198 (begin
6199 (binary-arith-imm-dst-defn 16 (.sym Imm-32- smode) 16-16 dmode wstr op suffix
6200 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- dmode) (.sym Imm-32- smode))
6201 sem)
6202 (binary-arith-imm-dst-defn 16 (.sym Imm-24- smode) 16-8 dmode wstr op suffix
6203 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- dmode) (.sym Imm-24- smode))
6204 sem)
6205 (binary-arith-imm-dst-defn 16 (.sym Imm-16- smode) basic dmode wstr op suffix
6206 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- dmode) (.sym Imm-16- smode))
6207 sem)
6208 )
6209 )
6211 ; m32c Unprefixed variants
6212 (define-pmacro (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6213 (begin
6214 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 16-24-Unprefixed dmode wstr op suffix
6215 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-24-Unprefixed- dmode) (.sym Imm-40- smode))
6216 sem)
6217 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 16-16-Unprefixed dmode wstr op suffix
6218 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-16-Unprefixed- dmode) (.sym Imm-32- smode))
6219 sem)
6220 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) 16-8-Unprefixed dmode wstr op suffix
6221 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-16-8-Unprefixed- dmode) (.sym Imm-24- smode))
6222 sem)
6223 (binary-arith-imm-dst-defn 32 (.sym Imm-16- smode) basic-Unprefixed dmode wstr op suffix
6224 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3) (.sym dst32-basic-Unprefixed- dmode) (.sym Imm-16- smode))
6225 sem)
6226 )
6227 )
6229 ; m32c Prefixed variants
6230 (define-pmacro (binary-arith32-imm-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6231 (begin
6232 (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-Prefixed dmode wstr op suffix
6233 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-Prefixed- dmode) (.sym Imm-48- smode))
6234 sem)
6235 (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-Prefixed dmode wstr op suffix
6236 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-Prefixed- dmode) (.sym Imm-40- smode))
6237 sem)
6238 (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-Prefixed dmode wstr op suffix
6239 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-Prefixed- dmode) (.sym Imm-32- smode))
6240 sem)
6241 (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-Prefixed dmode wstr op suffix
6242 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-Prefixed- dmode) (.sym Imm-24- smode))
6243 sem)
6244 )
6245 )
6247 ; All m32c variants
6248 (define-pmacro (binary-arith32-imm-dst-defn smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6249 (begin
6250 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6251 ; define the absolute-indirect insns first in order to prevent them from being selected
6252 ; when the mode is register-indirect
6253 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-absolute-indirect dmode wstr op suffix
6254 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-absolute-indirect- dmode) (.sym Imm-48- smode))
6255 ; sem)
6256 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-absolute-indirect dmode wstr op suffix
6257 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-absolute-indirect- dmode) (.sym Imm-40- smode))
6258 ; sem)
6259 ; Unprefixed modes next
6260 (binary-arith32-imm-dst-Unprefixed smode dmode wstr wbit op suffix opc1 opc2 opc3 sem)
6262 ; Remaining indirect modes
6263 ; (binary-arith-imm-dst-defn 32 (.sym Imm-24- smode) basic-indirect dmode wstr op suffix
6264 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-basic-indirect- dmode) (.sym Imm-24- smode))
6265 ; sem)
6266 ; (binary-arith-imm-dst-defn 32 (.sym Imm-48- smode) 24-24-indirect dmode wstr op suffix
6267 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-24-indirect- dmode) (.sym Imm-48- smode))
6268 ; sem)
6269 ; (binary-arith-imm-dst-defn 32 (.sym Imm-40- smode) 24-16-indirect dmode wstr op suffix
6270 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-16-indirect- dmode) (.sym Imm-40- smode))
6271 ; sem)
6272 ; (binary-arith-imm-dst-defn 32 (.sym Imm-32- smode) 24-8-indirect dmode wstr op suffix
6273 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3) (.sym dst32-24-8-indirect- dmode) (.sym Imm-32- smode))
6274 ; sem)
6275 )
6276 )
6278 (define-pmacro (binary-arith-imm-dst-mach mach op suffix opc1 opc2 opc3 sem)
6279 (begin
6280 (.apply (.sym binary-arith mach -imm-dst-defn) (QI QI .b 0 op suffix opc1 opc2 opc3 sem))
6281 (.apply (.sym binary-arith mach -imm-dst-defn) (HI HI .w 1 op suffix opc1 opc2 opc3 sem))
6282 )
6283 )
6285 (define-pmacro (binary-arith-imm-dst op suffix opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6286 (begin
6287 (binary-arith-imm-dst-mach 16 op suffix opc16-1 opc16-2 opc16-3 sem)
6288 (binary-arith-imm-dst-mach 32 op suffix opc32-1 opc32-2 opc32-3 sem)
6289 )
6290 )
6292 ;-------------------------------------------------------------
6293 ;<arith>.size:Q #imm4,dst -- for m16c and m32c
6294 ;-------------------------------------------------------------
6296 (define-pmacro (binary-arith-imm4-dst-defn mach src dstgroup mode wstr op encoding sem)
6297 (dni (.sym op mach wstr - imm4-Q - dstgroup)
6298 (.str op wstr " " mach "-imm4-Q-" dstgroup "-" mode)
6299 ((machine mach) RL_1ADDR)
6300 (.str op wstr "$Q #${" src "},${dst" mach "-" dstgroup "-" mode "}")
6301 encoding
6302 (sem mode src (.sym dst mach - dstgroup - mode))
6303 ())
6304 )
6306 ; m16c variants
6307 (define-pmacro (binary-arith16-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6308 (binary-arith-imm4-dst-defn 16 Imm-8-s4 16 mode wstr op
6309 (+ opc1 opc2 (f-7-1 wbit2) Imm-8-s4 (.sym dst16-16- mode))
6310 sem)
6311 )
6313 (define-pmacro (binary-arith16-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6314 (binary-arith-imm4-dst-defn 16 Imm-sh-8-s4 16 mode wstr op
6315 (+ opc1 opc2 (f-7-1 wbit2) Imm-sh-8-s4 (.sym dst16-16- mode))
6316 sem)
6317 )
6319 ; m32c variants
6320 (define-pmacro (binary-arith32-imm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6321 (begin
6322 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6323 ; define the absolute-indirect insns first in order to prevent them from being selected
6324 ; when the mode is register-indirect
6325 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-absolute-indirect mode wstr op
6326 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6327 ; sem)
6328 (binary-arith-imm4-dst-defn 32 Imm-12-s4 16-Unprefixed mode wstr op
6329 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-12-s4)
6330 sem)
6331 ; (binary-arith-imm4-dst-defn 32 Imm-20-s4 24-indirect mode wstr op
6332 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-20-s4)
6333 ; sem)
6334 )
6335 )
6337 (define-pmacro (binary-arith32-shimm4-dst-defn mode wstr wbit1 wbit2 op opc1 opc2 sem)
6338 (begin
6339 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6340 ; define the absolute-indirect insns first in order to prevent them from being selected
6341 ; when the mode is register-indirect
6342 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-absolute-indirect mode wstr op
6343 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-absolute-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6344 ; sem)
6345 (binary-arith-imm4-dst-defn 32 Imm-sh-12-s4 16-Unprefixed mode wstr op
6346 (+ (f-0-3 opc1) (f-3-1 wbit1) (f-7-1 wbit2) (.sym dst32-16-Unprefixed- mode) (f-10-2 opc2) Imm-sh-12-s4)
6347 sem)
6348 ; (binary-arith-imm4-dst-defn 32 Imm-sh-20-s4 24-indirect mode wstr op
6349 ; (+ (f-0-4 0) (f-4-4 9) (f-8-3 opc1) (f-11-1 wbit1) (f-15-1 wbit2) (.sym dst32-24-indirect- mode) (f-18-2 opc2) Imm-sh-20-s4)
6350 ; sem)
6351 )
6352 )
6354 (define-pmacro (binary-arith-imm4-dst-mach mach op opc1 opc2 sem)
6355 (begin
6356 (.apply (.sym binary-arith mach -imm4-dst-defn) (QI .b 0 0 op opc1 opc2 sem))
6357 (.apply (.sym binary-arith mach -imm4-dst-defn) (HI .w 0 1 op opc1 opc2 sem))
6358 )
6359 )
6361 (define-pmacro (binary-arith-imm4-dst op opc16-1 opc16-2 opc32-1 opc32-2 sem)
6362 (begin
6363 (binary-arith-imm4-dst-mach 16 op opc16-1 opc16-2 sem)
6364 (binary-arith-imm4-dst-mach 32 op opc32-1 opc32-2 sem)
6365 )
6366 )
6368 ;-------------------------------------------------------------
6369 ;<arith>.size:G src,dst -- for m16c and m32c
6370 ;-------------------------------------------------------------
6372 (define-pmacro (binary-arith-src-dst-defn mach srcgroup dstgroup smode dmode wstr op suffix encoding sem)
6373 (dni (.sym op mach wstr - srcgroup - dstgroup)
6374 (.str op wstr " dst" mach "-" srcgroup "-" dstgroup "-" dmode)
6375 ((machine mach) RL_2ADDR)
6376 (.str op wstr "$" suffix " ${src" mach "-" srcgroup "-" smode "},${dst" mach "-" dstgroup "-" dmode "}")
6377 encoding
6378 (sem dmode (.sym src mach - srcgroup - smode) (.sym dst mach - dstgroup - dmode))
6379 ())
6380 )
6382 ; m16c variants
6383 (define-pmacro (binary-arith16-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6384 (begin
6385 (binary-arith-src-dst-defn 16 basic 16 smode dmode wstr op suffix
6386 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-basic- smode) (.sym dst16-16- dmode))
6387 sem)
6388 (binary-arith-src-dst-defn 16 16-16 32 smode dmode wstr op suffix
6389 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-16- smode) (.sym dst16-32- dmode))
6390 sem)
6391 (binary-arith-src-dst-defn 16 16-8 24 smode dmode wstr op suffix
6392 (+ opc1 opc2 (f-7-1 wbit) (.sym src16-16-8- smode) (.sym dst16-24- dmode))
6393 sem)
6394 )
6395 )
6397 ; m32c Prefixed variants
6398 (define-pmacro (binary-arith32-src-dst-Prefixed smode dmode wstr wbit op suffix opc1 opc2 sem)
6399 (begin
6400 (binary-arith-src-dst-defn 32 basic-Prefixed 24-Prefixed smode dmode wstr op suffix
6401 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-basic-Prefixed- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6402 sem)
6403 (binary-arith-src-dst-defn 32 24-24-Prefixed 48-Prefixed smode dmode wstr op suffix
6404 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6405 sem)
6406 (binary-arith-src-dst-defn 32 24-16-Prefixed 40-Prefixed smode dmode wstr op suffix
6407 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6408 sem)
6409 (binary-arith-src-dst-defn 32 24-8-Prefixed 32-Prefixed smode dmode wstr op suffix
6410 (+ (f-0-4 0) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit) (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6411 sem)
6412 )
6413 )
6415 ; all m32c variants
6416 (define-pmacro (binary-arith32-src-dst-defn smode dmode wstr wbit op suffix opc1 opc2 sem)
6417 (begin
6418 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
6419 ; define the absolute-indirect insns first in order to prevent them from being selected
6420 ; when the mode is register-indirect
6421 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-absolute-indirect smode dmode wstr op suffix
6422 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6423 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6424 ; sem)
6425 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-absolute-indirect smode dmode wstr op suffix
6426 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6427 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6428 ; sem)
6429 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-Prefixed smode dmode wstr op suffix
6430 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6431 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6432 ; sem)
6433 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-Prefixed smode dmode wstr op suffix
6434 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6435 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6436 ; sem)
6437 ; (binary-arith-src-dst-defn 32 24-24-absolute-indirect 48-indirect smode dmode wstr op suffix
6438 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6439 ; (.sym src32-24-24-absolute-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6440 ; sem)
6441 ; (binary-arith-src-dst-defn 32 24-16-absolute-indirect 40-indirect smode dmode wstr op suffix
6442 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6443 ; (.sym src32-24-16-absolute-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6444 ; sem)
6445 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-absolute-indirect smode dmode wstr op suffix
6446 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6447 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6448 ; sem)
6449 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-absolute-indirect smode dmode wstr op suffix
6450 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6451 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6452 ; sem)
6453 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-absolute-indirect smode dmode wstr op suffix
6454 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6455 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6456 ; sem)
6457 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-absolute-indirect smode dmode wstr op suffix
6458 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6459 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6460 ; sem)
6461 ; (binary-arith-src-dst-defn 32 basic-indirect 24-absolute-indirect smode dmode wstr op suffix
6462 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6463 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-absolute-indirect- dmode) (f-20-4 opc2))
6464 ; sem)
6465 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-absolute-indirect smode dmode wstr op suffix
6466 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6467 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-absolute-indirect- dmode) (f-20-4 opc2))
6468 ; sem)
6469 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-absolute-indirect smode dmode wstr op suffix
6470 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6471 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-absolute-indirect- dmode) (f-20-4 opc2))
6472 ; sem)
6473 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-absolute-indirect smode dmode wstr op suffix
6474 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6475 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-absolute-indirect- dmode) (f-20-4 opc2))
6476 ; sem)
6477 (binary-arith-src-dst-defn 32 basic-Unprefixed 16-Unprefixed smode dmode wstr op suffix
6478 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-basic-Unprefixed- smode) (.sym dst32-16-Unprefixed- dmode) (f-12-4 opc2))
6479 sem)
6480 (binary-arith-src-dst-defn 32 16-24-Unprefixed 40-Unprefixed smode dmode wstr op suffix
6481 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-24-Unprefixed- smode) (.sym dst32-40-Unprefixed- dmode) (f-12-4 opc2))
6482 sem)
6483 (binary-arith-src-dst-defn 32 16-16-Unprefixed 32-Unprefixed smode dmode wstr op suffix
6484 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-16-Unprefixed- smode) (.sym dst32-32-Unprefixed- dmode) (f-12-4 opc2))
6485 sem)
6486 (binary-arith-src-dst-defn 32 16-8-Unprefixed 24-Unprefixed smode dmode wstr op suffix
6487 (+ (f-0-1 opc1) (f-7-1 wbit) (.sym src32-16-8-Unprefixed- smode) (.sym dst32-24-Unprefixed- dmode) (f-12-4 opc2))
6488 sem)
6489 ; (binary-arith-src-dst-defn 32 basic-indirect 24-Prefixed smode dmode wstr op suffix
6490 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6491 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-Prefixed- dmode) (f-20-4 opc2))
6492 ; sem)
6493 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-Prefixed smode dmode wstr op suffix
6494 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6495 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-Prefixed- dmode) (f-20-4 opc2))
6496 ; sem)
6497 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-Prefixed smode dmode wstr op suffix
6498 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6499 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-Prefixed- dmode) (f-20-4 opc2))
6500 ; sem)
6501 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-Prefixed smode dmode wstr op suffix
6502 ; (+ (f-0-4 4) (f-4-4 1) (f-8-1 opc1) (f-15-1 wbit)
6503 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-Prefixed- dmode) (f-20-4 opc2))
6504 ; sem)
6505 ; (binary-arith-src-dst-defn 32 basic-Prefixed 24-indirect smode dmode wstr op suffix
6506 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6507 ; (.sym src32-basic-Prefixed- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6508 ; sem)
6509 ; (binary-arith-src-dst-defn 32 24-24-Prefixed 48-indirect smode dmode wstr op suffix
6510 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6511 ; (.sym src32-24-24-Prefixed- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6512 ; sem)
6513 ; (binary-arith-src-dst-defn 32 24-16-Prefixed 40-indirect smode dmode wstr op suffix
6514 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6515 ; (.sym src32-24-16-Prefixed- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6516 ; sem)
6517 ; (binary-arith-src-dst-defn 32 24-8-Prefixed 32-indirect smode dmode wstr op suffix
6518 ; (+ (f-0-4 0) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6519 ; (.sym src32-24-8-Prefixed- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6520 ; sem)
6521 ; (binary-arith-src-dst-defn 32 basic-indirect 24-indirect smode dmode wstr op suffix
6522 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6523 ; (.sym src32-basic-indirect- smode) (.sym dst32-24-indirect- dmode) (f-20-4 opc2))
6524 ; sem)
6525 ; (binary-arith-src-dst-defn 32 24-24-indirect 48-indirect smode dmode wstr op suffix
6526 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6527 ; (.sym src32-24-24-indirect- smode) (.sym dst32-48-indirect- dmode) (f-20-4 opc2))
6528 ; sem)
6529 ; (binary-arith-src-dst-defn 32 24-16-indirect 40-indirect smode dmode wstr op suffix
6530 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6531 ; (.sym src32-24-16-indirect- smode) (.sym dst32-40-indirect- dmode) (f-20-4 opc2))
6532 ; sem)
6533 ; (binary-arith-src-dst-defn 32 24-8-indirect 32-indirect smode dmode wstr op suffix
6534 ; (+ (f-0-4 4) (f-4-4 9) (f-8-1 opc1) (f-15-1 wbit)
6535 ; (.sym src32-24-8-indirect- smode) (.sym dst32-32-indirect- dmode) (f-20-4 opc2))
6536 ; sem)
6537 )
6538 )
6540 (define-pmacro (binary-arith-src-dst-mach mach op suffix opc1 opc2 sem)
6541 (begin
6542 (.apply (.sym binary-arith mach -src-dst-defn) (QI QI .b 0 op suffix opc1 opc2 sem))
6543 (.apply (.sym binary-arith mach -src-dst-defn) (HI HI .w 1 op suffix opc1 opc2 sem))
6544 )
6545 )
6547 (define-pmacro (binary-arith-src-dst op suffix opc16-1 opc16-2 opc32-1 opc32-2 sem)
6548 (begin
6549 (binary-arith-src-dst-mach 16 op suffix opc16-1 opc16-2 sem)
6550 (binary-arith-src-dst-mach 32 op suffix opc32-1 opc32-2 sem)
6551 )
6552 )
6554 ;-------------------------------------------------------------
6555 ;<arith>.size:S #imm,dst -- for m32c
6556 ;-------------------------------------------------------------
6558 (define-pmacro (binary-arith32-s-imm-dst-defn src dstgroup mode wstr op encoding sem)
6559 (dni (.sym op 32 wstr - imm-S - dstgroup)
6560 (.str op wstr " 32-imm-S-" dstgroup "-" mode)
6561 ((machine 32))
6562 (.str op wstr "$S #${" src "},${dst32-" dstgroup "-" mode "}")
6563 encoding
6564 (sem mode src (.sym dst32- dstgroup - mode))
6565 ())
6566 )
6568 (define-pmacro (binary-arith32-z-imm-dst-defn src dstgroup mode wstr op encoding sem)
6569 (dni (.sym op 32 wstr - imm-Z - dstgroup)
6570 (.str op wstr " 32-imm-Z-" dstgroup "-" mode)
6571 ((machine 32))
6572 (.str op wstr "$Z #0,${dst32-" dstgroup "-" mode "}")
6573 encoding
6574 (sem mode (const 0) (.sym dst32- dstgroup - mode))
6575 ())
6576 )
6578 (define-pmacro (binary-arith32-s-imm-dst mode wstr wbit op opc1 opc2 sem)
6579 (begin
6580 ; (binary-arith32-s-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6581 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6582 ; sem)
6583 (binary-arith32-s-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6584 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-8- mode))
6585 sem)
6586 (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6587 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-24- mode))
6588 sem)
6589 (binary-arith32-s-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6590 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit) (.sym Imm-16- mode))
6591 sem)
6592 ; (binary-arith32-s-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6593 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6594 ; sem)
6595 )
6596 )
6598 (define-pmacro (binary-arith32-z-imm-dst mode wstr wbit op opc1 opc2 sem)
6599 (begin
6600 ; (binary-arith32-z-imm-dst-defn (.sym Imm-32- mode) 2-S-absolute-indirect mode wstr op
6601 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-absolute-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-32- mode))
6602 ; sem)
6603 (binary-arith32-z-imm-dst-defn (.sym Imm-8- mode) 2-S-basic mode wstr op
6604 (+ (f-0-2 opc1) (.sym dst32-2-S-basic- mode) (f-4-3 opc2) (f-7-1 wbit))
6605 sem)
6606 (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-16 mode wstr op
6607 (+ (f-0-2 opc1) (.sym dst32-2-S-16- mode) (f-4-3 opc2) (f-7-1 wbit))
6608 sem)
6609 (binary-arith32-z-imm-dst-defn (.sym Imm-16- mode) 2-S-8 mode wstr op
6610 (+ (f-0-2 opc1) (.sym dst32-2-S-8- mode) (f-4-3 opc2) (f-7-1 wbit))
6611 sem)
6612 ; (binary-arith32-z-imm-dst-defn (.sym Imm-24- mode) 2-S-8-indirect mode wstr op
6613 ; (+ (f-0-4 0) (f-4-4 9) (f-8-2 opc1) (.sym dst32-2-S-8-indirect- mode) (f-12-3 opc2) (f-15-1 wbit) (.sym Imm-24- mode))
6614 ; sem)
6615 )
6616 )
6618 ;-------------------------------------------------------------
6619 ;<arith>.L:S #imm1,An -- for m32c
6620 ;-------------------------------------------------------------
6622 (define-pmacro (binary-arith32-l-s-imm1-an op opc1 opc2 sem)
6623 (begin
6624 (dni (.sym op 32.l-s-imm1-S-an)
6625 (.str op ".l 32-imm1-S-an")
6626 ((machine 32))
6627 (.str op ".l$S #${Imm1-S},${dst32-an-S}")
6628 (+ opc1 Imm1-S opc2 dst32-an-S)
6629 (sem SI Imm1-S dst32-an-S)
6630 ())
6631 )
6632 )
6634 ;-------------------------------------------------------------
6635 ;<arith>.L:Q #imm3,sp -- for m32c
6636 ;-------------------------------------------------------------
6638 (define-pmacro (binary-arith32-l-q-imm3-sp op opc1 opc2 sem)
6639 (begin
6640 (dni (.sym op 32.l-imm3-Q)
6641 (.str op ".l 32-imm3-Q")
6642 ((machine 32))
6643 (.str op ".l$Q #${Imm3-S},sp")
6644 (+ opc1 Imm3-S opc2)
6645 (sem SI Imm3-S sp)
6646 ())
6647 )
6648 )
6650 ;-------------------------------------------------------------
6651 ;<arith>.L:S #imm8,sp -- for m32c
6652 ;-------------------------------------------------------------
6654 (define-pmacro (binary-arith32-l-s-imm8-sp op opc1 opc2 opc3 opc4 sem)
6655 (begin
6656 (dni (.sym op 32.l-imm8-S)
6657 (.str op ".l 32-imm8-S")
6658 ((machine 32))
6659 (.str op ".l$S #${Imm-16-QI},sp")
6660 (+ opc1 opc2 opc3 opc4 Imm-16-QI)
6661 (sem SI Imm-16-QI sp)
6662 ())
6663 )
6664 )
6666 ;-------------------------------------------------------------
6667 ;<arith>.L:G #imm16,sp -- for m32c
6668 ;-------------------------------------------------------------
6670 (define-pmacro (binary-arith32-l-g-imm16-sp op opc1 opc2 opc3 opc4 sem)
6671 (begin
6672 (dni (.sym op 32.l-imm16-G)
6673 (.str op ".l 32-imm16-G")
6674 ((machine 32))
6675 (.str op ".l$G #${Imm-16-HI},sp")
6676 (+ opc1 opc2 opc3 opc4 Imm-16-HI)
6677 (sem SI Imm-16-HI sp)
6678 ())
6679 )
6680 )
6682 ;-------------------------------------------------------------
6683 ;<arith>jnz.size #imm4,dst,label -- for m16c and m32c
6684 ;-------------------------------------------------------------
6686 (define-pmacro (arith-jnz-imm4-dst-defn mach src dstgroup label mode wstr op encoding sem)
6687 (dni (.sym op mach wstr - imm4 - dstgroup)
6688 (.str op wstr " " mach "-imm4-" dstgroup "-" label "-" mode)
6689 (RL_JUMP RELAXABLE (machine mach))
6690 (.str op wstr " #${" src "},${dst" mach "-" dstgroup "-" mode "},${" label "}")
6691 encoding
6692 (sem mode src (.sym dst mach - dstgroup - mode) label)
6693 ())
6694 )
6696 ; m16c variants
6697 (define-pmacro (arith-jnz16-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
6698 (begin
6699 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) basic Lab-16-8 mode wstr op
6700 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-basic- mode) Lab-16-8)
6701 sem)
6702 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-16 Lab-32-8 mode wstr op
6703 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-16- mode) Lab-32-8)
6704 sem)
6705 (arith-jnz-imm4-dst-defn 16 (.sym Imm-8- i4n) 16-8 Lab-24-8 mode wstr op
6706 (+ opc1 opc2 (f-7-1 wbit) (.sym Imm-8- i4n) (.sym dst16-16-8- mode) Lab-24-8)
6707 sem)
6708 )
6709 )
6711 ; m32c variants
6712 (define-pmacro (arith-jnz32-imm4-dst-defn mode wstr wbit op i4n opc1 opc2 sem)
6713 (begin
6714 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) basic-Unprefixed Lab-16-8 mode wstr op
6715 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-16-8)
6716 sem)
6717 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-24-Unprefixed Lab-40-8 mode wstr op
6718 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-40-8)
6719 sem)
6720 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-16-Unprefixed Lab-32-8 mode wstr op
6721 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-32-8)
6722 sem)
6723 (arith-jnz-imm4-dst-defn 32 (.sym Imm-12- i4n) 16-8-Unprefixed Lab-24-8 mode wstr op
6724 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (.sym Imm-12- i4n) Lab-24-8)
6725 sem)
6726 )
6727 )
6729 (define-pmacro (arith-jnz-imm4-dst-mach mach op i4n opc1 opc2 sem)
6730 (begin
6731 (.apply (.sym arith-jnz mach -imm4-dst-defn) (QI .b 0 op i4n opc1 opc2 sem))
6732 (.apply (.sym arith-jnz mach -imm4-dst-defn) (HI .w 1 op i4n opc1 opc2 sem))
6733 )
6734 )
6736 (define-pmacro (arith-jnz-imm4-dst op i4n opc16-1 opc16-2 opc32-1 opc32-2 sem)
6737 (begin
6738 (arith-jnz-imm4-dst-mach 16 op i4n opc16-1 opc16-2 sem)
6739 (arith-jnz-imm4-dst-mach 32 op i4n opc32-1 opc32-2 sem)
6740 )
6741 )
6743 ;-------------------------------------------------------------
6744 ;mov.size dsp8[sp],dst -- for m16c and m32c
6745 ;-------------------------------------------------------------
6746 (define-pmacro (mov-dspsp-dst-defn mach dstgroup dsp mode wstr op encoding sem)
6747 (dni (.sym op mach wstr -dspsp-dst- dstgroup)
6748 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6749 ((machine mach))
6750 (.str op wstr "$G ${" dsp "}[sp],${dst" mach "-" dstgroup "-" mode "}")
6751 encoding
6752 (sem mach mode dsp (.sym dst mach - dstgroup - mode))
6753 ())
6754 )
6755 (define-pmacro (mov-src-dspsp-defn mach dstgroup dsp mode wstr op encoding sem)
6756 (dni (.sym op mach wstr -dst-dspsp- dstgroup)
6757 (.str op wstr " " mach "-dsp[sp]-" dstgroup "-" dsp "-" mode)
6758 ((machine mach))
6759 (.str op wstr "$G ${dst" mach "-" dstgroup "-" mode "},${" dsp "}[sp]")
6760 encoding
6761 (sem mach mode (.sym dst mach - dstgroup - mode) dsp)
6762 ())
6763 )
6765 ; m16c variants
6766 (define-pmacro (mov16-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6767 (begin
6768 (mov-dspsp-dst-defn 16 basic Dsp-16-s8 mode wstr op
6769 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6770 sem)
6771 (mov-dspsp-dst-defn 16 16-16 Dsp-32-s8 mode wstr op
6772 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6773 sem)
6774 (mov-dspsp-dst-defn 16 16-8 Dsp-24-s8 mode wstr op
6775 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6776 sem)
6777 )
6778 )
6780 (define-pmacro (mov16-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6781 (begin
6782 (mov-src-dspsp-defn 16 basic Dsp-16-s8 mode wstr op
6783 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-basic- mode) Dsp-16-s8)
6784 sem)
6785 (mov-src-dspsp-defn 16 16-16 Dsp-32-s8 mode wstr op
6786 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-16- mode) Dsp-32-s8)
6787 sem)
6788 (mov-src-dspsp-defn 16 16-8 Dsp-24-s8 mode wstr op
6789 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16-8- mode) Dsp-24-s8)
6790 sem)
6791 )
6792 )
6794 ; m32c variants
6795 (define-pmacro (mov32-dspsp-dst-defn mode wstr wbit op opc1 opc2 opc3 sem)
6796 (begin
6797 (mov-dspsp-dst-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6798 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6799 sem)
6800 (mov-dspsp-dst-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6801 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6802 sem)
6803 (mov-dspsp-dst-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6804 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6805 sem)
6806 (mov-dspsp-dst-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6807 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6808 sem)
6809 )
6810 )
6811 (define-pmacro (mov32-src-dspsp-defn mode wstr wbit op opc1 opc2 opc3 sem)
6812 (begin
6813 (mov-src-dspsp-defn 32 basic-Unprefixed Dsp-16-s8 mode wstr op
6814 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-basic-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-16-s8)
6815 sem)
6816 (mov-src-dspsp-defn 32 16-24-Unprefixed Dsp-40-s8 mode wstr op
6817 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-24-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-40-s8)
6818 sem)
6819 (mov-src-dspsp-defn 32 16-16-Unprefixed Dsp-32-s8 mode wstr op
6820 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-16-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-32-s8)
6821 sem)
6822 (mov-src-dspsp-defn 32 16-8-Unprefixed Dsp-24-s8 mode wstr op
6823 (+ (f-0-4 opc1) (f-7-1 wbit) (.sym dst32-16-8-Unprefixed- mode) (f-10-2 opc2) (f-12-4 opc3) Dsp-24-s8)
6824 sem)
6825 )
6826 )
6828 (define-pmacro (mov-src-dspsp-mach mach op opc1 opc2 opc3 sem)
6829 (begin
6830 (.apply (.sym mov mach -src-dspsp-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6831 (.apply (.sym mov mach -src-dspsp-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6832 )
6833 )
6835 (define-pmacro (mov-dspsp-dst-mach mach op opc1 opc2 opc3 sem)
6836 (begin
6837 (.apply (.sym mov mach -dspsp-dst-defn) (QI .b 0 op opc1 opc2 opc3 sem))
6838 (.apply (.sym mov mach -dspsp-dst-defn) (HI .w 1 op opc1 opc2 opc3 sem))
6839 )
6840 )
6842 (define-pmacro (mov-dspsp-dst op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6843 (begin
6844 (mov-dspsp-dst-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6845 (mov-dspsp-dst-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6846 )
6847 )
6848 (define-pmacro (mov-src-dspsp op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
6849 (begin
6850 (mov-src-dspsp-mach 16 op opc16-1 opc16-2 opc16-3 sem)
6851 (mov-src-dspsp-mach 32 op opc32-1 opc32-2 opc32-3 sem)
6852 )
6853 )
6855 ;-------------------------------------------------------------
6856 ; lde dsp24,dst -- for m16c
6857 ;-------------------------------------------------------------
6859 (define-pmacro (lde-dst-dsp mode wstr wbit dstgroup srcdisp)
6860 (begin
6862 (dni (.sym lde wstr - dstgroup -u20)
6863 (.str "lde" wstr "-" dstgroup "-u20")
6864 ((machine 16))
6865 (.str "lde" wstr " ${" srcdisp "},${dst16-" dstgroup "-" mode "}")
6866 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x8)
6867 (.sym dst16- dstgroup - mode) srcdisp)
6868 (nop)
6869 ())
6871 (dni (.sym lde wstr - dstgroup -u20a0)
6872 (.str "lde" wstr "-" dstgroup "-u20a0")
6873 ((machine 16))
6874 (.str "lde" wstr " ${" srcdisp "}[a0],${dst16-" dstgroup "-" mode "}")
6875 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x9)
6876 (.sym dst16- dstgroup - mode) srcdisp)
6877 (nop)
6878 ())
6880 (dni (.sym lde wstr - dstgroup -a1a0)
6881 (.str "lde" wstr "-" dstgroup "-a1a0")
6882 ((machine 16))
6883 (.str "lde" wstr " [a1a0],${dst16-" dstgroup "-" mode "}")
6884 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #xa)
6885 (.sym dst16- dstgroup - mode))
6886 (nop)
6887 ())
6888 )
6889 )
6891 (define-pmacro (lde-dst mode wstr wbit)
6892 (begin
6893 ; like: QI .b 0
6894 (lde-dst-dsp mode wstr wbit basic Dsp-16-u20)
6895 (lde-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6896 (lde-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6897 )
6898 )
6900 ;-------------------------------------------------------------
6901 ; ste dst,dsp24 -- for m16c
6902 ;-------------------------------------------------------------
6904 (define-pmacro (ste-dst-dsp mode wstr wbit dstgroup srcdisp)
6905 (begin
6907 (dni (.sym ste wstr - dstgroup -u20)
6908 (.str "ste" wstr "-" dstgroup "-u20")
6909 ((machine 16))
6910 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}")
6911 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x0)
6912 (.sym dst16- dstgroup - mode) srcdisp)
6913 (nop)
6914 ())
6916 (dni (.sym ste wstr - dstgroup -u20a0)
6917 (.str "ste" wstr "-" dstgroup "-u20a0")
6918 ((machine 16))
6919 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},${" srcdisp "}[a0]")
6920 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x1)
6921 (.sym dst16- dstgroup - mode) srcdisp)
6922 (nop)
6923 ())
6925 (dni (.sym ste wstr - dstgroup -a1a0)
6926 (.str "ste" wstr "-" dstgroup "-a1a0")
6927 ((machine 16))
6928 (.str "ste" wstr " ${dst16-" dstgroup "-" mode "},[a1a0]")
6929 (+ (f-0-4 #x7) (f-4-3 #x2) (f-7-1 wbit) (f-8-4 #x2)
6930 (.sym dst16- dstgroup - mode))
6931 (nop)
6932 ())
6933 )
6934 )
6936 (define-pmacro (ste-dst mode wstr wbit)
6937 (begin
6938 ; like: QI .b 0
6939 (ste-dst-dsp mode wstr wbit basic Dsp-16-u20)
6940 (ste-dst-dsp mode wstr wbit 16-8 Dsp-24-u20)
6941 (ste-dst-dsp mode wstr wbit 16-16 Dsp-32-u20)
6942 )
6943 )
6945 ;=============================================================
6946 ; Division
6947 ;-------------------------------------------------------------
6949 (define-pmacro (div-sem divop modop opmode reg src quot rem max min)
6950 (sequence ()
6951 (if (eq src 0)
6952 (set obit (const BI 1))
6953 (sequence ((opmode quot-result) (opmode rem-result))
6954 (set quot-result (divop opmode (ext opmode reg) src))
6955 (set rem-result (modop opmode (ext opmode reg) src))
6956 (set obit (orif (gt opmode quot-result max)
6957 (lt opmode quot-result min)))
6958 (set quot quot-result)
6959 (set rem rem-result))))
6960 )
6962 ;<divop>.size #imm -- for m16c and m32c
6963 (define-pmacro (div-imm-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6964 (dni (.sym op mach wstr - src)
6965 (.str op mach wstr "-" src)
6966 ((machine mach))
6967 (.str op wstr " #${" src "}")
6968 encoding
6969 (sem divop modop opmode reg src quot rem max min)
6970 ())
6971 )
6972 (define-pmacro (div16-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6973 (div-imm-defn 16 wstr op (.sym Imm-16 - smode)
6974 (+ opc1 opc2 (f-7-1 wbit) opc3 opc4 (.sym Imm-16 - smode))
6975 divop modop opmode reg quot rem max min
6976 sem)
6977 )
6978 (define-pmacro (div32-imm-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 opc4 sem)
6979 (div-imm-defn 32 wstr op (.sym Imm-16 - smode)
6980 (+ (f-0-4 opc1) (f-4-4 opc2) (f-8-3 opc3) (f-11-1 wbit) (f-12-4 opc4) (.sym Imm-16 - smode))
6981 divop modop opmode reg quot rem max min
6982 sem)
6983 )
6984 (define-pmacro (div-imm-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 opc4 sem)
6985 (begin
6986 (.apply (.sym div mach -imm-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 opc4 sem))
6987 (.apply (.sym div mach -imm-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 opc4 sem))
6988 )
6989 )
6990 (define-pmacro (div-imm op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 opc32-1 opc32-2 opc32-3 opc32-4 sem)
6991 (begin
6992 (div-imm-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc16-4 sem)
6993 (div-imm-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 opc32-4 sem)
6994 )
6995 )
6997 ;<divop>.size src -- for m16c and m32c
6998 (define-pmacro (div-src-defn mach wstr op src encoding divop modop opmode reg quot rem max min sem)
6999 (dni (.sym op mach wstr - src)
7000 (.str op mach wstr "-" src)
7001 ((machine mach))
7002 (.str op wstr " ${" src "}")
7003 encoding
7004 (sem divop modop opmode reg src quot rem max min)
7005 ())
7006 )
7007 (define-pmacro (div16-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
7008 (div-src-defn 16 wstr op (.sym dst16-16 - smode)
7009 (+ opc1 opc2 (f-7-1 wbit) opc3 (.sym dst16-16 - smode))
7010 divop modop opmode reg quot rem max min
7011 sem)
7012 )
7013 (define-pmacro (div32-src-defn smode wstr wbit op divop modop opmode reg quot rem max min opc1 opc2 opc3 sem)
7014 (begin
7015 ; Multi insns are tried for assembly in the reverse order in which they appear here, so
7016 ; define the absolute-indirect insns first in order to prevent them from being selected
7017 ; when the mode is register-indirect
7018 ; (div-src-defn 32 wstr op (.sym dst32-24-absolute-indirect- smode)
7019 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-absolute-indirect - smode))
7020 ; divop modop opmode reg quot rem max min
7021 ; sem)
7022 (div-src-defn 32 wstr op (.sym dst32-16-Unprefixed- smode)
7023 (+ (f-0-4 opc1) (f-7-1 wbit) (f-10-2 opc2) (f-12-4 opc3) (.sym dst32-16-Unprefixed- smode))
7024 divop modop opmode reg quot rem max min
7025 sem)
7026 ; (div-src-defn 32 wstr op (.sym dst32-24-indirect- smode)
7027 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 opc1) (f-15-1 wbit) (f-18-2 opc2) (f-20-4 opc3) (.sym dst32-24-indirect - smode))
7028 ; divop modop opmode reg quot rem max min
7029 ; sem)
7030 )
7031 )
7032 (define-pmacro (div-src-mach mach op divop modop opmode max-QI min-QI max-HI min-HI opc1 opc2 opc3 sem)
7033 (begin
7034 (.apply (.sym div mach -src-defn) (QI .b 0 op divop modop opmode R0 R0l R0h max-QI min-QI opc1 opc2 opc3 sem))
7035 (.apply (.sym div mach -src-defn) (HI .w 1 op divop modop opmode R2R0 R0 R2 max-HI min-HI opc1 opc2 opc3 sem))
7036 )
7037 )
7038 (define-pmacro (div-src op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7039 (begin
7040 (div-src-mach 16 op divop modop opmode max-QI min-QI max-HI min-HI opc16-1 opc16-2 opc16-3 sem)
7041 (div-src-mach 32 op divop modop opmode max-QI min-QI max-HI min-HI opc32-1 opc32-2 opc32-3 sem)
7042 )
7043 )
7045 ;=============================================================
7046 ; Bit manipulation
7047 ;
7048 (define-pmacro (bit-insn-defn mach op suffix opnd encoding sem)
7049 (dni (.sym op mach - suffix - opnd)
7050 (.str op mach ":" suffix " " opnd)
7051 ((machine mach))
7052 (.str op "$" suffix " ${" opnd "}")
7053 encoding
7054 (sem opnd)
7055 ())
7056 )
7058 (define-pmacro (bitsrc16-defn op opc1 opc2 opc3 sem)
7059 (bit-insn-defn 16 op X bit16-16
7060 (+ opc1 opc2 opc3 bit16-16)
7061 sem)
7062 )
7064 (define-pmacro (bitsrc32-defn op opc1 opc2 opc3 sem)
7065 (begin
7066 (bit-insn-defn 32 op X bit32-24-Prefixed
7067 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) bit32-24-Prefixed (f-15-1 opc2) (f-18-3 opc3))
7068 sem)
7069 )
7070 )
7072 (define-pmacro (bitsrc-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7073 (begin
7074 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
7075 (bitsrc32-defn op opc32-1 opc32-2 opc32-3 sem)
7076 )
7077 )
7079 (define-pmacro (bitdst16-defn op opc1 opc2 opc3 opc4 opc5 opc6 sem)
7080 (begin
7081 (bit-insn-defn 16 op G bit16-16-basic (+ opc1 opc2 opc3 bit16-16-basic) sem)
7082 (bit-insn-defn 16 op G bit16-16-16 (+ opc1 opc2 opc3 bit16-16-16) sem)
7083 (bit-insn-defn 16 op S bit16-11-S (+ opc4 opc5 opc6 bit16-11-S) sem)
7084 (bit-insn-defn 16 op G bit16-16-8 (+ opc1 opc2 opc3 bit16-16-8) sem)
7085 )
7086 )
7088 (define-pmacro (bitdst32-defn op opc1 opc2 opc3 sem)
7089 (begin
7090 (bit-insn-defn 32 op X bit32-16-Unprefixed
7091 (+ (f-0-4 opc1) bit32-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3))
7092 sem)
7093 )
7094 )
7096 (define-pmacro (bitdstnos-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7097 (begin
7098 (bitsrc16-defn op opc16-1 opc16-2 opc16-3 sem)
7099 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
7100 )
7101 )
7103 (define-pmacro (bitdst-insn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 opc32-1 opc32-2 opc32-3 sem)
7104 (begin
7105 (bitdst16-defn op opc16-1 opc16-2 opc16-3 opc16-4 opc16-5 opc16-6 sem)
7106 (bitdst32-defn op opc32-1 opc32-2 opc32-3 sem)
7107 )
7108 )
7110 ;=============================================================
7111 ; Bit condition
7112 ;
7113 (define-pmacro (bitcond-insn-defn mach op bit-opnd cond-opnd encoding sem)
7114 (dni (.sym op mach - bit-opnd - cond-opnd)
7115 (.str op mach " " bit-opnd " " cond-opnd)
7116 ((machine mach))
7117 (.str op "${" cond-opnd "} ${" bit-opnd "}")
7118 encoding
7119 (sem mach bit-opnd cond-opnd)
7120 ())
7121 )
7123 (define-pmacro (bitcond16-defn op opc1 opc2 opc3 sem)
7124 (begin
7125 (bitcond-insn-defn 16 op bit16-16-basic cond16-16 (+ opc1 opc2 opc3 bit16-16-basic cond16-16) sem)
7126 (bitcond-insn-defn 16 op bit16-16-16 cond16-32 (+ opc1 opc2 opc3 bit16-16-16 cond16-32) sem)
7127 (bitcond-insn-defn 16 op bit16-16-8 cond16-24 (+ opc1 opc2 opc3 bit16-16-8 cond16-24) sem)
7128 )
7129 )
7131 (define-pmacro (bitcond32-defn op opc1 opc2 opc3 sem)
7132 (begin
7133 (bitcond-insn-defn 32 op bit32-16-24-Unprefixed cond32-40
7134 (+ (f-0-4 opc1) bit32-16-24-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-40)
7135 sem)
7136 (bitcond-insn-defn 32 op bit32-16-16-Unprefixed cond32-32
7137 (+ (f-0-4 opc1) bit32-16-16-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-32)
7138 sem)
7139 (bitcond-insn-defn 32 op bit32-16-8-Unprefixed cond32-24
7140 (+ (f-0-4 opc1) bit32-16-8-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-24)
7141 sem)
7142 (bitcond-insn-defn 32 op bit32-basic-Unprefixed cond32-16
7143 (+ (f-0-4 opc1) bit32-basic-Unprefixed (f-7-1 opc2) (f-10-3 opc3) cond32-16)
7144 sem)
7145 )
7146 )
7148 (define-pmacro (bitcond-insn op opc16-1 opc16-2 opc16-3 opc32-1 opc32-2 opc32-3 sem)
7149 (begin
7150 (bitcond16-defn op opc16-1 opc16-2 opc16-3 sem)
7151 (bitcond32-defn op opc32-1 opc32-2 opc32-3 sem)
7152 )
7153 )
7155 ;=============================================================
7156 ;<insn>.size #imm1,#imm2,dst -- for m32c
7157 ;
7158 (define-pmacro (insn-imm1-imm2-dst-defn src1 src2 dstgroup xmode wstr op encoding sem)
7159 (dni (.sym op 32 wstr - src1 - src2 - dstgroup)
7160 (.str op 32 wstr "-" src1 "-" src2 "-" dstgroup "-" xmode)
7161 ((machine 32))
7162 (.str op wstr " #${" src1 "},#${" src2 "},${dst32-" dstgroup "-" xmode "}")
7163 encoding
7164 (sem xmode src1 src2 (.sym dst32- dstgroup - xmode))
7165 ())
7166 )
7168 ; m32c Prefixed variants
7169 (define-pmacro (insn32-imm1-imm2-dst-Prefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7170 (begin
7171 (insn-imm1-imm2-dst-defn (.sym Imm-48- xmode) (.sym Imm- base4 - xmode) 24-24-Prefixed xmode wstr op
7172 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7173 (.sym dst32-24-24-Prefixed- xmode) (.sym Imm-48- xmode) (.sym Imm- base4 - xmode))
7174 sem)
7175 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base3 - xmode) 24-16-Prefixed xmode wstr op
7176 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7177 (.sym dst32-24-16-Prefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base3 - xmode))
7178 sem)
7179 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base2 - xmode) 24-8-Prefixed xmode wstr op
7180 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7181 (.sym dst32-24-8-Prefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base2 - xmode))
7182 sem)
7183 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base1 - xmode) basic-Prefixed xmode wstr op
7184 (+ (f-0-4 0) (f-4-4 1) (f-8-4 opc1) (f-18-2 opc2) (f-15-1 wbit) (f-20-4 opc3)
7185 (.sym dst32-basic-Prefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base1 - xmode))
7186 sem)
7187 )
7188 )
7190 ; m32c Unprefixed variants
7191 (define-pmacro (insn32-imm1-imm2-dst-Unprefixed-defn xmode wstr wbit base1 base2 base3 base4 op opc1 opc2 opc3 sem)
7192 (begin
7193 (insn-imm1-imm2-dst-defn (.sym Imm-40- xmode) (.sym Imm- base4 - xmode) 16-24-Unprefixed xmode wstr op
7194 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7195 (.sym dst32-16-24-Unprefixed- xmode) (.sym Imm-40- xmode) (.sym Imm- base4 - xmode))
7196 sem)
7197 (insn-imm1-imm2-dst-defn (.sym Imm-32- xmode) (.sym Imm- base3 - xmode) 16-16-Unprefixed xmode wstr op
7198 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7199 (.sym dst32-16-16-Unprefixed- xmode) (.sym Imm-32- xmode) (.sym Imm- base3 - xmode))
7200 sem)
7201 (insn-imm1-imm2-dst-defn (.sym Imm-24- xmode) (.sym Imm- base2 - xmode) 16-8-Unprefixed xmode wstr op
7202 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7203 (.sym dst32-16-8-Unprefixed- xmode) (.sym Imm-24- xmode) (.sym Imm- base2 - xmode))
7204 sem)
7205 (insn-imm1-imm2-dst-defn (.sym Imm-16- xmode) (.sym Imm- base1 - xmode) basic-Unprefixed xmode wstr op
7206 (+ (f-0-4 opc1) (f-10-2 opc2) (f-7-1 wbit) (f-12-4 opc3)
7207 (.sym dst32-basic-Unprefixed- xmode) (.sym Imm-16- xmode) (.sym Imm- base1 - xmode))
7208 sem)
7209 )
7210 )
7212 (define-pmacro (insn-imm1-imm2-dst-Prefixed op opc32-1 opc32-2 opc32-3 sem)
7213 (begin
7214 (insn32-imm1-imm2-dst-Prefixed-defn QI .b 0 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7215 (insn32-imm1-imm2-dst-Prefixed-defn HI .w 1 40 48 56 64 op opc32-1 opc32-2 opc32-3 sem)
7216 )
7217 )
7218 (define-pmacro (insn-imm1-imm2-dst-Unprefixed op opc32-1 opc32-2 opc32-3 sem)
7219 (begin
7220 (insn32-imm1-imm2-dst-Unprefixed-defn QI .b 0 24 32 40 48 op opc32-1 opc32-2 opc32-3 sem)
7221 (insn32-imm1-imm2-dst-Unprefixed-defn HI .w 1 32 40 48 56 op opc32-1 opc32-2 opc32-3 sem)
7222 )
7223 )
7224 \f
7225 ;=============================================================
7226 ; Insn definitions
7227 ;-------------------------------------------------------------
7228 ; abs - absolute
7229 ;-------------------------------------------------------------
7231 (define-pmacro (abs-sem mode dst)
7232 (sequence ((mode result))
7233 (set result (abs mode dst))
7234 (set obit (eq result dst))
7235 (set-z-and-s result)
7236 (set dst result))
7237 )
7238 (unary-insn abs (f-0-4 7) (f-4-3 3) (f-8-4 #xF) #xA #x1 #xF abs-sem)
7240 ;-------------------------------------------------------------
7241 ; adcf - addition carry flag
7242 ;-------------------------------------------------------------
7244 (define-pmacro (adcf-sem mode dst)
7245 (sequence ((mode result))
7246 (set result (addc mode dst 0 cbit))
7247 (set obit (add-oflag mode dst 0 cbit))
7248 (set cbit (add-cflag mode dst 0 cbit))
7249 (set-z-and-s result)
7250 (set dst result))
7251 )
7252 (unary-insn adcf (f-0-4 7) (f-4-3 3) (f-8-4 #xE) #xB #x1 #xE adcf-sem)
7254 ;-------------------------------------------------------------
7255 ; add - binary addition
7256 ;-------------------------------------------------------------
7258 (define-pmacro (add-sem mode src1 dst)
7259 (sequence ((mode result))
7260 (set result (add mode src1 dst))
7261 (set obit (add-oflag mode src1 dst 0))
7262 (set cbit (add-cflag mode src1 dst 0))
7263 (set-z-and-s result)
7264 (set dst result))
7265 )
7267 ; add.L:G #imm32,dst (m32 #2)
7268 (binary-arith32-imm-dst-defn SI SI .l 0 add G #x8 #x3 #x1 add-sem)
7269 ; add.size:G #imm,dst (m16 #1 m32 #1)
7270 (binary-arith-imm-dst add G (f-0-4 7) (f-4-3 3) (f-8-4 4) #x8 #x2 #xE add-sem)
7271 ; add.size:Q #imm4,dst (m16 #2 m32 #3)
7272 (binary-arith-imm4-dst add (f-0-4 #xC) (f-4-3 4) #x7 #x3 add-sem)
7273 (binary-arith32-imm4-dst-defn SI .l 1 0 add #x7 #x3 add-sem)
7274 ; add.b:S #imm8,dst3 (m16 #3)
7275 (binary-arith16-b-S-imm8-dst3 add ".b" (f-0-4 8) (f-4-1 0) add-sem)
7276 ; add.BW:Q #imm4,sp (m16 #7)
7277 (binary-arith16-Q-sp add (f-0-4 7) (f-4-4 #xD) (f-8-4 #xB) add-sem)
7278 (dnmi add16-bQ-sp "add16-bQ-sp" ()
7279 "add.b:q #${Imm-12-s4},sp"
7280 (emit add16-wQ-sp Imm-12-s4))
7281 ; add.BW:G #imm,sp (m16 #6)
7282 (binary-arith16-G-sp add (f-0-4 7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #xB) add-sem)
7283 ; add.BW:G src,dst (m16 #4 m32 #6)
7284 (binary-arith-src-dst add G (f-0-4 #xA) (f-4-3 0) #x1 #x8 add-sem)
7285 ; add.B.S src2,r0l/r0h (m16 #5)
7286 (binary-arith16-b-S-src2 add (f-0-4 2) (f-4-1 0) add-sem)
7287 ; add.L:G src,dst (m32 #7)
7288 (binary-arith32-src-dst-defn SI SI .l 1 add G #x1 #x2 add-sem)
7289 ; add.L:S #imm{1,2},A0/A1 (m32 #5)
7290 (binary-arith32-l-s-imm1-an add (f-0-2 2) (f-3-4 6) add-sem)
7291 ; add.L:Q #imm3,sp (m32 #9)
7292 (binary-arith32-l-q-imm3-sp add (f-0-2 1) (f-4-3 1) add-sem)
7293 ; add.L:S #imm8,sp (m32 #10)
7294 (binary-arith32-l-s-imm8-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 0) (f-12-4 3) add-sem)
7295 ; add.L:G #imm16,sp (m32 #8)
7296 (binary-arith32-l-g-imm16-sp add (f-0-4 #xb) (f-4-4 6) (f-8-4 1) (f-12-4 3) add-sem)
7297 ; add.BW:S #imm,dst2 (m32 #4)
7298 (binary-arith32-s-imm-dst QI .b 0 add #x0 #x3 add-sem)
7299 (binary-arith32-s-imm-dst HI .w 1 add #x0 #x3 add-sem)
7301 ;-------------------------------------------------------------
7302 ; adc - binary add with carry
7303 ;-------------------------------------------------------------
7305 (define-pmacro (addc-sem mode src dst)
7306 (sequence ((mode result))
7307 (set result (addc mode src dst cbit))
7308 (set obit (add-oflag mode src dst cbit))
7309 (set cbit (add-cflag mode src dst cbit))
7310 (set-z-and-s result)
7311 (set dst result))
7312 )
7314 ; adc.size:G #imm,dst
7315 (binary-arith16-imm-dst-defn QI QI .b 0 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7316 (binary-arith16-imm-dst-defn HI HI .w 1 adc X (f-0-4 7) (f-4-3 3) (f-8-4 6) addc-sem)
7317 (binary-arith32-imm-dst-Prefixed QI QI .b 0 adc X #x8 #x2 #xE addc-sem)
7318 (binary-arith32-imm-dst-Prefixed HI HI .w 1 adc X #x8 #x2 #xE addc-sem)
7320 ; adc.BW:G src,dst
7321 (binary-arith16-src-dst-defn QI QI .b 0 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7322 (binary-arith16-src-dst-defn HI HI .w 1 adc X (f-0-4 #xB) (f-4-3 0) addc-sem)
7323 (binary-arith32-src-dst-Prefixed QI QI .b 0 adc X #x1 #x4 addc-sem)
7324 (binary-arith32-src-dst-Prefixed HI HI .w 1 adc X #x1 #x4 addc-sem)
7326 ;-------------------------------------------------------------
7327 ; dadc - decimal add with carry
7328 ; dadd - decimal addition
7329 ;-------------------------------------------------------------
7331 (define-pmacro (dadc-sem mode src dst)
7332 (sequence ((mode result))
7333 (set result (subc mode dst src (not cbit)))
7334 (set cbit (sub-cflag mode dst src (not cbit)))
7335 (set-z-and-s result)
7336 (set dst result))
7337 )
7339 (define-pmacro (decimal-subtraction16-insn op opc1 opc2)
7340 (begin
7341 ; op.b #imm8,r0l
7342 (dni (.sym op 16.b-imm8)
7343 (.str op ".b #imm8")
7344 ((machine 16))
7345 (.str op ".b #${Imm-16-QI},r0l")
7346 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc1) Imm-16-QI)
7347 ((.sym op -sem) QI Imm-16-QI R0l)
7348 ())
7349 ; op.w #imm16,r0
7350 (dni (.sym op 16.w-imm16)
7351 (.str op ".b #imm16")
7352 ((machine 16))
7353 (.str op ".w #${Imm-16-HI},r0")
7354 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc1) Imm-16-HI)
7355 ((.sym op -sem) HI Imm-16-HI R0)
7356 ())
7357 ; op.b #r0h,r0l
7358 (dni (.sym op 16.b-r0h-r0l)
7359 (.str op ".b r0h,r0l")
7360 ((machine 16))
7361 (.str op ".b r0h,r0l")
7362 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 opc2))
7363 ((.sym op -sem) QI R0h R0l)
7364 ())
7365 ; op.w #r1,r0
7366 (dni (.sym op 16.w-r1-r0)
7367 (.str op ".b r1,r0")
7368 ((machine 16))
7369 (.str op ".w r1,r0")
7370 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 opc2))
7371 ((.sym op -sem) HI R1 R0)
7372 ())
7373 )
7374 )
7376 ; dadc for m16c
7377 (decimal-subtraction16-insn dadc #xE #x6 )
7379 ; dadc.size #imm,dst
7380 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadc X #x8 #x0 #xE dadc-sem)
7381 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadc X #x8 #x0 #xE dadc-sem)
7382 ; dadc.BW src,dst
7383 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadc X #x1 #x8 dadc-sem)
7384 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadc X #x1 #x8 dadc-sem)
7386 (define-pmacro (dadd-sem mode src dst)
7387 (sequence ((mode result))
7388 (set result (subc mode dst src 0))
7389 (set cbit (sub-cflag mode dst src 0))
7390 (set-z-and-s result)
7391 (set dst result))
7392 )
7394 ; dadd for m16c
7395 (decimal-subtraction16-insn dadd #xC #x4)
7397 ; dadd.size #imm,dst
7398 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dadd X #x8 #x1 #xE dadd-sem)
7399 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dadd X #x8 #x1 #xE dadd-sem)
7400 ; dadd.BW src,dst
7401 (binary-arith32-src-dst-Prefixed QI QI .b 0 dadd X #x1 #x0 dadd-sem)
7402 (binary-arith32-src-dst-Prefixed HI HI .w 1 dadd X #x1 #x0 dadd-sem)
7404 ;-------------------------------------------------------------;
7405 ; addx - Add extend sign with no carry
7406 ;-------------------------------------------------------------;
7408 (define-pmacro (addx-sem mode src dst)
7409 (sequence ((SI source) (SI result))
7410 (set source (zext SI (trunc QI src)))
7411 (set result (add SI source dst))
7412 (set obit (add-oflag SI source dst 0))
7413 (set cbit (add-cflag SI source dst 0))
7414 (set-z-and-s result)
7415 (set dst result))
7416 )
7418 ; addx #imm,dst
7419 (binary-arith32-imm-dst-defn QI SI "" 0 addx X #x8 #x1 #x1 addx-sem)
7420 ; addx src,dst
7421 (binary-arith32-src-dst-defn QI SI "" 0 addx X #x1 #x2 addx-sem)
7423 ;-------------------------------------------------------------
7424 ; adjnz - Add/Sub and branch if not zero
7425 ;-------------------------------------------------------------
7427 (define-pmacro (arith-jnz-sem mode src dst label)
7428 (sequence ((mode result))
7429 (set result (add mode src dst))
7430 (set dst result)
7431 (if (ne result 0)
7432 (set pc label)))
7433 )
7435 ; adjnz.size #imm4,dst,label
7436 (arith-jnz-imm4-dst adjnz s4 (f-0-4 #xF) (f-4-3 4) #xf #x1 arith-jnz-sem)
7438 ;-------------------------------------------------------------
7439 ; and - binary and
7440 ;-------------------------------------------------------------
7442 (define-pmacro (and-sem mode src1 dst)
7443 (sequence ((mode result))
7444 (set result (and mode src1 dst))
7445 (set-z-and-s result)
7446 (set dst result))
7447 )
7449 ; and.size:G #imm,dst (m16 #1 m32 #1)
7450 (binary-arith-imm-dst and G (f-0-4 7) (f-4-3 3) (f-8-4 2) #x8 #x3 #xF and-sem)
7451 ; and.b:S #imm8,dst3 (m16 #2)
7452 (binary-arith16-b-S-imm8-dst3 and ".b" (f-0-4 9) (f-4-1 0) and-sem)
7453 ; and.BW:G src,dst (m16 #3 m32 #3)
7454 (binary-arith-src-dst and G (f-0-4 #x9) (f-4-3 0) #x1 #xD and-sem)
7455 ; and.B.S src2,r0l/r0h (m16 #4)
7456 (binary-arith16-b-S-src2 and (f-0-4 1) (f-4-1 0) and-sem)
7457 ; and.BW:S #imm,dst2 (m32 #2)
7458 (binary-arith32-s-imm-dst QI .b 0 and #x1 #x6 and-sem)
7459 (binary-arith32-s-imm-dst HI .w 1 and #x1 #x6 and-sem)
7461 ;-------------------------------------------------------------
7462 ; band - bit and
7463 ;-------------------------------------------------------------
7465 (define-pmacro (band-sem src)
7466 (set cbit (and src cbit))
7467 )
7468 (bitsrc-insn band (f-0-4 7) (f-4-4 #xE) (f-8-4 4) #xD #x0 #x1 band-sem)
7470 ;-------------------------------------------------------------
7471 ; bclr - bit clear
7472 ;-------------------------------------------------------------
7474 (define-pmacro (bclr-sem dst)
7475 (set dst 0)
7476 )
7477 (bitdst-insn bclr (f-0-4 7) (f-4-4 #xE) (f-8-4 8) (f-0-2 1) (f-2-2 0) (f-4-1 0) #xD #x0 #x6 bclr-sem)
7479 ;-------------------------------------------------------------
7480 ; bitindex - bit index
7481 ;-------------------------------------------------------------
7483 (define-pmacro (bitindex-sem mode dst)
7484 (set BitIndex dst)
7485 )
7486 (unary-insn-defn 32 16-Unprefixed QI .b bitindex
7487 (+ (f-0-4 #xC) (f-7-1 0) dst32-16-Unprefixed-QI (f-10-2 #x2) (f-12-4 #xE))
7488 bitindex-sem)
7489 (unary-insn-defn 32 16-Unprefixed HI .w bitindex
7490 (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x2) (f-12-4 #xE))
7491 bitindex-sem)
7493 ;-------------------------------------------------------------
7494 ; bmCnd - bit move condition
7495 ;-------------------------------------------------------------
7497 (define-pmacro (test-condition16 cond)
7498 (case UQI cond
7499 ((#x00) (trunc BI cbit))
7500 ((#x01) (not (or cbit zbit)))
7501 ((#x02) (trunc BI zbit))
7502 ((#x03) (trunc BI sbit))
7503 ((#x04) (or zbit (xor sbit obit)))
7504 ((#x05) (trunc BI obit))
7505 ((#x06) (xor sbit obit))
7506 ((#xf8) (not cbit))
7507 ((#xf9) (or cbit zbit))
7508 ((#xfa) (not zbit))
7509 ((#xfb) (not sbit))
7510 ((#xfc) (not (or zbit (xor sbit obit))))
7511 ((#xfd) (not obit))
7512 ((#xfe) (not (xor sbit obit)))
7513 (else (const BI 0))
7514 )
7515 )
7517 (define-pmacro (test-condition32 cond)
7518 (case UQI cond
7519 ((#x00) (not cbit))
7520 ((#x01) (or cbit zbit))
7521 ((#x02) (not zbit))
7522 ((#x03) (not sbit))
7523 ((#x04) (not obit))
7524 ((#x05) (not (or zbit (xor sbit obit))))
7525 ((#x06) (not (xor sbit obit)))
7526 ((#x08) (trunc BI cbit))
7527 ((#x09) (not (or cbit zbit)))
7528 ((#x0a) (trunc BI zbit))
7529 ((#x0b) (trunc BI sbit))
7530 ((#x0c) (trunc BI obit))
7531 ((#x0d) (or zbit (xor sbit obit)))
7532 ((#x0e) (xor sbit obit))
7533 (else (const BI 0))
7534 )
7535 )
7537 (define-pmacro (bitcond-sem mach op cond)
7538 (if ((.sym test-condition mach) cond)
7539 (set op 1)
7540 (set op 0))
7541 )
7542 (bitcond-insn bm (f-0-4 7) (f-4-4 #xE) (f-8-4 2) #xD #x0 #x2 bitcond-sem)
7544 (dni bm16-c
7545 "bm16 C"
7546 ((machine 16))
7547 "bm$cond16c c"
7548 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xD) cond16c)
7549 (bitcond-sem 16 cbit cond16c)
7550 ())
7552 (dni bm32-c
7553 "bm32 C"
7554 ((machine 32))
7555 "bm$cond32 c"
7556 (+ (f-0-4 #xD) (f-4-4 #x9) (f-8-1 0) (f-10-3 5) cond32)
7557 (bitcond-sem 32 cbit cond32)
7558 ())
7560 ;-------------------------------------------------------------
7561 ; bnand
7562 ;-------------------------------------------------------------
7564 (define-pmacro (bnand-sem src)
7565 (set cbit (and (inv src) cbit))
7566 )
7567 (bitsrc-insn bnand (f-0-4 7) (f-4-4 #xE) (f-8-4 5) #xD #x0 #x3 bnand-sem)
7569 ;-------------------------------------------------------------
7570 ; bnor
7571 ;-------------------------------------------------------------
7573 (define-pmacro (bnor-sem src)
7574 (set cbit (or (inv src) cbit))
7575 )
7576 (bitsrc-insn bnor (f-0-4 7) (f-4-4 #xE) (f-8-4 7) #xD #x0 #x6 bnor-sem)
7578 ;-------------------------------------------------------------
7579 ; bnot
7580 ;-------------------------------------------------------------
7582 (define-pmacro (bnot-sem dst)
7583 (set dst (inv dst))
7584 )
7585 (bitdst-insn bnot (f-0-4 7) (f-4-4 #xE) (f-8-4 #xA) (f-0-2 1) (f-2-2 1) (f-4-1 0) #xD #x0 #x3 bnot-sem)
7587 ;-------------------------------------------------------------
7588 ; bntst
7589 ;-------------------------------------------------------------
7591 (define-pmacro (bntst-sem src)
7592 (set cbit (inv src))
7593 (set zbit (inv src))
7594 )
7595 (bitsrc-insn bntst (f-0-4 7) (f-4-4 #xE) (f-8-4 3) #xD #x0 #x0 bntst-sem)
7597 ;-------------------------------------------------------------
7598 ; bnxor
7599 ;-------------------------------------------------------------
7601 (define-pmacro (bnxor-sem src)
7602 (set cbit (xor (inv src) cbit))
7603 )
7604 (bitsrc-insn bnxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xD) #xD #x0 #x7 bnxor-sem)
7606 ;-------------------------------------------------------------
7607 ; bor
7608 ;-------------------------------------------------------------
7610 (define-pmacro (bor-sem src)
7611 (set cbit (or src cbit))
7612 )
7613 (bitsrc-insn bor (f-0-4 7) (f-4-4 #xE) (f-8-4 #x6) #xD #x0 #x4 bor-sem)
7615 ;-------------------------------------------------------------
7616 ; brk
7617 ;-------------------------------------------------------------
7619 (dni brk16
7620 "brk"
7621 ((machine 16))
7622 "brk"
7623 (+ (f-0-4 #x0) (f-4-4 #x0))
7624 (nop)
7625 ())
7627 (dni brk32
7628 "brk"
7629 ((machine 32))
7630 "brk"
7631 (+ (f-0-4 #x0) (f-4-4 #x0))
7632 (nop)
7633 ())
7635 ;-------------------------------------------------------------
7636 ; brk2
7637 ;-------------------------------------------------------------
7639 (dni brk232
7640 "brk2"
7641 ((machine 32))
7642 "brk2"
7643 (+ (f-0-4 #x0) (f-4-4 #x8))
7644 (nop)
7645 ())
7647 ;-------------------------------------------------------------
7648 ; bset
7649 ;-------------------------------------------------------------
7651 (define-pmacro (bset-sem dst)
7652 (set dst 1)
7653 )
7654 (bitdst-insn bset (f-0-4 7) (f-4-4 #xE) (f-8-4 9) (f-0-2 1) (f-2-2 0) (f-4-1 1) #xD #x0 #x7 bset-sem)
7656 ;-------------------------------------------------------------
7657 ; btst
7658 ;-------------------------------------------------------------
7660 (define-pmacro (btst-sem dst)
7661 (set zbit (inv dst))
7662 (set cbit dst)
7663 )
7664 (bitdst16-defn btst (f-0-4 7) (f-4-4 #xE) (f-8-4 #xB) (f-0-2 1) (f-2-2 1) (f-4-1 1) btst-sem)
7666 (bit-insn-defn 32 btst G bit32-16-Unprefixed
7667 (+ (f-0-4 #xD) bit32-16-Unprefixed (f-7-1 #x0) (f-10-3 #x0))
7668 btst-sem)
7670 (dni btst.s "btst:s" ((machine 32))
7671 "btst:s ${Bit3-S},${Dsp-8-u16}"
7672 (+ (f-0-2 #x0) (f-4-3 #x5) Bit3-S Dsp-8-u16)
7673 () ())
7675 ;-------------------------------------------------------------
7676 ; btstc
7677 ;-------------------------------------------------------------
7679 (define-pmacro (btstc-sem dst)
7680 (set zbit (inv dst))
7681 (set cbit dst)
7682 (set dst (const 0))
7683 )
7684 (bitdstnos-insn btstc (f-0-4 7) (f-4-4 #xE) (f-8-4 #x0) #xD #x0 #x4 btstc-sem)
7686 ;-------------------------------------------------------------
7687 ; btsts
7688 ;-------------------------------------------------------------
7690 (define-pmacro (btsts-sem dst)
7691 (set zbit (inv dst))
7692 (set cbit dst)
7693 (set dst (const 0))
7694 )
7695 (bitdstnos-insn btsts (f-0-4 7) (f-4-4 #xE) (f-8-4 #x1) #xD #x0 #x5 btsts-sem)
7697 ;-------------------------------------------------------------
7698 ; bxor
7699 ;-------------------------------------------------------------
7701 (define-pmacro (bxor-sem src)
7702 (set cbit (xor src cbit))
7703 )
7704 (bitsrc-insn bxor (f-0-4 7) (f-4-4 #xE) (f-8-4 #xC) #xD #x0 #x5 bxor-sem)
7706 ;-------------------------------------------------------------
7707 ; clip
7708 ;-------------------------------------------------------------
7710 (define-pmacro (clip-sem mode imm1 imm2 dest)
7711 (sequence ()
7712 (if (gt mode imm1 dest)
7713 (set dest imm1))
7714 (if (lt mode imm2 dest)
7715 (set dest imm2)))
7716 )
7718 (insn-imm1-imm2-dst-Prefixed clip #x8 #x3 #xE clip-sem)
7720 ;-------------------------------------------------------------
7721 ; cmp - binary compare
7722 ;-------------------------------------------------------------
7724 (define-pmacro (cmp-sem mode src1 dst)
7725 (sequence ((mode result))
7726 (set result (sub mode dst src1))
7727 (set obit (sub-oflag mode dst src1 0))
7728 (set cbit (not (sub-cflag mode dst src1 0)))
7729 (set-z-and-s result))
7730 )
7732 ; cmp.L:G #imm32,dst (m32 #2)
7733 (binary-arith32-imm-dst-defn SI SI .l 0 cmp G #xA #x3 #x1 cmp-sem)
7734 ; cmp.size:G #imm,dst (m16 #1 m32 #1)
7735 (binary-arith-imm-dst cmp G (f-0-4 7) (f-4-3 3) (f-8-4 8) #x9 #x2 #xE cmp-sem)
7736 ; cmp.size:Q #imm4,dst (m16 #2 m32 #3)
7737 (binary-arith-imm4-dst cmp (f-0-4 #xD) (f-4-3 0) #x7 #x1 cmp-sem)
7738 ; cmp.b:S #imm8,dst3 (m16 #3)
7739 (binary-arith16-b-S-imm8-dst3 cmp ".b" (f-0-4 #xE) (f-4-1 0) cmp-sem)
7740 ; cmp.BW:G src,dst (m16 #4 m32 #5)
7741 (binary-arith-src-dst cmp G (f-0-4 #xC) (f-4-3 0) #x1 #x6 cmp-sem)
7742 ; cmp.B.S src2,r0l/r0h (m16 #5)
7743 (binary-arith16-b-S-src2 cmp (f-0-4 3) (f-4-1 1) cmp-sem)
7744 ; cmp.L:G src,dst (m32 #6)
7745 (binary-arith32-src-dst-defn SI SI .l 1 cmp G #x1 #x1 cmp-sem)
7746 ; cmp.BW:S #imm,dst2 (m32 #4)
7747 (binary-arith32-s-imm-dst QI .b 0 cmp #x1 #x3 cmp-sem)
7748 (binary-arith32-s-imm-dst HI .w 1 cmp #x1 #x3 cmp-sem)
7749 ; cmp.BW:s src2,r0[l] (m32 #7)
7750 (binary-arith32-S-src2 cmp QI .b 0 (f-0-2 1) (f-4-3 0) cmp-sem)
7751 (binary-arith32-S-src2 cmp HI .w 1 (f-0-2 1) (f-4-3 0) cmp-sem)
7753 ;-------------------------------------------------------------
7754 ; cmpx - binary compare extend sign
7755 ;-------------------------------------------------------------
7757 (define-pmacro (cmpx-sem mode src1 dst)
7758 (sequence ((mode result))
7759 (set result (sub mode dst (ext mode src1)))
7760 (set obit (sub-oflag mode dst (ext mode src1) 0))
7761 (set cbit (sub-cflag mode dst (ext mode src1) 0))
7762 (set-z-and-s result))
7763 )
7765 (binary-arith32-imm-dst-defn QI SI "" 0 cmpx X #xA #x1 #x1 cmpx-sem)
7767 ;-------------------------------------------------------------
7768 ; dec - decrement
7769 ;-------------------------------------------------------------
7771 (define-pmacro (dec-sem mode dest)
7772 (sequence ((mode result))
7773 (set result (sub mode dest 1))
7774 (set-z-and-s result)
7775 (set dest result))
7776 )
7778 (dni dec16.b
7779 "dec.b Dst16-3-S-8"
7780 ((machine 16))
7781 "dec.b ${Dst16-3-S-8}"
7782 (+ (f-0-4 #xA) (f-4-1 #x1) Dst16-3-S-8)
7783 (dec-sem QI Dst16-3-S-8)
7784 ())
7786 (dni dec16.w
7787 "dec.w Dst16An-S"
7788 ((machine 16))
7789 "dec.w ${Dst16An-S}"
7790 (+ (f-0-4 #xF) (f-5-3 #x2) Dst16An-S)
7791 (dec-sem HI Dst16An-S)
7792 ())
7794 (unary32-defn QI .b 0 dec #xB #x0 #xE dec-sem)
7795 (unary32-defn HI .w 1 dec #xB #x0 #xE dec-sem)
7797 ;-------------------------------------------------------------
7798 ; div - divide
7799 ; divu - divide unsigned
7800 ; divx - divide extension
7801 ;-------------------------------------------------------------
7803 ; div.BW #imm
7804 (div-imm div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x1) #xB #x0 #x2 #x3 div-sem)
7805 (div-imm divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x0) #xB #x0 #x0 #x3 div-sem)
7806 (div-imm divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 6) (f-8-4 #xE) (f-12-4 #x3) #xB #x2 #x2 #x3 div-sem)
7807 ; div.BW src
7808 (div-src div div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xD) #x8 #x1 #xE div-sem)
7809 (div-src divu udiv umod USI 255 0 65535 0 (f-0-4 #x7) (f-4-3 3) (f-8-4 #xC) #x8 #x0 #xE div-sem)
7810 (div-src divx div mod SI 127 -128 32767 -32768 (f-0-4 #x7) (f-4-3 3) (f-8-4 #x9) #x9 #x1 #xE div-sem)
7812 (div-src-defn 32 .l div dst32-24-Prefixed-SI
7813 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x1) (f-20-4 #xf) dst32-24-Prefixed-SI)
7814 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7815 div-sem)
7816 (div-src-defn 32 .l divu dst32-24-Prefixed-SI
7817 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x0) (f-20-4 #xf) dst32-24-Prefixed-SI)
7818 udiv umod USI R2R0 R2R0 NoRemainder #x80000000 0
7819 div-sem)
7820 (div-src-defn 32 .l divx dst32-24-Prefixed-SI
7821 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xA) (f-15-1 1) (f-18-2 #x2) (f-20-4 #xf) dst32-24-Prefixed-SI)
7822 div mod SI R2R0 R2R0 NoRemainder #x7fffffff (neg SI #x80000000)
7823 div-sem)
7825 ;-------------------------------------------------------------
7826 ; dsbb - decimal subtraction with borrow
7827 ; dsub - decimal subtraction
7828 ;-------------------------------------------------------------
7830 (define-pmacro (dsbb-sem mode src dst)
7831 (sequence ((mode result))
7832 (set result (subc mode dst src (not cbit)))
7833 (set cbit (sub-cflag mode dst src (not cbit)))
7834 (set-z-and-s result)
7835 (set dst result))
7836 )
7838 ; dsbb for m16c
7839 (decimal-subtraction16-insn dsbb #xF #x7)
7841 ; dsbb.size #imm,dst
7842 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsbb X #x9 #x0 #xE dsbb-sem)
7843 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsbb X #x9 #x0 #xE dsbb-sem)
7844 ; dsbb.BW src,dst
7845 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsbb X #x1 #xA dsbb-sem)
7846 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsbb X #x1 #xA dsbb-sem)
7848 (define-pmacro (dsub-sem mode src dst)
7849 (sequence ((mode result))
7850 (set result (subc mode dst src 0))
7851 (set cbit (sub-cflag mode dst src 0))
7852 (set-z-and-s result)
7853 (set dst result))
7854 )
7856 ; dsub for m16c
7857 (decimal-subtraction16-insn dsub #xD #x5)
7859 ; dsub.size #imm,dst
7860 (binary-arith32-imm-dst-Prefixed QI QI .b 0 dsub X #x9 #x1 #xE dsub-sem)
7861 (binary-arith32-imm-dst-Prefixed HI HI .w 1 dsub X #x9 #x1 #xE dsub-sem)
7862 ; dsub.BW src,dst
7863 (binary-arith32-src-dst-Prefixed QI QI .b 0 dsub X #x1 #x2 dsub-sem)
7864 (binary-arith32-src-dst-Prefixed HI HI .w 1 dsub X #x1 #x2 dsub-sem)
7866 ;-------------------------------------------------------------
7867 ; sub - binary subtraction
7868 ;-------------------------------------------------------------
7870 (define-pmacro (sub-sem mode src1 dst)
7871 (sequence ((mode result))
7872 (set result (sub mode dst src1))
7873 (set obit (sub-oflag mode dst src1 0))
7874 (set cbit (sub-cflag mode dst src1 0))
7875 (set dst result)
7876 (set-z-and-s result)))
7878 ; sub.size:G #imm,dst (m16 #1 m32 #1)
7879 (binary-arith-imm-dst sub G (f-0-4 7) (f-4-3 3) (f-8-4 5) #x8 #x3 #xE sub-sem)
7880 ; sub.b:S #imm8,dst3 (m16 #2)
7881 (binary-arith16-b-S-imm8-dst3 sub ".b" (f-0-4 8) (f-4-1 1) sub-sem)
7882 ; sub.BW:G src,dst (m16 #3 m32 #4)
7883 (binary-arith-src-dst sub G (f-0-4 #xA) (f-4-3 4) #x1 #xA sub-sem)
7884 ; sub.B.S src2,r0l/r0h (m16 #4)
7885 (binary-arith16-b-S-src2 sub (f-0-4 2) (f-4-1 1) sub-sem)
7886 ; sub.L:G #imm32,dst (m32 #2)
7887 (binary-arith32-imm-dst-defn SI SI .l 0 sub G #x9 #x3 #x1 sub-sem)
7888 ; sub.BW:S #imm,dst2 (m32 #3)
7889 (binary-arith32-s-imm-dst QI .b 0 sub #x0 #x7 sub-sem)
7890 (binary-arith32-s-imm-dst HI .w 1 sub #x0 #x7 sub-sem)
7891 ; sub.L:G src,dst (m32 #5)
7892 (binary-arith32-src-dst-defn SI SI .l 1 sub G #x1 #x0 sub-sem)
7894 ;-------------------------------------------------------------
7895 ; enter - enter function
7896 ; exitd - exit and deallocate stack frame
7897 ;-------------------------------------------------------------
7899 (define-pmacro (enter16-sem mach amt)
7900 (sequence ()
7901 (set (reg h-sp) (sub (reg h-sp) 2))
7902 (set (mem16 HI (reg h-sp)) (reg h-fb))
7903 (set (reg h-fb) (reg h-sp))
7904 (set (reg h-sp) (sub (reg h-sp) amt))))
7906 (define-pmacro (exit16-sem mach)
7907 (sequence ((SI newpc))
7908 (set (reg h-sp) (reg h-fb))
7909 (set (reg h-fb) (mem16 HI (reg h-sp)))
7910 (set (reg h-sp) (add (reg h-sp) 2))
7911 (set newpc (mem16 HI (reg h-sp)))
7912 (set (reg h-sp) (add (reg h-sp) 2))
7913 (set newpc (or newpc (sll (mem16 QI (reg h-sp)) (const 16))))
7914 (set (reg h-sp) (add (reg h-sp) 1))
7915 (set pc newpc)))
7917 (define-pmacro (enter32-sem mach amt)
7918 (sequence ()
7919 (set (reg h-sp) (sub (reg h-sp) 4))
7920 (set (mem32 SI (reg h-sp)) (reg h-fb))
7921 (set (reg h-fb) (reg h-sp))
7922 (set (reg h-sp) (sub (reg h-sp) amt))))
7924 (define-pmacro (exit32-sem mach)
7925 (sequence ((SI newpc))
7926 (set (reg h-sp) (reg h-fb))
7927 (set (reg h-fb) (mem32 SI (reg h-sp)))
7928 (set (reg h-sp) (add (reg h-sp) 4))
7929 (set newpc (mem32 SI (reg h-sp)))
7930 (set (reg h-sp) (add (reg h-sp) 4))
7931 (set pc newpc)))
7933 (dni enter16 "enter #Imm-16-QI" ((machine 16))
7934 ("enter #${Dsp-16-u8}")
7935 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 2) Dsp-16-u8)
7936 (enter16-sem 16 Dsp-16-u8)
7937 ())
7939 (dni exitd16 "exitd" ((machine 16))
7940 ("exitd")
7941 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 2))
7942 (exit16-sem 16)
7943 ())
7945 (dni enter32 "enter #Imm-8-QI" ((machine 32))
7946 ("enter #${Dsp-8-u8}")
7947 (+ (f-0-4 #xE) (f-4-4 #xC) Dsp-8-u8)
7948 (enter32-sem 32 Dsp-8-u8)
7949 ())
7951 (dni exitd32 "exitd" ((machine 32))
7952 ("exitd")
7953 (+ (f-0-4 #xF) (f-4-4 #xC))
7954 (exit32-sem 32)
7955 ())
7957 ;-------------------------------------------------------------
7958 ; fclr - flag register clear
7959 ; fset - flag register set
7960 ;-------------------------------------------------------------
7962 (define-pmacro (set-flags-sem flag)
7963 (sequence ((SI tmp))
7964 (case DFLT flag
7965 ((#x0) (set cbit 1))
7966 ((#x1) (set dbit 1))
7967 ((#x2) (set zbit 1))
7968 ((#x3) (set sbit 1))
7969 ((#x4) (set bbit 1))
7970 ((#x5) (set obit 1))
7971 ((#x6) (set ibit 1))
7972 ((#x7) (set ubit 1)))
7973 )
7974 )
7976 (define-pmacro (clear-flags-sem flag)
7977 (sequence ((SI tmp))
7978 (case DFLT flag
7979 ((#x0) (set cbit 0))
7980 ((#x1) (set dbit 0))
7981 ((#x2) (set zbit 0))
7982 ((#x3) (set sbit 0))
7983 ((#x4) (set bbit 0))
7984 ((#x5) (set obit 0))
7985 ((#x6) (set ibit 0))
7986 ((#x7) (set ubit 0)))
7987 )
7988 )
7990 (dni fclr16 "fclr flag" ((machine 16))
7991 ("fclr ${flags16}")
7992 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 5))
7993 (clear-flags-sem flags16)
7994 ())
7996 (dni fset16 "fset flag" ((machine 16))
7997 ("fset ${flags16}")
7998 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) flags16 (f-12-4 4))
7999 (set-flags-sem flags16)
8000 ())
8002 (dni fclr "fclr" ((machine 32))
8003 ("fclr ${flags32}")
8004 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xE) (f-12-1 1) flags32)
8005 (clear-flags-sem flags32)
8006 ())
8008 (dni fset "fset" ((machine 32))
8009 ("fset ${flags32}")
8010 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xE) (f-12-1 1) flags32)
8011 (set-flags-sem flags32)
8012 ())
8014 ;-------------------------------------------------------------
8015 ; inc - increment
8016 ;-------------------------------------------------------------
8018 (define-pmacro (inc-sem mode dest)
8019 (sequence ((mode result))
8020 (set result (add mode dest 1))
8021 (set-z-and-s result)
8022 (set dest result))
8023 )
8025 (dni inc16.b
8026 "inc.b Dst16-3-S-8"
8027 ((machine 16))
8028 "inc.b ${Dst16-3-S-8}"
8029 (+ (f-0-4 #xA) (f-4-1 #x0) Dst16-3-S-8)
8030 (inc-sem QI Dst16-3-S-8)
8031 ())
8033 (dni inc16.w
8034 "inc.w Dst16An-S"
8035 ((machine 16))
8036 "inc.w ${Dst16An-S}"
8037 (+ (f-0-4 #xB) (f-5-3 #x2) Dst16An-S)
8038 (inc-sem HI Dst16An-S)
8039 ())
8041 (unary32-defn QI .b 0 inc #xA #x0 #xE inc-sem)
8042 (unary32-defn HI .w 1 inc #xA #x0 #xE inc-sem)
8044 ;-------------------------------------------------------------
8045 ; freit - fast return from interrupt (m32)
8046 ; int - interrupt
8047 ; into - interrupt on overflow
8048 ;-------------------------------------------------------------
8050 ; ??? semantics
8051 (dni freit32 "FREIT" ((machine 32))
8052 ("freit")
8053 (+ (f-0-4 9) (f-4-4 #xF))
8054 (nop)
8055 ())
8057 (dni int16 "int Dsp-10-u6" ((machine 16))
8058 ("int #${Dsp-10-u6}")
8059 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-2 3) Dsp-10-u6)
8060 (c-call VOID "do_int" pc Dsp-10-u6)
8061 ())
8063 (dni into16 "into" ((machine 16))
8064 ("into")
8065 (+ (f-0-4 #xF) (f-4-4 6))
8066 (nop)
8067 ())
8069 (dni int32 "int Dsp-8-u6" ((machine 32))
8070 ("int #${Dsp-8-u6}")
8071 (+ (f-0-4 #xB) (f-4-4 #xE) Dsp-8-u6 (f-14-2 0))
8072 (c-call VOID "do_int" pc Dsp-8-u6)
8073 ())
8075 (dni into32 "into" ((machine 32))
8076 ("into")
8077 (+ (f-0-4 #xB) (f-4-4 #xF))
8078 (nop)
8079 ())
8081 ;-------------------------------------------------------------
8082 ; index (m32c)
8083 ;-------------------------------------------------------------
8085 ; TODO add support to insns allowing index
8086 (define-pmacro (indexb-sem mode d) (set SrcIndex d) (set DstIndex d))
8087 (define-pmacro (indexbd-sem mode d) (set SrcIndex (const 0)) (set DstIndex d))
8088 (define-pmacro (indexbs-sem mode d) (set SrcIndex d) (set DstIndex (const 0)))
8089 (define-pmacro (indexw-sem mode d)
8090 (set SrcIndex (sll d (const 2))) (set DstIndex (sll d (const 2))))
8091 (define-pmacro (indexwd-sem mode d)
8092 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
8093 (define-pmacro (indexws-sem mode d)
8094 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
8095 (define-pmacro (indexl-sem mode d)
8096 (set SrcIndex d) (set DstIndex (sll d (const 2))))
8097 (define-pmacro (indexld-sem mode d)
8098 (set SrcIndex (const 0)) (set DstIndex (sll d (const 2))))
8099 (define-pmacro (indexls-sem mode d)
8100 (set SrcIndex (sll d (const 2))) (set DstIndex (const 0)))
8102 ; Note that "wbit" not where the size bit goes here, hence, it's
8103 ; always 0 in these calls but op2 differs instead.
8105 ; indexb src (index byte)
8106 (unary32-defn QI .b 0 indexb #x8 0 #x3 indexb-sem)
8107 (unary32-defn HI .w 0 indexb #x8 1 #x3 indexb-sem)
8108 ; indexbd src (index byte dest)
8109 (unary32-defn QI .b 0 indexbd #xA 0 3 indexbd-sem)
8110 (unary32-defn HI .w 0 indexbd #xA 1 3 indexbd-sem)
8111 ; indexbs src (index byte src)
8112 (unary32-defn QI .b 0 indexbs #xC 0 3 indexbs-sem)
8113 (unary32-defn HI .w 0 indexbs #xC 1 3 indexbs-sem)
8114 ; indexl src (index long)
8115 (unary32-defn QI .b 0 indexl 9 2 3 indexl-sem)
8116 (unary32-defn HI .w 0 indexl 9 3 3 indexl-sem)
8117 ; indexld src (index long dest)
8118 (unary32-defn QI .b 0 indexld #xB 2 3 indexld-sem)
8119 (unary32-defn HI .w 0 indexld #xB 3 3 indexld-sem)
8120 ; indexls src (index long src)
8121 (unary32-defn QI .b 0 indexls 9 0 3 indexls-sem)
8122 (unary32-defn HI .w 0 indexls 9 1 3 indexls-sem)
8123 ; indexw src (index word)
8124 (unary32-defn QI .b 0 indexw 8 2 3 indexw-sem)
8125 (unary32-defn HI .w 0 indexw 8 3 3 indexw-sem)
8126 ; indexwd src (index word dest)
8127 (unary32-defn QI .b 0 indexwd #xA 2 3 indexwd-sem)
8128 (unary32-defn HI .w 0 indexwd #xA 3 3 indexwd-sem)
8129 ; indexws (index word src)
8130 (unary32-defn QI .b 0 indexws #xC 2 3 indexws-sem)
8131 (unary32-defn HI .w 0 indexws #xC 3 3 indexws-sem)
8133 ;-------------------------------------------------------------
8134 ; jcc - jump on condition
8135 ;-------------------------------------------------------------
8137 (define-pmacro (jcnd32-sem cnd label)
8138 (sequence ()
8139 (case DFLT cnd
8140 ((#x00) (if (not cbit) (set pc label))) ;ltu nc
8141 ((#x01) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8142 ((#x02) (if (not zbit) (set pc label))) ;ne nz
8143 ((#x03) (if (not sbit) (set pc label))) ;pz
8144 ((#x04) (if (not obit) (set pc label))) ;no
8145 ((#x05) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8146 ((#x06) (if (not (xor sbit obit)) (set pc label))) ;ge
8147 ((#x08) (if (trunc BI cbit) (set pc label))) ;geu c
8148 ((#x09) (if (and cbit (not zbit)) (set pc label))) ;gtu
8149 ((#x0a) (if (trunc BI zbit) (set pc label))) ;eq z
8150 ((#x0b) (if (trunc BI sbit) (set pc label))) ;n
8151 ((#x0c) (if (trunc BI obit) (set pc label))) ;o
8152 ((#x0d) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8153 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8154 )
8155 )
8156 )
8158 (define-pmacro (jcnd16-sem cnd label)
8159 (sequence ()
8160 (case DFLT cnd
8161 ((#x00) (if (trunc BI cbit) (set pc label))) ;geu c
8162 ((#x01) (if (and cbit (not zbit)) (set pc label))) ;gtu
8163 ((#x02) (if (trunc BI zbit) (set pc label))) ;eq z
8164 ((#x03) (if (trunc BI sbit) (set pc label))) ;n
8165 ((#x04) (if (not cbit) (set pc label))) ;ltu nc
8166 ((#x05) (if (not (and cbit (not zbit))) (set pc label))) ;leu
8167 ((#x06) (if (not zbit) (set pc label))) ;ne nz
8168 ((#x07) (if (not sbit) (set pc label))) ;pz
8169 ((#x08) (if (or zbit (xor sbit obit)) (set pc label))) ;le
8170 ((#x09) (if (trunc BI obit) (set pc label))) ;o
8171 ((#x0a) (if (not (xor sbit obit)) (set pc label))) ;ge
8172 ((#x0c) (if (not (or zbit (xor sbit obit))) (set pc label))) ;gt
8173 ((#x0d) (if (not obit) (set pc label))) ;no
8174 ((#x0e) (if (xor sbit obit) (set pc label))) ;lt
8175 )
8176 )
8177 )
8179 (dni jcnd16-5
8180 "jCnd label"
8181 (RL_JUMP RELAXABLE (machine 16))
8182 "j$cond16j5 ${Lab-8-8}"
8183 (+ (f-0-4 #x6) (f-4-1 1) cond16j5 Lab-8-8)
8184 (jcnd16-sem cond16j5 Lab-8-8)
8185 ()
8186 )
8188 (dni jcnd16
8189 "jCnd label"
8190 (RL_JUMP RELAXABLE (machine 16))
8191 "j$cond16j ${Lab-16-8}"
8192 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xC) cond16j Lab-16-8)
8193 (jcnd16-sem cond16j Lab-16-8)
8194 ()
8195 )
8197 (dni jcnd32
8198 "jCnd label"
8199 (RL_JUMP RELAXABLE (machine 32))
8200 "j$cond32j ${Lab-8-8}"
8201 (+ (f-0-1 1) (f-4-3 5) cond32j Lab-8-8)
8202 (jcnd32-sem cond32j Lab-8-8)
8203 ()
8204 )
8206 ;-------------------------------------------------------------
8207 ; jmp - jump
8208 ;-------------------------------------------------------------
8210 ; jmp.s label3 (m16 #1)
8211 (dni jmp16.s "jmp.s Lab-5-3" (RL_JUMP RELAXABLE (machine 16))
8212 ("jmp.s ${Lab-5-3}")
8213 (+ (f-0-4 6) (f-4-1 0) Lab-5-3)
8214 (sequence () (set pc Lab-5-3))
8215 ())
8216 ; jmp.b label8 (m16 #2)
8217 (dni jmp16.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 16))
8218 ("jmp.b ${Lab-8-8}")
8219 (+ (f-0-4 #xF) (f-4-4 #xE) Lab-8-8)
8220 (sequence () (set pc Lab-8-8))
8221 ())
8222 ; jmp.w label16 (m16 #3)
8223 (dni jmp16.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
8224 ("jmp.w ${Lab-8-16}")
8225 (+ (f-0-4 #xF) (f-4-4 4) Lab-8-16)
8226 (sequence () (set pc Lab-8-16))
8227 ())
8228 ; jmp.a label24 (m16 #4)
8229 (dni jmp16.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
8230 ("jmp.a ${Lab-8-24}")
8231 (+ (f-0-4 #xF) (f-4-4 #xC) Lab-8-24)
8232 (sequence () (set pc Lab-8-24))
8233 ())
8235 (define-pmacro (jmp16-sem mode dst)
8236 (set pc (and dst #xfffff))
8237 )
8238 (define-pmacro (jmp32-sem mode dst)
8239 (set pc dst)
8240 )
8241 ; jmpi.w dst (m16 #1 m32 #2)
8242 (unary-insn-defn 16 16 HI .w jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 2) dst16-16-HI) jmp16-sem)
8243 (unary-insn-defn 32 16-Unprefixed HI .w jmpi (+ (f-0-4 #xC) (f-7-1 1) dst32-16-Unprefixed-HI (f-10-2 #x0) (f-12-4 #xF)) jmp32-sem)
8244 ; jmpi.a dst (m16 #2 m32 #2)
8245 (unary-insn-defn 16 16 SI .a jmpi (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 0) dst16-16-SI) jmp16-sem)
8246 (unary-insn-defn 32 16-Unprefixed SI .a jmpi (+ (f-0-4 #x8) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 #x0) (f-12-4 1)) jmp32-sem)
8247 ; jmps imm8 (m16 #1)
8248 (dni jmps16 "jmps Imm-8-QI" ((machine 16))
8249 ("jmps #${Imm-8-QI}")
8250 (+ (f-0-4 #xE) (f-4-4 #xE) Imm-8-QI)
8251 (sequence () (set pc Imm-8-QI))
8252 ())
8253 ; jmp.s label3 (m32 #1)
8254 (dni jmp32.s
8255 "jmp.s label"
8256 (RL_JUMP RELAXABLE (machine 32))
8257 "jmp.s ${Lab32-jmp-s}"
8258 (+ (f-0-2 1) (f-4-3 5) Lab32-jmp-s)
8259 (set pc Lab32-jmp-s)
8260 ()
8261 )
8262 ; jmp.b label8 (m32 #2)
8263 (dni jmp32.b "jmp.b Lab-8-8" (RL_JUMP RELAXABLE (machine 32))
8264 ("jmp.b ${Lab-8-8}")
8265 (+ (f-0-4 #xB) (f-4-4 #xB) Lab-8-8)
8266 (set pc Lab-8-8)
8267 ())
8268 ; jmp.w label16 (m32 #3)
8269 (dni jmp32.w "jmp.w Lab-8-16" (RL_JUMP RELAXABLE (machine 32))
8270 ("jmp.w ${Lab-8-16}")
8271 (+ (f-0-4 #xC) (f-4-4 #xE) Lab-8-16)
8272 (set pc Lab-8-16)
8273 ())
8274 ; jmp.a label24 (m32 #4)
8275 (dni jmp32.a "jmp.a Lab-8-24" (RL_JUMP RELAXABLE (machine 32))
8276 ("jmp.a ${Lab-8-24}")
8277 (+ (f-0-4 #xC) (f-4-4 #xC) Lab-8-24)
8278 (set pc Lab-8-24)
8279 ())
8280 ; jmp.s imm8 (m32 #1)
8281 (dni jmps32 "jmps Imm-8-QI" (RL_JUMP (machine 32))
8282 ("jmps #${Imm-8-QI}")
8283 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI)
8284 (set pc Imm-8-QI)
8285 ())
8287 ;-------------------------------------------------------------
8288 ; jsr jump subroutine
8289 ;-------------------------------------------------------------
8291 (define-pmacro (jsr16-sem length dst)
8292 (sequence ((SI tpc))
8293 (set tpc (add pc length))
8294 (set (reg h-sp) (sub (reg h-sp) 2))
8295 (set (mem16 HI (reg h-sp)) (srl (and tpc #xffff00) 8))
8296 (set (reg h-sp) (sub (reg h-sp) 1))
8297 (set (mem16 QI (reg h-sp)) (and tpc #xff))
8298 (set pc dst)
8299 )
8300 )
8301 (define-pmacro (jsr32-sem length dst)
8302 (sequence ((SI tpc))
8303 (set tpc (add pc length))
8304 (set (reg h-sp) (sub (reg h-sp) 2))
8305 (set (mem32 HI (reg h-sp)) (srl (and tpc #xffff0000) 16))
8306 (set (reg h-sp) (sub (reg h-sp) 2))
8307 (set (mem32 HI (reg h-sp)) (and tpc #xffff))
8308 (set pc dst)
8309 )
8310 )
8312 ; jsr.w label16 (m16 #1)
8313 (dni jsr16.w "jsr.w Lab-8-16" (RL_JUMP RELAXABLE (machine 16))
8314 ("jsr.w ${Lab-8-16}")
8315 (+ (f-0-4 #xF) (f-4-4 5) Lab-8-16)
8316 (jsr16-sem 3 Lab-8-16)
8317 ())
8318 ; jsr.a label24 (m16 #2)
8319 (dni jsr16.a "jsr.a Lab-8-24" (RL_JUMP RELAXABLE (machine 16))
8320 ("jsr.a ${Lab-8-24}")
8321 (+ (f-0-4 #xF) (f-4-4 #xD) Lab-8-24)
8322 (jsr16-sem 4 Lab-8-24)
8323 ())
8324 (define-pmacro (jsri-defn mode op16 op16-1 op16-2 op16-3 op16-sem
8325 op32 op32-1 op32-2 op32-3 op32-4 op32-sem len)
8326 (begin
8327 (dni (.sym jsri16 mode - op16)
8328 (.str "jsri." mode " " op16)
8329 (RL_1ADDR (machine 16))
8330 (.str "jsri." mode " ${" op16 "}")
8331 (+ op16-1 op16-2 op16-3 op16)
8332 (op16-sem len op16)
8333 ())
8334 (dni (.sym jsri32 mode - op32)
8335 (.str "jsri." mode " " op32)
8336 (RL_1ADDR (machine 32))
8337 (.str "jsri." mode " ${" op32 "}")
8338 (+ op32-1 op32-2 op32-3 op32-4 op32)
8339 (op32-sem len op32)
8340 ())
8341 )
8342 )
8343 ; jsri.w dst (m16 #1 m32 #1))
8344 (jsri-defn w dst16-16-20ar-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8345 dst32-16-24-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8346 (jsri-defn w dst16-16-16sa-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8347 dst32-16-16sa-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 4)
8348 (jsri-defn w dst16-16-8-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8349 dst32-16-8-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 3)
8350 (jsri-defn w dst16-basic-HI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x3) jsr16-sem
8351 dst32-basic-Unprefixed-HI (f-0-4 #xC) (f-7-1 1) (f-10-2 #x1) (f-12-4 #xF) jsr32-sem 2)
8353 ; jsri.a (m16 #2 m32 #2)
8354 (jsri-defn a dst16-16-20ar-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8355 dst32-16-24-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8356 (jsri-defn a dst16-16-8-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8357 dst32-16-8-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 3)
8358 (jsri-defn a dst16-16-16sa-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8359 dst32-16-16sa-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 4)
8360 (jsri-defn a dst16-basic-SI (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #x1) jsr16-sem
8361 dst32-basic-Unprefixed-SI (f-0-4 #x9) (f-7-1 0) (f-10-2 #x0) (f-12-4 #x1) jsr32-sem 2)
8363 (dni jsri32.a "jsr.w dst32-16-24-Unprefixed-HI" (RL_1ADDR (machine 32))
8364 ("jsri.a ${dst32-16-24-Unprefixed-SI}")
8365 (+ (f-0-4 #x9) (f-7-1 0) dst32-16-24-Unprefixed-SI (f-10-2 #x0) (f-12-4 #x1))
8366 (jsr32-sem 6 dst32-16-24-Unprefixed-SI)
8367 ())
8368 ; jsr.w label16 (m32 #1)
8369 (dni jsr32.w "jsr.w label" (RL_JUMP RELAXABLE (machine 32))
8370 ("jsr.w ${Lab-8-16}")
8371 (+ (f-0-4 #xC) (f-4-4 #xF) Lab-8-16)
8372 (jsr32-sem 3 Lab-8-16)
8373 ())
8374 ; jsr.a label16 (m32 #2)
8375 (dni jsr32.a "jsr.a label" (RL_JUMP (machine 32))
8376 ("jsr.a ${Lab-8-24}")
8377 (+ (f-0-4 #xC) (f-4-4 #xD) Lab-8-24)
8378 (jsr32-sem 4 Lab-8-24)
8379 ())
8380 ; jsrs imm8 (m16 #1)
8381 (dni jsrs16 "jsrs Imm-8-QI" ((machine 16))
8382 ("jsrs #${Imm-8-QI}")
8383 (+ (f-0-4 #xE) (f-4-4 #xF) Imm-8-QI)
8384 (jsr16-sem 2 Imm-8-QI)
8385 ())
8386 ; jsrs imm8 (m32 #1)
8387 (dni jsrs "jsrs #Imm-8-QI" ((machine 32))
8388 ("jsrs #${Imm-8-QI}")
8389 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI)
8390 (jsr32-sem 2 Imm-8-QI)
8391 ())
8393 ;-------------------------------------------------------------
8394 ; ldc - load control register
8395 ; stc - store control register
8396 ;-------------------------------------------------------------
8398 (define-pmacro (ldc32-cr1-sem src dst)
8399 (sequence ()
8400 (case DFLT dst
8401 ((#x0) (set (reg h-dct0) src))
8402 ((#x1) (set (reg h-dct1) src))
8403 ((#x2) (sequence ((HI tflag))
8404 (set tflag src)
8405 (if (and tflag #x1) (set cbit 1))
8406 (if (and tflag #x2) (set dbit 1))
8407 (if (and tflag #x4) (set zbit 1))
8408 (if (and tflag #x8) (set sbit 1))
8409 (if (and tflag #x10) (set bbit 1))
8410 (if (and tflag #x20) (set obit 1))
8411 (if (and tflag #x40) (set ibit 1))
8412 (if (and tflag #x80) (set ubit 1))))
8413 ((#x3) (set (reg h-svf) src))
8414 ((#x4) (set (reg h-drc0) src))
8415 ((#x5) (set (reg h-drc1) src))
8416 ((#x6) (set (reg h-dmd0) src))
8417 ((#x7) (set (reg h-dmd1) src))
8418 )
8419 )
8420 )
8421 (define-pmacro (ldc32-cr2-sem src dst)
8422 (sequence ()
8423 (case DFLT dst
8424 ((#x0) (set (reg h-intb) src))
8425 ((#x1) (set (reg h-sp) src))
8426 ((#x2) (set (reg h-sb) src))
8427 ((#x3) (set (reg h-fb) src))
8428 ((#x4) (set (reg h-svp) src))
8429 ((#x5) (set (reg h-vct) src))
8430 ((#x7) (set (reg h-isp) src))
8431 )
8432 )
8433 )
8434 (define-pmacro (ldc32-cr3-sem src dst)
8435 (sequence ()
8436 (case DFLT dst
8437 ((#x2) (set (reg h-dma0) src))
8438 ((#x3) (set (reg h-dma1) src))
8439 ((#x4) (set (reg h-dra0) src))
8440 ((#x5) (set (reg h-dra1) src))
8441 ((#x6) (set (reg h-dsa0) src))
8442 ((#x7) (set (reg h-dsa1) src))
8443 )
8444 )
8445 )
8446 (define-pmacro (ldc16-sem src dst)
8447 (sequence ()
8448 (case DFLT dst
8449 ((#x1) (set (reg h-intb) src))
8450 ((#x2) (set (reg h-intb) (or (reg h-intb) (sll src (const 16)))))
8451 ((#x3) (sequence ((HI tflag))
8452 (set tflag src)
8453 (if (and tflag #x1) (set cbit 1))
8454 (if (and tflag #x2) (set dbit 1))
8455 (if (and tflag #x4) (set zbit 1))
8456 (if (and tflag #x8) (set sbit 1))
8457 (if (and tflag #x10) (set bbit 1))
8458 (if (and tflag #x20) (set obit 1))
8459 (if (and tflag #x40) (set ibit 1))
8460 (if (and tflag #x80) (set ubit 1))))
8461 ((#x4) (set (reg h-isp) src))
8462 ((#x5) (set (reg h-sp) src))
8463 ((#x6) (set (reg h-sb) src))
8464 ((#x7) (set (reg h-fb) src))
8465 )
8466 )
8467 )
8469 (define-pmacro (stc32-cr1-sem src dst)
8470 (sequence ()
8471 (case DFLT src
8472 ((#x0) (set dst (reg h-dct0)))
8473 ((#x1) (set dst (reg h-dct1)))
8474 ((#x2) (sequence ((HI tflag))
8475 (set tflag 0)
8476 (if (eq cbit 1) (set tflag (or tflag #x1)))
8477 (if (eq dbit 1) (set tflag (or tflag #x2)))
8478 (if (eq zbit 1) (set tflag (or tflag #x4)))
8479 (if (eq sbit 1) (set tflag (or tflag #x8)))
8480 (if (eq bbit 1) (set tflag (or tflag #x10)))
8481 (if (eq obit 1) (set tflag (or tflag #x20)))
8482 (if (eq ibit 1) (set tflag (or tflag #x40)))
8483 (if (eq ubit 1) (set tflag (or tflag #x80)))
8484 (set dst tflag)))
8485 ((#x3) (set dst (reg h-svf)))
8486 ((#x4) (set dst (reg h-drc0)))
8487 ((#x5) (set dst (reg h-drc1)))
8488 ((#x6) (set dst (reg h-dmd0)))
8489 ((#x7) (set dst (reg h-dmd1)))
8490 )
8491 )
8492 )
8493 (define-pmacro (stc32-cr2-sem src dst)
8494 (sequence ()
8495 (case DFLT src
8496 ((#x0) (set dst (reg h-intb)))
8497 ((#x1) (set dst (reg h-sp)))
8498 ((#x2) (set dst (reg h-sb)))
8499 ((#x3) (set dst (reg h-fb)))
8500 ((#x4) (set dst (reg h-svp)))
8501 ((#x5) (set dst (reg h-vct)))
8502 ((#x7) (set dst (reg h-isp)))
8503 )
8504 )
8505 )
8506 (define-pmacro (stc32-cr3-sem src dst)
8507 (sequence ()
8508 (case DFLT src
8509 ((#x2) (set dst (reg h-dma0)))
8510 ((#x3) (set dst (reg h-dma1)))
8511 ((#x4) (set dst (reg h-dra0)))
8512 ((#x5) (set dst (reg h-dra1)))
8513 ((#x6) (set dst (reg h-dsa0)))
8514 ((#x7) (set dst (reg h-dsa1)))
8515 )
8516 )
8517 )
8518 (define-pmacro (stc16-sem src dst)
8519 (sequence ()
8520 (case DFLT src
8521 ((#x1) (set dst (and (reg h-intb) (const #xffff))))
8522 ((#x2) (set dst (srl (reg h-intb) (const 16))))
8523 ((#x3) (sequence ((HI tflag))
8524 (set tflag 0)
8525 (if (eq cbit 1) (set tflag (or tflag #x1)))
8526 (if (eq dbit 1) (set tflag (or tflag #x2)))
8527 (if (eq zbit 1) (set tflag (or tflag #x4)))
8528 (if (eq sbit 1) (set tflag (or tflag #x8)))
8529 (if (eq bbit 1) (set tflag (or tflag #x10)))
8530 (if (eq obit 1) (set tflag (or tflag #x20)))
8531 (if (eq ibit 1) (set tflag (or tflag #x40)))
8532 (if (eq ubit 1) (set tflag (or tflag #x80)))
8533 (set dst tflag)))
8534 ((#x4) (set dst (reg h-isp)))
8535 ((#x5) (set dst (reg h-sp)))
8536 ((#x6) (set dst (reg h-sb)))
8537 ((#x7) (set dst (reg h-fb)))
8538 )
8539 )
8540 )
8542 (dni ldc16.imm16 "ldc #imm,dst" ((machine 16))
8543 ("ldc #${Imm-16-HI},${cr16}")
8544 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 0) cr16 Imm-16-HI)
8545 (ldc16-sem Imm-16-HI cr16)
8546 ())
8548 (dni ldc16.dst "ldc src,dest" ((machine 16))
8549 ("ldc ${dst16-16-HI},${cr16}")
8550 (+ (f-0-4 7) (f-4-4 #xA) (f-8-1 1) cr16 dst16-16-HI)
8551 (ldc16-sem dst16-16-HI cr16)
8552 ())
8553 ; ldc src,dest (m32c #4)
8554 (dni ldc32.src-cr1 "ldc src,dst" ((machine 32))
8555 ("ldc ${dst32-24-Prefixed-HI},${cr1-Prefixed-32}")
8556 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 0) (f-20-1 1) cr1-Prefixed-32)
8557 (ldc32-cr1-sem dst32-24-Prefixed-HI cr1-Prefixed-32)
8558 ())
8559 ; ldc src,dest (m32c #5)
8560 (dni ldc32.src-cr2 "ldc src,dest" ((machine 32))
8561 ("ldc ${dst32-16-Unprefixed-SI},${cr2-32}")
8562 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 0) cr2-32)
8563 (ldc32-cr2-sem dst32-16-Unprefixed-SI cr2-32)
8564 ())
8565 ; ldc src,dest (m32c #6)
8566 (dni ldc32.src-cr3 "ldc src,dst" ((machine 32))
8567 ("ldc ${dst32-24-Prefixed-SI},${cr3-Prefixed-32}")
8568 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 0) (f-20-1 0) cr3-Prefixed-32)
8569 (ldc32-cr3-sem dst32-24-Prefixed-SI cr3-Prefixed-32)
8570 ())
8571 ; ldc src,dest (m32c #1)
8572 (dni ldc32.imm16-cr1 "ldc #imm,dst" ((machine 32))
8573 ("ldc #${Imm-16-HI},${cr1-Unprefixed-32}")
8574 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32 Imm-16-HI)
8575 (ldc32-cr1-sem Imm-16-HI cr1-Unprefixed-32)
8576 ())
8577 ; ldc src,dest (m32c #2)
8578 (dni ldc32.imm16-cr2 "ldc #imm,dst" ((machine 32))
8579 ("ldc #${Dsp-16-u24},${cr2-32}")
8580 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 2) (f-12-1 1) cr2-32 Dsp-16-u24)
8581 (ldc32-cr2-sem Dsp-16-u24 cr2-32)
8582 ())
8583 ; ldc src,dest (m32c #3)
8584 (dni ldc32.imm16-cr3 "ldc #imm,dst" ((machine 32))
8585 ("ldc #${Dsp-16-u24},${cr3-Unprefixed-32}")
8586 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 6) (f-12-1 1) cr3-Unprefixed-32 Dsp-16-u24)
8587 (ldc32-cr3-sem Dsp-16-u24 cr3-Unprefixed-32)
8588 ())
8590 (dni stc16.src "stc src,dest" ((machine 16))
8591 ("stc ${cr16},${dst16-16-HI}")
8592 (+ (f-0-4 7) (f-4-4 #xB) (f-8-1 1) cr16 dst16-16-HI)
8593 (stc16-sem cr16 dst16-16-HI )
8594 ())
8596 (dni stc16.pc "stc pc,dest" ((machine 16))
8597 ("stc pc,${dst16-16-HI}")
8598 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xC) dst16-16-HI)
8599 (sequence () (set dst16-16-HI (reg h-pc)))
8600 ())
8602 (dni stc32.src-cr1 "stc src,dst" ((machine 32))
8603 ("stc ${cr1-Prefixed-32},${dst32-24-Prefixed-HI}")
8604 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-HI (f-15-1 1) (f-18-2 1) (f-20-1 1) cr1-Prefixed-32)
8605 (stc32-cr1-sem cr1-Prefixed-32 dst32-24-Prefixed-HI )
8606 ())
8608 (dni stc32.src-cr2 "stc src,dest" ((machine 32))
8609 ("stc ${cr2-32},${dst32-16-Unprefixed-SI}")
8610 (+ (f-0-4 #xD) dst32-16-Unprefixed-SI (f-7-1 1) (f-10-2 0) (f-12-1 2) cr2-32)
8611 (stc32-cr2-sem cr2-32 dst32-16-Unprefixed-SI )
8612 ())
8614 (dni stc32.src-cr3 "stc src,dst" ((machine 32))
8615 ("stc ${cr3-Prefixed-32},${dst32-24-Prefixed-SI}")
8616 (+ (f-0-4 0) (f-4-4 1) (f-8-4 #xD) dst32-24-Prefixed-SI (f-15-1 1) (f-18-2 1) (f-20-1 0) cr3-Prefixed-32)
8617 (stc32-cr3-sem cr3-Prefixed-32 dst32-24-Prefixed-SI )
8618 ())
8620 ;-------------------------------------------------------------
8621 ; ldctx - load context
8622 ; stctx - store context
8623 ;-------------------------------------------------------------
8625 ; ??? semantics
8626 (dni ldctx16 "ldctx abs16,abs24" ((machine 16))
8627 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8628 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8629 (nop)
8630 ())
8631 (dni ldctx32 "ldctx abs16,abs24" ((machine 32))
8632 ("ldctx ${Dsp-16-u16},${Dsp-32-u24}")
8633 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xC) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8634 (nop)
8635 ())
8636 (dni stctx16 "stctx abs16,abs24" ((machine 16))
8637 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8638 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 #x0) Dsp-16-u16 Dsp-32-u24)
8639 (nop)
8640 ())
8641 (dni stctx32 "stctx abs16,abs24" ((machine 32))
8642 ("stctx ${Dsp-16-u16},${Dsp-32-u24}")
8643 (+ (f-0-4 #xB) (f-4-4 #x6) (f-8-4 #xD) (f-12-4 #x3) Dsp-16-u16 Dsp-32-u24)
8644 (nop)
8645 ())
8647 ;-------------------------------------------------------------
8648 ; lde - load from extra far data area (m16)
8649 ; ste - store to extra far data area (m16)
8650 ;-------------------------------------------------------------
8652 (lde-dst QI .b 0)
8653 (lde-dst HI .w 1)
8655 (ste-dst QI .b 0)
8656 (ste-dst HI .w 1)
8658 ;-------------------------------------------------------------
8659 ; ldipl - load interrupt permission level
8660 ;-------------------------------------------------------------
8662 ; ??? semantics
8663 ; ldintb <==> ldc #imm,intbh ; ldc #imm,intbl
8665 (dni ldipl16.imm "ldipl #imm" ((machine 16))
8666 ("ldipl #${Imm-13-u3}")
8667 (+ (f-0-4 #x7) (f-4-4 #xD) (f-8-4 #xA) (f-12-1 0) Imm-13-u3)
8668 (nop)
8669 ())
8670 (dni ldipl32.imm "ldipl #imm" ((machine 32))
8671 ("ldipl #${Imm-13-u3}")
8672 (+ (f-0-4 #xD) (f-4-4 5) (f-8-4 #xE) (f-12-1 1) Imm-13-u3)
8673 (nop)
8674 ())
8677 ;-------------------------------------------------------------
8678 ; max - maximum value
8679 ;-------------------------------------------------------------
8681 ; TODO check semantics for min -1,0
8682 (define-pmacro (max-sem mode src dst)
8683 (sequence ()
8684 (if (gt mode src dst)
8685 (set mode dst src)))
8686 )
8688 ; max.size:G #imm,dst
8689 (binary-arith32-imm-dst-Prefixed QI QI .b 0 max X #x8 #x3 #xF max-sem)
8690 (binary-arith32-imm-dst-Prefixed HI HI .w 1 max X #x8 #x3 #xF max-sem)
8692 ; max.BW:G src,dst
8693 (binary-arith32-src-dst-Prefixed QI QI .b 0 max X #x1 #xD max-sem)
8694 (binary-arith32-src-dst-Prefixed HI HI .w 1 max X #x1 #xD max-sem)
8696 ;-------------------------------------------------------------
8697 ; min - minimum value
8698 ;-------------------------------------------------------------
8700 (define-pmacro (min-sem mode src dst)
8701 (sequence ()
8702 (if (lt mode src dst)
8703 (set mode dst src)))
8704 )
8706 ; min.size:G #imm,dst
8707 (binary-arith32-imm-dst-Prefixed QI QI .b 0 min X #x8 #x2 #xF min-sem)
8708 (binary-arith32-imm-dst-Prefixed HI HI .w 1 min X #x8 #x2 #xF min-sem)
8710 ; min.BW:G src,dst
8711 (binary-arith32-src-dst-Prefixed QI QI .b 0 min X #x1 #xC min-sem)
8712 (binary-arith32-src-dst-Prefixed HI HI .w 1 min X #x1 #xC min-sem)
8714 ;-------------------------------------------------------------
8715 ; mov - move
8716 ;-------------------------------------------------------------
8718 (define-pmacro (mov-sem mode src1 dst)
8719 (sequence ((mode result))
8720 (set result src1)
8721 (set-z-and-s result)
8722 (set mode dst src1))
8723 )
8725 (define-pmacro (mov-dspsp-dst-sem mach mode src1 dst)
8726 (set dst (mem-mach mach mode (add sp src1)))
8727 )
8729 (define-pmacro (mov-src-dspsp-sem mach mode src dst1)
8730 (set (mem-mach mach mode (add sp dst1)) src)
8731 )
8733 (define-pmacro (mov16-imm-an-defn size mode imm regn op1 op2)
8734 (dni (.sym mov16. size .S-imm- regn)
8735 (.str "mov." size ":S " imm "," regn)
8736 ((machine 16))
8737 (.str "mov." size "$S #${" imm "}," regn)
8738 (+ op1 op2 imm)
8739 (mov-sem mode imm (reg (.sym h- regn)))
8740 ())
8741 )
8742 ; mov.size:G #imm,dst (m16 #1 m32 #1)
8743 (binary-arith-imm-dst mov G (f-0-4 7) (f-4-3 2) (f-8-4 #xC) #x9 #x2 #xF mov-sem)
8744 ; mov.L:G #imm32,dst (m32 #2)
8745 (binary-arith32-imm-dst-defn SI SI .l 0 mov G #xB #x3 #x1 mov-sem)
8746 ; mov.BW:S #imm,dst2 (m32 #4)
8747 (binary-arith32-s-imm-dst QI .b 0 mov #x0 #x2 mov-sem)
8748 (binary-arith32-s-imm-dst HI .w 1 mov #x0 #x2 mov-sem)
8749 ; mov.b:S #imm8,dst3 (m16 #3)
8750 (binary-arith16-b-S-imm8-dst3 mov ".b" (f-0-4 #xC) (f-4-1 0) mov-sem)
8751 ; mov.b:S #imm8,aN (m16 #4)
8752 (mov16-imm-an-defn b QI Imm-8-QI a0 (f-0-4 #xE) (f-4-4 2))
8753 (mov16-imm-an-defn b QI Imm-8-QI a1 (f-0-4 #xE) (f-4-4 #xA))
8754 (mov16-imm-an-defn w HI Imm-8-HI a0 (f-0-4 #xA) (f-4-4 2))
8755 (mov16-imm-an-defn w HI Imm-8-HI a1 (f-0-4 #xA) (f-4-4 #xA))
8756 ; mov.WL:S #imm,A0/A1 (m32 #5)
8757 (define-pmacro (mov32-wl-s-defn mode sz op1 imm regn op2)
8758 (dni (.sym mov32- sz - regn)
8759 (.str "mov." sz ":s" imm "," regn)
8760 ((machine 32))
8761 (.str "mov." sz "$S #${" imm "}," regn)
8762 (+ (f-0-4 op1) (f-4-4 op2) imm)
8763 (mov-sem mode imm (reg (.sym h- regn)))
8764 ())
8765 )
8766 (mov32-wl-s-defn HI w #x9 Imm-8-HI a0 #xC)
8767 (mov32-wl-s-defn HI w #x9 Imm-8-HI a1 #xD)
8768 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a0 #xC)
8769 (mov32-wl-s-defn SI l #xB Dsp-8-s24 a1 #xD)
8771 ; mov.size:Q #imm4,dst (m16 #2 m32 #3)
8772 (binary-arith16-imm4-dst-defn QI .b 0 0 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8773 (binary-arith16-imm4-dst-defn HI .w 0 1 mov (f-0-4 #xD) (f-4-3 4) mov-sem)
8774 (binary-arith32-imm4-dst-defn QI .b 1 0 mov #x7 #x2 mov-sem)
8775 (binary-arith32-imm4-dst-defn HI .w 1 1 mov #x7 #x2 mov-sem)
8777 ; mov.BW:Z #0,dst (m16 #5 m32 #6)
8778 (dni mov16.b-Z-imm8-dst3
8779 "mov.b:Z #0,Dst16-3-S-8"
8780 ((machine 16))
8781 "mov.b$Z #0,${Dst16-3-S-8}"
8782 (+ (f-0-4 #xB) (f-4-1 #x0) Dst16-3-S-8)
8783 (mov-sem QI (const 0) Dst16-3-S-8)
8784 ())
8785 ; (binary-arith16-b-Z-imm8-dst3 mov ".b" (f-0-4 #xB) (f-4-1 0) mov-sem)
8786 (binary-arith32-z-imm-dst QI .b 0 mov #x0 #x1 mov-sem)
8787 (binary-arith32-z-imm-dst HI .w 1 mov #x0 #x1 mov-sem)
8788 ; mov.BW:G src,dst (m16 #6 m32 #7)
8789 (binary-arith-src-dst mov G (f-0-4 #x7) (f-4-3 1) #x1 #xB mov-sem)
8790 ; mov.B:S src2,a0/a1 (m16 #7)
8791 (dni (.sym mov 16 .b.S-An)
8792 (.str mov ".b:S src2,a[01]")
8793 ((machine 16))
8794 (.str mov ".b$S ${src16-2-S},${Dst16AnQI-S}")
8795 (+ (f-0-4 #x3) (f-4-1 0) Dst16AnQI-S src16-2-S)
8796 (mov-sem QI src16-2-S Dst16AnQI-S)
8797 ())
8798 (define-pmacro (mov16-b-s-an-defn op1 op2 op2c)
8799 (dni (.sym mov16.b.S- op1 - op2)
8800 (.str mov ".b:S " op1 "," op2)
8801 ((machine 16))
8802 (.str mov ".b$S " op1 "," op2)
8803 (+ (f-0-4 #x3) op2c)
8804 (mov-sem QI (reg (.sym h- op1)) (reg (.sym h- op2)))
8805 ())
8806 )
8807 (mov16-b-s-an-defn r0l a1 (f-4-4 #x4))
8808 (mov16-b-s-an-defn r0h a0 (f-4-4 #x0))
8810 ; mov.L:G src,dst (m32 #8)
8811 (binary-arith32-src-dst-defn SI SI .l 1 mov G #x1 #x3 mov-sem)
8812 ; mov.B:S r0l/r0h,dst2 (m16 #8)
8813 (dni (.sym mov 16 .b.S-Rn-An)
8814 (.str mov ".b:S r0[lh],src2")
8815 ((machine 16))
8816 (.str mov ".b$S ${Dst16RnQI-S},${src16-2-S}")
8817 (+ (f-0-4 #x0) (f-4-1 0) Dst16RnQI-S src16-2-S)
8818 (mov-sem QI src16-2-S Dst16RnQI-S)
8819 ())
8821 ; mov.B.S src2,r0l/r0h (m16 #9)
8822 (binary-arith16-b-S-src2 mov (f-0-4 0) (f-4-1 1) mov-sem)
8824 ; mov.BW:S src2,r0l/r0 (m32 #9)
8825 ; mov.BW:S src2,r1l/r1 (m32 #10)
8826 (define-pmacro (mov32-src-r sz szcode mode src dst opc1 opc2)
8827 (begin
8828 (dni (.sym mov32. sz - src - dst)
8829 (.str "mov." sz "src," dst)
8830 ((machine 32))
8831 (.str "mov." sz "$S ${" (.sym src - mode) "}," dst)
8832 (+ (f-0-2 opc1) (.sym src - mode) (f-4-3 opc2) (f-7-1 szcode))
8833 (mov-sem mode (.sym src - mode) (reg (.sym h- dst)))
8834 ())
8835 )
8836 )
8837 (mov32-src-r b 0 QI dst32-2-S-16 r0l 0 4)
8838 (mov32-src-r w 1 HI dst32-2-S-16 r0 0 4)
8839 (mov32-src-r b 0 QI dst32-2-S-8 r0l 0 4)
8840 (mov32-src-r w 1 HI dst32-2-S-8 r0 0 4)
8841 (mov32-src-r b 0 QI dst32-2-S-basic r1l 1 7)
8842 (mov32-src-r w 1 HI dst32-2-S-basic r1 1 7)
8843 (mov32-src-r b 0 QI dst32-2-S-16 r1l 1 7)
8844 (mov32-src-r w 1 HI dst32-2-S-16 r1 1 7)
8845 (mov32-src-r b 0 QI dst32-2-S-8 r1l 1 7)
8846 (mov32-src-r w 1 HI dst32-2-S-8 r1 1 7)
8848 ; mov.BW:S r0l/r0,dst2 (m32 #11)
8849 (define-pmacro (mov32-r-dest sz szcode mode src dst opc1 opc2)
8850 (begin
8851 (dni (.sym mov32. sz - src - dst)
8852 (.str "mov." sz "src," dst)
8853 ((machine 32))
8854 (.str "mov." sz "$S " src ",${" (.sym dst - mode) "}")
8855 (+ (f-0-2 opc1) (.sym dst - mode) (f-4-3 opc2) (f-7-1 szcode))
8856 (mov-sem mode (reg (.sym h- src)) (.sym dst - mode))
8857 ())
8858 )
8859 )
8860 (mov32-r-dest b 0 QI r0l dst32-2-S-16 0 0)
8861 (mov32-r-dest w 1 HI r0 dst32-2-S-16 0 0)
8862 (mov32-r-dest b 0 QI r0l dst32-2-S-8 0 0)
8863 (mov32-r-dest w 1 HI r0 dst32-2-S-8 0 0)
8865 ; mov.L:S src,A0/A1 (m32 #12)
8866 (define-pmacro (mov32-src-a src dst dstcode opc1 opc2)
8867 (begin
8868 (dni (.sym mov32. sz - src - dst)
8869 (.str "mov." sz "src," dst)
8870 ((machine 32))
8871 (.str "mov.l" "$S ${" (.sym src - SI) "}," dst)
8872 (+ (f-0-2 opc1) (.sym src - SI) (f-4-3 opc2) (f-7-1 dstcode))
8873 (mov-sem SI (.sym src - SI) (reg (.sym h- dst)))
8874 ())
8875 )
8876 )
8877 (mov32-src-a dst32-2-S-16 a0 0 1 4)
8878 (mov32-src-a dst32-2-S-16 a1 1 1 4)
8879 (mov32-src-a dst32-2-S-8 a0 0 1 4)
8880 (mov32-src-a dst32-2-S-8 a1 1 1 4)
8882 ; mov.BW:G dsp8[sp],dst (m16 #10 m32 #13)
8883 ; mov.BW:G src,dsp8[sp] (m16 #11 m32 #14)
8884 (mov-dspsp-dst mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #xB) #xB #x0 #xF mov-dspsp-dst-sem)
8885 (mov-src-dspsp mov (f-0-4 #x7) (f-4-3 2) (f-8-4 #x3) #xA #x0 #xF mov-src-dspsp-sem)
8887 ;-------------------------------------------------------------
8888 ; mova - move effective address
8889 ;-------------------------------------------------------------
8891 (define-pmacro (mov16a-defn dst dstop dstcode)
8892 (dni (.sym mova16. src - dst)
8893 (.str "mova src," dst)
8894 ((machine 16))
8895 (.str "mova ${dst16-16-Mova-HI}," dst)
8896 (+ (f-0-4 #xE) (f-4-4 #xB) dst16-16-Mova-HI (f-8-4 dstcode))
8897 (sequence () (set HI (reg dstop) dst16-16-Mova-HI))
8898 ())
8899 )
8900 (mov16a-defn r0 h-r0 0)
8901 (mov16a-defn r1 h-r1 1)
8902 (mov16a-defn r2 h-r2 2)
8903 (mov16a-defn r3 h-r3 3)
8904 (mov16a-defn a0 h-a0 4)
8905 (mov16a-defn a1 h-a1 5)
8907 (define-pmacro (mov32a-defn dst dstop dstcode)
8908 (dni (.sym mova32. src - dst)
8909 (.str "mova src," dst)
8910 ((machine 32))
8911 (.str "mova ${dst32-16-Unprefixed-Mova-SI}," dst)
8912 (+ (f-0-4 #xD) dst32-16-Unprefixed-Mova-SI (f-7-1 1) (f-10-2 1) (f-12-1 1) (f-13-3 dstcode))
8913 (sequence () (set SI (reg dstop) dst32-16-Unprefixed-Mova-SI))
8914 ())
8915 )
8916 (mov32a-defn r2r0 h-r2r0 0)
8917 (mov32a-defn r3r1 h-r3r1 1)
8918 (mov32a-defn a0 h-a0 2)
8919 (mov32a-defn a1 h-a1 3)
8921 ;-------------------------------------------------------------
8922 ; movDir - move nibble
8923 ;-------------------------------------------------------------
8925 (define-pmacro (movdir-sem nib src dst)
8926 (sequence ((SI tmp))
8927 (case DFLT nib
8928 ((0) (set dst (or (and dst #xf0) (and src #xf))))
8929 ((1) (set dst (or (and dst #x0f) (sll (and src #xf) 4))))
8930 ((2) (set dst (or (and dst #xf0) (srl (and src #xf0) 4))))
8931 ((3) (set dst (or (and dst #x0f) (and src #xf0))))
8932 )
8933 )
8934 )
8935 ; movDir src,dst
8936 (define-pmacro (mov16dir-1-defn nib dircode dir)
8937 (dni (.sym mov nib 16 ".r0l-dst")
8938 (.str "mov" nib " r0l,dst")
8939 ((machine 16))
8940 (.str "mov" nib " r0l,${dst16-16-QI}")
8941 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8942 (movdir-sem dircode (reg h-r0l) dst16-16-QI)
8943 ())
8944 )
8945 (mov16dir-1-defn ll 0 8)
8946 (mov16dir-1-defn lh 1 #xA)
8947 (mov16dir-1-defn hl 2 9)
8948 (mov16dir-1-defn hh 3 #xB)
8949 (define-pmacro (mov16dir-2-defn nib dircode dir)
8950 (dni (.sym mov nib 16 ".src-r0l")
8951 (.str "mov" nib " src,r0l")
8952 ((machine 16))
8953 (.str "mov" nib " ${dst16-16-QI},r0l")
8954 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 dir) dst16-16-QI)
8955 (movdir-sem dircode dst16-16-QI (reg h-r0l))
8956 ())
8957 )
8958 (mov16dir-2-defn ll 0 0)
8959 (mov16dir-2-defn lh 1 2)
8960 (mov16dir-2-defn hl 2 1)
8961 (mov16dir-2-defn hh 3 3)
8963 (define-pmacro (mov32dir-1-defn nib o1o0)
8964 (dni (.sym mov nib 32 ".r0l-dst")
8965 (.str "mov" nib " r0l,dst")
8966 ((machine 32))
8967 (.str "mov" nib " r0l,${dst32-24-Prefixed-QI}")
8968 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xB) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8969 (movdir-sem o1o0 (reg h-r0l) dst32-24-Prefixed-QI)
8970 ())
8971 )
8972 (mov32dir-1-defn ll 0)
8973 (mov32dir-1-defn lh 1)
8974 (mov32dir-1-defn hl 2)
8975 (mov32dir-1-defn hh 3)
8976 (define-pmacro (mov32dir-2-defn nib o1o0)
8977 (dni (.sym mov nib 32 ".src-r0l")
8978 (.str "mov" nib " src,r0l")
8979 ((machine 32))
8980 (.str "mov" nib " ${dst32-24-Prefixed-QI},r0l")
8981 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #xA) dst32-24-Prefixed-QI (f-15-1 0) (f-18-2 o1o0) (f-20-4 #xE))
8982 (movdir-sem o1o0 dst32-24-Prefixed-QI (reg h-r0l))
8983 ())
8984 )
8985 (mov32dir-2-defn ll 0)
8986 (mov32dir-2-defn lh 1)
8987 (mov32dir-2-defn hl 2)
8988 (mov32dir-2-defn hh 3)
8990 ;-------------------------------------------------------------
8991 ; movx - move extend sign (m32)
8992 ;-------------------------------------------------------------
8994 (define-pmacro (movx-sem mode src dst)
8995 (sequence ((SI source) (SI result))
8996 (set SI result src)
8997 (set-z-and-s result)
8998 (set dst result))
8999 )
9001 ; movx #imm,dst
9002 (binary-arith32-imm-dst-defn QI SI "" 0 movx X #xB #x1 #x1 movx-sem)
9004 ;-------------------------------------------------------------
9005 ; mul - multiply
9006 ;-------------------------------------------------------------
9008 (define-pmacro (mul-sem mode src1 dst)
9009 (sequence ((mode result))
9010 (set obit (add-oflag mode src1 dst 0))
9011 (set result (mul mode src1 dst))
9012 (set dst result))
9013 )
9015 ; mul.BW #imm,dst
9016 (binary-arith-imm-dst mul G (f-0-4 7) (f-4-3 6) (f-8-4 5) #x8 #x1 #xF mul-sem)
9017 ; mul.BW src,dst
9018 (binary-arith-src-dst mul G (f-0-4 #x7) (f-4-3 4) #x1 #xC mul-sem)
9020 (dni mul_l "mul.l src,r2r0" ((machine 32))
9021 ("mul.l ${dst32-24-Prefixed-SI},r2r0")
9022 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x1) (f-20-4 #xf)
9023 dst32-24-Prefixed-SI)
9024 () ())
9026 (dni mulu_l "mulu.l src,r2r0" ((machine 32))
9027 ("mulu.l ${dst32-24-Prefixed-SI},r2r0")
9028 (+ (f-0-4 #x0) (f-4-4 #x1) (f-8-4 #x8) (f-15-1 #x1) (f-18-2 #x0) (f-20-4 #xf)
9029 dst32-24-Prefixed-SI)
9030 () ())
9031 ;-------------------------------------------------------------
9032 ; mulex - multiple extend sign (m32)
9033 ;-------------------------------------------------------------
9035 ; mulex src,dst
9036 ; (dni mulex-absolute-indirect "mulex [src]" ((machine 32))
9037 ; ("mulex ${dst32-24-absolute-indirect-HI}")
9038 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-absolute-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
9039 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-absolute-indirect-HI)))
9040 ; ())
9041 (dni mulex "mulex src" ((machine 32))
9042 ("mulex ${dst32-16-Unprefixed-Mulex-HI}")
9043 (+ (f-0-4 #xC) dst32-16-Unprefixed-Mulex-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9044 (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-16-Unprefixed-Mulex-HI)))
9045 ())
9046 ; (dni mulex-indirect "mulex [src]" ((machine 32))
9047 ; ("mulex ${dst32-24-indirect-HI}")
9048 ; (+ (f-0-4 0) (f-4-4 9) (f-8-4 #xC) dst32-24-indirect-HI (f-15-1 1) (f-18-2 3) (f-20-4 #xE))
9049 ; (set R1R2R0 (mul DI (ext DI R2R0) (ext DI dst32-24-indirect-HI)))
9050 ; ())
9052 ;-------------------------------------------------------------
9053 ; mulu - multiply unsigned
9054 ;-------------------------------------------------------------
9056 (define-pmacro (mulu-sem mode src1 dst)
9057 (sequence ((mode result))
9058 (set obit (add-oflag mode src1 dst 0))
9059 (set result (mul mode src1 dst))
9060 (set dst result))
9061 )
9063 ; mulu.BW #imm,dst
9064 (binary-arith-imm-dst mulu G (f-0-4 7) (f-4-3 6) (f-8-4 4) #x8 #x0 #xF mulu-sem)
9065 ; mulu.BW src,dst
9066 (binary-arith-src-dst mulu G (f-0-4 #x7) (f-4-3 0) #x1 #x4 mulu-sem)
9068 ;-------------------------------------------------------------
9069 ; neg - twos complement
9070 ;-------------------------------------------------------------
9072 (define-pmacro (neg-sem mode dst)
9073 (sequence ((mode result))
9074 (set result (neg mode dst))
9075 (set-z-and-s result)
9076 (set dst result))
9077 )
9079 ; neg.BW:G
9080 (unary-insn neg (f-0-4 7) (f-4-3 2) (f-8-4 #x5) #xA #x2 #xF neg-sem)
9082 ;-------------------------------------------------------------
9083 ; not - twos complement
9084 ;-------------------------------------------------------------
9086 (define-pmacro (not-sem mode dst)
9087 (sequence ((mode result))
9088 (set result (not mode dst))
9089 (set-z-and-s result)
9090 (set dst result))
9091 )
9093 ; not.BW:G
9094 (unary-insn-g not (f-0-4 7) (f-4-3 2) (f-8-4 #x7) #xA #x1 #xE not-sem)
9096 (dni not16.b.s
9097 "not.b:s Dst16-3-S-8"
9098 ((machine 16))
9099 "not.b:s ${Dst16-3-S-8}"
9100 (+ (f-0-4 #xb) (f-4-1 #x1) Dst16-3-S-8)
9101 (not-sem QI Dst16-3-S-8)
9102 ())
9104 ;-------------------------------------------------------------
9105 ; nop
9106 ;-------------------------------------------------------------
9108 (dni nop16
9109 "nop"
9110 ((machine 16))
9111 "nop"
9112 (+ (f-0-4 #x0) (f-4-4 #x4))
9113 (nop)
9114 ())
9116 (dni nop32
9117 "nop"
9118 ((machine 32))
9119 "nop"
9120 (+ (f-0-4 #xD) (f-4-4 #xE))
9121 (nop)
9122 ())
9124 ;-------------------------------------------------------------
9125 ; or - logical or
9126 ;-------------------------------------------------------------
9128 (define-pmacro (or-sem mode src1 dst)
9129 (sequence ((mode result))
9130 (set result (or mode src1 dst))
9131 (set-z-and-s result)
9132 (set dst result))
9133 )
9135 ; or.BW #imm,dst (m16 #1 m32 #1)
9136 (binary-arith-imm-dst or G (f-0-4 7) (f-4-3 3) (f-8-4 3) #x8 #x2 #xF or-sem)
9137 ; or.b:S #imm8,dst3 (m16 #2 m32 #2)
9138 (binary-arith16-b-S-imm8-dst3 or ".b" (f-0-4 9) (f-4-1 1) or-sem)
9139 (binary-arith32-s-imm-dst QI .b 0 or #x1 #x2 or-sem)
9140 (binary-arith32-s-imm-dst HI .w 1 or #x1 #x2 or-sem)
9141 ; or.BW src,dst (m16 #3 m32 #3)
9142 (binary-arith-src-dst or G (f-0-4 #x9) (f-4-3 4) #x1 #x5 or-sem)
9143 ; or.b:S src,r0[lh] (m16)
9144 (binary-arith16-b-S-src2 or (f-0-4 1) (f-4-1 1) or-sem)
9146 ;-------------------------------------------------------------
9147 ; pop - restore register/memory
9148 ;-------------------------------------------------------------
9150 ; TODO future: split this into .b and .w semantics
9151 (define-pmacro (pop-sem-mach mach mode dst)
9152 (sequence ((mode b_or_w) (SI length))
9153 (set b_or_w -1)
9154 (set b_or_w (srl b_or_w #x8))
9155 (if (eq b_or_w #x0)
9156 (set length 1) ; .b
9157 (set length 2)) ; .w
9159 (case DFLT length
9160 ((1) (set dst (mem-mach mach QI (reg h-sp))))
9161 ((2) (set dst (mem-mach mach HI (reg h-sp)))))
9162 (set (reg h-sp) (add (reg h-sp) length))
9163 )
9164 )
9166 (define-pmacro (pop-sem16 mode dest) (pop-sem-mach 16 mode dest))
9167 (define-pmacro (pop-sem32 mode dest) (pop-sem-mach 32 mode dest))
9169 ; pop.BW:G (m16 #1)
9170 (unary-insn-mach-g 16 pop (f-0-4 7) (f-4-3 2) (f-8-4 #xD) pop-sem16 $G)
9171 ; pop.BW:G (m32 #1)
9172 (unary-insn-mach 32 pop #xB #x2 #xF pop-sem32)
9174 ; pop.b:S r0l/r0h
9175 (dni pop16.b-s-rn "pop.b:S r0[lh]" ((machine 16))
9176 "pop.b$S ${Rn16-push-S-anyof}"
9177 (+ (f-0-4 #x9) Rn16-push-S-anyof (f-5-3 #x2))
9178 (pop-sem16 QI Rn16-push-S-anyof)
9179 ())
9180 ; pop.w:S a0/a1
9181 (dni pop16.b-s-an "pop.w:S a[01]" ((machine 16))
9182 "pop.w$S ${An16-push-S-anyof}"
9183 (+ (f-0-4 #xD) An16-push-S-anyof (f-5-3 #x2))
9184 (pop-sem16 HI An16-push-S-anyof)
9185 ())
9187 ;-------------------------------------------------------------
9188 ; popc - pop control register
9189 ; pushc - push control register
9190 ;-------------------------------------------------------------
9192 (define-pmacro (popc32-cr1-sem mode dst)
9193 (sequence ()
9194 (case DFLT dst
9195 ((#x0) (set (reg h-dct0) (mem32 mode (reg h-sp))))
9196 ((#x1) (set (reg h-dct1) (mem32 mode (reg h-sp))))
9197 ((#x2) (sequence ((HI tflag))
9198 (set tflag (mem32 mode (reg h-sp)))
9199 (if (and tflag #x1) (set cbit 1))
9200 (if (and tflag #x2) (set dbit 1))
9201 (if (and tflag #x4) (set zbit 1))
9202 (if (and tflag #x8) (set sbit 1))
9203 (if (and tflag #x10) (set bbit 1))
9204 (if (and tflag #x20) (set obit 1))
9205 (if (and tflag #x40) (set ibit 1))
9206 (if (and tflag #x80) (set ubit 1))))
9207 ((#x3) (set (reg h-svf) (mem32 mode (reg h-sp))))
9208 ((#x4) (set (reg h-drc0) (mem32 mode (reg h-sp))))
9209 ((#x5) (set (reg h-drc1) (mem32 mode (reg h-sp))))
9210 ((#x6) (set (reg h-dmd0) (mem32 mode (reg h-sp))))
9211 ((#x7) (set (reg h-dmd1) (mem32 mode (reg h-sp))))
9212 )
9213 (set (reg h-sp) (add (reg h-sp) 2))
9214 )
9215 )
9216 (define-pmacro (popc32-cr2-sem mode dst)
9217 (sequence ()
9218 (case DFLT dst
9219 ((#x0) (set (reg h-intb) (mem32 mode (reg h-sp))))
9220 ((#x1) (set (reg h-sp) (mem32 mode (reg h-sp))))
9221 ((#x2) (set (reg h-sb) (mem32 mode (reg h-sp))))
9222 ((#x3) (set (reg h-fb) (mem32 mode (reg h-sp))))
9223 ((#x7) (set (reg h-isp) (mem32 mode (reg h-sp))))
9224 )
9225 (set (reg h-sp) (add (reg h-sp) 4))
9226 )
9227 )
9228 (define-pmacro (popc16-sem mode dst)
9229 (sequence ()
9230 (case DFLT dst
9231 ((#x1) (set (reg h-intb) (or (and (reg h-intb) #x0000)
9232 (mem16 mode (reg h-sp)))))
9233 ((#x2) (set (reg h-intb) (or (and (reg h-intb) #xffff0000)
9234 (mem16 mode (reg h-sp)))))
9235 ((#x3) (sequence ((HI tflag))
9236 (set tflag (mem16 mode (reg h-sp)))
9237 (if (and tflag #x1) (set cbit 1))
9238 (if (and tflag #x2) (set dbit 1))
9239 (if (and tflag #x4) (set zbit 1))
9240 (if (and tflag #x8) (set sbit 1))
9241 (if (and tflag #x10) (set bbit 1))
9242 (if (and tflag #x20) (set obit 1))
9243 (if (and tflag #x40) (set ibit 1))
9244 (if (and tflag #x80) (set ubit 1))))
9245 ((#x4) (set (reg h-isp) (mem16 mode (reg h-sp))))
9246 ((#x5) (set (reg h-sp) (mem16 mode (reg h-sp))))
9247 ((#x6) (set (reg h-sb) (mem16 mode (reg h-sp))))
9248 ((#x7) (set (reg h-fb) (mem16 mode (reg h-sp))))
9249 )
9250 (set (reg h-sp) (add (reg h-sp) 2))
9251 )
9252 )
9253 ; popc dest (m16c #1)
9254 (dni popc16.imm16 "popc dst" ((machine 16))
9255 ("popc ${cr16}")
9256 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 3) cr16)
9257 (popc16-sem HI cr16)
9258 ())
9259 ; popc dest (m32c #1)
9260 (dni popc32.imm16-cr1 "popc dst" ((machine 32))
9261 ("popc ${cr1-Unprefixed-32}")
9262 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9263 (popc32-cr1-sem HI cr1-Unprefixed-32)
9264 ())
9265 ; popc dest (m32c #2)
9266 (dni popc32.imm16-cr2 "popc dst" ((machine 32))
9267 ("popc ${cr2-32}")
9268 (+ (f-0-4 #xD) (f-4-4 3) (f-8-4 2) (f-12-1 1) cr2-32)
9269 (popc32-cr2-sem SI cr2-32)
9270 ())
9272 (define-pmacro (pushc32-cr1-sem mode dst)
9273 (sequence ()
9274 (set (reg h-sp) (sub (reg h-sp) 2))
9275 (case DFLT dst
9276 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-dct0)))
9277 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-dct1)))
9278 ((#x2) (sequence ((HI tflag))
9279 (set tflag 0)
9280 (if (eq cbit 1) (set tflag (or tflag #x1)))
9281 (if (eq dbit 1) (set tflag (or tflag #x2)))
9282 (if (eq zbit 1) (set tflag (or tflag #x4)))
9283 (if (eq sbit 1) (set tflag (or tflag #x8)))
9284 (if (eq bbit 1) (set tflag (or tflag #x10)))
9285 (if (eq obit 1) (set tflag (or tflag #x20)))
9286 (if (eq ibit 1) (set tflag (or tflag #x40)))
9287 (if (eq ubit 1) (set tflag (or tflag #x80)))
9288 (set (mem32 mode (reg h-sp)) tflag)))
9289 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-svf)))
9290 ((#x4) (set (mem32 mode (reg h-sp)) (reg h-drc0)))
9291 ((#x5) (set (mem32 mode (reg h-sp)) (reg h-drc1)))
9292 ((#x6) (set (mem32 mode (reg h-sp)) (reg h-dmd0)))
9293 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-dmd1)))
9294 )
9295 )
9296 )
9297 (define-pmacro (pushc32-cr2-sem mode dst)
9298 (sequence ()
9299 (set (reg h-sp) (sub (reg h-sp) 4))
9300 (case DFLT dst
9301 ((#x0) (set (mem32 mode (reg h-sp)) (reg h-intb)))
9302 ((#x1) (set (mem32 mode (reg h-sp)) (reg h-sp)))
9303 ((#x2) (set (mem32 mode (reg h-sp)) (reg h-sb)))
9304 ((#x3) (set (mem32 mode (reg h-sp)) (reg h-fb)))
9305 ((#x7) (set (mem32 mode (reg h-sp)) (reg h-isp)))
9306 )
9307 )
9308 )
9309 (define-pmacro (pushc16-sem mode dst)
9310 (sequence ()
9311 (set (reg h-sp) (sub (reg h-sp) 2))
9312 (case DFLT dst
9313 ((#x1) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff)))
9314 ((#x2) (set (mem16 mode (reg h-sp)) (and (reg h-intb) #xffff0000)))
9315 ((#x3) (sequence ((HI tflag))
9316 (if (eq cbit 1) (set tflag (or tflag #x1)))
9317 (if (eq dbit 1) (set tflag (or tflag #x2)))
9318 (if (eq zbit 1) (set tflag (or tflag #x4)))
9319 (if (eq sbit 1) (set tflag (or tflag #x8)))
9320 (if (eq bbit 1) (set tflag (or tflag #x10)))
9321 (if (eq obit 1) (set tflag (or tflag #x20)))
9322 (if (eq ibit 1) (set tflag (or tflag #x40)))
9323 (if (eq ubit 1) (set tflag (or tflag #x80)))
9324 (set (mem16 mode (reg h-sp)) tflag)))
9326 ((#x4) (set (mem16 mode (reg h-sp)) (reg h-isp)))
9327 ((#x5) (set (mem16 mode (reg h-sp)) (reg h-sp)))
9328 ((#x6) (set (mem16 mode (reg h-sp)) (reg h-sb)))
9329 ((#x7) (set (mem16 mode (reg h-sp)) (reg h-fb)))
9330 )
9331 )
9332 )
9333 ; pushc src (m16c)
9334 (dni pushc16.imm16 "pushc dst" ((machine 16))
9335 ("pushc ${cr16}")
9336 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-1 0) (f-12-4 2) cr16)
9337 (pushc16-sem HI cr16)
9338 ())
9339 ; pushc src (m32c #1)
9340 (dni pushc32.imm16-cr1 "pushc dst" ((machine 32))
9341 ("pushc ${cr1-Unprefixed-32}")
9342 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 #xA) (f-12-1 1) cr1-Unprefixed-32)
9343 (pushc32-cr1-sem HI cr1-Unprefixed-32)
9344 ())
9345 ; pushc src (m32c #2)
9346 (dni pushc32.imm16-cr2 "pushc dst" ((machine 32))
9347 ("pushc ${cr2-32}")
9348 (+ (f-0-4 #xD) (f-4-4 1) (f-8-4 2) (f-12-1 1) cr2-32)
9349 (pushc32-cr2-sem SI cr2-32)
9350 ())
9352 ;-------------------------------------------------------------
9353 ; popm - pop multiple
9354 ; pushm - push multiple
9355 ;-------------------------------------------------------------
9357 (define-pmacro (popm-sem machine dst)
9358 (sequence ((SI addrlen))
9359 (if (eq machine 16)
9360 (set addrlen 2)
9361 (set addrlen 4))
9362 (if (and dst 1)
9363 (sequence () (set R0 (mem-mach machine HI (reg h-sp)))
9364 (set (reg h-sp) (add (reg h-sp) 2))))
9365 (if (and dst 2)
9366 (sequence () (set R1 (mem-mach machine HI (reg h-sp)))
9367 (set (reg h-sp) (add (reg h-sp) 2))))
9368 (if (and dst 4)
9369 (sequence () (set R2 (mem-mach machine HI (reg h-sp)))
9370 (set (reg h-sp) (add (reg h-sp) 2))))
9371 (if (and dst 8)
9372 (sequence () (set R3 (mem-mach machine HI (reg h-sp)))
9373 (set (reg h-sp) (add (reg h-sp) 2))))
9374 (if (and dst 16)
9375 (sequence () (set A0 (mem-mach machine HI (reg h-sp)))
9376 (set (reg h-sp) (add (reg h-sp) addrlen))))
9377 (if (and dst 32)
9378 (sequence () (set A1 (mem-mach machine HI (reg h-sp)))
9379 (set (reg h-sp) (add (reg h-sp) addrlen))))
9380 (if (and dst 64)
9381 (sequence () (set (reg h-sb) (mem-mach machine HI (reg h-sp)))
9382 (set (reg h-sp) (add (reg h-sp) addrlen))))
9383 (if (eq dst 128)
9384 (sequence () (set (reg h-fb) (mem-mach machine HI (reg h-sp)))
9385 (set (reg h-sp) (add (reg h-sp) addrlen))))
9386 )
9387 )
9389 (define-pmacro (pushm-sem machine dst)
9390 (sequence ((SI count) (SI addrlen))
9391 (if (eq machine 16)
9392 (set addrlen 2)
9393 (set addrlen 4))
9394 (if (eq dst 1)
9395 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9396 (set (mem-mach machine HI (reg h-sp)) (reg h-fb))))
9397 (if (and dst 2)
9398 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9399 (set (mem-mach machine HI (reg h-sp)) (reg h-sb))))
9400 (if (and dst 4)
9401 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9402 (set (mem-mach machine HI (reg h-sp)) A1)))
9403 (if (and dst 8)
9404 (sequence () (set (reg h-sp) (sub (reg h-sp) addrlen))
9405 (set (mem-mach machine HI (reg h-sp)) A0)))
9406 (if (and dst 16)
9407 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9408 (set (mem-mach machine HI (reg h-sp)) R3)))
9409 (if (and dst 32)
9410 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9411 (set (mem-mach machine HI (reg h-sp)) R2)))
9412 (if (and dst 64)
9413 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9414 (set (mem-mach machine HI (reg h-sp)) R1)))
9415 (if (and dst 128)
9416 (sequence () (set (reg h-sp) (sub (reg h-sp) 2))
9417 (set (mem-mach machine HI (reg h-sp)) R0)))
9418 )
9419 )
9421 (dni popm16 "popm regs" ((machine 16))
9422 ("popm ${Regsetpop}")
9423 (+ (f-0-4 #xE) (f-4-4 #xD) Regsetpop)
9424 (popm-sem 16 Regsetpop)
9425 ())
9426 (dni pushm16 "pushm regs" ((machine 16))
9427 ("pushm ${Regsetpush}")
9428 (+ (f-0-4 #xE) (f-4-4 #xC) Regsetpush)
9429 (pushm-sem 16 Regsetpush)
9430 ())
9431 (dni popm "popm regs" ((machine 32))
9432 ("popm ${Regsetpop}")
9433 (+ (f-0-4 #x8) (f-4-4 #xE) Regsetpop)
9434 (popm-sem 32 Regsetpop)
9435 ())
9436 (dni pushm "pushm regs" ((machine 32))
9437 ("pushm ${Regsetpush}")
9438 (+ (f-0-4 #x8) (f-4-4 #xF) Regsetpush)
9439 (pushm-sem 32 Regsetpush)
9440 ())
9442 ;-------------------------------------------------------------
9443 ; push - Save register/memory/immediate data
9444 ;-------------------------------------------------------------
9446 ; TODO future: split this into .b and .w semantics
9447 (define-pmacro (push-sem-mach mach mode dst)
9448 (sequence ((mode b_or_w) (SI length))
9449 (set b_or_w -1)
9450 (set b_or_w (srl b_or_w #x8))
9451 (if (eq b_or_w #x0)
9452 (set length 1) ; .b
9453 (if (eq b_or_w #xff)
9454 (set length 2) ; .w
9455 (set length 4))) ; .l
9456 (set (reg h-sp) (sub (reg h-sp) length))
9457 (case DFLT length
9458 ((1) (set (mem-mach mach QI (reg h-sp)) dst))
9459 ((2) (set (mem-mach mach HI (reg h-sp)) dst))
9460 ((4) (set (mem-mach mach SI (reg h-sp)) dst)))
9461 )
9462 )
9464 (define-pmacro (push-sem16 mode dst) (push-sem-mach 16 mode dst))
9465 (define-pmacro (push-sem32 mode dst) (push-sem-mach 32 mode dst))
9467 ; push.BW:G imm (m16 #1 m32 #1)
9468 (dni push16.b.G-imm "push.b:G #Imm-16-QI" ((machine 16))
9469 ("push.b$G #${Imm-16-QI}")
9470 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 2) Imm-16-QI)
9471 (push-sem16 QI Imm-16-QI)
9472 ())
9474 (dni push16.w.G-imm "push.w:G #Imm-16-HI" ((machine 16))
9475 ("push.w$G #${Imm-16-HI}")
9476 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 2) Imm-16-HI)
9477 (push-sem16 HI Imm-16-HI)
9478 ())
9480 (dni push32.b.imm "push.b #Imm-8-QI" ((machine 32))
9481 ("push.b #${Imm-8-QI}")
9482 (+ (f-0-4 #xA) (f-4-4 #xE) Imm-8-QI)
9483 (push-sem32 QI Imm-8-QI)
9484 ())
9486 (dni push32.w.imm "push.w #Imm-8-HI" ((machine 32))
9487 ("push.w #${Imm-8-HI}")
9488 (+ (f-0-4 #xA) (f-4-4 #xF) Imm-8-HI)
9489 (push-sem32 HI Imm-8-HI)
9490 ())
9492 ; push.BW:G src (m16 #2)
9493 (unary-insn-mach-g 16 push (f-0-4 7) (f-4-3 2) (f-8-4 #x4) push-sem16 $G)
9494 ; push.BW:G src (m32 #2)
9495 (unary-insn-mach 32 push #xC #x0 #xE push-sem32)
9498 ; push.b:S r0l/r0h (m16 #3)
9499 (dni push16.b-s-rn "push.b:S r0[lh]" ((machine 16))
9500 "push.b$S ${Rn16-push-S-anyof}"
9501 (+ (f-0-4 #x8) Rn16-push-S-anyof (f-5-3 #x2))
9502 (push-sem16 QI Rn16-push-S-anyof)
9503 ())
9504 ; push.w:S a0/a1 (m16 #4)
9505 (dni push16.b-s-an "push.w:S a[01]" ((machine 16))
9506 "push.w$S ${An16-push-S-anyof}"
9507 (+ (f-0-4 #xC) An16-push-S-anyof (f-5-3 #x2))
9508 (push-sem16 HI An16-push-S-anyof)
9509 ())
9511 ; push.l imm32 (m32 #3)
9512 (dni push32.l.imm "push.l #Imm-16-SI" ((machine 32))
9513 ("push.l #${Imm-16-SI}")
9514 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 5) (f-12-4 3) Imm-16-SI)
9515 (push-sem32 SI Imm-16-SI)
9516 ())
9517 ; push.l src (m32 #4)
9518 (unary-insn-defn 32 16-Unprefixed SI .l push (+ (f-0-4 #xA) (f-7-1 0) dst32-16-Unprefixed-SI (f-10-2 0) (f-12-4 1)) push-sem32)
9520 ;-------------------------------------------------------------
9521 ; pusha - push effective address
9522 ;------------------------------------------------------------
9524 (define-pmacro (push16a-sem mode dst)
9525 (sequence ()
9526 (set (reg h-sp) (sub (reg h-sp) 2))
9527 (set (mem16 HI (reg h-sp)) dst))
9528 )
9529 (define-pmacro (push32a-sem mode dst)
9530 (sequence ()
9531 (set (reg h-sp) (sub (reg h-sp) 4))
9532 (set (mem32 SI (reg h-sp)) dst))
9533 )
9534 (unary-insn-defn 16 16-Mova HI "" pusha (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 9) dst16-16-Mova-HI) push16a-sem)
9535 (unary-insn-defn 32 16-Unprefixed-Mova SI "" pusha (+ (f-0-4 #xB) (f-7-1 0) dst32-16-Unprefixed-Mova-SI (f-10-2 0) (f-12-4 1)) push32a-sem)
9537 ;-------------------------------------------------------------
9538 ; reit - return from interrupt
9539 ;-------------------------------------------------------------
9541 ; ??? semantics
9542 (dni reit16 "REIT" ((machine 16))
9543 ("reit")
9544 (+ (f-0-4 #xF) (f-4-4 #xB))
9545 (nop)
9546 ())
9547 (dni reit32 "REIT" ((machine 32))
9548 ("reit")
9549 (+ (f-0-4 9) (f-4-4 #xE))
9550 (nop)
9551 ())
9553 ;-------------------------------------------------------------
9554 ; rmpa - repeat multiple and addition
9555 ;-------------------------------------------------------------
9557 ; TODO semantics
9558 (dni rmpa16.b "rmpa.size" ((machine 16))
9559 ("rmpa.b")
9560 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 1))
9561 (nop)
9562 ())
9563 (dni rmpa16.w "rmpa.size" ((machine 16))
9564 ("rmpa.w")
9565 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 1))
9566 (nop)
9567 ())
9568 (dni rmpa32.b "rmpa.size" ((machine 32))
9569 ("rmpa.b")
9570 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 4) (f-12-4 3))
9571 (nop)
9572 ())
9574 (dni rmpa32.w "rmpa.size" ((machine 32))
9575 ("rmpa.w")
9576 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 5) (f-12-4 3))
9577 (nop)
9578 ())
9580 ;-------------------------------------------------------------
9581 ; rolc - rotate left with carry
9582 ;-------------------------------------------------------------
9584 ; TODO check semantics
9585 ; TODO future: split this into .b and .w semantics
9586 (define-pmacro (rolc-sem mode dst)
9587 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask))
9588 (set b_or_w -1)
9589 (set b_or_w (srl b_or_w #x8))
9590 (if (eq b_or_w #x0)
9591 (set mask #x8000) ; .b
9592 (set mask #x80000000)) ; .w
9593 (set ocbit cbit)
9594 (set cbit (and dst mask))
9595 (set result (sll mode dst 1))
9596 (set result (or result ocbit))
9597 (set-z-and-s result)
9598 (set dst result))
9599 )
9600 ; rolc.BW src,dst
9601 (unary-insn rolc (f-0-4 7) (f-4-3 3) (f-8-4 #xA) #xB #x2 #xE rolc-sem)
9603 ;-------------------------------------------------------------
9604 ; rorc - rotate right with carry
9605 ;-------------------------------------------------------------
9607 ; TODO check semantics
9608 ; TODO future: split this into .b and .w semantics
9609 (define-pmacro (rorc-sem mode dst)
9610 (sequence ((mode result) (SI ocbit) (mode b_or_w) (USI mask) (SI shamt))
9611 (set b_or_w -1)
9612 (set b_or_w (srl b_or_w #x8))
9613 (if (eq b_or_w #x0)
9614 (sequence () (set mask #x7fff) (set shamt 15)) ; .b
9615 (sequence () (set mask #x7fffffff) (set shamt 31))) ; .w
9616 (set ocbit cbit)
9617 (set cbit (and dst #x1))
9618 (set result (srl mode dst (const 1)))
9619 (set result (or (and result mask) (sll ocbit shamt)))
9620 (set-z-and-s result)
9621 (set dst result))
9622 )
9623 ; rorc.BW src,dst
9624 (unary-insn rorc (f-0-4 7) (f-4-3 3) (f-8-4 #xB) #xA #x2 #xE rorc-sem)
9626 ;-------------------------------------------------------------
9627 ; rot - rotate
9628 ;-------------------------------------------------------------
9630 ; TODO future: split this into .b and .w semantics
9631 (define-pmacro (rot-1-sem mode src1 dst)
9632 (sequence ((mode tmp) (mode b_or_w) (USI mask) (SI shift))
9633 (case DFLT src1
9634 ((#x0) (set shift 1))
9635 ((#x1) (set shift 2))
9636 ((#x2) (set shift 3))
9637 ((#x3) (set shift 4))
9638 ((#x4) (set shift 5))
9639 ((#x5) (set shift 6))
9640 ((#x6) (set shift 7))
9641 ((#x7) (set shift 8))
9642 ((-8) (set shift -1))
9643 ((-7) (set shift -2))
9644 ((-6) (set shift -3))
9645 ((-5) (set shift -4))
9646 ((-4) (set shift -5))
9647 ((-3) (set shift -6))
9648 ((-2) (set shift -7))
9649 ((-1) (set shift -8))
9650 (else (set shift 0))
9651 )
9652 (set b_or_w -1)
9653 (set b_or_w (srl b_or_w #x8))
9654 (if (eq b_or_w #x0)
9655 (set mask #x7fff) ; .b
9656 (set mask #x7fffffff)) ; .w
9657 (set tmp dst)
9658 (if (gt mode shift 0)
9659 (sequence ()
9660 (set tmp (rol mode tmp shift))
9661 (set cbit (and tmp #x1)))
9662 (sequence ()
9663 (set tmp (ror mode tmp (mul shift -1)))
9664 (set cbit (and tmp mask))))
9665 (set-z-and-s tmp)
9666 (set dst tmp))
9667 )
9668 (define-pmacro (rot-2-sem mode dst)
9669 (sequence ((mode tmp) (mode b_or_w) (USI mask))
9670 (set b_or_w -1)
9671 (set b_or_w (srl b_or_w #x8))
9672 (if (eq b_or_w #x0)
9673 (set mask #x7fff) ; .b
9674 (set mask #x7fffffff)) ; .w
9675 (set tmp dst)
9676 (if (gt mode (reg h-r1h) 0)
9677 (sequence ()
9678 (set tmp (rol mode tmp (reg h-r1h)))
9679 (set cbit (and tmp #x1)))
9680 (sequence ()
9681 (set tmp (ror mode tmp (reg h-r1h)))
9682 (set cbit (and tmp mask))))
9683 (set-z-and-s tmp)
9684 (set dst tmp))
9685 )
9687 ; rot.BW #imm4,dst
9688 (binary-arith16-shimm4-dst-defn QI .b 0 0 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9689 (binary-arith16-shimm4-dst-defn HI .w 0 1 rot (f-0-4 #xE) (f-4-3 0) rot-1-sem)
9690 (binary-arith32-shimm4-dst-defn QI .b 0 0 rot #x7 #x2 rot-1-sem)
9691 (binary-arith32-shimm4-dst-defn HI .w 0 1 rot #x7 #x2 rot-1-sem)
9692 ; rot.BW src,dst
9694 (dni rot16.b-dst "rot r1h,dest" ((machine 16))
9695 ("rot.b r1h,${dst16-16-QI}")
9696 (+ (f-0-4 7) (f-4-4 #x4) (f-8-4 #x6) dst16-16-QI)
9697 (rot-2-sem QI dst16-16-QI)
9698 ())
9699 (dni rot16.w-dst "rot r1h,dest" ((machine 16))
9700 ("rot.w r1h,${dst16-16-HI}")
9701 (+ (f-0-4 7) (f-4-4 #x5) (f-8-4 #x6) dst16-16-HI)
9702 (rot-2-sem HI dst16-16-HI)
9703 ())
9705 (dni rot32.b-dst "rot r1h,dest" ((machine 32))
9706 ("rot.b r1h,${dst32-16-Unprefixed-QI}")
9707 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xF))
9708 (rot-2-sem QI dst32-16-Unprefixed-QI)
9709 ())
9710 (dni rot32.w-dst "rot r1h,dest" ((machine 32))
9711 ("rot.w r1h,${dst32-16-Unprefixed-HI}")
9712 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xF))
9713 (rot-2-sem HI dst32-16-Unprefixed-HI)
9714 ())
9716 ;-------------------------------------------------------------
9717 ; rts - return from subroutine
9718 ;-------------------------------------------------------------
9720 (define-pmacro (rts16-sem)
9721 (sequence ((SI tpc))
9722 (set tpc (mem16 HI (reg h-sp)))
9723 (set (reg h-sp) (add (reg h-sp) 2))
9724 (set tpc (or tpc (sll (mem16 QI (reg h-sp)) 16)))
9725 (set (reg h-sp) (add (reg h-sp) 1))
9726 (set pc tpc)
9727 )
9728 )
9729 (define-pmacro (rts32-sem)
9730 (sequence ((SI tpc))
9731 (set tpc (mem32 HI (reg h-sp)))
9732 (set (reg h-sp) (add (reg h-sp) 2))
9733 (set tpc (or tpc (sll (mem32 HI (reg h-sp)) 16)))
9734 (set (reg h-sp) (add (reg h-sp) 2))
9735 (set pc tpc)
9736 )
9737 )
9739 (dni rts16 "rts" ((machine 16))
9740 ("rts")
9741 (+ (f-0-4 #xF) (f-4-4 3))
9742 (rts16-sem)
9743 ())
9745 (dni rts32 "rts" ((machine 32))
9746 ("rts")
9747 (+ (f-0-4 #xD) (f-4-4 #xF))
9748 (rts32-sem)
9749 ())
9751 ;-------------------------------------------------------------
9752 ; sbb - subtract with borrow
9753 ;-------------------------------------------------------------
9755 (define-pmacro (sbb-sem mode src dst)
9756 (sequence ((mode result))
9757 (set result (subc mode dst src cbit))
9758 (set obit (add-oflag mode dst src cbit))
9759 (set cbit (add-oflag mode dst src cbit))
9760 (set-z-and-s result)
9761 (set dst result))
9762 )
9764 ; sbb.size:G #imm,dst
9765 (binary-arith16-imm-dst-defn QI QI .b 0 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9766 (binary-arith16-imm-dst-defn HI HI .w 1 sbb X (f-0-4 7) (f-4-3 3) (f-8-4 7) sbb-sem)
9767 (binary-arith32-imm-dst-Prefixed QI QI .b 0 sbb X #x9 #x2 #xE sbb-sem)
9768 (binary-arith32-imm-dst-Prefixed HI HI .w 1 sbb X #x9 #x2 #xE sbb-sem)
9770 ; sbb.BW:G src,dst
9771 (binary-arith16-src-dst-defn QI QI .b 0 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9772 (binary-arith16-src-dst-defn HI HI .w 1 sbb X (f-0-4 #xB) (f-4-3 4) sbb-sem)
9773 (binary-arith32-src-dst-Prefixed QI QI .b 0 sbb X #x1 #x6 sbb-sem)
9774 (binary-arith32-src-dst-Prefixed HI HI .w 1 sbb X #x1 #x6 sbb-sem)
9776 ;-------------------------------------------------------------
9777 ; sbjnz - subtract then jump on not zero
9778 ;-------------------------------------------------------------
9780 (define-pmacro (sub-jnz-sem mode src dst label)
9781 (sequence ((mode result))
9782 (set result (sub mode dst src))
9783 (set dst result)
9784 (if (ne result 0)
9785 (set pc label)))
9786 )
9788 ; sbjnz.size #imm4,dst,label
9789 (arith-jnz-imm4-dst sbjnz s4n (f-0-4 #xF) (f-4-3 4) #xf #x1 sub-jnz-sem)
9791 ;-------------------------------------------------------------
9792 ; sccnd - store condition on condition (m32)
9793 ;-------------------------------------------------------------
9795 (define-pmacro (sccnd-sem cnd dst)
9796 (sequence ()
9797 (set dst 0)
9798 (case DFLT cnd
9799 ((#x00) (if (not cbit) (set dst 1))) ;ltu nc
9800 ((#x01) (if (or cbit zbit) (set dst 1))) ;leu
9801 ((#x02) (if (not zbit) (set dst 1))) ;ne nz
9802 ((#x03) (if (not sbit) (set dst 1))) ;pz
9803 ((#x04) (if (not obit) (set dst 1))) ;no
9804 ((#x05) (if (not (or zbit (xor sbit obit))) (set dst 1))) ;gt
9805 ((#x06) (if (xor sbit obit) (set dst 1))) ;ge
9806 ((#x08) (if (trunc BI cbit) (set dst 1))) ;geu c
9807 ((#x09) (if (not (or cbit zbit)) (set dst 1))) ;gtu
9808 ((#x0a) (if (trunc BI zbit) (set dst 1))) ;eq z
9809 ((#x0b) (if (trunc BI sbit) (set dst 1))) ;n
9810 ((#x0c) (if (trunc BI obit) (set dst 1))) ;o
9811 ((#x0d) (if (or zbit (xor sbit obit)) (set dst 1))) ;le
9812 ((#x0e) (if (xor sbit obit) (set dst 1))) ;lt
9813 )
9814 )
9815 )
9817 ; scCND dst
9818 (dni sccnd
9819 "sccnd dst"
9820 ((machine 32))
9821 "sc$sccond32 ${dst32-16-Unprefixed-HI}"
9822 (+ (f-0-4 #xD) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) sccond32)
9823 (sccnd-sem sccond32 dst32-16-Unprefixed-HI)
9824 ())
9826 ;-------------------------------------------------------------
9827 ; scmpu - string compare unequal (m32)
9828 ;-------------------------------------------------------------
9830 ; TODO semantics
9831 (dni scmpu.b "scmpu.b" ((machine 32))
9832 ("scmpu.b")
9833 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xC) (f-12-4 3))
9834 (c-call VOID "scmpu_QI_semantics")
9835 ())
9837 (dni scmpu.w "scmpu.w" ((machine 32))
9838 ("scmpu.w")
9839 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 #xD) (f-12-4 3))
9840 (c-call VOID "scmpu_HI_semantics")
9841 ())
9843 ;-------------------------------------------------------------
9844 ; sha - shift arithmetic
9845 ;-------------------------------------------------------------
9847 ; TODO future: split this into .b and .w semantics
9848 (define-pmacro (sha-sem mode src1 dst)
9849 (sequence ((mode result)(mode shift)(mode shmode))
9850 (case DFLT src1
9851 ((#x0) (set shift 1))
9852 ((#x1) (set shift 2))
9853 ((#x2) (set shift 3))
9854 ((#x3) (set shift 4))
9855 ((#x4) (set shift 5))
9856 ((#x5) (set shift 6))
9857 ((#x6) (set shift 7))
9858 ((#x7) (set shift 8))
9859 ((-8) (set shift -1))
9860 ((-7) (set shift -2))
9861 ((-6) (set shift -3))
9862 ((-5) (set shift -4))
9863 ((-4) (set shift -5))
9864 ((-3) (set shift -6))
9865 ((-2) (set shift -7))
9866 ((-1) (set shift -8))
9867 (else (set shift 0))
9868 )
9869 (set shmode -1)
9870 (set shmode (srl shmode #x8))
9871 (if (lt mode shift #x0) (set result (sra mode dst (mul shift -1))))
9872 (if (gt mode shift 0) (set result (sll mode dst shift)))
9873 (if (eq shmode #x0) ; QI
9874 (sequence
9875 ((mode cbitamt))
9876 (if (lt mode shift #x0)
9877 (set cbitamt (sub #x8 shift)) ; sra
9878 (set cbitamt (sub shift 1))) ; sll
9879 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9880 (set obit (ne (and dst #x80) (and result #x80)))
9881 ))
9882 (if (eq shmode #xff) ; HI
9883 (sequence
9884 ((mode cbitamt))
9885 (if (lt mode shift #x0)
9886 (set cbitamt (sub 16 shift)) ; sra
9887 (set cbitamt (sub shift 1))) ; sll
9888 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9889 (set obit (ne (and dst #x8000) (and result #x8000)))
9890 ))
9891 (set-z-and-s result)
9892 (set dst result))
9893 )
9894 (define-pmacro (shar1h-sem mode dst)
9895 (sequence ((mode result)(mode shmode))
9896 (set shmode -1)
9897 (set shmode (srl shmode #x8))
9898 (if (lt mode (reg h-r1h) 0) (set result (sra mode dst (reg h-r1h))))
9899 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
9900 (if (eq shmode #x0) ; QI
9901 (sequence
9902 ((mode cbitamt))
9903 (if (lt mode (reg h-r1h) #x0)
9904 (set cbitamt (sub #x8 (reg h-r1h))) ; sra
9905 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9906 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
9907 (set obit (ne (and dst #x80) (and result #x80)))
9908 ))
9909 (if (eq shmode #xff) ; HI
9910 (sequence
9911 ((mode cbitamt))
9912 (if (lt mode (reg h-r1h) #x0)
9913 (set cbitamt (sub 16 (reg h-r1h))) ; sra
9914 (set cbitamt (sub (reg h-r1h) 1))) ; sll
9915 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
9916 (set obit (ne (and dst #x8000) (and result #x8000)))
9917 ))
9918 (set-z-and-s result)
9919 (set dst result))
9920 )
9921 ; sha.BW #imm4,dst (m16 #1 m32 #1)
9922 (binary-arith16-shimm4-dst-defn QI .b 0 0 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9923 (binary-arith16-shimm4-dst-defn HI .w 0 1 sha (f-0-4 #xF) (f-4-3 0) sha-sem)
9924 (binary-arith32-shimm4-dst-defn QI .b 1 0 sha #x7 #x0 sha-sem)
9925 (binary-arith32-shimm4-dst-defn HI .w 1 1 sha #x7 #x0 sha-sem)
9926 ; sha.BW r1h,dst (m16 #2 m32 #3)
9927 (dni sha16.b-dst "sha.b r1h,dest" ((machine 16))
9928 ("sha.b r1h,${dst16-16-QI}")
9929 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xF) dst16-16-QI)
9930 (shar1h-sem HI dst16-16-QI)
9931 ())
9932 (dni sha16.w-dst "sha.w r1h,dest" ((machine 16))
9933 ("sha.w r1h,${dst16-16-HI}")
9934 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xF) dst16-16-HI)
9935 (shar1h-sem HI dst16-16-HI)
9936 ())
9937 (dni sha32.b-dst "sha.b r1h,dest" ((machine 32))
9938 ("sha.b r1h,${dst32-16-Unprefixed-QI}")
9939 (+ (f-0-4 #xB) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
9940 (shar1h-sem QI dst32-16-Unprefixed-QI)
9941 ())
9942 (dni sha32.w-dst "sha.w r1h,dest" ((machine 32))
9943 ("sha.w r1h,${dst32-16-Unprefixed-HI}")
9944 (+ (f-0-4 #xB) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
9945 (shar1h-sem HI dst32-16-Unprefixed-HI)
9946 ())
9947 ; sha.L #imm,dst (m16 #3)
9948 (dni sha16-L-imm-r2r0 "sha.L #Imm-sh-12-s4,r2r0" ((machine 16))
9949 "sha.l #${Imm-sh-12-s4},r2r0"
9950 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xA) Imm-sh-12-s4)
9951 (sha-sem SI Imm-sh-12-s4 (reg h-r2r0))
9952 ())
9953 (dni sha16-L-imm-r3r1 "sha.L #Imm-sh-12-s4,r3r1" ((machine 16))
9954 "sha.l #${Imm-sh-12-s4},r3r1"
9955 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #xB) Imm-sh-12-s4)
9956 (sha-sem SI Imm-sh-12-s4 (reg h-r3r1))
9957 ())
9958 ; sha.L r1h,dst (m16 #4)
9959 (dni sha16-L-r1h-r2r0 "sha.L r1h,r2r0" ((machine 16))
9960 "sha.l r1h,r2r0"
9961 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 2) (f-12-4 1))
9962 (sha-sem SI (reg h-r1h) (reg h-r2r0))
9963 ())
9964 (dni sha16-L-r1h-r3r1 "sha.L r1h,r3r1" ((machine 16))
9965 "sha.l r1h,r3r1"
9966 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 3) (f-12-4 1))
9967 (sha-sem SI (reg h-r1h) (reg h-r3r1))
9968 ())
9969 ; sha.L #imm8,dst (m32 #2)
9970 (binary-arith32-imm-dst-defn QI SI .l 0 sha X #xA #x2 #x1 sha-sem)
9971 ; sha.L r1h,dst (m32 #4)
9972 (dni sha32.l-dst "sha.l r1h,dest" ((machine 32))
9973 ("sha.l r1h,${dst32-16-Unprefixed-SI}")
9974 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 1) (f-12-4 1))
9975 (shar1h-sem QI dst32-16-Unprefixed-SI)
9976 ())
9978 ;-------------------------------------------------------------
9979 ; shanc - shift arithmetic non carry (m32)
9980 ;-------------------------------------------------------------
9982 ; TODO check semantics
9983 ; shanc.L #imm8,dst
9984 (binary-arith32-imm-dst-defn QI SI .l 0 shanc X #xC #x2 #x1 sha-sem)
9986 ;-------------------------------------------------------------
9987 ; shl - shift logical
9988 ;-------------------------------------------------------------
9990 ; TODO future: split this into .b and .w semantics
9991 (define-pmacro (shl-sem mode src1 dst)
9992 (sequence ((mode result)(mode shift)(mode shmode))
9993 (case DFLT src1
9994 ((#x0) (set shift 1))
9995 ((#x1) (set shift 2))
9996 ((#x2) (set shift 3))
9997 ((#x3) (set shift 4))
9998 ((#x4) (set shift 5))
9999 ((#x5) (set shift 6))
10000 ((#x6) (set shift 7))
10001 ((#x7) (set shift 8))
10002 ((-8) (set shift -1))
10003 ((-7) (set shift -2))
10004 ((-6) (set shift -3))
10005 ((-5) (set shift -4))
10006 ((-4) (set shift -5))
10007 ((-3) (set shift -6))
10008 ((-2) (set shift -7))
10009 ((-1) (set shift -8))
10010 (else (set shift 0))
10011 )
10012 (set shmode -1)
10013 (set shmode (srl shmode #x8))
10014 (if (lt mode shift #x0) (set result (srl mode dst (mul shift -1))))
10015 (if (gt mode shift 0) (set result (sll mode dst shift)))
10016 (if (eq shmode #x0) ; QI
10017 (sequence
10018 ((mode cbitamt))
10019 (if (lt mode shift #x0)
10020 (set cbitamt (sub #x8 shift)); srl
10021 (set cbitamt (sub shift 1))) ; sll
10022 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
10023 (set obit (ne (and dst #x80) (and result #x80)))
10024 ))
10025 (if (eq shmode #xff) ; HI
10026 (sequence
10027 ((mode cbitamt))
10028 (if (lt mode shift #x0)
10029 (set cbitamt (sub 16 shift)) ; srl
10030 (set cbitamt (sub shift 1))) ; sll
10031 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
10032 (set obit (ne (and dst #x8000) (and result #x8000)))
10033 ))
10034 (set-z-and-s result)
10035 (set dst result))
10036 )
10037 (define-pmacro (shlr1h-sem mode dst)
10038 (sequence ((mode result)(mode shmode))
10039 (set shmode -1)
10040 (set shmode (srl shmode #x8))
10041 (if (lt mode (reg h-r1h) 0) (set result (srl mode dst (reg h-r1h))))
10042 (if (gt mode (reg h-r1h) 0) (set result (sll mode dst (reg h-r1h))))
10043 (if (eq shmode #x0) ; QI
10044 (sequence
10045 ((mode cbitamt))
10046 (if (lt mode (reg h-r1h) #x0)
10047 (set cbitamt (sub #x8 (reg h-r1h))) ; srl
10048 (set cbitamt (sub (reg h-r1h) 1))) ; sll
10049 (set cbit (srl (and (sll dst cbitamt) #x80) #x7))
10050 (set obit (ne (and dst #x80) (and result #x80)))
10051 ))
10052 (if (eq shmode #xff) ; HI
10053 (sequence
10054 ((mode cbitamt))
10055 (if (lt mode (reg h-r1h) #x0)
10056 (set cbitamt (sub 16 (reg h-r1h))) ; srl
10057 (set cbitamt (sub (reg h-r1h) 1))) ; sll
10058 (set cbit (srl (and (sll dst cbitamt) #x8000) #xf))
10059 (set obit (ne (and dst #x8000) (and result #x8000)))
10060 ))
10061 (set-z-and-s result)
10062 (set dst result))
10063 )
10064 ; shl.BW #imm4,dst (m16 #1 m32 #1)
10065 (binary-arith16-shimm4-dst-defn QI .b 0 0 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
10066 (binary-arith16-shimm4-dst-defn HI .w 0 1 shl (f-0-4 #xE) (f-4-3 4) shl-sem)
10067 (binary-arith32-shimm4-dst-defn QI .b 0 0 shl #x7 #x0 shl-sem)
10068 (binary-arith32-shimm4-dst-defn HI .w 0 1 shl #x7 #x0 shl-sem)
10069 ; shl.BW r1h,dst (m16 #2 m32 #3)
10070 (dni shl16.b-dst "shl.b r1h,dest" ((machine 16))
10071 ("shl.b r1h,${dst16-16-QI}")
10072 (+ (f-0-4 7) (f-4-4 4) (f-8-4 #xE) dst16-16-QI)
10073 (shlr1h-sem HI dst16-16-QI)
10074 ())
10075 (dni shl16.w-dst "shl.w r1h,dest" ((machine 16))
10076 ("shl.w r1h,${dst16-16-HI}")
10077 (+ (f-0-4 7) (f-4-4 5) (f-8-4 #xE) dst16-16-HI)
10078 (shlr1h-sem HI dst16-16-HI)
10079 ())
10080 (dni shl32.b-dst "shl.b r1h,dest" ((machine 32))
10081 ("shl.b r1h,${dst32-16-Unprefixed-QI}")
10082 (+ (f-0-4 #xA) dst32-16-Unprefixed-QI (f-7-1 0) (f-10-2 3) (f-12-4 #xE))
10083 (shlr1h-sem QI dst32-16-Unprefixed-QI)
10084 ())
10085 (dni shl32.w-dst "shl.w r1h,dest" ((machine 32))
10086 ("shl.w r1h,${dst32-16-Unprefixed-HI}")
10087 (+ (f-0-4 #xA) dst32-16-Unprefixed-HI (f-7-1 1) (f-10-2 3) (f-12-4 #xE))
10088 (shlr1h-sem HI dst32-16-Unprefixed-HI)
10089 ())
10090 ; shl.L #imm,dst (m16 #3)
10091 (dni shl16-L-imm-r2r0 "shl.L #Imm-sh-12-s4,r2r0" ((machine 16))
10092 "shl.l #${Imm-sh-12-s4},r2r0"
10093 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x8) Imm-sh-12-s4)
10094 (shl-sem SI Imm-sh-12-s4 (reg h-r2r0))
10095 ())
10096 (dni shl16-L-imm-r3r1 "shl.L #Imm-sh-12-s4,r3r1" ((machine 16))
10097 "shl.l #${Imm-sh-12-s4},r3r1"
10098 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 #x9) Imm-sh-12-s4)
10099 (shl-sem SI Imm-sh-12-s4 (reg h-r3r1))
10100 ())
10101 ; shl.L r1h,dst (m16 #4)
10102 (dni shl16-L-r1h-r2r0 "shl.L r1h,r2r0" ((machine 16))
10103 "shl.l r1h,r2r0"
10104 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 0) (f-12-4 1))
10105 (shl-sem SI (reg h-r1h) (reg h-r2r0))
10106 ())
10107 (dni shl16-L-r1h-r3r1 "shl.L r1h,r3r1" ((machine 16))
10108 "shl.l r1h,r3r1"
10109 (+ (f-0-4 #xE) (f-4-4 #xB) (f-8-4 1) (f-12-4 1))
10110 (shl-sem SI (reg h-r1h) (reg h-r3r1))
10111 ())
10112 ; shl.L #imm8,dst (m32 #2)
10113 (binary-arith32-imm-dst-defn QI SI .l 0 shl X #x9 #x2 #x1 shl-sem)
10114 ; shl.L r1h,dst (m32 #4)
10115 (dni shl32.l-dst "shl.l r1h,dest" ((machine 32))
10116 ("shl.l r1h,${dst32-16-Unprefixed-SI}")
10117 (+ (f-0-4 #xC) dst32-16-Unprefixed-SI (f-7-1 0) (f-10-2 0) (f-12-4 1))
10118 (shlr1h-sem QI dst32-16-Unprefixed-SI)
10119 ())
10121 ;-------------------------------------------------------------
10122 ; shlnc - shift logical non carry
10123 ;-------------------------------------------------------------
10125 ; TODO check semantics
10126 ; shlnc.L #imm8,dst
10127 (binary-arith32-imm-dst-defn QI SI .l 0 shlnc X #x8 #x2 #x1 shl-sem)
10129 ;-------------------------------------------------------------
10130 ; sin - string input (m32)
10131 ;-------------------------------------------------------------
10133 ; TODO semantics
10134 (dni sin32.b "sin" ((machine 32))
10135 ("sin.b")
10136 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 8) (f-12-4 3))
10137 (c-call VOID "sin_QI_semantics")
10138 ())
10140 (dni sin32.w "sin" ((machine 32))
10141 ("sin.w")
10142 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 9) (f-12-4 3))
10143 (c-call VOID "sin_HI_semantics")
10144 ())
10146 ;-------------------------------------------------------------
10147 ; smovb - string move backward
10148 ;-------------------------------------------------------------
10150 ; TODO semantics
10151 (dni smovb16.b "smovb.b" ((machine 16))
10152 ("smovb.b")
10153 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 9))
10154 (c-call VOID "smovb_QI_semantics")
10155 ())
10157 (dni smovb16.w "smovb.w" ((machine 16))
10158 ("smovb.w")
10159 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 9))
10160 (c-call VOID "smovb_HI_semantics")
10161 ())
10163 (dni smovb32.b "smovb.b" ((machine 32))
10164 ("smovb.b")
10165 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 8) (f-12-4 3))
10166 (c-call VOID "smovb_QI_semantics")
10167 ())
10169 (dni smovb32.w "smovb.w" ((machine 32))
10170 ("smovb.w")
10171 (+ (f-0-4 #xB) (f-4-4 6) (f-8-4 9) (f-12-4 3))
10172 (c-call VOID "smovb_HI_semantics")
10173 ())
10175 ;-------------------------------------------------------------
10176 ; smovf - string move forward (m32)
10177 ;-------------------------------------------------------------
10179 ; TODO semantics
10180 (dni smovf16.b "smovf.b" ((machine 16))
10181 ("smovf.b")
10182 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 8))
10183 (c-call VOID "smovf_QI_semantics")
10184 ())
10186 (dni smovf16.w "smovf.w" ((machine 16))
10187 ("smovf.w")
10188 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 8))
10189 (c-call VOID "smovf_HI_semantics")
10190 ())
10192 (dni smovf32.b "smovf.b" ((machine 32))
10193 ("smovf.b")
10194 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 8) (f-12-4 3))
10195 (c-call VOID "smovf_QI_semantics")
10196 ())
10198 (dni smovf32.w "smovf.w" ((machine 32))
10199 ("smovf.w")
10200 (+ (f-0-4 #xB) (f-4-4 0) (f-8-4 9) (f-12-4 3))
10201 (c-call VOID "smovf_HI_semantics")
10202 ())
10204 ;-------------------------------------------------------------
10205 ; smovu - string move unequal (m32)
10206 ;-------------------------------------------------------------
10208 ; TODO semantics
10209 (dni smovu.b "smovu.b" ((machine 32))
10210 ("smovu.b")
10211 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 8) (f-12-4 3))
10212 (c-call VOID "smovu_QI_semantics")
10213 ())
10215 (dni smovu.w "smovu.w" ((machine 32))
10216 ("smovu.w")
10217 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 9) (f-12-4 3))
10218 (c-call VOID "smovu_HI_semantics")
10219 ())
10221 ;-------------------------------------------------------------
10222 ; sout - string output (m32)
10223 ;-------------------------------------------------------------
10225 ; TODO semantics
10226 (dni sout.b "sout.b" ((machine 32))
10227 ("sout.b")
10228 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 8) (f-12-4 3))
10229 (c-call VOID "sout_QI_semantics")
10230 ())
10232 (dni sout.w "sout" ((machine 32))
10233 ("sout.w")
10234 (+ (f-0-4 #xB) (f-4-4 4) (f-8-4 9) (f-12-4 3))
10235 (c-call VOID "sout_HI_semantics")
10236 ())
10238 ;-------------------------------------------------------------
10239 ; sstr - string store
10240 ;-------------------------------------------------------------
10242 ; TODO semantics
10243 (dni sstr16.b "sstr.b" ((machine 16))
10244 ("sstr.b")
10245 (+ (f-0-4 7) (f-4-4 #xC) (f-8-4 #xE) (f-12-4 #xA))
10246 (c-call VOID "sstr_QI_semantics")
10247 ())
10249 (dni sstr16.w "sstr.w" ((machine 16))
10250 ("sstr.w")
10251 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xE) (f-12-4 #xA))
10252 (c-call VOID "sstr_HI_semantics")
10253 ())
10255 (dni sstr.b "sstr" ((machine 32))
10256 ("sstr.b")
10257 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 0) (f-12-4 3))
10258 (c-call VOID "sstr_QI_semantics")
10259 ())
10261 (dni sstr.w "sstr" ((machine 32))
10262 ("sstr.w")
10263 (+ (f-0-4 #xB) (f-4-4 8) (f-8-4 1) (f-12-4 3))
10264 (c-call VOID "sstr_HI_semantics")
10265 ())
10267 ;-------------------------------------------------------------
10268 ; stnz - store on not zero
10269 ;-------------------------------------------------------------
10271 (define-pmacro (stnz-sem mode src dst)
10272 (sequence ()
10273 (if (ne zbit (const 1))
10274 (set dst src)))
10275 )
10276 ; stnz #imm8,dst3 (m16)
10277 (binary-arith16-b-S-imm8-dst3 stnz "" (f-0-4 #xD) (f-4-1 0) stnz-sem)
10278 ; stnz.BW #imm,dst (m32)
10279 (binary-arith32-imm-dst-defn QI QI .b 0 stnz X #x9 #x1 #xF stnz-sem)
10280 (binary-arith32-imm-dst-defn HI HI .w 1 stnz X #x9 #x1 #xF stnz-sem)
10282 ;-------------------------------------------------------------
10283 ; stz - store on zero
10284 ;-------------------------------------------------------------
10286 (define-pmacro (stz-sem mode src dst)
10287 (sequence ()
10288 (if (eq zbit (const 1))
10289 (set dst src)))
10290 )
10291 ; stz #imm8,dst3 (m16)
10292 (binary-arith16-b-S-imm8-dst3 stz "" (f-0-4 #xC) (f-4-1 1) stz-sem)
10293 ; stz.BW #imm,dst (m32)
10294 (binary-arith32-imm-dst-defn QI QI .b 0 stz X #x9 #x0 #xF stz-sem)
10295 (binary-arith32-imm-dst-defn HI HI .w 1 stz X #x9 #x0 #xF stz-sem)
10297 ;-------------------------------------------------------------
10298 ; stzx - store on zero extention
10299 ;-------------------------------------------------------------
10301 (define-pmacro (stzx-sem mode src1 src2 dst)
10302 (sequence ()
10303 (if (eq zbit (const 1))
10304 (set dst src1)
10305 (set dst src2)))
10306 )
10307 ; stzx #imm8,dst3 (m16)
10308 (dni stzx16-imm8-imm8-r0h "stzx #Imm8,#Imm8,r0h" ((machine 16))
10309 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0h")
10310 (+ (f-0-4 #xD) (f-4-4 #xB) Imm-8-QI Imm-16-QI)
10311 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0h))
10312 ())
10313 (dni stzx16-imm8-imm8-r0l "stzx #Imm8,#Imm8,r0l" ((machine 16))
10314 ("stzx #${Imm-8-QI},#${Imm-16-QI},r0l")
10315 (+ (f-0-4 #xD) (f-4-4 #xC) Imm-8-QI Imm-16-QI)
10316 (stzx-sem QI Imm-8-QI Imm-16-QI (reg h-r0l))
10317 ())
10318 (dni stzx16-imm8-imm8-dsp8sb "stzx #Imm8,#Imm8,dsp8[sb]" ((machine 16))
10319 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb]")
10320 (+ (f-0-4 #xD) (f-4-4 #xD) Imm-8-QI Dsp-16-u8 Imm-24-QI)
10321 (stzx-sem QI Imm-8-QI Imm-16-QI (mem16 QI (add (reg h-sb) Dsp-24-u8)))
10322 ())
10323 (dni stzx16-imm8-imm8-dsp8fb "stzx #Imm8,#Imm8,dsp8[fb]" ((machine 16))
10324 ("stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb]")
10325 (+ (f-0-4 #xD) (f-4-4 #xE) Imm-8-QI Dsp-16-s8 Imm-24-QI)
10326 (stzx-sem QI Imm-8-QI Imm-24-QI (mem16 QI (add (reg h-fb) Dsp-16-s8)))
10327 ())
10328 (dni stzx16-imm8-imm8-abs16 "stzx #Imm8,#Imm8,abs16" ((machine 16))
10329 ("stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16}")
10330 (+ (f-0-4 #xD) (f-4-4 #xF) Imm-8-QI Dsp-16-u16 Imm-32-QI)
10331 (stzx-sem QI Imm-8-QI Imm-32-QI (mem16 QI Dsp-16-u16))
10332 ())
10333 ; stzx.BW #imm,dst (m32)
10334 (insn-imm1-imm2-dst-Unprefixed stzx #x9 #x3 #xF stzx-sem)
10336 ;-------------------------------------------------------------
10337 ; subx - subtract extend (m32)
10338 ;-------------------------------------------------------------
10340 (define-pmacro (subx-sem mode src1 dst)
10341 (sequence ((mode result))
10342 (set result (sub mode dst (ext mode src1)))
10343 (set obit (sub-oflag mode dst (ext mode src1) 0))
10344 (set cbit (sub-cflag mode dst (ext mode src1) 0))
10345 (set dst result)
10346 (set-z-and-s result)))
10347 ; subx #imm8,dst
10348 (binary-arith32-imm-dst-defn QI SI "" 0 subx G #x9 #x1 #x1 subx-sem)
10349 ; subx src,dst
10350 (binary-arith32-src-dst-defn QI SI "" 0 subx G #x1 #x0 subx-sem)
10352 ;-------------------------------------------------------------
10353 ; tst - test
10354 ;-------------------------------------------------------------
10356 (define-pmacro (tst-sem mode src1 dst)
10357 (sequence ((mode result))
10358 (set result (and mode dst src1))
10359 (set-z-and-s result))
10360 )
10362 ; tst.BW #imm,dst (m16 #1 m32 #1)
10363 (binary-arith-imm-dst tst G (f-0-4 7) (f-4-3 3) (f-8-4 0) #x9 #x3 #xE tst-sem)
10364 ; tst.BW src,dst (m16 #2 m32 #3)
10365 (binary-arith16-src-dst-defn QI QI .b 0 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10366 (binary-arith16-src-dst-defn HI HI .w 1 tst X (f-0-4 #x8) (f-4-3 0) tst-sem)
10367 (binary-arith32-src-dst-Prefixed QI QI .b 0 tst G #x1 #x9 tst-sem)
10368 (binary-arith32-src-dst-Prefixed HI HI .w 1 tst G #x1 #x9 tst-sem)
10369 ; tst.BW:S #imm,dst2 (m32 #2)
10370 (binary-arith32-s-imm-dst QI .b 0 tst #x0 #x6 tst-sem)
10371 (binary-arith32-s-imm-dst HI .w 1 tst #x0 #x6 tst-sem)
10373 ;-------------------------------------------------------------
10374 ; und - undefined
10375 ;-------------------------------------------------------------
10377 (dni und16 "und" ((machine 16))
10378 ("und")
10379 (+ (f-0-4 #xF) (f-4-4 #xF))
10380 (nop)
10381 ())
10383 (dni und32 "und" ((machine 32))
10384 ("und")
10385 (+ (f-0-4 #xF) (f-4-4 #xF))
10386 (nop)
10387 ())
10389 ;-------------------------------------------------------------
10390 ; wait
10391 ;-------------------------------------------------------------
10393 ; ??? semantics
10394 (dni wait16 "wait" ((machine 16))
10395 ("wait")
10396 (+ (f-0-4 7) (f-4-4 #xD) (f-8-4 #xF) (f-12-4 3))
10397 (nop)
10398 ())
10400 (dni wait "wait" ((machine 32))
10401 ("wait")
10402 (+ (f-0-4 #xB) (f-4-4 2) (f-8-4 0) (f-12-4 3))
10403 (nop)
10404 ())
10406 ;-------------------------------------------------------------
10407 ; xchg - exchange
10408 ;-------------------------------------------------------------
10410 (define-pmacro (xchg-sem mode src dst)
10411 (sequence ((mode result))
10412 (set result src)
10413 (set src dst)
10414 (set dst result))
10415 )
10416 (define-pmacro (xchg16-defn mode sz szc src srcreg)
10417 (dni (.sym xchg16 sz - srcreg)
10418 (.str "xchg" sz "-" srcreg ",dst16-16-" mode)
10419 ((machine 16))
10420 (.str "xchg." sz " " srcreg ",${dst16-16-" mode "}")
10421 (+ (f-0-4 #x7) (f-4-3 #x5) (f-7-1 szc) (f-8-2 0) (f-10-2 src) (.sym dst16-16- mode))
10422 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst16-16- mode))
10423 ())
10424 )
10425 (xchg16-defn QI b 0 0 r0l)
10426 (xchg16-defn QI b 0 1 r0h)
10427 (xchg16-defn QI b 0 2 r1l)
10428 (xchg16-defn QI b 0 3 r1h)
10429 (xchg16-defn HI w 1 0 r0)
10430 (xchg16-defn HI w 1 1 r1)
10431 (xchg16-defn HI w 1 2 r2)
10432 (xchg16-defn HI w 1 3 r3)
10433 (define-pmacro (xchg32-defn mode sz szc src srcreg)
10434 (dni (.sym xchg32 sz - srcreg)
10435 (.str "xchg" sz "-" srcreg ",dst32-16-Unprefixed-" mode)
10436 ((machine 32))
10437 (.str "xchg." sz " " srcreg ",${dst32-16-Unprefixed-" mode "}")
10438 (+ (f-0-4 #xD) (.sym dst32-16-Unprefixed- mode) (f-7-1 szc) (f-10-2 0) (f-12-1 1) (f-13-3 src))
10439 (xchg-sem mode (reg (.sym h- srcreg)) (.sym dst32-16-Unprefixed- mode))
10440 ())
10441 )
10442 (xchg32-defn QI b 0 0 r0l)
10443 (xchg32-defn QI b 0 1 r1l)
10444 (xchg32-defn QI b 0 2 a0)
10445 (xchg32-defn QI b 0 3 a1)
10446 (xchg32-defn QI b 0 4 r0h)
10447 (xchg32-defn QI b 0 5 r1h)
10448 (xchg32-defn HI w 1 0 r0)
10449 (xchg32-defn HI w 1 1 r1)
10450 (xchg32-defn HI w 1 2 a0)
10451 (xchg32-defn HI w 1 3 a1)
10452 (xchg32-defn HI w 1 4 r2)
10453 (xchg32-defn HI w 1 5 r3)
10455 ;-------------------------------------------------------------
10456 ; xor - exclusive or
10457 ;-------------------------------------------------------------
10459 (define-pmacro (xor-sem mode src1 dst)
10460 (sequence ((mode result))
10461 (set result (xor mode src1 dst))
10462 (set-z-and-s result)
10463 (set dst result))
10464 )
10466 ; xor.BW #imm,dst (m16 #1 m32 #1)
10467 (binary-arith-imm-dst xor G (f-0-4 7) (f-4-3 3) (f-8-4 1) #x9 #x0 #xE xor-sem)
10468 ; xor.BW src,dst (m16 #3 m32 #3)
10469 (binary-arith-src-dst xor G (f-0-4 #x8) (f-4-3 4) #x1 #x9 xor-sem)
10471 ;-------------------------------------------------------------
10472 ; Widening
10473 ;-------------------------------------------------------------
10475 (define-pmacro (exts-sem smode dmode src dst)
10476 (set dst (ext dmode (trunc smode src)))
10477 )
10478 (define-pmacro (extz-sem smode dmode src dst)
10479 (set dst (zext dmode (trunc smode src)))
10480 )
10482 ; exts.b dst for m16c
10483 (ext16-defn QI HI .b 0 exts (f-0-4 7) (f-4-3 6) (f-8-4 6) exts-sem)
10485 ; exts.w r0 for m16c
10486 (dni exts16.w-r0
10487 "exts.w r0"
10488 ((machine 16))
10489 "exts.w r0"
10490 (+ (f-0-4 #x7) (f-4-4 #xC) (f-8-4 #xF) (f-12-4 3))
10491 (exts-sem HI SI R0 R2R0)
10492 ())
10494 ; exts.size dst for m32c
10495 (ext32-defn QI HI .b 0 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10496 (ext32-defn HI SI .w 1 exts (f-0-4 #xC) (f-10-2 1) (f-12-4 #xE) exts-sem)
10497 ; exts.b src,dst for m32c
10498 (ext32-binary-defn exts .b #x1 #x7 exts-sem)
10500 ; extz.b src,dst for m32c
10501 (ext32-binary-defn extz "" #x1 #xB extz-sem)
10503 ;-------------------------------------------------------------
10504 ; Indirect
10505 ;-------------------------------------------------------------
10507 ; TODO semantics
10508 (dni srcind "SRC-INDIRECT" ((machine 32))
10509 ("src-indirect")
10510 (+ (f-0-4 4) (f-4-4 1))
10511 (set (reg h-src-indirect) 1)
10512 ())
10514 (dni destind "DEST-INDIRECT" ((machine 32))
10515 ("dest-indirect")
10516 (+ (f-0-4 0) (f-4-4 9))
10517 (set (reg h-dst-indirect) 1)
10518 ())
10520 (dni srcdestind "SRC-DEST-INDIRECT" ((machine 32))
10521 ("src-dest-indirect")
10522 (+ (f-0-4 4) (f-4-4 9))
10523 (sequence () (set (reg h-src-indirect) 1) (set (reg h-dst-indirect) 1))
10524 ())