| blob | f17effdf1766399274e1bee9541d8378ad391bd9 |
1 /* PowerPC-specific support for 32-bit ELF
2 Copyright (C) 1994-2025 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* The assembler should generate a full set of section symbols even
23 when they appear unused. The linux kernel build tool recordmcount
24 needs them. */
25 #define TARGET_KEEP_UNUSED_SECTION_SYMBOLS true
28 #include <stdarg.h>
39 /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
40 #define OCTETS_PER_BYTE(ABFD, SEC) 1
43 {
45 split16d_type
46 }
47 split16_format_type;
49 /* RELA relocations are used here. */
51 static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
53 static bfd_reloc_status_type ppc_elf_unhandled_reloc
56 /* Branch prediction bit for branch taken relocs. */
57 #define BRANCH_PREDICT_BIT 0x200000
58 /* Mask to set RA in memory instructions. */
59 #define RA_REGISTER_MASK 0x001f0000
60 /* Value to shift register by to insert RA. */
61 #define RA_REGISTER_SHIFT 16
63 /* The name of the dynamic interpreter. This is put in the .interp
64 section. */
67 /* For old-style PLT. */
68 /* The number of single-slot PLT entries (the rest use two slots). */
69 #define PLT_NUM_SINGLE_ENTRIES 8192
71 /* For new-style .glink and .plt. */
72 #define GLINK_PLTRESOLVE 16*4
73 #define GLINK_ENTRY_SIZE(htab, h) \
74 ((4*4 \
75 + (h != NULL \
76 && h == htab->tls_get_addr \
77 && !htab->params->no_tls_get_addr_opt ? 8*4 : 0) \
78 + (1u << htab->params->plt_stub_align) - 1) \
79 & -(1u << htab->params->plt_stub_align))
81 /* VxWorks uses its own plt layout, filled in by the static linker. */
83 /* The standard VxWorks PLT entry. */
84 #define VXWORKS_PLT_ENTRY_SIZE 32
85 static const bfd_vma ppc_elf_vxworks_plt_entry
87 {
96 };
97 static const bfd_vma ppc_elf_vxworks_pic_plt_entry
99 {
108 };
110 /* The initial VxWorks PLT entry. */
111 #define VXWORKS_PLT_INITIAL_ENTRY_SIZE 32
112 static const bfd_vma ppc_elf_vxworks_plt0_entry
114 {
123 };
124 static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
126 {
135 };
137 /* For executables, we have some additional relocations in
138 .rela.plt.unloaded, for the kernel loader. */
140 /* The number of non-JMP_SLOT relocations per PLT0 slot. */
141 #define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
142 /* The number of relocations in the PLTResolve slot. */
143 #define VXWORKS_PLTRESOLVE_RELOCS 2
144 /* The number of relocations in the PLTResolve slot when creating
145 a shared library. */
146 #define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
148 /* Some instructions. */
149 #define ADDIS_11_11 0x3d6b0000
150 #define ADDIS_11_30 0x3d7e0000
151 #define ADDIS_12_12 0x3d8c0000
152 #define ADDI_11_11 0x396b0000
153 #define ADD_0_11_11 0x7c0b5a14
154 #define ADD_3_12_2 0x7c6c1214
155 #define ADD_11_0_11 0x7d605a14
156 #define B 0x48000000
157 #define BA 0x48000002
158 #define BCL_20_31 0x429f0005
159 #define BCTR 0x4e800420
160 #define BEQLR 0x4d820020
161 #define CMPWI_11_0 0x2c0b0000
162 #define LIS_11 0x3d600000
163 #define LIS_12 0x3d800000
164 #define LWZU_0_12 0x840c0000
165 #define LWZ_0_12 0x800c0000
166 #define LWZ_11_3 0x81630000
167 #define LWZ_11_11 0x816b0000
168 #define LWZ_11_30 0x817e0000
169 #define LWZ_12_3 0x81830000
170 #define LWZ_12_12 0x818c0000
171 #define MR_0_3 0x7c601b78
172 #define MR_3_0 0x7c030378
173 #define MFLR_0 0x7c0802a6
174 #define MFLR_12 0x7d8802a6
175 #define MTCTR_0 0x7c0903a6
176 #define MTCTR_11 0x7d6903a6
177 #define MTLR_0 0x7c0803a6
178 #define NOP 0x60000000
179 #define SUB_11_11_12 0x7d6c5850
181 /* Offset of tp and dtp pointers from start of TLS block. */
182 #define TP_OFFSET 0x7000
183 #define DTP_OFFSET 0x8000
185 /* The value of a defined global symbol. */
186 #define SYM_VAL(SYM) \
187 ((SYM)->root.u.def.section->output_section->vma \
188 + (SYM)->root.u.def.section->output_offset \
189 + (SYM)->root.u.def.value)
190 \f
191 /* Relocation HOWTO's. */
192 /* Like other ELF RELA targets that don't apply multiple
193 field-altering relocations to the same localation, src_mask is
194 always zero and pcrel_offset is the same as pc_relative.
195 PowerPC can always use a zero bitpos, even when the field is not at
196 the LSB. For example, a REL24 could use rightshift=2, bisize=24
197 and bitpos=2 which matches the ABI description, or as we do here,
198 rightshift=0, bitsize=26 and bitpos=0. */
199 #define HOW(type, size, bitsize, mask, rightshift, pc_relative, \
200 complain, special_func) \
201 HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \
202 complain_overflow_ ## complain, special_func, \
203 #type, false, 0, mask, pc_relative)
208 /* This reloc does nothing. */
210 bfd_elf_generic_reloc),
212 /* A standard 32 bit relocation. */
214 bfd_elf_generic_reloc),
216 /* An absolute 26 bit branch; the lower two bits must be zero.
217 FIXME: we don't check that, we just clear them. */
219 bfd_elf_generic_reloc),
221 /* A standard 16 bit relocation. */
223 bfd_elf_generic_reloc),
225 /* A 16 bit relocation without overflow. */
227 bfd_elf_generic_reloc),
229 /* The high order 16 bits of an address. */
231 bfd_elf_generic_reloc),
233 /* The high order 16 bits of an address, plus 1 if the contents of
234 the low 16 bits, treated as a signed number, is negative. */
236 ppc_elf_addr16_ha_reloc),
238 /* An absolute 16 bit branch; the lower two bits must be zero.
239 FIXME: we don't check that, we just clear them. */
241 bfd_elf_generic_reloc),
243 /* An absolute 16 bit branch, for which bit 10 should be set to
244 indicate that the branch is expected to be taken. The lower two
245 bits must be zero. */
247 bfd_elf_generic_reloc),
249 /* An absolute 16 bit branch, for which bit 10 should be set to
250 indicate that the branch is not expected to be taken. The lower
251 two bits must be zero. */
253 bfd_elf_generic_reloc),
255 /* A relative 26 bit branch; the lower two bits must be zero. */
257 bfd_elf_generic_reloc),
259 /* A relative 16 bit branch; the lower two bits must be zero. */
261 bfd_elf_generic_reloc),
263 /* A relative 16 bit branch. Bit 10 should be set to indicate that
264 the branch is expected to be taken. The lower two bits must be
265 zero. */
267 bfd_elf_generic_reloc),
269 /* A relative 16 bit branch. Bit 10 should be set to indicate that
270 the branch is not expected to be taken. The lower two bits must
271 be zero. */
273 bfd_elf_generic_reloc),
275 /* Like R_PPC_ADDR16, but referring to the GOT table entry for the
276 symbol. */
278 ppc_elf_unhandled_reloc),
280 /* Like R_PPC_ADDR16_LO, but referring to the GOT table entry for
281 the symbol. */
283 ppc_elf_unhandled_reloc),
285 /* Like R_PPC_ADDR16_HI, but referring to the GOT table entry for
286 the symbol. */
288 ppc_elf_unhandled_reloc),
290 /* Like R_PPC_ADDR16_HA, but referring to the GOT table entry for
291 the symbol. */
293 ppc_elf_unhandled_reloc),
295 /* Like R_PPC_REL24, but referring to the procedure linkage table
296 entry for the symbol. */
298 ppc_elf_unhandled_reloc),
300 /* This is used only by the dynamic linker. The symbol should exist
301 both in the object being run and in some shared library. The
302 dynamic linker copies the data addressed by the symbol from the
303 shared library into the object, because the object being
304 run has to have the data at some particular address. */
306 ppc_elf_unhandled_reloc),
308 /* Like R_PPC_ADDR32, but used when setting global offset table
309 entries. */
311 ppc_elf_unhandled_reloc),
313 /* Marks a procedure linkage table entry for a symbol. */
315 ppc_elf_unhandled_reloc),
317 /* Used only by the dynamic linker. When the object is run, this
318 longword is set to the load address of the object, plus the
319 addend. */
321 bfd_elf_generic_reloc),
323 /* Like R_PPC_REL24, but uses the value of the symbol within the
324 object rather than the final value. Normally used for
325 _GLOBAL_OFFSET_TABLE_. */
327 bfd_elf_generic_reloc),
329 /* Like R_PPC_ADDR32, but may be unaligned. */
331 bfd_elf_generic_reloc),
333 /* Like R_PPC_ADDR16, but may be unaligned. */
335 bfd_elf_generic_reloc),
337 /* 32-bit PC relative */
339 bfd_elf_generic_reloc),
341 /* 32-bit relocation to the symbol's procedure linkage table.
342 FIXME: not supported. */
344 ppc_elf_unhandled_reloc),
346 /* 32-bit PC relative relocation to the symbol's procedure linkage table.
347 FIXME: not supported. */
349 ppc_elf_unhandled_reloc),
351 /* Like R_PPC_ADDR16_LO, but referring to the PLT table entry for
352 the symbol. */
354 ppc_elf_unhandled_reloc),
356 /* Like R_PPC_ADDR16_HI, but referring to the PLT table entry for
357 the symbol. */
359 ppc_elf_unhandled_reloc),
361 /* Like R_PPC_ADDR16_HA, but referring to the PLT table entry for
362 the symbol. */
364 ppc_elf_unhandled_reloc),
366 /* A sign-extended 16 bit value relative to _SDA_BASE_, for use with
367 small data items. */
369 ppc_elf_unhandled_reloc),
371 /* 16-bit section relative relocation. */
373 ppc_elf_unhandled_reloc),
375 /* 16-bit lower half section relative relocation. */
377 ppc_elf_unhandled_reloc),
379 /* 16-bit upper half section relative relocation. */
381 ppc_elf_unhandled_reloc),
383 /* 16-bit upper half adjusted section relative relocation. */
385 ppc_elf_unhandled_reloc),
387 /* Marker relocs for TLS. */
389 bfd_elf_generic_reloc),
392 bfd_elf_generic_reloc),
395 bfd_elf_generic_reloc),
397 /* Marker relocs on inline plt call instructions. */
399 bfd_elf_generic_reloc),
402 bfd_elf_generic_reloc),
404 /* Computes the load module index of the load module that contains the
405 definition of its TLS sym. */
407 ppc_elf_unhandled_reloc),
409 /* Computes a dtv-relative displacement, the difference between the value
410 of sym+add and the base address of the thread-local storage block that
411 contains the definition of sym, minus 0x8000. */
413 ppc_elf_unhandled_reloc),
415 /* A 16 bit dtprel reloc. */
417 ppc_elf_unhandled_reloc),
419 /* Like DTPREL16, but no overflow. */
421 ppc_elf_unhandled_reloc),
423 /* Like DTPREL16_LO, but next higher group of 16 bits. */
425 ppc_elf_unhandled_reloc),
427 /* Like DTPREL16_HI, but adjust for low 16 bits. */
429 ppc_elf_unhandled_reloc),
431 /* Computes a tp-relative displacement, the difference between the value of
432 sym+add and the value of the thread pointer (r13). */
434 ppc_elf_unhandled_reloc),
436 /* A 16 bit tprel reloc. */
438 ppc_elf_unhandled_reloc),
440 /* Like TPREL16, but no overflow. */
442 ppc_elf_unhandled_reloc),
444 /* Like TPREL16_LO, but next higher group of 16 bits. */
446 ppc_elf_unhandled_reloc),
448 /* Like TPREL16_HI, but adjust for low 16 bits. */
450 ppc_elf_unhandled_reloc),
452 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
453 with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset
454 to the first entry. */
456 ppc_elf_unhandled_reloc),
458 /* Like GOT_TLSGD16, but no overflow. */
460 ppc_elf_unhandled_reloc),
462 /* Like GOT_TLSGD16_LO, but next higher group of 16 bits. */
464 ppc_elf_unhandled_reloc),
466 /* Like GOT_TLSGD16_HI, but adjust for low 16 bits. */
468 ppc_elf_unhandled_reloc),
470 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
471 with values (sym+add)@dtpmod and zero, and computes the offset to the
472 first entry. */
474 ppc_elf_unhandled_reloc),
476 /* Like GOT_TLSLD16, but no overflow. */
478 ppc_elf_unhandled_reloc),
480 /* Like GOT_TLSLD16_LO, but next higher group of 16 bits. */
482 ppc_elf_unhandled_reloc),
484 /* Like GOT_TLSLD16_HI, but adjust for low 16 bits. */
486 ppc_elf_unhandled_reloc),
488 /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes
489 the offset to the entry. */
491 ppc_elf_unhandled_reloc),
493 /* Like GOT_DTPREL16, but no overflow. */
495 ppc_elf_unhandled_reloc),
497 /* Like GOT_DTPREL16_LO, but next higher group of 16 bits. */
499 ppc_elf_unhandled_reloc),
501 /* Like GOT_DTPREL16_HI, but adjust for low 16 bits. */
503 ppc_elf_unhandled_reloc),
505 /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the
506 offset to the entry. */
508 ppc_elf_unhandled_reloc),
510 /* Like GOT_TPREL16, but no overflow. */
512 ppc_elf_unhandled_reloc),
514 /* Like GOT_TPREL16_LO, but next higher group of 16 bits. */
516 ppc_elf_unhandled_reloc),
518 /* Like GOT_TPREL16_HI, but adjust for low 16 bits. */
520 ppc_elf_unhandled_reloc),
522 /* The remaining relocs are from the Embedded ELF ABI, and are not
523 in the SVR4 ELF ABI. */
525 /* 32 bit value resulting from the addend minus the symbol. */
527 ppc_elf_unhandled_reloc),
529 /* 16 bit value resulting from the addend minus the symbol. */
531 ppc_elf_unhandled_reloc),
533 /* 16 bit value resulting from the addend minus the symbol. */
535 ppc_elf_unhandled_reloc),
537 /* The high order 16 bits of the addend minus the symbol. */
539 ppc_elf_unhandled_reloc),
541 /* The high order 16 bits of the result of the addend minus the address,
542 plus 1 if the contents of the low 16 bits, treated as a signed number,
543 is negative. */
545 ppc_elf_unhandled_reloc),
547 /* 16 bit value resulting from allocating a 4 byte word to hold an
548 address in the .sdata section, and returning the offset from
549 _SDA_BASE_ for that relocation. */
551 ppc_elf_unhandled_reloc),
553 /* 16 bit value resulting from allocating a 4 byte word to hold an
554 address in the .sdata2 section, and returning the offset from
555 _SDA2_BASE_ for that relocation. */
557 ppc_elf_unhandled_reloc),
559 /* A sign-extended 16 bit value relative to _SDA2_BASE_, for use with
560 small data items. */
562 ppc_elf_unhandled_reloc),
564 /* Relocate against either _SDA_BASE_ or _SDA2_BASE_, filling in the 16 bit
565 signed offset from the appropriate base, and filling in the register
566 field with the appropriate register (0, 2, or 13). */
568 ppc_elf_unhandled_reloc),
570 /* Relocation not handled: R_PPC_EMB_MRKREF */
571 /* Relocation not handled: R_PPC_EMB_RELSEC16 */
572 /* Relocation not handled: R_PPC_EMB_RELST_LO */
573 /* Relocation not handled: R_PPC_EMB_RELST_HI */
574 /* Relocation not handled: R_PPC_EMB_RELST_HA */
575 /* Relocation not handled: R_PPC_EMB_BIT_FLD */
577 /* PC relative relocation against either _SDA_BASE_ or _SDA2_BASE_, filling
578 in the 16 bit signed offset from the appropriate base, and filling in the
579 register field with the appropriate register (0, 2, or 13). */
581 ppc_elf_unhandled_reloc),
583 /* A relative 8 bit branch. */
585 bfd_elf_generic_reloc),
587 /* A relative 15 bit branch. */
589 bfd_elf_generic_reloc),
591 /* A relative 24 bit branch. */
593 bfd_elf_generic_reloc),
595 /* The 16 LSBS in split16a format. */
597 ppc_elf_unhandled_reloc),
599 /* The 16 LSBS in split16d format. */
601 ppc_elf_unhandled_reloc),
603 /* Bits 16-31 split16a format. */
605 ppc_elf_unhandled_reloc),
607 /* Bits 16-31 split16d format. */
609 ppc_elf_unhandled_reloc),
611 /* Bits 16-31 (High Adjusted) in split16a format. */
613 ppc_elf_unhandled_reloc),
615 /* Bits 16-31 (High Adjusted) in split16d format. */
617 ppc_elf_unhandled_reloc),
619 /* This reloc is like R_PPC_EMB_SDA21 but only applies to e_add16i
620 instructions. If the register base is 0 then the linker changes
621 the e_add16i to an e_li instruction. */
623 ppc_elf_unhandled_reloc),
625 /* Like R_PPC_VLE_SDA21 but ignore overflow. */
627 ppc_elf_unhandled_reloc),
629 /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
631 ppc_elf_unhandled_reloc),
633 /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
635 ppc_elf_unhandled_reloc),
637 /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
639 ppc_elf_unhandled_reloc),
641 /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
643 ppc_elf_unhandled_reloc),
645 /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
647 ppc_elf_unhandled_reloc),
649 /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
651 ppc_elf_unhandled_reloc),
653 /* e_li split20 format. */
655 ppc_elf_unhandled_reloc),
658 ppc_elf_unhandled_reloc),
660 /* A 16 bit relative relocation. */
662 bfd_elf_generic_reloc),
664 /* A 16 bit relative relocation without overflow. */
666 bfd_elf_generic_reloc),
668 /* The high order 16 bits of a relative address. */
670 bfd_elf_generic_reloc),
672 /* The high order 16 bits of a relative address, plus 1 if the contents of
673 the low 16 bits, treated as a signed number, is negative. */
675 ppc_elf_addr16_ha_reloc),
677 /* Like R_PPC_REL16_HA but for split field in addpcis. */
679 ppc_elf_addr16_ha_reloc),
681 /* A split-field reloc for addpcis, non-relative (gas internal use only). */
683 ppc_elf_addr16_ha_reloc),
685 /* GNU extension to record C++ vtable hierarchy. */
687 NULL),
689 /* GNU extension to record C++ vtable member usage. */
691 NULL),
693 /* Phony reloc to handle AIX style TOC entries. */
695 ppc_elf_unhandled_reloc),
696 };
697 \f
698 /* Initialize the ppc_elf_howto_table, so that linear accesses can be done. */
700 static void
702 {
707 i++)
708 {
714 }
715 }
719 bfd_reloc_code_real_type code)
720 {
723 /* Initialize howto table if not already done. */
728 {
862 }
865 };
870 {
875 i++)
881 }
883 /* Set the howto pointer for a PowerPC ELF reloc. */
885 static bool
889 {
892 /* Initialize howto table if not already done. */
898 {
899 /* xgettext:c-format */
904 }
908 /* Just because the above assert didn't trigger doesn't mean that
909 ELF32_R_TYPE (dst->r_info) is necessarily a valid relocation. */
911 {
912 /* xgettext:c-format */
918 }
921 }
923 /* Handle the R_PPC_ADDR16_HA and R_PPC_REL16_HA relocs. */
925 static bfd_reloc_status_type
933 {
936 bfd_size_type octets;
937 bfd_vma value;
940 {
943 }
971 }
973 static bfd_reloc_status_type
981 {
982 /* If this is a relocatable link (output_bfd test tells us), just
983 call the generic function. Any adjustment will be done at final
984 link time. */
993 }
994 \f
995 /* Sections created by the linker. */
998 {
999 /* Pointer to the bfd section. */
1001 /* Section name. */
1003 /* Associated bss section name. */
1005 /* Associated symbol name. */
1007 /* Associated symbol. */
1011 /* Linked list of allocated pointer entries. This hangs off of the
1012 symbol lists, and provides allows us to return different pointers,
1013 based on different addend's. */
1016 {
1017 /* next allocated pointer for this symbol */
1019 /* offset of pointer from beginning of section */
1020 bfd_vma offset;
1021 /* addend used */
1022 bfd_vma addend;
1023 /* which linker section this is */
1027 struct ppc_elf_obj_tdata
1028 {
1031 /* A mapping from local symbols to offsets into the various linker
1032 sections added. This is index by the symbol index. */
1035 /* Flags used to auto-detect plt type. */
1038 };
1040 #define ppc_elf_tdata(bfd) \
1041 ((struct ppc_elf_obj_tdata *) (bfd)->tdata.any)
1043 #define elf_local_ptr_offsets(bfd) \
1044 (ppc_elf_tdata (bfd)->linker_section_pointers)
1046 #define is_ppc_elf(bfd) \
1047 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
1048 && elf_object_id (bfd) == PPC32_ELF_DATA)
1050 /* Override the generic function because we store some extras. */
1052 static bool
1054 {
1056 }
1058 /* When defaulting arch/mach, decode apuinfo to find a better match. */
1060 bool
1062 {
1069 {
1076 }
1079 {
1085 {
1090 {
1093 {
1119 }
1120 }
1122 }
1123 }
1126 {
1131 {
1134 }
1135 }
1137 }
1139 /* Fix bad default arch selected for a 32 bit input bfd when the
1140 default is 64 bit. Also select arch based on apuinfo. */
1142 static bool
1144 {
1149 {
1153 {
1154 /* Relies on arch after 64 bit default being 32 bit default. */
1157 }
1158 }
1160 }
1162 /* Function to set whether a module needs the -mrelocatable bit set. */
1164 static bool
1166 {
1173 }
1175 /* Support for core dump NOTE sections. */
1177 static bool
1179 {
1184 {
1189 /* pr_cursig */
1192 /* pr_pid */
1195 /* pr_reg */
1200 }
1202 /* Make a ".reg/999" section. */
1205 }
1207 static bool
1209 {
1211 {
1222 }
1224 /* Note that for some reason, a spurious space is tacked
1225 onto the end of the args in some (at least one anyway)
1226 implementations, so strip it off if it exists. */
1228 {
1234 }
1237 }
1241 {
1243 {
1248 {
1255 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1256 DIAGNOSTIC_PUSH;
1257 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
1258 -Wstringop-truncation:
1259 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
1260 */
1261 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
1262 #endif
1264 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1265 DIAGNOSTIC_POP;
1266 #endif
1270 }
1273 {
1292 }
1293 }
1294 }
1296 static flagword
1298 {
1304 }
1306 /* Return address for Ith PLT stub in section PLT, for relocation REL
1307 or (bfd_vma) -1 if it should not be included. */
1309 static bfd_vma
1313 {
1315 }
1317 /* Handle a PowerPC specific section when reading an object file. This
1318 is called when bfd_section_from_shdr finds a section with an unknown
1319 type. */
1321 static bool
1326 {
1328 flagword flags;
1349 }
1351 /* Set up any other section flags and such that may be necessary. */
1353 static bool
1357 {
1362 }
1364 /* If we have .sbss2 or .PPC.EMB.sbss0 output sections, we
1365 need to bump up the number of section headers. */
1367 static int
1370 {
1383 }
1385 /* Modify the segment map for VLE executables. */
1387 bool
1390 {
1393 /* At this point in the link, output sections have already been sorted by
1394 LMA and assigned to segments. All that is left to do is to ensure
1395 there is no mixing of VLE & non-VLE sections in a text segment.
1396 If we find that case, we split the segment.
1397 We maintain the original output section order. */
1400 {
1410 {
1414 {
1419 }
1420 }
1423 {
1429 {
1435 }
1437 }
1438 /* If we're splitting a segment which originally contained rw
1439 sections then those sections might now only be in one of the
1440 two parts. So always set p_flags if splitting, even if we
1441 are being called for objcopy with p_flags_valid set. */
1443 {
1446 }
1450 /* Sections 0..j-1 stay in this (current) segment,
1451 the remainder are put in a new segment.
1452 The scan resumes with the new segment. */
1468 }
1471 }
1473 /* Add extra PPC sections -- Note, for now, make .sbss2 and
1474 .PPC.EMB.sbss0 a normal section, and not a bss section so
1475 that the linker doesn't crater when trying to make more than
1476 2 sections. */
1479 {
1490 };
1492 /* This is what we want for new plt/got. */
1498 {
1501 /* See if this is one of the special sections. */
1508 {
1512 }
1515 }
1516 \f
1517 /* Very simple linked list structure for recording apuinfo values. */
1519 {
1522 }
1523 apuinfo_list;
1528 static void
1530 {
1533 }
1535 static void
1537 {
1541 {
1545 }
1554 }
1556 static unsigned
1558 {
1563 entry;
1568 }
1572 {
1578 ;
1581 }
1583 static void
1585 {
1589 {
1593 }
1596 }
1598 /* Scan the input BFDs and create a linked list of
1599 the APUinfo values that will need to be emitted. */
1601 static void
1603 {
1617 /* Read in the input sections contents. */
1619 {
1626 /* xgettext:c-format */
1634 {
1640 }
1644 {
1645 /* xgettext:c-format */
1648 }
1650 /* Verify the contents of the header. Note - we have to
1651 extract the values this way in order to allow for a
1652 host whose endian-ness is different from the target. */
1664 /* Get the number of bytes used for apuinfo entries. */
1669 /* Scan the apuinfo section, building a list of apuinfo numbers. */
1672 }
1677 {
1678 /* Compute the size of the output section. */
1681 /* Set the output section size, if it exists. */
1685 {
1687 /* xgettext:c-format */
1689 }
1690 }
1692 fail:
1697 }
1699 /* Prevent the output section from accumulating the input sections'
1700 contents. We have already stored this in our linked list structure. */
1702 static bool
1707 {
1709 }
1711 /* Finally we can generate the output section. */
1713 static void
1715 {
1720 bfd_size_type length;
1735 {
1736 _bfd_error_handler
1739 }
1741 /* Create the apuinfo header. */
1750 {
1753 }
1764 }
1766 static bool
1768 {
1771 }
1772 \f
1773 static bool
1775 {
1785 }
1787 static bool
1789 {
1794 }
1796 static long
1800 {
1805 bfd_vma stub_off;
1829 /* Call common code to handle old-style executable PLTs. */
1834 /* If this object was prelinked, the prelinker stored the address
1835 of .glink at got[1]. If it wasn't prelinked, got[1] will be zero. */
1839 {
1853 {
1854 Elf_Internal_Dyn dyn;
1861 {
1869 }
1870 }
1872 }
1874 /* Otherwise we read the first plt entry. */
1876 {
1879 }
1884 /* The .glink section usually does not survive the final
1885 link; search for the section (usually .text) where the
1886 glink stubs now reside. */
1891 /* Determine glink PLT resolver by reading the relative branch
1892 from the first glink stub. */
1895 {
1898 /* The first glink stub may either branch to the resolver ... */
1903 /* ... or fall through a bunch of NOPs. */
1910 {
1913 }
1914 }
1917 /* If the stubs are those for -shared/-pie then we might have
1918 multiple stubs for each plt entry. If that is the case then
1919 there is no way to associate stubs with their plt entries short
1920 of figuring out the GOT pointer value used in the stub.
1921 The offsets tested here need to cover all possible values of
1922 GLINK_ENTRY_SIZE for other than __tls_get_addr_opt. */
1937 {
1941 }
1956 {
1963 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
1964 we are defining a symbol, ensure one of them is set. */
1976 {
1981 }
1986 }
1988 /* Add a symbol at the start of the glink branch table. */
1997 s++;
1998 count++;
2001 {
2002 /* Add a symbol for the glink PLT resolver. */
2011 s++;
2012 count++;
2013 }
2016 }
2017 \f
2018 /* The following functions are specific to the ELF linker, while
2019 functions above are used generally. They appear in this file more
2020 or less in the order in which they are called. eg.
2021 ppc_elf_check_relocs is called early in the link process,
2022 ppc_elf_finish_dynamic_sections is one of the last functions
2023 called. */
2025 /* Track PLT entries needed for a given symbol. We might need more
2026 than one glink entry per symbol when generating a pic binary. */
2027 struct plt_entry
2028 {
2031 /* -fPIC uses multiple GOT sections, one per file, called ".got2".
2032 This field stores the offset into .got2 used to initialise the
2033 GOT pointer reg. It will always be at least 32768. (Current
2034 gcc always uses an offset of 32768, but ld -r will pack .got2
2035 sections together resulting in larger offsets). */
2036 bfd_vma addend;
2038 /* The .got2 section. */
2041 /* PLT refcount or offset. */
2042 union
2043 {
2044 bfd_signed_vma refcount;
2045 bfd_vma offset;
2048 /* .glink stub offset. */
2049 bfd_vma glink_offset;
2050 };
2052 /* Of those relocs that might be copied as dynamic relocs, this
2053 function selects those that must be copied when linking a shared
2054 library or PIE, even when the symbol is local. */
2056 static int
2059 {
2061 {
2063 /* Only relative relocs can be resolved when the object load
2064 address isn't fixed. DTPREL32 is excluded because the
2065 dynamic linker needs to differentiate global dynamic from
2066 local dynamic __tls_index pairs when PPC_OPT_TLS is set. */
2081 /* These relocations are relative but in a shared library the
2082 linker doesn't know the thread pointer base. */
2084 }
2085 }
2087 /* If ELIMINATE_COPY_RELOCS is non-zero, the linker will try to avoid
2088 copying dynamic variables from a shared lib into an app's dynbss
2089 section, and instead use a dynamic relocation to point into the
2090 shared lib. */
2091 #define ELIMINATE_COPY_RELOCS 1
2093 /* Used to track dynamic relocations for local symbols. */
2094 struct ppc_dyn_relocs
2095 {
2098 /* The input section of the reloc. */
2101 /* Total number of relocs copied for the input section. */
2104 /* Whether this entry is for STT_GNU_IFUNC symbols. */
2106 };
2108 /* PPC ELF linker hash entry. */
2110 struct ppc_elf_link_hash_entry
2111 {
2114 /* If this symbol is used in the linker created sections, the processor
2115 specific backend uses this field to map the field into the offset
2116 from the beginning of the section. */
2119 /* Contexts in which symbol is used in the GOT.
2120 Bits are or'd into the mask as the corresponding relocs are
2121 encountered during check_relocs, with TLS_TLS being set when any
2122 of the other TLS bits are set. tls_optimize clears bits when
2123 optimizing to indicate the corresponding GOT entry type is not
2124 needed. If set, TLS_TLS is never cleared. tls_optimize may also
2125 set TLS_GDIE when a GD reloc turns into an IE one.
2126 These flags are also kept for local symbols. */
2136 /* The above field is also used to mark function symbols. In which
2137 case TLS_TLS will be 0. */
2142 /* Nonzero if we have seen a small data relocation referring to this
2143 symbol. */
2146 /* Flag use of given relocations. */
2149 };
2151 #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
2153 /* PPC ELF linker hash table. */
2155 struct ppc_elf_link_hash_table
2156 {
2159 /* Various options passed from the linker. */
2162 /* Short-cuts to get to dynamic linker sections. */
2172 /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */
2175 /* Shortcut to __tls_get_addr. */
2178 /* The bfd that forced an old-style PLT. */
2181 /* TLS local dynamic got entry handling. */
2183 bfd_signed_vma refcount;
2184 bfd_vma offset;
2187 /* Offset of branch table to PltResolve function in glink. */
2188 bfd_vma glink_pltresolve;
2190 /* Size of reserved GOT entries. */
2192 /* Non-zero if allocating the header left a gap. */
2195 /* The type of PLT we have chosen to use. */
2198 /* Whether there exist local gnu indirect function resolvers,
2199 referenced by dynamic relocations. */
2203 /* Set if tls optimization is enabled. */
2206 /* Set if inline plt calls should be converted to direct calls. */
2209 /* The size of PLT entries. */
2211 /* The distance between adjacent PLT slots. */
2213 /* The size of the first PLT entry. */
2215 };
2217 /* Rename some of the generic section flags to better document how they
2218 are used for ppc32. The flags are only valid for ppc32 elf objects. */
2220 /* Nonzero if this section has TLS related relocations. */
2221 #define has_tls_reloc sec_flg0
2223 /* Nonzero if this section has a call to __tls_get_addr lacking marker
2224 relocs. */
2225 #define nomark_tls_get_addr sec_flg1
2227 /* Flag set when PLTCALL relocs are detected. */
2228 #define has_pltcall sec_flg2
2230 /* Get the PPC ELF linker hash table from a link_info structure. */
2232 #define ppc_elf_hash_table(p) \
2233 ((is_elf_hash_table ((p)->hash) \
2234 && elf_hash_table_id (elf_hash_table (p)) == PPC32_ELF_DATA) \
2235 ? (struct ppc_elf_link_hash_table *) (p)->hash : NULL)
2237 /* Create an entry in a PPC ELF linker hash table. */
2243 {
2244 /* Allocate the structure if it has not already been allocated by a
2245 subclass. */
2247 {
2252 }
2254 /* Call the allocation method of the superclass. */
2257 {
2261 }
2264 }
2266 /* Create a PPC ELF linker hash table. */
2270 {
2272 static struct ppc_elf_params default_params
2280 ppc_elf_link_hash_newfunc,
2282 {
2285 }
2307 }
2309 /* Hook linker params into hash table. */
2311 void
2313 {
2319 }
2321 /* Create .got and the related sections. */
2323 static bool
2325 {
2333 {
2334 /* The powerpc .got has a blrl instruction in it. Mark it
2335 executable. */
2340 }
2343 }
2345 /* Create a special linker section, used for R_PPC_EMB_SDAI16 and
2346 R_PPC_EMB_SDA2I16 pointers. These sections become part of .sdata
2347 and .sdata2. Create _SDA_BASE_ and _SDA2_BASE too. */
2349 static bool
2352 flagword flags,
2354 {
2365 /* Define the sym on the first section of this name. */
2373 }
2375 static bool
2377 {
2380 flagword flags;
2395 {
2403 }
2420 /* Local plt entries. */
2424 flags);
2430 {
2433 htab->relpltlocal
2438 }
2449 }
2451 /* We have to create .dynsbss and .rela.sbss here so that they get mapped
2452 to output sections (just like _bfd_elf_create_dynamic_sections has
2453 to create .dynbss and .rela.bss). */
2455 static bool
2457 {
2460 flagword flags;
2482 {
2490 }
2499 /* The VxWorks PLT is a loaded section with contents. */
2502 }
2504 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2506 static void
2510 {
2527 /* If we were called to copy over info for a weak sym, that's all. */
2532 {
2534 {
2538 /* Add reloc counts against the indirect sym to the direct sym
2539 list. Merge any entries against the same section. */
2541 {
2546 {
2551 }
2554 }
2556 }
2560 }
2562 /* Copy over the GOT refcount entries that we may have already seen to
2563 the symbol which just became indirect. */
2567 /* And plt entries. */
2569 {
2571 {
2576 {
2581 {
2585 }
2588 }
2590 }
2594 }
2597 {
2605 }
2606 }
2608 /* Hook called by the linker routine which adds symbols from an object
2609 file. We use it to put .comm items in .sbss, and not .bss. */
2611 static bool
2619 {
2624 {
2625 /* Common symbols less than or equal to -G nn bytes are automatically
2626 put into .sbss. */
2631 {
2639 flags);
2642 }
2646 }
2649 }
2650 \f
2651 /* Find a linker generated pointer with a given addend and type. */
2654 elf_find_pointer_linker_section
2656 bfd_vma addend,
2658 {
2664 }
2666 /* Allocate a pointer to live in a linker created section. */
2668 static bool
2673 {
2677 bfd_size_type amt;
2681 /* Is this a global symbol? */
2683 {
2686 /* Has this symbol already been allocated? If so, our work is done. */
2690 lsect))
2694 }
2695 else
2696 {
2699 /* Allocation of a pointer to a local symbol. */
2702 /* Allocate a table to hold the local symbols if first time. */
2704 {
2715 }
2717 /* Has this symbol already been allocated? If so, our work is done. */
2720 lsect))
2724 }
2726 /* Allocate space for a pointer in the linker section, and allocate
2727 a new pointer record from internal memory. */
2745 #ifdef DEBUG
2750 #endif
2753 }
2760 {
2766 {
2776 }
2784 }
2786 static bool
2789 {
2798 {
2808 }
2811 }
2815 {
2824 }
2826 static bool
2828 {
2840 }
2842 /* Relocs on inline plt call sequence insns prior to the call. */
2844 static bool
2846 {
2851 }
2853 /* Like bfd_reloc_offset_in_range but without a howto. Return true
2854 iff a field of SIZE bytes at OFFSET is within SEC limits. */
2856 static bool
2858 {
2860 }
2862 static void
2864 {
2865 _bfd_error_handler
2866 /* xgettext:c-format */
2868 abfd,
2871 }
2873 /* Look through the relocs for a section during the first phase, and
2874 allocate space in the global offset table or procedure linkage
2875 table. */
2877 static bool
2882 {
2894 #ifdef DEBUG
2897 #endif
2901 /* Initialize howto table if not already done. */
2907 {
2912 }
2922 {
2930 bfd_vma addend;
2934 {
2939 }
2940 else
2941 {
2947 }
2949 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
2950 This shows up in particular in an R_PPC_ADDR32 in the eabi
2951 startup code. */
2955 {
2961 }
2967 {
2969 {
2972 }
2973 }
2975 {
2977 {
2978 /* Set PLT_IFUNC flag for this sym, no GOT entry yet. */
2984 /* STT_GNU_IFUNC symbols must have a PLT entry;
2985 In a non-pie executable even when there are
2986 no plt calls. */
2992 {
3004 }
3005 }
3006 }
3012 {
3016 /* We have a new-style __tls_get_addr call with a marker
3017 reloc. */
3018 ;
3019 else
3020 /* Mark this section as having an old-style call. */
3022 }
3025 {
3028 /* These special tls relocs tie a call to __tls_get_addr with
3029 its parameter symbol. */
3032 else
3069 dogottls:
3071 /* Fall through. */
3073 /* GOT16 relocations */
3078 /* This symbol requires a global offset table entry. */
3080 {
3085 }
3087 {
3090 }
3091 else
3092 /* This is a global offset table entry for a local symbol. */
3096 /* We may also need a plt entry if the symbol turns out to be
3097 an ifunc. */
3099 {
3102 }
3105 /* Indirect .sdata relocation. */
3112 {
3115 }
3118 /* Indirect .sdata2 relocation. */
3121 {
3124 }
3130 {
3133 }
3138 /* Fall through. */
3147 {
3150 }
3167 {
3170 }
3173 {
3176 }
3184 {
3187 }
3207 /* Fall through. */
3214 pltentry:
3215 #ifdef DEBUG
3217 #endif
3218 /* This symbol requires a procedure linkage table entry. */
3220 {
3225 }
3226 else
3227 {
3232 }
3244 /* The following relocations don't need to propagate the
3245 relocation if linking a shared object since they are
3246 section relative. */
3266 /* These are just markers. */
3277 /* These should only appear in dynamic objects. */
3285 /* These aren't handled yet. We'll report an error later. */
3294 /* This refers only to functions defined in the shared library. */
3297 {
3300 }
3307 /* This relocation describes the C++ object vtable hierarchy.
3308 Reconstruct it for later use during GC. */
3314 /* This relocation describes which C++ vtable entries are actually
3315 used. Record for later use during GC. */
3324 /* Fall through. */
3325 /* We shouldn't really be seeing TPREL32. */
3333 /* Nor these. */
3344 {
3345 /* Old -fPIC gcc code has .long LCTOC1-LCFx just before
3346 the start of a function, which assembles to a REL32
3347 reference to .got2. If we detect one of these, then
3348 force the old PLT layout because the linker cannot
3349 reliably deduce the GOT pointer value needed for
3350 PLT call stubs. */
3355 {
3358 }
3359 }
3362 /* fall through */
3372 {
3373 /* We may need a plt entry if the symbol turns out to be
3374 a function defined in a dynamic object. */
3378 /* We may need a copy reloc too. */
3385 }
3395 {
3397 {
3400 }
3402 }
3403 /* fall through */
3410 {
3411 /* We may need a plt entry if the symbol turns out to be
3412 a function defined in a dynamic object. */
3417 }
3419 dodyn:
3420 /* Set up information for symbols that might need dynamic
3421 relocations. At this point in linking we have read all
3422 the input files and resolved most symbols, but have not
3423 yet decided whether symbols are dynamic or finalized
3424 symbol flags. In some cases we might be setting dynamic
3425 reloc info for symbols that do not end up needing such.
3426 That's OK, adjust_dynamic_symbol and allocate_dynrelocs
3427 work together with this code. */
3435 {
3436 #ifdef DEBUG
3438 "ppc_elf_check_relocs needs to "
3442 #endif
3444 {
3448 sreloc = _bfd_elf_make_dynamic_reloc_section
3453 }
3455 /* If this is a global symbol, we count the number of
3456 relocations we need for this symbol. */
3458 {
3465 {
3474 }
3478 }
3479 else
3480 {
3481 /* Track dynamic relocs needed for local syms too.
3482 We really need local syms available to do this
3483 easily. Oh well. */
3501 {
3510 }
3512 }
3513 }
3516 }
3517 }
3520 }
3521 \f
3522 /* Warn for conflicting Tag_GNU_Power_ABI_FP attributes between IBFD
3523 and OBFD, and merge non-conflicting ones. */
3524 bool
3526 {
3533 /* We only warn about shared library mismatches, because common
3534 libraries advertise support for a particular long double variant
3535 but actually support more than one variant. For example, glibc
3536 typically supports 128-bit IBM long double in the shared library
3537 but has a compatibility static archive for 64-bit long double.
3538 The linker doesn't have the smarts to see that an app using
3539 object files marked as 64-bit long double call the compatibility
3540 layer objects and only from there call into the shared library. */
3550 {
3556 ;
3558 {
3560 {
3564 }
3565 }
3567 {
3568 _bfd_error_handler
3569 /* xgettext:c-format */
3573 }
3575 {
3576 _bfd_error_handler
3577 /* xgettext:c-format */
3581 }
3583 {
3584 _bfd_error_handler
3585 /* xgettext:c-format */
3589 }
3591 {
3592 _bfd_error_handler
3593 /* xgettext:c-format */
3597 }
3602 ;
3604 {
3606 {
3610 }
3611 }
3613 {
3614 _bfd_error_handler
3615 /* xgettext:c-format */
3619 }
3621 {
3622 _bfd_error_handler
3623 /* xgettext:c-format */
3627 }
3629 {
3630 _bfd_error_handler
3631 /* xgettext:c-format */
3635 }
3637 {
3638 _bfd_error_handler
3639 /* xgettext:c-format */
3643 }
3644 }
3647 {
3650 }
3652 }
3654 /* Merge object attributes from IBFD into OBFD. Warn if
3655 there are conflicting attributes. */
3656 static bool
3658 {
3671 /* Check for conflicting Tag_GNU_Power_ABI_Vector attributes and
3672 merge non-conflicting ones. */
3677 {
3683 ;
3685 {
3689 }
3690 /* For now, allow generic to transition to AltiVec or SPE
3691 without a warning. If GCC marked files with their stack
3692 alignment and used don't-care markings for files which are
3693 not affected by the vector ABI, we could warn about this
3694 case too. */
3696 ;
3698 {
3702 }
3704 {
3705 _bfd_error_handler
3706 /* xgettext:c-format */
3711 }
3713 {
3714 _bfd_error_handler
3715 /* xgettext:c-format */
3720 }
3721 }
3723 /* Check for conflicting Tag_GNU_Power_ABI_Struct_Return attributes
3724 and merge non-conflicting ones. */
3728 {
3734 ;
3736 {
3740 }
3742 {
3743 _bfd_error_handler
3744 /* xgettext:c-format */
3749 }
3751 {
3752 _bfd_error_handler
3753 /* xgettext:c-format */
3758 }
3759 }
3761 {
3764 }
3766 /* Merge Tag_compatibility attributes and any common GNU ones. */
3768 }
3770 /* Merge backend specific data from an object file to the output
3771 object file when linking. */
3773 static bool
3775 {
3777 flagword old_flags;
3778 flagword new_flags;
3784 /* Check if we have the same endianness. */
3797 {
3798 /* First call, no flags set. */
3801 }
3803 /* Compatible flags are ok. */
3805 ;
3807 /* Incompatible flags. */
3808 else
3809 {
3810 /* Warn about -mrelocatable mismatch. Allow -mrelocatable-lib
3811 to be linked with either. */
3815 {
3817 _bfd_error_handler
3820 }
3823 {
3825 _bfd_error_handler
3828 }
3830 /* The output is -mrelocatable-lib iff both the input files are. */
3834 /* The output is -mrelocatable iff it can't be -mrelocatable-lib,
3835 but each input file is either -mrelocatable or -mrelocatable-lib. */
3841 /* Do not warn about eabi vs. V.4 mismatch, just or in the bit if
3842 any module uses it. */
3848 /* Warn about any other mismatches. */
3850 {
3852 _bfd_error_handler
3853 /* xgettext:c-format */
3857 }
3860 {
3863 }
3864 }
3867 }
3869 static bfd_reloc_status_type
3874 bfd_vma value,
3875 split16_format_type split16_format,
3877 {
3889 {
3891 {
3894 else
3895 _bfd_error_handler
3896 /* xgettext:c-format */
3899 }
3900 }
3908 {
3910 {
3913 else
3914 _bfd_error_handler
3915 /* xgettext:c-format */
3918 }
3919 }
3921 {
3925 {
3926 /* Hack for e_li. Extend sign. */
3929 }
3930 }
3931 else
3932 {
3935 }
3939 }
3941 static void
3943 {
3947 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
3948 /* Top 4 bits of value to 17..20. */
3950 /* Next 5 bits of the value to 11..15. */
3952 /* And the final 11 bits of the value to bits 21 to 31. */
3955 }
3957 \f
3958 /* Choose which PLT scheme to use, and set .plt flags appropriately.
3959 Returns -1 on error, 0 for old PLT, 1 for new PLT. */
3960 int
3963 {
3965 flagword flags;
3970 {
3984 {
3985 /* Profiling of shared libs (and pies) is not supported with
3986 secure plt, because ppc32 does profiling before a
3987 function prologue and a secure plt pic call stubs needs
3988 r30 to be set up. */
3990 }
3991 else
3992 {
3996 /* Look through the reloc flags left by ppc_elf_check_relocs.
3997 Use the old style bss plt if a file makes plt calls
3998 without using the new relocs, and if ld isn't given
3999 --secure-plt and we never see REL16 relocs. */
4004 {
4008 {
4012 }
4013 }
4015 }
4016 }
4018 {
4024 {
4027 else
4029 }
4030 }
4035 {
4039 /* The new PLT is a loaded section. */
4044 /* The new GOT is not executable. */
4048 }
4049 else
4050 {
4051 /* Stop an unused .glink section from affecting .text alignment. */
4055 }
4057 }
4058 \f
4059 /* Return the section that should be marked against GC for a given
4060 relocation. */
4068 {
4071 {
4075 }
4078 }
4080 static bool
4088 {
4092 {
4108 {
4114 }
4118 }
4119 else
4120 {
4125 {
4134 }
4147 {
4154 {
4160 }
4162 }
4163 }
4165 }
4166 \f
4167 /* Analyze inline PLT call relocations to see whether calls to locally
4168 defined functions can be converted to direct calls. */
4170 bool
4172 {
4182 /* A bl insn can reach -0x2000000 to 0x1fffffc. The limit is
4183 reduced somewhat to cater for possible stubs that might be added
4184 between the call and its destination. */
4190 {
4195 }
4197 /* If a "bl" can reach anywhere in local code sections, then we can
4198 convert all inline PLT sequences to direct calls when the symbol
4199 is local. */
4201 {
4204 }
4206 /* Otherwise, go looking through relocs for cases where a direct
4207 call won't reach. Mark the symbol on any such reloc to disable
4208 the optimization and keep the PLT entry as it seems likely that
4209 this will be better than creating trampolines. Note that this
4210 will disable the optimization for all inline PLT calls to a
4211 particular symbol, not just those that won't reach. The
4212 difficulty in doing a more precise optimization is that the
4213 linker needs to make a decision depending on whether a
4214 particular R_PPC_PLTCALL insn can be turned into a direct
4215 call, for each of the R_PPC_PLTSEQ and R_PPC_PLT16* insns in
4216 the sequence, and there is nothing that ties those relocs
4217 together except their symbol. */
4220 {
4233 {
4236 /* Read the relocations. */
4244 {
4259 {
4265 }
4268 {
4272 else
4282 }
4283 }
4286 }
4290 {
4293 else
4295 }
4296 }
4299 }
4301 /* Set plt output section type, htab->tls_get_addr, and call the
4302 generic ELF tls_setup function. */
4304 asection *
4306 {
4316 {
4323 {
4324 /* If glibc supports an optimized __tls_get_addr call stub,
4325 signalled by the presence of __tls_get_addr_opt, and we'll
4326 be calling __tls_get_addr via a plt call stub, then
4327 make __tls_get_addr point to __tls_get_addr_opt. */
4335 {
4341 {
4347 {
4348 /* Use __tls_get_addr_opt in dynamic relocations. */
4354 }
4356 }
4357 }
4358 }
4359 else
4361 }
4365 {
4368 }
4371 }
4373 /* Return TRUE iff REL is a branch reloc with a global symbol matching
4374 HASH. */
4376 static bool
4380 {
4386 {
4396 }
4398 }
4400 /* Run through all the TLS relocs looking for optimization
4401 opportunities. */
4403 bool
4406 {
4421 /* Make two passes through the relocs. First time check that tls
4422 relocs involved in setting up a tls_get_addr call are indeed
4423 followed by such a call. If they are not, don't do any tls
4424 optimization. On the second pass twiddle tls_mask flags to
4425 notify relocate_section that optimization can be done, and
4426 adjust got and plt refcounts. */
4429 {
4435 {
4439 /* Read the relocations. */
4447 {
4458 {
4466 }
4470 /* If this section has old-style __tls_get_addr calls
4471 without marker relocs, then check that each
4472 __tls_get_addr call reloc is preceded by a reloc
4473 that conceivably belongs to the __tls_get_addr arg
4474 setup insn. If we don't find matching arg setup
4475 relocs, don't do any tls optimization. */
4480 && !expecting_tls_get_addr
4482 {
4489 }
4493 {
4497 /* Fall through. */
4501 /* These relocs should never be against a symbol
4502 defined in a shared lib. Leave them alone if
4503 that turns out to be the case. */
4507 /* LD -> LE */
4515 /* Fall through. */
4520 /* GD -> LE */
4522 else
4523 /* GD -> IE */
4533 {
4534 /* IE -> LE */
4538 }
4539 else
4545 /* Fall through. */
4549 {
4552 {
4556 {
4565 {
4576 }
4577 }
4578 }
4580 }
4588 {
4594 {
4598 }
4600 /* addis rt,2,imm */
4603 {
4604 /* xgettext:c-format */
4609 }
4610 }
4619 }
4622 {
4632 /* Uh oh, we didn't find the expected call. We
4633 could just mark this symbol to exclude it
4634 from tls optimization but it's safer to skip
4635 the entire optimization. */
4642 }
4645 {
4648 }
4649 else
4650 {
4664 }
4666 /* If we don't have old-style __tls_get_addr calls
4667 without TLSGD/TLSLD marker relocs, and we haven't
4668 found a new-style __tls_get_addr call with a
4669 marker for this symbol, then we either have a
4670 broken object file or an -mlongcall style
4671 indirect call to __tls_get_addr without a marker.
4672 Disable optimization in this case. */
4680 {
4692 }
4697 {
4698 /* We managed to get rid of a got entry. */
4701 }
4705 }
4709 }
4710 }
4712 }
4713 \f
4714 /* Return true if we have dynamic relocs against H or any of its weak
4715 aliases, that apply to read-only sections. Cannot be used after
4716 size_dynamic_sections. */
4718 static bool
4720 {
4722 do
4723 {
4730 }
4732 /* Return whether H has pc-relative dynamic relocs. */
4734 static bool
4736 {
4743 }
4745 /* Adjust a symbol defined by a dynamic object and referenced by a
4746 regular object. The current definition is in some section of the
4747 dynamic object, but we're not including those sections. We have to
4748 change the definition to something the rest of the link can
4749 understand. */
4751 static bool
4754 {
4758 #ifdef DEBUG
4761 #endif
4763 /* Make sure we know what is going on here. */
4773 /* Deal with function syms. */
4777 {
4780 /* Discard dyn_relocs when non-pic if we've decided that a
4781 function symbol is local. */
4785 /* Clear procedure linkage table information for any symbol that
4786 won't need a .plt entry. */
4793 && local
4797 {
4798 /* A PLT entry is not required/allowed when:
4800 1. We are not using ld.so; because then the PLT entry
4801 can't be set up, so we can't use one. In this case,
4802 ppc_elf_adjust_dynamic_symbol won't even be called.
4804 2. GC has rendered the entry unused.
4806 3. We know for certain that a call to this symbol
4807 will go to this object, or will remain undefined. */
4811 }
4812 else
4813 {
4814 /* Taking a function's address in a read/write section
4815 doesn't require us to define the function symbol in the
4816 executable on a plt call stub. A dynamic reloc can
4817 be used instead, giving better runtime performance.
4818 (Calls via that function pointer don't need to bounce
4819 through the plt call stub.) Similarly, use a dynamic
4820 reloc for a weak reference when possible, allowing the
4821 resolution of the symbol to be set at load time rather
4822 than link time. */
4830 {
4832 /* If we haven't seen a branch reloc and the symbol
4833 isn't an ifunc then we don't need a plt entry. */
4836 }
4838 /* We are going to be defining the function symbol on the
4839 plt stub, so no dyn_relocs needed when non-pic. */
4841 }
4843 /* Function symbols can't have copy relocs. */
4845 }
4846 else
4849 /* If this is a weak symbol, and there is a real definition, the
4850 processor independent code will have arranged for us to see the
4851 real definition first, and we can just use the same value. */
4853 {
4863 }
4865 /* This is a reference to a symbol defined by a dynamic object which
4866 is not a function. */
4868 /* If we are creating a shared library, we must presume that the
4869 only references to the symbol are via the global offset table.
4870 For such cases we need not do anything here; the relocations will
4871 be handled correctly by relocate_section. */
4873 {
4876 }
4878 /* If there are no references to this symbol that do not use the
4879 GOT, we don't need to generate a copy reloc. */
4881 {
4884 }
4886 /* Protected variables do not work with .dynbss. The copy in
4887 .dynbss won't be used by the shared library with the protected
4888 definition for the variable. Editing to PIC, or text relocations
4889 are preferable to an incorrect program. */
4891 {
4899 }
4901 /* If -z nocopyreloc was given, we won't generate them either. */
4905 /* If we don't find any dynamic relocs in read-only sections, then
4906 we'll be keeping the dynamic relocs and avoiding the copy reloc.
4907 We can't do this if there are any small data relocations. This
4908 doesn't work on VxWorks, where we can not have dynamic
4909 relocations (other than copy and jump slot relocations) in an
4910 executable. */
4918 /* We must allocate the symbol in our .dynbss section, which will
4919 become part of the .bss section of the executable. There will be
4920 an entry for this symbol in the .dynsym section. The dynamic
4921 object will contain position independent code, so all references
4922 from the dynamic object to this symbol will go through the global
4923 offset table. The dynamic linker will use the .dynsym entry to
4924 determine the address it must put in the global offset table, so
4925 both the dynamic object and the regular object will refer to the
4926 same memory location for the variable.
4928 Of course, if the symbol is referenced using SDAREL relocs, we
4929 must instead allocate it in .sbss. */
4934 else
4939 {
4942 /* We must generate a R_PPC_COPY reloc to tell the dynamic
4943 linker to copy the initial value out of the dynamic object
4944 and into the runtime process image. */
4949 else
4954 }
4956 /* We no longer want dyn_relocs. */
4959 }
4960 \f
4961 /* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
4962 xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
4963 specifying the addend on the plt relocation. For -fpic code, the sym
4964 is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
4965 xxxxxxxx.got2.plt_pic32.<callee>. */
4967 static bool
4971 {
4980 else
5000 {
5010 }
5012 }
5014 /* Allocate NEED contiguous space in .got, and return the offset.
5015 Handles allocation of the got header when crossing 32k. */
5017 static bfd_vma
5019 {
5020 bfd_vma where;
5024 {
5027 }
5028 else
5029 {
5032 {
5035 }
5036 else
5037 {
5040 {
5043 }
5046 }
5047 }
5049 }
5051 /* Calculate size of GOT entries for symbol given its TLS_MASK.
5052 TLS_LD is excluded because those go in a special GOT slot. */
5056 {
5060 else
5061 {
5069 }
5071 }
5073 /* If H is undefined, make it dynamic if that makes sense. */
5075 static bool
5078 {
5090 }
5092 /* Choose whether to use htab->iplt or htab->pltlocal rather than the
5093 usual htab->elf.splt section for a PLT entry. */
5098 {
5102 }
5104 /* Allocate space in associated reloc sections for dynamic relocs. */
5106 static bool
5108 {
5120 || (ELIMINATE_COPY_RELOCS
5126 {
5127 /* Make sure this symbol is output as a dynamic symbol. */
5134 {
5136 /* We'll just use htab->tlsld_got.offset. This should
5137 always be the case. It's a little odd if we have
5138 a local dynamic reloc against a non-local symbol. */
5140 else
5141 {
5144 }
5145 }
5148 else
5149 {
5160 {
5167 }
5168 }
5169 }
5170 else
5173 /* If no dynamic sections we can't have dynamic relocs, except for
5174 IFUNCs which are handled even in static executables. */
5179 /* Discard relocs on undefined symbols that must be local. */
5184 /* Also discard relocs on undefined weak syms with non-default
5185 visibility, or when dynamic_undefined_weak says so. */
5190 ;
5192 /* In the shared -Bsymbolic case, discard space allocated for
5193 dynamic pc-relative relocs against symbols which turn out to be
5194 defined in regular objects. For the normal shared case, discard
5195 space for relocs that have become local due to symbol visibility
5196 changes. */
5198 {
5199 /* Relocs that use pc_count are those that appear on a call insn,
5200 or certain REL relocs (see must_be_dyn_reloc) that can be
5201 generated via assembly. We want calls to protected symbols to
5202 resolve directly to the function rather than going via the plt.
5203 If people want function pointer comparisons to work as expected
5204 then they should avoid writing weird assembly. */
5206 {
5210 {
5215 else
5217 }
5218 }
5221 {
5225 {
5228 else
5230 }
5231 }
5234 {
5235 /* Make sure this symbol is output as a dynamic symbol. */
5238 }
5239 }
5241 {
5242 /* For the non-pic case, discard space for relocs against
5243 symbols which turn out to need copy relocs or are not
5244 dynamic. */
5256 {
5257 /* Make sure this symbol is output as a dynamic symbol. */
5263 }
5264 else
5266 }
5268 /* Allocate space. */
5271 {
5276 }
5278 /* Handle PLT relocs. Done last, after dynindx has settled.
5279 We might need a PLT entry when the symbol
5280 a) is dynamic, or
5281 b) is an ifunc, or
5282 c) has plt16 relocs and has been processed by adjust_dynamic_symbol, or
5283 d) has plt16 relocs and we are linking statically. */
5293 {
5300 {
5310 {
5313 else
5315 }
5318 {
5320 {
5323 }
5328 else
5329 {
5332 {
5335 }
5340 {
5343 }
5349 }
5350 }
5351 else
5352 {
5354 {
5355 /* If this is the first .plt entry, make room
5356 for the special first entry. */
5360 /* The PowerPC PLT is actually composed of two
5361 parts, the first part is 2 words (for a load
5362 and a jump), and then there is a remaining
5363 word available at the end. */
5370 /* If this symbol is not defined in a regular
5371 file, and we are not generating a shared
5372 library, then set the symbol to this location
5373 in the .plt. This is to avoid text
5374 relocations, and is required to make
5375 function pointers compare as equal between
5376 the normal executable and the shared library. */
5380 {
5383 }
5385 /* Make room for this entry. */
5387 /* After the 8192nd entry, room for two entries
5388 is allocated. */
5394 }
5396 }
5398 /* We also need to make an entry in the .rela.plt section. */
5400 {
5402 {
5404 {
5407 }
5409 {
5412 }
5413 }
5414 else
5415 {
5419 {
5420 /* Allocate space for the unloaded relocations. */
5423 {
5426 {
5430 }
5435 }
5437 /* Every PLT entry has an associated GOT entry in
5438 .got.plt. */
5440 }
5441 }
5443 }
5444 }
5445 else
5449 {
5452 }
5453 }
5454 else
5455 {
5458 }
5461 }
5464 {
5475 };
5477 /* Set the sizes of the dynamic sections. */
5479 static bool
5482 {
5488 #ifdef DEBUG
5490 #endif
5497 {
5498 /* Set the contents of the .interp section to the interpreter. */
5500 {
5506 }
5507 }
5514 /* Set up .got offsets for local syms, and space for local dynamic
5515 relocs. */
5517 {
5523 bfd_size_type locsymcount;
5532 {
5539 {
5541 {
5542 /* Input section has been discarded, either because
5543 it is a copy of a linkonce section or due to
5544 linker script /DISCARD/, so we'll be discarding
5545 the relocs too. */
5546 }
5550 {
5551 /* Relocations in vxworks .tls_vars sections are
5552 handled specially by the loader. */
5553 }
5555 {
5563 {
5567 }
5568 }
5569 }
5570 }
5584 {
5589 }
5595 {
5602 else
5603 {
5609 {
5617 }
5618 }
5619 }
5620 else
5626 /* Allocate space for calls to local STT_GNU_IFUNC syms in .iplt. */
5629 {
5636 {
5641 {
5644 }
5645 else
5649 {
5652 }
5656 {
5660 }
5664 {
5666 {
5669 }
5671 {
5674 }
5676 }
5677 }
5678 else
5680 }
5684 {
5687 else
5689 }
5690 }
5692 /* Allocate space for global sym dynamic relocs. */
5696 {
5700 }
5701 else
5705 {
5708 /* If we haven't allocated the header, do so now. When we get here,
5709 for old plt/got the got size will be 0 to 32764 (not allocated),
5710 or 32780 to 65536 (header allocated). For new plt/got, the
5711 corresponding ranges are 0 to 32768 and 32780 to 65536. */
5713 {
5718 }
5721 }
5723 {
5728 }
5730 {
5738 }
5743 {
5745 /* Space for the branch table. */
5748 /* Pad out to align the start of PLTresolve. */
5754 {
5761 {
5771 }
5777 {
5787 }
5788 }
5789 }
5796 {
5800 {
5804 }
5805 }
5807 /* We've now determined the sizes of the various dynamic sections.
5808 Allocate memory for them. */
5811 {
5819 {
5820 /* We'd like to strip these sections if they aren't needed, but if
5821 we've exported dynamic symbols from them we must leave them.
5822 It's too late to tell BFD to get rid of the symbols. */
5825 /* Strip this section if we don't need it; see the
5826 comment below. */
5827 }
5837 {
5838 /* Strip these too. */
5839 }
5842 {
5844 }
5846 {
5848 {
5849 /* Remember whether there are any relocation sections. */
5852 /* We use the reloc_count field as a counter if we need
5853 to copy relocs into the output file. */
5855 }
5856 }
5857 else
5858 {
5859 /* It's not one of our sections, so don't allocate space. */
5861 }
5864 {
5865 /* If we don't need this section, strip it from the
5866 output file. This is mostly to handle .rela.bss and
5867 .rela.plt. We must create both sections in
5868 create_dynamic_sections, because they must be created
5869 before the linker maps input sections to output
5870 sections. The linker does that before
5871 adjust_dynamic_symbol is called, and it is that
5872 function which decides whether anything needs to go
5873 into these sections. */
5876 }
5881 /* Allocate memory for the section contents. */
5886 }
5889 {
5890 /* Add some entries to the .dynamic section. We fill in the
5891 values later, in ppc_elf_finish_dynamic_sections, but we
5892 must add the entries now so that we get the correct size for
5893 the .dynamic section. The DT_DEBUG entry is filled in by the
5894 dynamic linker and used by the debugger. */
5895 #define add_dynamic_entry(TAG, VAL) \
5896 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
5899 relocs))
5905 {
5913 }
5914 }
5915 #undef add_dynamic_entry
5919 {
5921 bfd_vma val;
5924 /* CIE length (rewrite in case little-endian). */
5927 /* FDE length. */
5931 /* CIE pointer. */
5935 /* Offset to .glink. Set later. */
5937 /* .glink size. */
5940 /* Augmentation. */
5945 {
5950 {
5953 }
5955 {
5959 }
5960 else
5961 {
5965 }
5968 p++;
5972 }
5975 }
5978 }
5980 /* Arrange to have _SDA_BASE_ or _SDA2_BASE_ stripped from the output
5981 if it looks like nothing is using them. */
5983 static void
5985 {
5989 {
5994 {
5997 {
5999 /* This is somewhat magic. See elf_link_output_extsym. */
6002 }
6003 }
6004 }
6005 }
6007 void
6009 {
6013 {
6016 }
6017 }
6020 /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */
6022 static bool
6024 {
6032 }
6033 \f
6034 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
6036 /* Relaxation trampolines. r12 is available for clobbering (r11, is
6037 used for some functions that are allowed to break the ABI). */
6039 {
6048 };
6051 {
6056 };
6058 struct ppc_elf_relax_info
6059 {
6062 };
6064 /* This function implements long branch trampolines, and the ppc476
6065 icache bug workaround. Any section needing trampolines or patch
6066 space for the workaround has its size extended so that we can
6067 add trampolines at the end of the section. */
6069 static bool
6074 {
6075 struct one_branch_fixup
6076 {
6079 /* Final link, can use the symbol offset. For a
6080 relocatable link we use the symbol's index. */
6081 bfd_vma toff;
6082 bfd_vma trampoff;
6083 };
6101 /* No need to do anything with non-alloc or non-code sections. */
6109 /* We cannot represent the required PIC relocs in the output, so don't
6110 do anything. The linker doesn't support mixing -shared and -r
6111 anyway. */
6130 {
6132 {
6137 }
6140 }
6144 /* Space for a branch around any trampolines. */
6153 {
6154 /* Get a copy of the native relocations. */
6156 {
6161 }
6167 {
6182 {
6203 }
6205 /* Get the value of the symbol referred to by the reloc. */
6211 {
6213 ;
6216 else
6221 }
6222 else
6223 {
6228 {
6234 }
6235 else
6238 /* If this branch is to __tls_get_addr then we may later
6239 optimise away the call. We won't be needing a long-
6240 branch stub in that case. */
6244 {
6249 /* The previous reloc should be one of R_PPC_TLSGD or
6250 R_PPC_TLSLD, or for older object files, a reloc
6251 on the __tls_get_addr arg setup insn. Get tls
6252 mask bits from the symbol on that reloc. */
6254 {
6258 {
6264 }
6265 }
6266 else
6267 {
6275 tls_mask
6277 }
6279 /* The mask bits tell us if the call will be
6280 optimised away. */
6291 }
6294 }
6297 {
6305 }
6307 /* The condition here under which we call find_plt_ent must
6308 match that in relocate_section. If we call find_plt_ent here
6309 but not in relocate_section, or vice versa, then the branch
6310 destination used here may be incorrect. */
6313 {
6314 /* We know is_branch_reloc (r_type) is true. */
6318 }
6321 {
6326 }
6328 {
6336 {
6341 {
6344 }
6345 else
6346 {
6349 }
6350 }
6351 }
6353 /* If the branch and target are in the same section, you have
6354 no hope of adding stubs. We'll error out later should the
6355 branch overflow. */
6359 /* toff is used for the symbol index when the symbol is
6360 undefined and we're doing a relocatable link, so we can't
6361 support addends. It would be possible to do so by
6362 putting the addend in one_branch_fixup but addends on
6363 branches are rare so it hardly seems worth supporting. */
6370 /* There probably isn't any reason to handle symbols in
6371 SEC_MERGE sections; SEC_MERGE doesn't seem a likely
6372 attribute for a code section, and we are only looking at
6373 branches. However, implement it correctly here as a
6374 reference for other target relax_section functions. */
6376 {
6377 /* At this stage in linking, no SEC_MERGE symbol has been
6378 adjusted, so all references to such symbols need to be
6379 passed through _bfd_merged_section_offset. (Later, in
6380 relocate_section, all SEC_MERGE symbols *except* for
6381 section symbols have been adjusted.)
6383 gas may reduce relocations against symbols in SEC_MERGE
6384 sections to a relocation against the section symbol when
6385 the original addend was zero. When the reloc is against
6386 a section symbol we should include the addend in the
6387 offset passed to _bfd_merged_section_offset, since the
6388 location of interest is the original symbol. On the
6389 other hand, an access to "sym+addend" where "sym" is not
6390 a section symbol should not include the addend; Such an
6391 access is presumed to be an offset from "sym"; The
6392 location of interest is just "sym". */
6397 toff
6400 toff);
6405 }
6406 /* PLTREL24 addends are special. */
6410 /* Attempted -shared link of non-pic code loses. */
6421 /* Avoid creating a lot of unnecessary fixups when
6422 relocatable if the output section size is such that a
6423 fixup can be created at final link.
6424 The max_branch_offset adjustment allows for some number
6425 of other fixups being needed at final link. */
6431 /* If the branch is in range, no need to do anything. */
6434 /* A relocatable link may have sections moved during
6435 final link, so do not presume they remain in range. */
6437 {
6438 bfd_vma symaddr;
6444 }
6446 /* Look for an existing fixup to this address. */
6452 {
6458 /* Oh dear, we can't reach a trampoline. Don't try to add
6459 one. We'll report an error later. */
6463 {
6466 }
6467 else
6468 {
6471 }
6475 {
6479 }
6481 /* Hijack the old relocation. Since we need two
6482 relocations for this use a "composite" reloc. */
6484 stub_rtype);
6490 /* Record the fixup so we don't do it again this section. */
6499 changes++;
6500 }
6501 else
6502 {
6507 /* Nop out the reloc, since we're finalizing things here. */
6509 }
6517 /* Get the section contents. */
6519 {
6520 /* Get cached copy if it exists. */
6523 /* Go get them off disk. */
6526 }
6528 /* Fix up the existing branch to hit the trampoline. */
6531 {
6549 }
6550 }
6553 {
6557 }
6558 }
6565 {
6575 {
6576 /* Keep space aligned, to ensure the patch code itself does
6577 not cross a page. Don't decrease size calculated on a
6578 previous pass as otherwise we might never settle on a layout. */
6582 {
6585 }
6586 /* Ensure relocate_section is called. */
6588 }
6590 }
6593 {
6598 }
6605 {
6608 else
6609 {
6610 /* Cache the symbols for elf_link_input_bfd. */
6612 }
6613 }
6617 {
6620 else
6621 {
6622 /* Cache the section contents for elf_link_input_bfd. */
6624 }
6625 }
6629 {
6630 /* Append sufficient NOP relocs so we can write out relocation
6631 information for the trampolines. */
6642 }
6649 error_return:
6651 {
6655 }
6663 }
6664 \f
6665 /* What to do when ld finds relocations against symbols defined in
6666 discarded sections. */
6668 static unsigned int
6670 {
6678 }
6679 \f
6680 /* Fill in the address for a pointer generated in a linker section. */
6682 static bfd_vma
6686 bfd_vma relocation,
6688 {
6694 {
6695 /* Handle global symbol. */
6701 }
6702 else
6703 {
6704 /* Handle local symbol. */
6710 }
6714 lsect);
6717 /* Offset will always be a multiple of four, so use the bottom bit
6718 as a "written" flag. */
6720 {
6725 }
6732 #ifdef DEBUG
6736 #endif
6739 }
6741 #define PPC_LO(v) ((v) & 0xffff)
6742 #define PPC_HI(v) (((v) >> 16) & 0xffff)
6743 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
6745 static void
6749 {
6752 bfd_vma plt;
6758 {
6775 }
6782 {
6796 else
6797 {
6801 }
6802 }
6803 else
6804 {
6808 }
6815 {
6818 }
6819 }
6821 /* Return true if symbol is defined statically. */
6823 static bool
6825 {
6830 }
6832 /* If INSN is an opcode that may be used with an @tls operand, return
6833 the transformed insn for TLS optimisation, otherwise return 0. If
6834 REG is non-zero only match an insn with RB or RA equal to REG. */
6836 unsigned int
6838 {
6848 else
6852 /* add -> addi. */
6858 /* load and store indexed -> dform. */
6861 /* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
6864 /* lwax -> lwa. */
6866 else
6870 }
6872 /* If INSN is an opcode that may be used with an @tprel operand, return
6873 the transformed insn for an undefined weak symbol, ie. with the
6874 thread pointer REG operand removed. Otherwise return 0. */
6876 unsigned int
6878 {
6899 {
6901 }
6906 {
6911 }
6912 else
6915 }
6917 static bool
6919 {
6924 }
6926 static bool
6928 {
6932 }
6934 static bool
6936 {
6941 }
6943 static bool
6945 {
6949 }
6951 /* The RELOCATE_SECTION function is called by the ELF backend linker
6952 to handle the relocations for a section.
6954 The relocs are always passed as Rela structures; if the section
6955 actually uses Rel structures, the r_addend field will always be
6956 zero.
6958 This function is responsible for adjust the section contents as
6959 necessary, and (if using Rela relocs and generating a
6960 relocatable output file) adjusting the reloc addend as
6961 necessary.
6963 This function does not have to worry about setting the reloc
6964 address or the reloc symbol index.
6966 LOCAL_SYMS is a pointer to the swapped in local symbols.
6968 LOCAL_SECTIONS is an array giving the section in the input file
6969 corresponding to the st_shndx field of each local symbol.
6971 The global hash table entry for the global symbols can be found
6972 via elf_sym_hashes (input_bfd).
6974 When generating relocatable output, this function must handle
6975 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
6976 going to be the section symbol corresponding to the output
6977 section, which means that the addend must be adjusted
6978 accordingly. */
6980 static int
6989 {
6996 Elf_Internal_Rela outrel;
7005 #ifdef DEBUG
7011 #endif
7014 {
7017 }
7021 /* Initialize howto table if not already done. */
7029 /* We have to handle relocations in vxworks .tls_vars sections
7030 specially, because the dynamic loader is 'weird'. */
7039 {
7041 bfd_vma addend;
7042 bfd_reloc_status_type r;
7049 bfd_vma relocation;
7057 again:
7067 {
7073 }
7074 else
7075 {
7084 }
7087 {
7088 /* For relocs against symbols from removed linkonce sections,
7089 or sections discarded by a linker script, we just want the
7090 section contents zeroed. Avoid any special processing. */
7101 /* For ld -r, remove relocations in debug sections against
7102 symbols defined in discarded sections. Not done for
7103 non-debug to preserve relocs in .eh_frame which the
7104 eh_frame editing code expects to be present. */
7107 wrel--;
7110 }
7113 {
7117 {
7118 /* R_PPC_PLTREL24 is rather special. If non-zero, the
7119 addend specifies the GOT pointer offset within .got2. */
7121 }
7126 }
7128 /* TLS optimizations. Replace instruction sequences and relocs
7129 based on information we collected in tls_optimize. We edit
7130 RELOCS so that --emit-relocs will output something sensible
7131 for the final instruction stream. */
7137 {
7140 local_plt
7144 }
7146 /* Ensure reloc mapping code below stays sane. */
7157 {
7166 {
7167 bfd_vma insn;
7177 }
7184 {
7185 bfd_vma insn;
7195 /* Was PPC_TLS which sits on insn boundary, now
7196 PPC_TPREL16_LO which is at low-order half-word. */
7198 }
7213 {
7214 tls_gdld_hi:
7218 else
7219 {
7223 }
7225 }
7240 {
7242 bfd_vma offset;
7244 tls_ldgd_opt:
7246 /* If not using the newer R_PPC_TLSGD/LD to mark
7247 __tls_get_addr calls, we must trust that the call
7248 stays with its arg setup insns, ie. that the next
7249 reloc is the __tls_get_addr call associated with
7250 the current reloc. Edit both insns. */
7256 /* We read the low GOT_TLS insn because we need to keep
7257 the destination reg. It may be something other than
7258 the usual r3, and moved to r3 before the call by
7259 intervening code. */
7263 {
7264 /* IE */
7269 {
7273 }
7277 }
7278 else
7279 {
7280 /* LE */
7284 {
7285 /* Was an LD reloc. */
7288 r_symndx++)
7298 }
7303 {
7309 }
7310 }
7314 {
7315 /* We changed the symbol on an LD reloc. Start over
7316 in order to get h, sym, sec etc. right. */
7318 }
7319 }
7326 {
7331 {
7335 }
7338 {
7339 /* IE */
7342 }
7343 else
7344 {
7345 /* LE */
7349 }
7352 /* Zap the reloc on the _tls_get_addr call too. */
7355 }
7362 {
7366 {
7370 }
7374 r_symndx++)
7390 /* Zap the reloc on the _tls_get_addr call too. */
7394 }
7396 }
7398 /* Handle other relocations that tweak non-addend part of insn. */
7401 {
7405 /* Branch taken prediction relocations. */
7409 /* Fall through. */
7411 /* Branch not taken prediction relocations. */
7415 {
7426 /* Invert 'y' bit if not the default. */
7431 }
7436 {
7443 {
7445 {
7446 /* Convert addis to lis. */
7450 }
7451 }
7457 }
7459 }
7468 {
7469 /* Convert lis;addi or lis;load/store accessing a protected
7470 variable defined in a shared library to PIC. */
7475 {
7480 {
7482 bfd_vma off;
7483 bfd_vma got_addr;
7507 /* Convert lis to lwz, loading address from GOT. */
7517 /* Use one of the spare relocs, so --emit-relocs
7518 output is reasonable. */
7525 /* Continue on as if we had a got reloc, to output
7526 dynamic reloc. */
7528 }
7529 else
7530 _bfd_error_handler
7531 /* xgettext:c-format */
7536 }
7540 {
7561 {
7562 /* Arrange to apply the reloc addend, if any. */
7566 }
7567 else
7568 _bfd_error_handler
7569 /* xgettext:c-format */
7574 }
7575 }
7579 {
7583 {
7586 }
7589 {
7595 }
7604 {
7613 }
7615 {
7622 {
7623 /* Uh oh, we are going to create a pic glink stub
7624 for an ifunc (here for h == NULL and later in
7625 finish_dynamic_symbol for h != NULL), and
7626 apparently are using code compiled with
7627 -mbss-plt. The difficulty is that -mbss-plt code
7628 gives no indication via a magic PLTREL24 addend
7629 whether r30 is equal to _GLOBAL_OFFSET_TABLE_ or
7630 is pointing into a .got2 section (and how far
7631 into .got2). */
7633 /* xgettext:c-format */
7636 }
7646 else
7650 }
7651 }
7661 {
7663 de_fault:
7665 /* xgettext:c-format */
7668 else
7669 /* xgettext:c-format */
7686 /* GOT16 relocations. Like an ADDR16 using the symbol's
7687 address in the GOT as relocation value instead of the
7688 symbol's value itself. Also, create a GOT entry for the
7689 symbol and put the symbol value there. */
7723 dogot:
7724 {
7725 /* Relocation is to the entry for this symbol in the global
7726 offset table. */
7727 bfd_vma off;
7739 {
7744 /* This is actually a static link, or it is a
7745 -Bsymbolic link and the symbol is defined
7746 locally, or the symbol was forced to be local
7747 because of a version file. */
7748 ;
7749 else
7750 {
7753 }
7755 }
7756 else
7757 {
7761 }
7763 /* The offset must always be a multiple of 4. We use the
7764 least significant bit to record whether we have already
7765 processed this entry. */
7769 else
7770 {
7782 /* We might have multiple got entries for this sym.
7783 Initialize them all. */
7784 do
7785 {
7789 {
7792 }
7794 {
7797 }
7799 {
7802 }
7804 {
7807 }
7809 /* Generate relocs for the dynamic linker. */
7820 {
7824 {
7830 }
7836 {
7839 {
7842 rsec));
7844 outrel.r_info
7846 }
7847 }
7856 else
7859 {
7862 {
7865 else
7867 }
7868 }
7871 }
7873 /* Init the .got section contents if we're not
7874 emitting a reloc. */
7875 else
7876 {
7880 {
7883 else
7884 {
7887 else
7891 }
7894 {
7898 }
7899 }
7902 }
7907 }
7912 }
7918 {
7920 {
7925 {
7929 {
7932 }
7933 }
7934 }
7935 }
7937 /* If here for a picfixup, we're done. */
7943 + off
7946 /* Addends on got relocations don't make much sense.
7947 x+off@got is actually x@got+off, and since the got is
7948 generated by a hash table traversal, the value in the
7949 got at entry m+n bears little relation to the entry m. */
7952 /* xgettext:c-format */
7956 sym_name);
7957 }
7960 /* Relocations that need no special processing. */
7962 /* It makes no sense to point a local relocation
7963 at a symbol not in this object. */
7965 {
7968 input_bfd,
7969 input_section,
7973 }
7975 {
7976 /* @local on an ifunc does not really make sense since
7977 the ifunc resolver can take you anywhere. More
7978 seriously, calls to ifuncs must go through a plt call
7979 stub, and for pic the plt call stubs uses r30 to
7980 access the PLT. The problem is that a call that is
7981 local won't have the +32k reloc addend trick marking
7982 -fPIC code, so the linker won't know whether r30 is
7983 _GLOBAL_OFFSET_TABLE_ or pointing into a .got2 section. */
7984 /* xgettext:c-format */
7988 }
7999 /* Relocations that may need to be propagated if this is a shared
8000 object. */
8009 {
8010 /* Make this relocation against an undefined weak symbol
8011 resolve to zero. This is really just a tweak, since
8012 code using weak externs ought to check that they are
8013 defined before using them. */
8020 }
8023 /* The TPREL16 relocs shouldn't really be used in shared
8024 libs or with non-local symbols as that will result in
8025 DT_TEXTREL being set, but support them anyway. */
8053 /* fall through */
8071 /* If these relocations are not to a named symbol, they can be
8072 handled right here, no need to bother the dynamic linker. */
8076 /* fall through */
8084 /* fall through */
8086 dodyn:
8098 {
8103 #ifdef DEBUG
8108 #endif
8110 /* When generating a shared object, these relocations
8111 are copied into the output file to be resolved at run
8112 time. */
8115 input_section,
8123 /* Optimize unaligned reloc use. */
8134 {
8140 }
8141 else
8142 {
8146 {
8148 {
8149 /* If we get here when building a static
8150 executable, then the libc startup function
8151 responsible for applying indirect function
8152 relocations is going to complain about
8153 the reloc type.
8154 If we get here when building a dynamic
8155 executable, it will be because we have
8156 a text relocation. The dynamic loader
8157 will set the text segment writable and
8158 non-executable to apply text relocations.
8159 So we'll segfault when trying to run the
8160 indirection function to resolve the reloc. */
8162 /* xgettext:c-format */
8167 sym_name);
8169 }
8171 ;
8173 {
8176 }
8177 else
8178 {
8181 /* We are turning this relocation into one
8182 against a section symbol. It would be
8183 proper to subtract the symbol's value,
8184 osec->vma, from the emitted reloc addend,
8185 but ld.so expects buggy relocs.
8186 FIXME: Why not always use a zero index? */
8189 {
8192 }
8193 else
8194 {
8197 {
8200 }
8202 }
8204 /* ld.so doesn't expect buggy TLS relocs.
8205 Don't leave the symbol value in the
8206 addend for them. */
8209 }
8212 }
8215 else
8217 }
8221 {
8227 }
8232 sreloc));
8237 /* This reloc will be computed at runtime. Clear the memory
8238 so that it contains a predictable value for prelink. */
8240 {
8244 }
8245 }
8251 {
8256 {
8260 }
8266 else
8270 }
8271 /* Fall through. */
8279 {
8286 {
8296 }
8297 else
8298 {
8301 }
8307 /* First insn is HA, second is LO. */
8320 {
8325 }
8327 /* Rewrite the reloc and convert one of the trailing nop
8328 relocs to describe this relocation. */
8330 /* The relocs are at the bottom 2 bytes */
8338 }
8339 else
8343 /* Indirect .sdata relocation. */
8347 {
8350 }
8351 relocation
8357 /* Indirect .sdata2 relocation. */
8361 {
8364 }
8365 relocation
8371 /* Handle the TOC16 reloc. We want to use the offset within the .got
8372 section, not the actual VMA. This is appropriate when generating
8373 an embedded ELF object, for which the .got section acts like the
8374 AIX .toc section. */
8377 {
8380 }
8389 {
8396 {
8397 /* We didn't make a PLT entry for this symbol. This
8398 happens when statically linking PIC code, or when
8399 using -Bsymbolic. */
8400 }
8401 else
8402 {
8403 /* Relocation is to the entry for this symbol in the
8404 procedure linkage table. */
8410 else
8414 }
8415 }
8417 /* R_PPC_PLTREL24 is rather special. If non-zero, the
8418 addend specifies the GOT pointer offset within .got2.
8419 Don't apply it to the relocation field. */
8434 {
8439 }
8442 {
8448 {
8454 {
8457 else
8459 }
8464 {
8471 else
8474 }
8475 }
8476 }
8480 /* Relocate against _SDA_BASE_. */
8482 {
8489 {
8492 }
8498 {
8499 _bfd_error_handler
8500 /* xgettext:c-format */
8503 input_bfd,
8504 sym_name,
8506 name);
8507 }
8508 }
8511 /* Relocate against _SDA2_BASE_. */
8513 {
8520 {
8523 }
8529 {
8530 _bfd_error_handler
8531 /* xgettext:c-format */
8534 input_bfd,
8535 sym_name,
8537 name);
8538 }
8539 }
8546 split16a_type,
8554 split16d_type,
8562 split16a_type,
8570 split16d_type,
8578 split16a_type,
8586 split16d_type,
8590 /* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
8596 {
8599 }
8600 else
8601 {
8608 {
8611 }
8616 {
8619 }
8622 {
8625 }
8628 {
8630 }
8631 else
8632 {
8633 _bfd_error_handler
8634 /* xgettext:c-format */
8637 input_bfd,
8638 sym_name,
8640 name);
8645 }
8648 {
8650 {
8653 }
8655 }
8660 /* The PowerPC Embedded Application Binary Interface
8661 version 1.0 insanely chose to specify R_PPC_EMB_SDA21
8662 operating on a 24-bit field at r_offset. GNU as and
8663 GNU ld have always assumed R_PPC_EMB_SDA21 operates on
8664 a 32-bit bit insn at r_offset. Cope with object file
8665 producers that possibly comply with the EABI in
8666 generating an odd r_offset for big-endian objects. */
8674 {
8678 /* Force e_li insn, keeping RT from original insn. */
8682 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
8683 /* Top 4 bits of value to 17..20. */
8685 /* Next 5 bits of the value to 11..15. */
8687 /* And the final 11 bits of the value to bits 21 to 31. */
8697 }
8698 /* Fill in register field. */
8701 }
8712 else
8713 {
8714 bfd_vma value;
8719 {
8722 }
8731 else
8732 {
8733 _bfd_error_handler
8734 /* xgettext:c-format */
8737 input_bfd,
8738 sym_name,
8740 name);
8745 }
8748 {
8751 }
8758 split16a_type,
8764 split16d_type,
8767 {
8772 split16a_type,
8774 }
8776 {
8781 split16d_type,
8783 }
8785 {
8790 split16a_type,
8792 }
8794 {
8799 split16d_type,
8801 }
8802 else
8804 }
8810 else
8811 {
8813 relocation);
8815 }
8818 /* Relocate against the beginning of the section. */
8824 {
8827 }
8831 /* Negative relocations. */
8853 /* xgettext:c-format */
8860 }
8863 {
8872 {
8875 }
8882 {
8888 }
8890 }
8893 {
8899 {
8901 {
8909 }
8910 }
8922 {
8924 {
8930 }
8931 }
8938 }
8940 /* Do any further special processing. */
8942 {
8954 /* It's just possible that this symbol is a weak symbol
8955 that's not actually defined anywhere. In that case,
8956 'sec' would be NULL, and we should leave the symbol
8957 alone (it will be set to zero elsewhere in the link). */
8960 /* Fall through. */
8968 /* Add 0x10000 if sign bit in 0:15 is set.
8969 Bits 0:15 are not used. */
8993 {
8994 /* The 32-bit ABI lacks proper relocations to deal with
8995 certain 64-bit instructions. Prevent damage to bits
8996 that make up part of the insn opcode. */
9006 else
9012 {
9015 /* xgettext:c-format */
9021 }
9022 }
9024 }
9026 #ifdef DEBUG
9031 sym_name,
9032 r_symndx,
9035 #endif
9042 {
9044 /* xgettext:c-format */
9048 sym_name);
9050 }
9052 /* 16-bit fields in insns mostly have signed values, but a
9053 few insns have 16-bit unsigned values. Really, we should
9054 have different reloc types. */
9059 {
9063 {
9073 }
9075 {
9079 }
9080 }
9083 {
9084 /* Split field reloc isn't handled by _bfd_final_link_relocate. */
9087 else
9088 {
9101 }
9102 }
9103 else
9107 report_reloc:
9109 {
9111 {
9112 /* On code like "if (foo) foo();" don't report overflow
9113 on a branch to zero when foo is undefined. */
9122 }
9123 else
9124 {
9126 /* xgettext:c-format */
9131 }
9132 }
9133 copy_reloc:
9136 }
9139 {
9146 {
9147 /* It is too late to remove an empty reloc section. Leave
9148 one NONE reloc.
9149 ??? What is wrong with an empty section??? */
9152 wrel++;
9153 }
9158 }
9160 #ifdef DEBUG
9162 #endif
9168 {
9169 /* Branch around the trampolines. */
9172 }
9179 {
9184 {
9193 {
9196 }
9197 }
9199 /* The idea is: Replace the last instruction on a page with a
9200 branch to a patch area. Put the insn there followed by a
9201 branch back to the next page. Complicated a little by
9202 needing to handle moved conditional branches, and by not
9203 wanting to touch data-in-text. */
9212 {
9219 /* Do we have a data reloc at this offset? If so, leave
9220 the word alone. */
9226 {
9232 else
9233 {
9235 {
9244 }
9246 }
9247 }
9251 /* Some instructions can be left alone too. Unconditional
9252 branches, except for bcctr with BO=0x14 (bctr, bctrl),
9253 avoid the icache failure.
9255 The problem occurs due to prefetch across a page boundary
9256 where stale instructions can be fetched from the next
9257 page, and the mechanism for flushing these bad
9258 instructions fails under certain circumstances. The
9259 unconditional branches:
9260 1) Branch: b, bl, ba, bla,
9261 2) Branch Conditional: bc, bca, bcl, bcla,
9262 3) Branch Conditional to Link Register: bclr, bclrl,
9263 where (2) and (3) have BO=0x14 making them unconditional,
9264 prevent the bad prefetch because the prefetch itself is
9265 affected by these instructions. This happens even if the
9266 instruction is not executed.
9268 A bctr example:
9269 .
9270 . lis 9,new_page@ha
9271 . addi 9,9,new_page@l
9272 . mtctr 9
9273 . bctr
9274 . nop
9275 . nop
9276 . new_page:
9277 .
9278 The bctr is not predicted taken due to ctr not being
9279 ready, so prefetch continues on past the bctr into the
9280 new page which might have stale instructions. If they
9281 fail to be flushed, then they will be executed after the
9282 bctr executes. Either of the following modifications
9283 prevent the bad prefetch from happening in the first
9284 place:
9285 .
9286 . lis 9,new_page@ha lis 9,new_page@ha
9287 . addi 9,9,new_page@l addi 9,9,new_page@l
9288 . mtctr 9 mtctr 9
9289 . bctr bctr
9290 . nop b somewhere_else
9291 . b somewhere_else nop
9292 . new_page: new_page:
9293 . */
9312 {
9315 /* If the insn we are patching had a reloc, adjust the
9316 reloc r_offset so that the reloc applies to the moved
9317 location. This matters for -r and --emit-relocs. */
9319 {
9322 /* Keep the relocs sorted by r_offset. */
9325 }
9328 /* Adjust REL16 addends too. */
9330 {
9339 }
9341 /* If we are building a PIE or shared library with
9342 non-PIC objects, perhaps we had a dynamic reloc too?
9343 If so, the dynamic reloc must move with the insn. */
9346 {
9348 bfd_vma soffset;
9355 {
9363 else
9364 {
9366 {
9370 }
9375 }
9376 }
9377 }
9378 }
9379 else
9384 {
9391 {
9399 else
9407 }
9409 {
9418 }
9419 else
9420 {
9422 {
9427 }
9440 }
9441 }
9442 else
9443 {
9450 }
9453 }
9454 }
9457 }
9458 \f
9459 /* Write out the PLT relocs and entries for H. */
9461 static bool
9463 {
9472 {
9476 {
9477 Elf_Internal_Rela rela;
9479 bfd_vma reloc_index;
9485 else
9486 {
9492 }
9494 /* This symbol has an entry in the procedure linkage table.
9495 Set it up. */
9497 {
9498 bfd_vma got_offset;
9501 /* The first three entries in .got.plt are reserved. */
9504 /* Use the right PLT. */
9508 /* Fill in the .plt on VxWorks. */
9510 {
9517 }
9518 else
9519 {
9528 }
9535 /* This instruction is an immediate load. The value loaded is
9536 the byte offset of the R_PPC_JMP_SLOT relocation from the
9537 start of the .rela.plt section. The value is stored in the
9538 low-order 16 bits of the load instruction. */
9539 /* NOTE: It appears that this is now an index rather than a
9540 prescaled offset. */
9544 /* This instruction is a PC-relative branch whose target is
9545 the start of the PLT section. The address of this branch
9546 instruction is 20 bytes beyond the start of this PLT entry.
9547 The address is encoded in bits 6-29, inclusive. The value
9548 stored is right-shifted by two bits, permitting a 26-bit
9549 offset. */
9559 /* Fill in the GOT entry corresponding to this PLT slot with
9560 the address immediately after the "bctr" instruction
9561 in this PLT entry. */
9568 {
9569 /* Fill in a couple of entries in .rela.plt.unloaded. */
9575 /* Provide the @ha relocation for the first instruction. */
9580 R_PPC_ADDR16_HA);
9586 /* Provide the @l relocation for the second instruction. */
9591 R_PPC_ADDR16_LO);
9597 /* Provide a relocation for the GOT entry corresponding to this
9598 PLT slot. Point it at the middle of the .plt entry. */
9603 R_PPC_ADDR32);
9607 }
9609 /* VxWorks uses non-standard semantics for R_PPC_JMP_SLOT.
9610 In particular, the offset for the relocation is not the
9611 address of the PLT entry for this function, as specified
9612 by the ABI. Instead, the offset is set to the address of
9613 the GOT slot for this function. See EABI 4.4.4.1. */
9618 }
9619 else
9620 {
9623 {
9625 {
9628 }
9629 else
9630 {
9633 }
9638 }
9641 {
9644 }
9645 else
9646 {
9652 {
9653 /* We don't need to fill in the .plt. The ppc dynamic
9654 linker will fill it in. */
9655 }
9656 else
9657 {
9663 }
9664 }
9665 }
9668 {
9669 /* Fill in the entry in the .rela.plt section. */
9671 {
9674 else
9679 }
9680 else
9681 {
9687 }
9690 }
9692 }
9695 {
9700 {
9703 else
9705 }
9711 /* We only need one non-PIC glink stub. */
9713 }
9714 else
9716 }
9718 }
9720 /* Finish up PLT handling. */
9722 bool
9724 {
9734 {
9738 bfd_size_type locsymcount;
9756 {
9758 {
9763 bfd_vma val;
9764 Elf_Internal_Rela rela;
9769 {
9773 }
9780 {
9785 }
9786 else
9787 {
9790 {
9793 }
9794 else
9795 {
9799 }
9800 }
9807 relplt));
9811 }
9812 }
9816 {
9819 else
9821 }
9822 }
9824 }
9826 /* Finish up dynamic symbol handling. We set the contents of various
9827 dynamic sections here. */
9829 static bool
9834 {
9838 #ifdef DEBUG
9841 #endif
9847 {
9849 {
9850 /* Mark the symbol as undefined, rather than as
9851 defined in the .plt section. Leave the value if
9852 there were any relocations where pointer equality
9853 matters (this is a clue for the dynamic linker, to
9854 make function pointer comparisons work between an
9855 application and shared library), otherwise set it
9856 to zero. */
9861 {
9862 /* This breaks function pointer comparisons, but
9863 that is better than breaking tests for a NULL
9864 function pointer. */
9866 }
9867 }
9868 else
9869 {
9870 /* Set the value of ifunc symbols in a non-pie
9871 executable to the glink entry. This is to avoid
9872 text relocations. We can't do this for ifunc in
9873 allocate_dynrelocs, as we do for normal dynamic
9874 function symbols with plt entries, because we need
9875 to keep the original value around for the ifunc
9876 relocation. */
9877 sym->st_shndx
9878 = (_bfd_elf_section_from_bfd_section
9883 }
9885 }
9888 {
9890 Elf_Internal_Rela rela;
9892 /* This symbols needs a copy reloc. Set it up. */
9894 #ifdef DEBUG
9896 #endif
9904 else
9912 }
9914 #ifdef DEBUG
9916 #endif
9919 }
9920 \f
9921 static enum elf_reloc_type_class
9925 {
9932 {
9941 }
9942 }
9943 \f
9944 /* Finish up the dynamic sections. */
9946 static bool
9949 {
9952 bfd_vma got;
9956 #ifdef DEBUG
9958 #endif
9969 {
9977 {
9978 Elf_Internal_Dyn dyn;
9984 {
9988 else
10022 }
10025 }
10026 }
10030 {
10033 {
10038 {
10039 /* Add a blrl instruction at _GLOBAL_OFFSET_TABLE_-4
10040 so that a function can easily find the address of
10041 _GLOBAL_OFFSET_TABLE_. */
10045 }
10048 {
10053 }
10054 }
10055 else
10056 {
10057 /* xgettext:c-format */
10064 }
10067 }
10069 /* Fill in the first entry in the VxWorks procedure linkage table. */
10074 {
10076 /* Use the right PLT. */
10078 ? ppc_elf_vxworks_pic_plt0_entry
10082 {
10089 }
10090 else
10091 {
10094 }
10103 {
10104 Elf_Internal_Rela rela;
10109 /* Output the @ha relocation for the first instruction. */
10118 /* Output the @l relocation for the second instruction. */
10127 /* Fix up the remaining relocations. They may have the wrong
10128 symbol index for _G_O_T_ or _P_L_T_ depending on the order
10129 in which symbols were output. */
10131 {
10132 Elf_Internal_Rela rel;
10148 }
10149 }
10150 }
10155 {
10158 bfd_vma res0;
10160 /*
10161 * PIC glink code is the following:
10162 *
10163 * # ith PLT code stub.
10164 * addis 11,30,(plt+(i-1)*4-got)@ha
10165 * lwz 11,(plt+(i-1)*4-got)@l(11)
10166 * mtctr 11
10167 * bctr
10168 *
10169 * # A table of branches, one for each plt entry.
10170 * # The idea is that the plt call stub loads ctr and r11 with these
10171 * # addresses, so (r11 - res_0) gives the plt index * 4.
10172 * res_0: b PLTresolve
10173 * res_1: b PLTresolve
10174 * .
10175 * # Some number of entries towards the end can be nops
10176 * res_n_m3: nop
10177 * res_n_m2: nop
10178 * res_n_m1:
10179 *
10180 * PLTresolve:
10181 * addis 11,11,(1f-res_0)@ha
10182 * mflr 0
10183 * bcl 20,31,1f
10184 * 1: addi 11,11,(1b-res_0)@l
10185 * mflr 12
10186 * mtlr 0
10187 * sub 11,11,12 # r11 = index * 4
10188 * addis 12,12,(got+4-1b)@ha
10189 * lwz 0,(got+4-1b)@l(12) # got[1] address of dl_runtime_resolve
10190 * lwz 12,(got+8-1b)@l(12) # got[2] contains the map address
10191 * mtctr 0
10192 * add 0,11,11
10193 * add 11,0,11 # r11 = index * 12 = reloc offset.
10194 * bctr
10195 *
10196 * Non-PIC glink code is a little simpler.
10197 *
10198 * # ith PLT code stub.
10199 * lis 11,(plt+(i-1)*4)@ha
10200 * lwz 11,(plt+(i-1)*4)@l(11)
10201 * mtctr 11
10202 * bctr
10203 *
10204 * The branch table is the same, then comes
10205 *
10206 * PLTresolve:
10207 * lis 12,(got+4)@ha
10208 * addis 11,11,(-res_0)@ha
10209 * lwz 0,(got+4)@l(12) # got[1] address of dl_runtime_resolve
10210 * addi 11,11,(-res_0)@l # r11 = index * 4
10211 * mtctr 0
10212 * add 0,11,11
10213 * lwz 12,(got+8)@l(12) # got[2] contains the map address
10214 * add 11,0,11 # r11 = index * 12 = reloc offset.
10215 * bctr
10216 */
10218 /* Build the branch table, one for each plt entry (less one),
10219 and perhaps some padding. */
10225 {
10228 }
10230 {
10233 }
10240 {
10241 /* Ensure that a call stub at the end of a page doesn't
10242 result in prefetch over the end of the page into the
10243 glink branch table. */
10245 bfd_vma page_addr;
10252 {
10253 /* We have a plt call stub that may need fixing. */
10260 {
10261 /* By alignment, we know that there must be at least
10262 one other call stub before this one. */
10266 else
10268 }
10269 }
10270 }
10272 /* Last comes the PLTresolve stub. */
10275 {
10276 bfd_vma bcl;
10299 {
10304 }
10305 else
10306 {
10311 }
10315 }
10316 else
10317 {
10324 else
10335 else
10337 }
10344 {
10348 }
10350 }
10354 {
10356 bfd_vma val;
10359 /* FDE length. */
10361 /* CIE pointer. */
10363 /* Offset to .glink. */
10376 }
10379 }
10380 \f
10381 #define TARGET_LITTLE_SYM powerpc_elf32_le_vec
10383 #define TARGET_BIG_SYM powerpc_elf32_vec
10385 #define ELF_ARCH bfd_arch_powerpc
10386 #define ELF_TARGET_ID PPC32_ELF_DATA
10387 #define ELF_MACHINE_CODE EM_PPC
10388 #define ELF_MAXPAGESIZE 0x10000
10389 #define ELF_COMMONPAGESIZE 0x1000
10390 #define elf_info_to_howto ppc_elf_info_to_howto
10392 #ifdef EM_CYGNUS_POWERPC
10393 #define ELF_MACHINE_ALT1 EM_CYGNUS_POWERPC
10394 #endif
10396 #ifdef EM_PPC_OLD
10397 #define ELF_MACHINE_ALT2 EM_PPC_OLD
10398 #endif
10400 #define elf_backend_plt_not_loaded 1
10401 #define elf_backend_want_dynrelro 1
10402 #define elf_backend_can_gc_sections 1
10403 #define elf_backend_can_refcount 1
10404 #define elf_backend_rela_normal 1
10405 #define elf_backend_caches_rawsize 1
10407 #define bfd_elf32_mkobject ppc_elf_mkobject
10408 #define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
10409 #define bfd_elf32_bfd_relax_section ppc_elf_relax_section
10410 #define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
10411 #define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
10412 #define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
10413 #define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
10414 #define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
10416 #define elf_backend_object_p ppc_elf_object_p
10417 #define elf_backend_gc_mark_hook ppc_elf_gc_mark_hook
10418 #define elf_backend_section_from_shdr ppc_elf_section_from_shdr
10419 #define elf_backend_relocate_section ppc_elf_relocate_section
10420 #define elf_backend_create_dynamic_sections ppc_elf_create_dynamic_sections
10421 #define elf_backend_check_relocs ppc_elf_check_relocs
10422 #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible
10423 #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol
10424 #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol
10425 #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook
10426 #define elf_backend_late_size_sections ppc_elf_late_size_sections
10427 #define elf_backend_hash_symbol ppc_elf_hash_symbol
10428 #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol
10429 #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
10430 #define elf_backend_fake_sections ppc_elf_fake_sections
10431 #define elf_backend_additional_program_headers ppc_elf_additional_program_headers
10432 #define elf_backend_modify_segment_map ppc_elf_modify_segment_map
10433 #define elf_backend_grok_prstatus ppc_elf_grok_prstatus
10434 #define elf_backend_grok_psinfo ppc_elf_grok_psinfo
10435 #define elf_backend_write_core_note ppc_elf_write_core_note
10436 #define elf_backend_reloc_type_class ppc_elf_reloc_type_class
10437 #define elf_backend_begin_write_processing ppc_elf_begin_write_processing
10438 #define elf_backend_final_write_processing ppc_elf_final_write_processing
10439 #define elf_backend_write_section ppc_elf_write_section
10440 #define elf_backend_get_sec_type_attr ppc_elf_get_sec_type_attr
10441 #define elf_backend_plt_sym_val ppc_elf_plt_sym_val
10442 #define elf_backend_action_discarded ppc_elf_action_discarded
10443 #define elf_backend_init_index_section _bfd_elf_init_1_index_section
10444 #define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
10448 /* FreeBSD Target */
10450 #undef TARGET_LITTLE_SYM
10451 #undef TARGET_LITTLE_NAME
10453 #undef TARGET_BIG_SYM
10454 #define TARGET_BIG_SYM powerpc_elf32_fbsd_vec
10455 #undef TARGET_BIG_NAME
10458 #undef ELF_OSABI
10459 #define ELF_OSABI ELFOSABI_FREEBSD
10461 #undef elf32_bed
10462 #define elf32_bed elf32_powerpc_fbsd_bed
10466 /* VxWorks Target */
10468 #undef TARGET_LITTLE_SYM
10469 #undef TARGET_LITTLE_NAME
10471 #undef TARGET_BIG_SYM
10472 #define TARGET_BIG_SYM powerpc_elf32_vxworks_vec
10473 #undef TARGET_BIG_NAME
10476 #undef ELF_OSABI
10478 #undef ELF_TARGET_OS
10479 #define ELF_TARGET_OS is_vxworks
10481 /* VxWorks uses the elf default section flags for .plt. */
10484 {
10492 }
10494 /* Like ppc_elf_link_hash_table_create, but overrides
10495 appropriately for VxWorks. */
10498 {
10503 {
10510 }
10512 }
10514 /* Tweak magic VxWorks symbols as they are loaded. */
10515 static bool
10523 {
10525 valp))
10529 }
10531 static bool
10533 {
10536 }
10538 /* On VxWorks, we emit relocations against _PROCEDURE_LINKAGE_TABLE_, so
10539 define it. */
10540 #undef elf_backend_want_plt_sym
10541 #define elf_backend_want_plt_sym 1
10542 #undef elf_backend_want_got_plt
10543 #define elf_backend_want_got_plt 1
10544 #undef elf_backend_got_symbol_offset
10545 #define elf_backend_got_symbol_offset 0
10546 #undef elf_backend_plt_not_loaded
10547 #define elf_backend_plt_not_loaded 0
10548 #undef elf_backend_plt_readonly
10549 #define elf_backend_plt_readonly 1
10550 #undef elf_backend_got_header_size
10551 #define elf_backend_got_header_size 12
10552 #undef elf_backend_dtrel_excludes_plt
10553 #define elf_backend_dtrel_excludes_plt 1
10555 #undef bfd_elf32_get_synthetic_symtab
10557 #undef bfd_elf32_bfd_link_hash_table_create
10558 #define bfd_elf32_bfd_link_hash_table_create \
10559 ppc_elf_vxworks_link_hash_table_create
10560 #undef elf_backend_add_symbol_hook
10561 #define elf_backend_add_symbol_hook \
10562 ppc_elf_vxworks_add_symbol_hook
10563 #undef elf_backend_link_output_symbol_hook
10564 #define elf_backend_link_output_symbol_hook \
10565 elf_vxworks_link_output_symbol_hook
10566 #undef elf_backend_final_write_processing
10567 #define elf_backend_final_write_processing \
10568 ppc_elf_vxworks_final_write_processing
10569 #undef elf_backend_get_sec_type_attr
10570 #define elf_backend_get_sec_type_attr \
10571 ppc_elf_vxworks_get_sec_type_attr
10572 #undef elf_backend_emit_relocs
10573 #define elf_backend_emit_relocs \
10574 elf_vxworks_emit_relocs
10576 #undef elf32_bed
10577 #define elf32_bed ppc_elf_vxworks_bed