1 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
3 Copyright (C) 2006-2024 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dwarf2dbg.h"
27 const struct spu_opcode spu_opcodes
[] = {
28 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \
29 { MACFORMAT, (OPCODE ## u) << (32-11), MNEMONIC, ASMFORMAT },
30 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \
31 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
32 #include "opcode/spu-insns.h"
37 static const int spu_num_opcodes
=
38 sizeof (spu_opcodes
) / sizeof (spu_opcodes
[0]);
45 expressionS exp
[MAX_RELOCS
];
46 int reloc_arg
[MAX_RELOCS
];
47 bfd_reloc_code_real_type reloc
[MAX_RELOCS
];
51 static const char *get_imm (const char *param
, struct spu_insn
*insn
, int arg
);
52 static const char *get_reg (const char *param
, struct spu_insn
*insn
, int arg
,
54 static int calcop (struct spu_opcode
*format
, const char *param
,
55 struct spu_insn
*insn
);
56 static void spu_brinfo (int);
57 static void spu_cons (int);
60 static htab_t op_hash
= NULL
;
62 /* These bits should be turned off in the first address of every segment */
65 /* These chars start a comment anywhere in a source file (except inside
67 const char comment_chars
[] = "#";
69 /* These chars only start a comment at the beginning of a line. */
70 const char line_comment_chars
[] = "#";
72 /* gods own line continuation char */
73 const char line_separator_chars
[] = ";";
75 /* Chars that can be used to separate mant from exp in floating point nums */
76 const char EXP_CHARS
[] = "eE";
78 /* Chars that mean this number is a floating point constant */
80 /* or 0H1.234E-12 (see exp chars above) */
81 const char FLT_CHARS
[] = "dDfF";
83 const pseudo_typeS md_pseudo_table
[] =
85 {"align", s_align_ptwo
, 4},
86 {"brinfo", spu_brinfo
, 0},
87 {"bss", s_lcomm_bytes
, 1},
89 {"dfloat", float_cons
, 'd'},
90 {"ffloat", float_cons
, 'f'},
91 {"global", s_globl
, 0},
94 {"long", spu_cons
, 4},
95 {"quad", spu_cons
, 8},
96 {"string", stringer
, 8 + 1},
97 {"word", spu_cons
, 4},
98 /* Force set to be treated as an instruction. */
101 /* Likewise for eqv. */
107 /* Bits plugged into branch instruction offset field. */
115 op_hash
= str_htab_create ();
117 /* Hash each mnemonic and record its position. There are
118 duplicates, keep just the first. */
119 for (i
= 0; i
< spu_num_opcodes
; i
++)
120 str_hash_insert (op_hash
, spu_opcodes
[i
].mnemonic
, &spu_opcodes
[i
], 0);
123 const char md_shortopts
[] = "";
124 const struct option md_longopts
[] = {
125 #define OPTION_APUASM (OPTION_MD_BASE)
126 {"apuasm", no_argument
, NULL
, OPTION_APUASM
},
127 #define OPTION_DD2 (OPTION_MD_BASE+1)
128 {"mdd2.0", no_argument
, NULL
, OPTION_DD2
},
129 #define OPTION_DD1 (OPTION_MD_BASE+2)
130 {"mdd1.0", no_argument
, NULL
, OPTION_DD1
},
131 #define OPTION_DD3 (OPTION_MD_BASE+3)
132 {"mdd3.0", no_argument
, NULL
, OPTION_DD3
},
133 { NULL
, no_argument
, NULL
, 0 }
135 const size_t md_longopts_size
= sizeof (md_longopts
);
137 /* When set (by -apuasm) our assembler emulates the behaviour of apuasm.
138 * e.g. don't add bias to float conversion and don't right shift
139 * immediate values. */
140 static int emulate_apuasm
;
142 /* Use the dd2.0 instructions set. The only differences are some new
143 * register names and the orx insn */
144 static int use_dd2
= 1;
147 md_parse_option (int c
, const char *arg ATTRIBUTE_UNUSED
)
170 md_show_usage (FILE *stream
)
174 --apuasm emulate behaviour of apuasm\n"),
185 bfd_reloc_code_real_type reloc
;
188 static struct arg_encode arg_encode
[A_MAX
] = {
189 { 7, 0, 0, 0, 127, 0, -1, 0 }, /* A_T */
190 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_A */
191 { 7, 14, 0, 0, 127, 0, -1, 0 }, /* A_B */
192 { 7, 21, 0, 0, 127, 0, -1, 0 }, /* A_C */
193 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_S */
194 { 7, 7, 0, 0, 127, 0, -1, 0 }, /* A_H */
195 { 0, 0, 0, 0, -1, 0, -1, 0 }, /* A_P */
196 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_S3 */
197 { 7, 14, 0, -32, 31, -31, 0, BFD_RELOC_SPU_IMM7
}, /* A_S6 */
198 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_S7N */
199 { 7, 14, 0, -64, 63, -63, 0, BFD_RELOC_SPU_IMM7
}, /* A_S7 */
200 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8
}, /* A_U7A */
201 { 8, 14, 0, 0, 127, 0, -1, BFD_RELOC_SPU_IMM8
}, /* A_U7B */
202 { 10, 14, 0, -512, 511, -128, 255, BFD_RELOC_SPU_IMM10
}, /* A_S10B */
203 { 10, 14, 0, -512, 511, 0, -1, BFD_RELOC_SPU_IMM10
}, /* A_S10 */
204 { 2, 23, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9a
}, /* A_S11 */
205 { 2, 14, 9, -1024, 1023, 0, -1, BFD_RELOC_SPU_PCREL9b
}, /* A_S11I */
206 { 10, 14, 4, -8192, 8191, 0, -1, BFD_RELOC_SPU_IMM10W
}, /* A_S14 */
207 { 16, 7, 0, -32768, 32767, 0, -1, BFD_RELOC_SPU_IMM16
}, /* A_S16 */
208 { 16, 7, 2, -131072, 262143, 0, -1, BFD_RELOC_SPU_IMM16W
}, /* A_S18 */
209 { 16, 7, 2, -262144, 262143, 0, -1, BFD_RELOC_SPU_PCREL16
}, /* A_R18 */
210 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_U3 */
211 { 7, 14, 0, 0, 127, 0, 31, BFD_RELOC_SPU_IMM7
}, /* A_U5 */
212 { 7, 14, 0, 0, 127, 0, 63, BFD_RELOC_SPU_IMM7
}, /* A_U6 */
213 { 7, 14, 0, 0, -1, 0, -1, BFD_RELOC_SPU_IMM7
}, /* A_U7 */
214 { 14, 0, 0, 0, 16383, 0, -1, 0 }, /* A_U14 */
215 { 16, 7, 0, -32768, 65535, 0, -1, BFD_RELOC_SPU_IMM16
}, /* A_X16 */
216 { 18, 7, 0, 0, 262143, 0, -1, BFD_RELOC_SPU_IMM18
}, /* A_U18 */
219 /* Some flags for handling errors. This is very hackish and added after
221 static int syntax_error_arg
;
222 static const char *syntax_error_param
;
223 static int syntax_reg
;
226 insn_fmt_string (struct spu_opcode
*format
)
232 len
+= sprintf (&buf
[len
], "%s\t", format
->mnemonic
);
233 for (i
= 1; i
<= format
->arg
[0]; i
++)
235 int arg
= format
->arg
[i
];
237 if (i
> 1 && arg
!= A_P
&& format
->arg
[i
-1] != A_P
)
242 exp
= i
== syntax_error_arg
? "REG" : "reg";
244 exp
= i
== syntax_error_arg
? "IMM" : "imm";
245 len
+= sprintf (&buf
[len
], "%s", exp
);
246 if (i
> 1 && format
->arg
[i
-1] == A_P
)
254 md_assemble (char *op
)
256 char *param
, *thisfrag
;
258 struct spu_opcode
*format
;
259 struct spu_insn insn
;
264 /* skip over instruction to find parameters */
266 for (param
= op
; *param
!= 0 && !ISSPACE (*param
); param
++)
271 if (c
!= 0 && c
!= '\n')
274 /* try to find the instruction in the hash table */
276 if ((format
= (struct spu_opcode
*) str_hash_find (op_hash
, op
)) == NULL
)
278 as_bad (_("Invalid mnemonic '%s'"), op
);
282 if (!use_dd2
&& strcmp (format
->mnemonic
, "orx") == 0)
284 as_bad (_("'%s' is only available in DD2.0 or higher."), op
);
290 /* try parsing this instruction into insn */
291 for (i
= 0; i
< MAX_RELOCS
; i
++)
293 insn
.exp
[i
].X_add_symbol
= 0;
294 insn
.exp
[i
].X_op_symbol
= 0;
295 insn
.exp
[i
].X_add_number
= 0;
296 insn
.exp
[i
].X_op
= O_illegal
;
297 insn
.reloc_arg
[i
] = -1;
298 insn
.reloc
[i
] = BFD_RELOC_NONE
;
300 insn
.opcode
= format
->opcode
;
301 insn
.tag
= (enum spu_insns
) (format
- spu_opcodes
);
303 syntax_error_arg
= 0;
304 syntax_error_param
= 0;
306 if (calcop (format
, param
, &insn
))
309 /* if it doesn't parse try the next instruction */
310 if (!strcmp (format
[0].mnemonic
, format
[1].mnemonic
))
314 int parg
= format
[0].arg
[syntax_error_arg
-1];
316 as_fatal (_("Error in argument %d. Expecting: \"%s\""),
317 syntax_error_arg
- (parg
== A_P
),
318 insn_fmt_string (format
));
324 && ! (insn
.tag
== M_RDCH
325 || insn
.tag
== M_RCHCNT
326 || insn
.tag
== M_WRCH
))
327 as_warn (_("Mixing register syntax, with and without '$'."));
328 if (syntax_error_param
)
330 const char *d
= syntax_error_param
;
333 as_warn (_("Treating '%-*s' as a symbol."), (int)(syntax_error_param
- d
), d
);
337 && (insn
.tag
<= M_BRASL
338 || (insn
.tag
>= M_BRZ
&& insn
.tag
<= M_BRHNZ
))
339 && (insn
.opcode
& 0x7ff80) == 0
340 && (insn
.reloc_arg
[0] == A_R18
341 || insn
.reloc_arg
[0] == A_S18
342 || insn
.reloc_arg
[1] == A_R18
343 || insn
.reloc_arg
[1] == A_S18
))
344 insn
.opcode
|= brinfo
<< 7;
346 /* grow the current frag and plop in the opcode */
348 thisfrag
= frag_more (4);
349 md_number_to_chars (thisfrag
, insn
.opcode
, 4);
351 /* if this instruction requires labels mark it for later */
353 for (i
= 0; i
< MAX_RELOCS
; i
++)
354 if (insn
.reloc_arg
[i
] >= 0)
357 bfd_reloc_code_real_type reloc
= insn
.reloc
[i
];
360 if (reloc
== BFD_RELOC_SPU_PCREL9a
361 || reloc
== BFD_RELOC_SPU_PCREL9b
362 || reloc
== BFD_RELOC_SPU_PCREL16
)
364 fixP
= fix_new_exp (frag_now
,
365 thisfrag
- frag_now
->fr_literal
,
370 fixP
->tc_fix_data
.arg_format
= insn
.reloc_arg
[i
];
371 fixP
->tc_fix_data
.insn_tag
= insn
.tag
;
373 dwarf2_emit_insn (4);
375 /* .brinfo lasts exactly one instruction. */
380 calcop (struct spu_opcode
*format
, const char *param
, struct spu_insn
*insn
)
386 for (i
= 1; i
<= format
->arg
[0]; i
++)
388 arg
= format
->arg
[i
];
389 syntax_error_arg
= i
;
391 while (ISSPACE (*param
))
393 if (*param
== 0 || *param
== ',')
396 param
= get_reg (param
, insn
, arg
, 1);
398 param
= get_imm (param
, insn
, arg
);
409 while (ISSPACE (*param
))
412 if (arg
!= A_P
&& paren
)
418 else if (i
< format
->arg
[0]
419 && format
->arg
[i
] != A_P
420 && format
->arg
[i
+1] != A_P
)
429 while (ISSPACE (*param
))
431 return !paren
&& (*param
== 0 || *param
== '\n');
440 #define REG_NAME(NO,NM) { NO, sizeof (NM) - 1, NM }
442 static struct reg_name reg_name
[] = {
443 REG_NAME (0, "lr"), /* link register */
444 REG_NAME (1, "sp"), /* stack pointer */
445 REG_NAME (0, "rp"), /* link register */
446 REG_NAME (127, "fp"), /* frame pointer */
449 static struct reg_name sp_reg_name
[] = {
452 static struct reg_name ch_reg_name
[] = {
453 REG_NAME ( 0, "SPU_RdEventStat"),
454 REG_NAME ( 1, "SPU_WrEventMask"),
455 REG_NAME ( 2, "SPU_WrEventAck"),
456 REG_NAME ( 3, "SPU_RdSigNotify1"),
457 REG_NAME ( 4, "SPU_RdSigNotify2"),
458 REG_NAME ( 7, "SPU_WrDec"),
459 REG_NAME ( 8, "SPU_RdDec"),
460 REG_NAME ( 11, "SPU_RdEventMask"), /* DD2.0 only */
461 REG_NAME ( 13, "SPU_RdMachStat"),
462 REG_NAME ( 14, "SPU_WrSRR0"),
463 REG_NAME ( 15, "SPU_RdSRR0"),
464 REG_NAME ( 28, "SPU_WrOutMbox"),
465 REG_NAME ( 29, "SPU_RdInMbox"),
466 REG_NAME ( 30, "SPU_WrOutIntrMbox"),
467 REG_NAME ( 9, "MFC_WrMSSyncReq"),
468 REG_NAME ( 12, "MFC_RdTagMask"), /* DD2.0 only */
469 REG_NAME ( 16, "MFC_LSA"),
470 REG_NAME ( 17, "MFC_EAH"),
471 REG_NAME ( 18, "MFC_EAL"),
472 REG_NAME ( 19, "MFC_Size"),
473 REG_NAME ( 20, "MFC_TagID"),
474 REG_NAME ( 21, "MFC_Cmd"),
475 REG_NAME ( 22, "MFC_WrTagMask"),
476 REG_NAME ( 23, "MFC_WrTagUpdate"),
477 REG_NAME ( 24, "MFC_RdTagStat"),
478 REG_NAME ( 25, "MFC_RdListStallStat"),
479 REG_NAME ( 26, "MFC_WrListStallAck"),
480 REG_NAME ( 27, "MFC_RdAtomicStat"),
485 get_reg (const char *param
, struct spu_insn
*insn
, int arg
, int accept_expr
)
496 if (arg
== A_H
) /* Channel */
498 if ((param
[0] == 'c' || param
[0] == 'C')
499 && (param
[1] == 'h' || param
[1] == 'H')
500 && ISDIGIT (param
[2]))
503 else if (arg
== A_S
) /* Special purpose register */
505 if ((param
[0] == 's' || param
[0] == 'S')
506 && (param
[1] == 'p' || param
[1] == 'P')
507 && ISDIGIT (param
[2]))
511 if (ISDIGIT (*param
))
514 while (ISDIGIT (*param
))
515 regno
= regno
* 10 + *param
++ - '0';
520 unsigned int i
, n
, l
= 0;
522 if (arg
== A_H
) /* Channel */
525 n
= sizeof (ch_reg_name
) / sizeof (*ch_reg_name
);
527 else if (arg
== A_S
) /* Special purpose register */
530 n
= sizeof (sp_reg_name
) / sizeof (*sp_reg_name
);
535 n
= sizeof (reg_name
) / sizeof (*reg_name
);
538 for (i
= 0; i
< n
; i
++)
540 && 0 == strncasecmp (param
, rn
[i
].name
, rn
[i
].length
))
552 as_bad (_("'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher."));
553 else if (regno
== 12)
554 as_bad (_("'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher."));
559 insn
->opcode
|= regno
<< arg_encode
[arg
].pos
;
560 if ((!saw_prefix
&& syntax_reg
== 1)
561 || (saw_prefix
&& syntax_reg
== 2))
563 syntax_reg
|= saw_prefix
? 1 : 2;
571 save_ptr
= input_line_pointer
;
572 input_line_pointer
= (char *)param
;
574 param
= input_line_pointer
;
575 input_line_pointer
= save_ptr
;
576 resolve_register (&ex
);
577 if (ex
.X_op
== O_register
|| ex
.X_op
== O_constant
)
579 insn
->opcode
|= ex
.X_add_number
<< arg_encode
[arg
].pos
;
587 get_imm (const char *param
, struct spu_insn
*insn
, int arg
)
591 int low
= 0, high
= 0;
592 int reloc_i
= insn
->reloc_arg
[0] >= 0 ? 1 : 0;
594 if (strncasecmp (param
, "%lo(", 4) == 0)
598 as_warn (_("Using old style, %%lo(expr), please change to PPC style, expr@l."));
600 else if (strncasecmp (param
, "%hi(", 4) == 0)
604 as_warn (_("Using old style, %%hi(expr), please change to PPC style, expr@h."));
606 else if (strncasecmp (param
, "%pic(", 5) == 0)
608 /* Currently we expect %pic(expr) == expr, so do nothing here.
609 i.e. for code loaded at address 0 $toc will be 0. */
615 /* Symbols can start with $, but if this symbol matches a register
616 name, it's probably a mistake. The only way to avoid this
617 warning is to rename the symbol. */
618 struct spu_insn tmp_insn
;
619 const char *np
= get_reg (param
, &tmp_insn
, arg
, 0);
622 syntax_error_param
= np
;
625 save_ptr
= input_line_pointer
;
626 input_line_pointer
= (char *) param
;
627 expression (&insn
->exp
[reloc_i
]);
628 param
= input_line_pointer
;
629 input_line_pointer
= save_ptr
;
631 /* Similar to ppc_elf_suffix in tc-ppc.c. We have so few cases to
632 handle we do it inlined here. */
633 if (param
[0] == '@' && !ISALNUM (param
[2]) && param
[2] != '@')
635 if (param
[1] == 'h' || param
[1] == 'H')
640 else if (param
[1] == 'l' || param
[1] == 'L')
647 if (insn
->exp
[reloc_i
].X_op
== O_constant
)
649 val
= insn
->exp
[reloc_i
].X_add_number
;
653 /* Convert the value to a format we expect. */
654 val
<<= arg_encode
[arg
].rshift
;
657 else if (arg
== A_U7B
)
666 /* Warn about out of range expressions. */
668 int hi
= arg_encode
[arg
].hi
;
669 int lo
= arg_encode
[arg
].lo
;
670 int whi
= arg_encode
[arg
].whi
;
671 int wlo
= arg_encode
[arg
].wlo
;
673 if (hi
> lo
&& (val
< lo
|| val
> hi
))
674 as_fatal (_("Constant expression %d out of range, [%d, %d]."),
676 else if (whi
> wlo
&& (val
< wlo
|| val
> whi
))
677 as_warn (_("Constant expression %d out of range, [%d, %d]."),
683 else if (arg
== A_U7B
)
686 /* Branch hints have a split encoding. Do the bottom part. */
687 if (arg
== A_S11
|| arg
== A_S11I
)
688 insn
->opcode
|= ((val
>> 2) & 0x7f);
690 insn
->opcode
|= (((val
>> arg_encode
[arg
].rshift
)
691 & ((1 << arg_encode
[arg
].size
) - 1))
692 << arg_encode
[arg
].pos
);
696 insn
->reloc_arg
[reloc_i
] = arg
;
698 insn
->reloc
[reloc_i
] = BFD_RELOC_SPU_HI16
;
700 insn
->reloc
[reloc_i
] = BFD_RELOC_SPU_LO16
;
702 insn
->reloc
[reloc_i
] = arg_encode
[arg
].reloc
;
709 md_atof (int type
, char *litP
, int *sizeP
)
711 return ieee_md_atof (type
, litP
, sizeP
, true);
714 #ifndef WORKING_DOT_WORD
715 int md_short_jump_size
= 4;
718 md_create_short_jump (char *ptr
,
719 addressT from_addr ATTRIBUTE_UNUSED
,
720 addressT to_addr ATTRIBUTE_UNUSED
,
724 ptr
[0] = (char) 0xc0;
729 ptr
- frag
->fr_literal
,
734 BFD_RELOC_SPU_PCREL16
);
737 int md_long_jump_size
= 4;
740 md_create_long_jump (char *ptr
,
741 addressT from_addr ATTRIBUTE_UNUSED
,
742 addressT to_addr ATTRIBUTE_UNUSED
,
746 ptr
[0] = (char) 0xc0;
751 ptr
- frag
->fr_literal
,
756 BFD_RELOC_SPU_PCREL16
);
760 /* Handle .brinfo <priority>,<lrlive>. */
762 spu_brinfo (int ignore ATTRIBUTE_UNUSED
)
767 priority
= get_absolute_expression ();
771 if (*input_line_pointer
== ',')
773 ++input_line_pointer
;
774 lrlive
= get_absolute_expression ();
777 if (priority
> 0x1fff)
779 as_bad (_("invalid priority '%lu'"), (unsigned long) priority
);
785 as_bad (_("invalid lrlive '%lu'"), (unsigned long) lrlive
);
789 brinfo
= (lrlive
<< 13) | priority
;
790 demand_empty_rest_of_line ();
793 /* Support @ppu on symbols referenced in .int/.long/.word/.quad. */
795 spu_cons (int nbytes
)
799 if (is_it_end_of_statement ())
801 demand_empty_rest_of_line ();
807 char *save
= input_line_pointer
;
809 /* Use deferred_expression here so that an expression involving
810 a symbol that happens to be defined already as an spu symbol,
812 deferred_expression (&exp
);
813 if ((exp
.X_op
== O_symbol
814 || exp
.X_op
== O_constant
)
815 && strncasecmp (input_line_pointer
, "@ppu", 4) == 0)
817 char *p
= frag_more (nbytes
);
818 enum bfd_reloc_code_real reloc
;
820 /* Check for identifier@suffix+constant. */
821 input_line_pointer
+= 4;
822 if (*input_line_pointer
== '-' || *input_line_pointer
== '+')
826 save
= input_line_pointer
;
827 expression (&new_exp
);
828 if (new_exp
.X_op
== O_constant
)
829 exp
.X_add_number
+= new_exp
.X_add_number
;
831 input_line_pointer
= save
;
834 reloc
= nbytes
== 4 ? BFD_RELOC_SPU_PPU32
: BFD_RELOC_SPU_PPU64
;
835 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, nbytes
,
840 /* Don't use deferred_expression for anything else.
841 deferred_expression won't evaulate dot at the point it is
843 input_line_pointer
= save
;
845 emit_expr (&exp
, nbytes
);
848 while (*input_line_pointer
++ == ',');
850 /* Put terminator back into stream. */
851 input_line_pointer
--;
852 demand_empty_rest_of_line ();
856 md_estimate_size_before_relax (fragS
*fragP ATTRIBUTE_UNUSED
,
857 segT segment_type ATTRIBUTE_UNUSED
)
859 as_fatal (_("Relaxation should never occur"));
863 /* If while processing a fixup, a reloc really needs to be created,
864 then it is done here. */
867 tc_gen_reloc (asection
*seg ATTRIBUTE_UNUSED
, fixS
*fixp
)
870 reloc
= XNEW (arelent
);
871 reloc
->sym_ptr_ptr
= XNEW (asymbol
*);
872 *reloc
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
873 reloc
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
874 reloc
->howto
= bfd_reloc_type_lookup (stdoutput
, fixp
->fx_r_type
);
875 if (reloc
->howto
== (reloc_howto_type
*) NULL
)
877 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
878 _("reloc %d not supported by object file format"),
879 (int) fixp
->fx_r_type
);
880 free (reloc
->sym_ptr_ptr
);
884 reloc
->addend
= fixp
->fx_addnumber
;
888 /* Round up a section's size to the appropriate boundary. */
891 md_section_align (segT seg
, valueT size
)
893 int align
= bfd_section_alignment (seg
);
894 valueT mask
= ((valueT
) 1 << align
) - 1;
896 return (size
+ mask
) & ~mask
;
899 /* Where a PC relative offset is calculated from. On the spu they
900 are calculated from the beginning of the branch instruction. */
903 md_pcrel_from (fixS
*fixp
)
905 return fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
908 /* Fill in rs_align_code fragments. */
911 spu_handle_align (fragS
*fragp
)
913 static const unsigned char nop_pattern
[8] = {
914 0x40, 0x20, 0x00, 0x00, /* even nop */
915 0x00, 0x20, 0x00, 0x00, /* odd nop */
921 if (fragp
->fr_type
!= rs_align_code
)
924 bytes
= fragp
->fr_next
->fr_address
- fragp
->fr_address
- fragp
->fr_fix
;
925 p
= fragp
->fr_literal
+ fragp
->fr_fix
;
933 fragp
->fr_fix
+= fix
;
937 memcpy (p
, &nop_pattern
[4], 4);
943 memcpy (p
, nop_pattern
, 8);
948 md_apply_fix (fixS
*fixP
, valueT
*valP
, segT seg ATTRIBUTE_UNUSED
)
953 char *place
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
955 if (fixP
->fx_subsy
!= (symbolS
*) NULL
)
957 /* We can't actually support subtracting a symbol. */
958 as_bad_subtract (fixP
);
961 if (fixP
->fx_addsy
!= NULL
)
965 /* Hack around bfd_install_relocation brain damage. */
966 val
+= fixP
->fx_frag
->fr_address
+ fixP
->fx_where
;
968 switch (fixP
->fx_r_type
)
971 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
974 case BFD_RELOC_SPU_PCREL16
:
975 case BFD_RELOC_SPU_PCREL9a
:
976 case BFD_RELOC_SPU_PCREL9b
:
977 case BFD_RELOC_32_PCREL
:
981 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
982 _("expression too complex"));
988 fixP
->fx_addnumber
= val
;
990 if (fixP
->fx_r_type
== BFD_RELOC_SPU_PPU32
991 || fixP
->fx_r_type
== BFD_RELOC_SPU_PPU64
992 || fixP
->fx_r_type
== BFD_RELOC_SPU_ADD_PIC
)
995 if (fixP
->fx_addsy
== NULL
&& fixP
->fx_pcrel
== 0)
1000 if (fixP
->tc_fix_data
.arg_format
> A_P
)
1002 int hi
= arg_encode
[fixP
->tc_fix_data
.arg_format
].hi
;
1003 int lo
= arg_encode
[fixP
->tc_fix_data
.arg_format
].lo
;
1004 if (hi
> lo
&& ((offsetT
) val
< lo
|| (offsetT
) val
> hi
))
1005 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1006 _("Relocation doesn't fit. (relocation value = 0x%lx)"),
1010 switch (fixP
->fx_r_type
)
1013 md_number_to_chars (place
, val
, 1);
1017 md_number_to_chars (place
, val
, 2);
1021 case BFD_RELOC_32_PCREL
:
1022 md_number_to_chars (place
, val
, 4);
1026 md_number_to_chars (place
, val
, 8);
1029 case BFD_RELOC_SPU_IMM7
:
1034 case BFD_RELOC_SPU_IMM8
:
1039 case BFD_RELOC_SPU_IMM10
:
1044 case BFD_RELOC_SPU_IMM10W
:
1046 mask
= 0x3ff0 << 10;
1049 case BFD_RELOC_SPU_IMM16
:
1054 case BFD_RELOC_SPU_IMM16W
:
1056 mask
= 0x3fffc << 5;
1059 case BFD_RELOC_SPU_IMM18
:
1061 mask
= 0x3ffff << 7;
1064 case BFD_RELOC_SPU_PCREL9a
:
1065 res
= ((val
& 0x1fc) >> 2) | ((val
& 0x600) << 14);
1066 mask
= (0x1fc >> 2) | (0x600 << 14);
1069 case BFD_RELOC_SPU_PCREL9b
:
1070 res
= ((val
& 0x1fc) >> 2) | ((val
& 0x600) << 5);
1071 mask
= (0x1fc >> 2) | (0x600 << 5);
1074 case BFD_RELOC_SPU_PCREL16
:
1076 mask
= 0x3fffc << 5;
1079 case BFD_RELOC_SPU_HI16
:
1084 case BFD_RELOC_SPU_LO16
:
1090 as_bad_where (fixP
->fx_file
, fixP
->fx_line
,
1091 _("reloc %d not supported by object file format"),
1092 (int) fixP
->fx_r_type
);
1096 place
[0] = (place
[0] & (~mask
>> 24)) | ((res
>> 24) & 0xff);
1097 place
[1] = (place
[1] & (~mask
>> 16)) | ((res
>> 16) & 0xff);
1098 place
[2] = (place
[2] & (~mask
>> 8)) | ((res
>> 8) & 0xff);
1099 place
[3] = (place
[3] & ~mask
) | (res
& 0xff);