RISC-V: Support SiFive extensions: xsfvqmaccdod, xsfvqmaccqoq and xsfvfnrclipxfqf
[binutils-gdb.git] / gdb / sparc-tdep.h
blob2d8c50768be040dd01feb5e76d6ba0907e0d09bb
1 /* Target-dependent code for SPARC.
3 Copyright (C) 2003-2024 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #ifndef SPARC_TDEP_H
21 #define SPARC_TDEP_H 1
23 #include "gdbarch.h"
25 #define SPARC_CORE_REGISTERS \
26 "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
27 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
28 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
29 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7"
31 class frame_info_ptr;
32 struct gdbarch;
33 struct regcache;
34 struct regset;
35 struct trad_frame_saved_reg;
37 /* Register offsets for the general-purpose register set. */
39 struct sparc_gregmap
41 int r_psr_offset;
42 int r_pc_offset;
43 int r_npc_offset;
44 int r_y_offset;
45 int r_wim_offset;
46 int r_tbr_offset;
47 int r_g1_offset;
48 int r_l0_offset;
49 int r_y_size;
52 struct sparc_fpregmap
54 int r_f0_offset;
55 int r_fsr_offset;
58 /* SPARC architecture-specific information. */
60 struct sparc_gdbarch_tdep : gdbarch_tdep_base
62 /* Register numbers for the PN and nPC registers. The definitions
63 for (64-bit) UltraSPARC differ from the (32-bit) SPARC
64 definitions. */
65 int pc_regnum = 0;
66 int npc_regnum = 0;
68 /* Register names specific for architecture (sparc32 vs. sparc64) */
69 const char * const *fpu_register_names = nullptr;
70 size_t fpu_registers_num = 0;
71 const char * const *cp0_register_names = nullptr;
72 size_t cp0_registers_num = 0;
74 /* Register sets. */
75 const struct regset *gregset = nullptr;
76 size_t sizeof_gregset = 0;
77 const struct regset *fpregset = nullptr;
78 size_t sizeof_fpregset = 0;
80 /* Offset of saved PC in jmp_buf. */
81 int jb_pc_offset = 0;
83 /* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
84 treat the PLT special when doing prologue analysis. */
85 size_t plt_entry_size = 0;
87 /* Alternative location for trap return. Used for single-stepping. */
88 CORE_ADDR (*step_trap) (const frame_info_ptr &frame, unsigned long insn)
89 = nullptr;
91 /* ISA-specific data types. */
92 struct type *sparc_psr_type = nullptr;
93 struct type *sparc_fsr_type = nullptr;
94 struct type *sparc64_ccr_type = nullptr;
95 struct type *sparc64_pstate_type = nullptr;
96 struct type *sparc64_fsr_type = nullptr;
97 struct type *sparc64_fprs_type = nullptr;
100 /* Register numbers of various important registers. */
102 enum sparc_regnum
104 SPARC_G0_REGNUM = 0, /* %g0 */
105 SPARC_G1_REGNUM,
106 SPARC_G2_REGNUM,
107 SPARC_G3_REGNUM,
108 SPARC_G4_REGNUM,
109 SPARC_G5_REGNUM,
110 SPARC_G6_REGNUM,
111 SPARC_G7_REGNUM, /* %g7 */
112 SPARC_O0_REGNUM, /* %o0 */
113 SPARC_O1_REGNUM,
114 SPARC_O2_REGNUM,
115 SPARC_O3_REGNUM,
116 SPARC_O4_REGNUM,
117 SPARC_O5_REGNUM,
118 SPARC_SP_REGNUM, /* %sp (%o6) */
119 SPARC_O7_REGNUM, /* %o7 */
120 SPARC_L0_REGNUM, /* %l0 */
121 SPARC_L1_REGNUM,
122 SPARC_L2_REGNUM,
123 SPARC_L3_REGNUM,
124 SPARC_L4_REGNUM,
125 SPARC_L5_REGNUM,
126 SPARC_L6_REGNUM,
127 SPARC_L7_REGNUM, /* %l7 */
128 SPARC_I0_REGNUM, /* %i0 */
129 SPARC_I1_REGNUM,
130 SPARC_I2_REGNUM,
131 SPARC_I3_REGNUM,
132 SPARC_I4_REGNUM,
133 SPARC_I5_REGNUM,
134 SPARC_FP_REGNUM, /* %fp (%i6) */
135 SPARC_I7_REGNUM, /* %i7 */
136 SPARC_F0_REGNUM, /* %f0 */
137 SPARC_F1_REGNUM,
138 SPARC_F2_REGNUM,
139 SPARC_F3_REGNUM,
140 SPARC_F4_REGNUM,
141 SPARC_F5_REGNUM,
142 SPARC_F6_REGNUM,
143 SPARC_F7_REGNUM,
144 SPARC_F31_REGNUM /* %f31 */
145 = SPARC_F0_REGNUM + 31
148 enum sparc32_regnum
150 SPARC32_Y_REGNUM /* %y */
151 = SPARC_F31_REGNUM + 1,
152 SPARC32_PSR_REGNUM, /* %psr */
153 SPARC32_WIM_REGNUM, /* %wim */
154 SPARC32_TBR_REGNUM, /* %tbr */
155 SPARC32_PC_REGNUM, /* %pc */
156 SPARC32_NPC_REGNUM, /* %npc */
157 SPARC32_FSR_REGNUM, /* %fsr */
158 SPARC32_CSR_REGNUM, /* %csr */
161 /* Pseudo registers. */
162 enum sparc32_pseudo_regnum
164 SPARC32_D0_REGNUM = 0, /* %d0 */
165 SPARC32_D30_REGNUM /* %d30 */
166 = SPARC32_D0_REGNUM + 15
170 struct sparc_frame_cache
172 /* Base address. */
173 CORE_ADDR base;
174 CORE_ADDR pc;
176 /* Do we have a frame? */
177 int frameless_p;
179 /* The offset from the base register to the CFA. */
180 int frame_offset;
182 /* Mask of `local' and `in' registers saved in the register save area. */
183 unsigned short int saved_regs_mask;
185 /* Mask of `out' registers copied or renamed to their `in' sibling. */
186 unsigned char copied_regs_mask;
188 /* Do we have a Structure, Union or Quad-Precision return value? */
189 int struct_return_p;
191 /* Table of saved registers. */
192 struct trad_frame_saved_reg *saved_regs;
195 /* Fetch the instruction at PC. */
196 extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);
198 /* Fetch StackGhost Per-Process XOR cookie. */
199 extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch);
201 /* Record the effect of a SAVE instruction on CACHE. */
202 extern void sparc_record_save_insn (struct sparc_frame_cache *cache);
204 /* Do a full analysis of the prologue at PC and update CACHE accordingly. */
205 extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch,
206 CORE_ADDR pc, CORE_ADDR current_pc,
207 struct sparc_frame_cache *cache);
209 extern struct sparc_frame_cache *
210 sparc_frame_cache (const frame_info_ptr &this_frame, void **this_cache);
212 extern struct sparc_frame_cache *
213 sparc32_frame_cache (const frame_info_ptr &this_frame, void **this_cache);
215 extern int
216 sparc_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc);
220 extern void sparc_supply_rwindow (struct regcache *regcache,
221 CORE_ADDR sp, int regnum);
222 extern void sparc_collect_rwindow (const struct regcache *regcache,
223 CORE_ADDR sp, int regnum);
225 /* Register offsets for SunOS 4. */
226 extern const struct sparc_gregmap sparc32_sunos4_gregmap;
227 extern const struct sparc_fpregmap sparc32_sunos4_fpregmap;
228 extern const struct sparc_fpregmap sparc32_bsd_fpregmap;
230 extern void sparc32_supply_gregset (const struct sparc_gregmap *gregmap,
231 struct regcache *regcache,
232 int regnum, const void *gregs);
233 extern void sparc32_collect_gregset (const struct sparc_gregmap *gregmap,
234 const struct regcache *regcache,
235 int regnum, void *gregs);
236 extern void sparc32_supply_fpregset (const struct sparc_fpregmap *fpregmap,
237 struct regcache *regcache,
238 int regnum, const void *fpregs);
239 extern void sparc32_collect_fpregset (const struct sparc_fpregmap *fpregmap,
240 const struct regcache *regcache,
241 int regnum, void *fpregs);
243 extern int sparc_is_annulled_branch_insn (CORE_ADDR pc);
245 /* Functions and variables exported from sparc-sol2-tdep.c. */
247 /* Register offsets for Solaris 2. */
248 extern const struct sparc_gregmap sparc32_sol2_gregmap;
249 extern const struct sparc_fpregmap sparc32_sol2_fpregmap;
251 /* Functions and variables exported from sparc-netbsd-tdep.c. */
253 /* Register offsets for NetBSD. */
254 extern const struct sparc_gregmap sparc32nbsd_gregmap;
256 /* Return the address of a system call's alternative return
257 address. */
258 extern CORE_ADDR sparcnbsd_step_trap (const frame_info_ptr &frame,
259 unsigned long insn);
261 extern void sparc32nbsd_init_abi (struct gdbarch_info info,
262 struct gdbarch *gdbarch);
264 extern struct trad_frame_saved_reg *
265 sparc32nbsd_sigcontext_saved_regs (const frame_info_ptr &next_frame);
267 #endif /* sparc-tdep.h */