gdb/testsuite/gdb.arch/aarch64-sighandler-regs.c

   1 /* This file is part of GDB, the GNU debugger.
   2
   3    Copyright 2018-2024 Free Software Foundation, Inc.
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 3 of the License, or
   8    (at your option) any later version.
   9
  10    This program is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  17
  18 #include <signal.h>
  19 #include <unistd.h>
  20 #include <stdlib.h>
  21
  22 #define OVERWRITE_GP_REGS \
  23                     "ldr x1, [x0]\n\t" \
  24                     "ldr x2, [x0]\n\t" \
  25                     "ldr x3, [x0]\n\t" \
  26                     "ldr x4, [x0]\n\t" \
  27                     "ldr x5, [x0]\n\t" \
  28                     "ldr x6, [x0]\n\t" \
  29                     "ldr x7, [x0]\n\t" \
  30                     "ldr x8, [x0]\n\t" \
  31                     "ldr x9, [x0]\n\t" \
  32                     "ldr x10, [x0]\n\t" \
  33                     "ldr x11, [x0]\n\t" \
  34                     "ldr x12, [x0]\n\t" \
  35                     "ldr x13, [x0]\n\t" \
  36                     "ldr x14, [x0]\n\t" \
  37                     "ldr x15, [x0]\n\t" \
  38                     "ldr x16, [x0]\n\t" \
  39                     "ldr x17, [x0]\n\t" \
  40                     "ldr x18, [x0]\n\t" \
  41                     "ldr x19, [x0]\n\t" \
  42                     "ldr x20, [x0]\n\t" \
  43                     "ldr x21, [x0]\n\t" \
  44                     "ldr x22, [x0]\n\t" \
  45                     "ldr x23, [x0]\n\t" \
  46                     "ldr x24, [x0]\n\t" \
  47                     "ldr x25, [x0]\n\t" \
  48                     "ldr x26, [x0]\n\t" \
  49                     "ldr x27, [x0]\n\t" \
  50                     "ldr x28, [x0]\n\t"
  51
  52 #ifdef SVE
  53 #define OVERWRITE_FP_REGS \
  54                     "ptrue p3.s\n\t" \
  55                     "ld1w z0.s, p3/z, [x0]\n\t" \
  56                     "ld1w z1.s, p3/z, [x0]\n\t" \
  57                     "ld1w z2.s, p3/z, [x0]\n\t" \
  58                     "ld1w z3.s, p3/z, [x0]\n\t" \
  59                     "ld1w z4.s, p3/z, [x0]\n\t" \
  60                     "ld1w z5.s, p3/z, [x0]\n\t" \
  61                     "ld1w z6.s, p3/z, [x0]\n\t" \
  62                     "ld1w z7.s, p3/z, [x0]\n\t" \
  63                     "ld1w z8.s, p3/z, [x0]\n\t" \
  64                     "ld1w z9.s, p3/z, [x0]\n\t" \
  65                     "ld1w z10.s, p3/z, [x0]\n\t" \
  66                     "ld1w z11.s, p3/z, [x0]\n\t" \
  67                     "ld1w z12.s, p3/z, [x0]\n\t" \
  68                     "ld1w z13.s, p3/z, [x0]\n\t" \
  69                     "ld1w z14.s, p3/z, [x0]\n\t" \
  70                     "ld1w z15.s, p3/z, [x0]\n\t" \
  71                     "ld1w z16.s, p3/z, [x0]\n\t" \
  72                     "ld1w z17.s, p3/z, [x0]\n\t" \
  73                     "ld1w z18.s, p3/z, [x0]\n\t" \
  74                     "ld1w z19.s, p3/z, [x0]\n\t" \
  75                     "ld1w z20.s, p3/z, [x0]\n\t" \
  76                     "ld1w z21.s, p3/z, [x0]\n\t" \
  77                     "ld1w z22.s, p3/z, [x0]\n\t" \
  78                     "ld1w z23.s, p3/z, [x0]\n\t" \
  79                     "ld1w z24.s, p3/z, [x0]\n\t" \
  80                     "ld1w z25.s, p3/z, [x0]\n\t" \
  81                     "ld1w z26.s, p3/z, [x0]\n\t" \
  82                     "ld1w z27.s, p3/z, [x0]\n\t" \
  83                     "ld1w z28.s, p3/z, [x0]\n\t" \
  84                     "ld1w z29.s, p3/z, [x0]\n\t" \
  85                     "ld1w z30.s, p3/z, [x0]\n\t" \
  86                     "ld1w z31.s, p3/z, [x0]\n\t"
  87 #else
  88 #define OVERWRITE_FP_REGS \
  89                     "ldr q0, [x0]\n\t" \
  90                     "ldr q1, [x0]\n\t" \
  91                     "ldr q2, [x0]\n\t" \
  92                     "ldr q3, [x0]\n\t" \
  93                     "ldr q4, [x0]\n\t" \
  94                     "ldr q5, [x0]\n\t" \
  95                     "ldr q6, [x0]\n\t" \
  96                     "ldr q7, [x0]\n\t" \
  97                     "ldr q8, [x0]\n\t" \
  98                     "ldr q9, [x0]\n\t" \
  99                     "ldr q10, [x0]\n\t" \
 100                     "ldr q11, [x0]\n\t" \
 101                     "ldr q12, [x0]\n\t" \
 102                     "ldr q13, [x0]\n\t" \
 103                     "ldr q14, [x0]\n\t" \
 104                     "ldr q15, [x0]\n\t" \
 105                     "ldr q16, [x0]\n\t" \
 106                     "ldr q17, [x0]\n\t" \
 107                     "ldr q18, [x0]\n\t" \
 108                     "ldr q19, [x0]\n\t" \
 109                     "ldr q20, [x0]\n\t" \
 110                     "ldr q21, [x0]\n\t" \
 111                     "ldr q22, [x0]\n\t" \
 112                     "ldr q23, [x0]\n\t" \
 113                     "ldr q24, [x0]\n\t" \
 114                     "ldr q25, [x0]\n\t" \
 115                     "ldr q26, [x0]\n\t" \
 116                     "ldr q27, [x0]\n\t" \
 117                     "ldr q28, [x0]\n\t" \
 118                     "ldr q29, [x0]\n\t" \
 119                     "ldr q30, [x0]\n\t" \
 120                     "ldr q31, [x0]\n\t"
 121 #endif
 122
 123 #ifdef SVE
 124 #define OVERWRITE_P_REGS(pattern) \
 125                     "ptrue p0.s, " #pattern "\n\t" \
 126                     "ptrue p1.s, " #pattern "\n\t" \
 127                     "ptrue p2.s, " #pattern "\n\t" \
 128                     "ptrue p3.s, " #pattern "\n\t" \
 129                     "ptrue p4.s, " #pattern "\n\t" \
 130                     "ptrue p5.s, " #pattern "\n\t" \
 131                     "ptrue p6.s, " #pattern "\n\t" \
 132                     "ptrue p7.s, " #pattern "\n\t" \
 133                     "ptrue p8.s, " #pattern "\n\t" \
 134                     "ptrue p9.s, " #pattern "\n\t" \
 135                     "ptrue p10.s, " #pattern "\n\t" \
 136                     "ptrue p11.s, " #pattern "\n\t" \
 137                     "ptrue p12.s, " #pattern "\n\t" \
 138                     "ptrue p13.s, " #pattern "\n\t" \
 139                     "ptrue p14.s, " #pattern "\n\t" \
 140                     "ptrue p15.s, " #pattern "\n\t"
 141 #else
 142 #define OVERWRITE_P_REGS(pattern)
 143 #endif
 144
 145
 146 void
 147 handler (int sig)
 148 {
 149   char buf_handler[] = {0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
 150                         0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f};
 151
 152   __asm __volatile ("mov x0, %0\n\t" \
 153                     OVERWRITE_GP_REGS \
 154                     OVERWRITE_FP_REGS \
 155                     OVERWRITE_P_REGS(MUL3) \
 156                     : : "r" (buf_handler));
 157
 158   exit(0);
 159 }
 160
 161
 162
 163 int
 164 main ()
 165 {
 166   /* Ensure all the signals aren't blocked.  */
 167   sigset_t newset;
 168   sigemptyset (&newset);
 169   sigprocmask (SIG_SETMASK, &newset, NULL);
 170
 171   signal (SIGILL, handler);
 172
 173   char buf_main[] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
 174                      0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
 175
 176   /* 0x06000000 : Cause an illegal instruction. Value undefined as per ARM
 177      Architecture Reference Manual ARMv8, Section C4.1.  */
 178
 179   __asm __volatile ("mov x0, %0\n\t" \
 180                     OVERWRITE_GP_REGS \
 181                     OVERWRITE_FP_REGS \
 182                     OVERWRITE_P_REGS(VL1) \
 183                     ".inst 0x06000000"
 184                     : : "r" (buf_main));
 185
 186   return 0;
 187 }