gdb/testsuite/gdb.arch/powerpc-htm-regs.c

   1 /* This testcase is part of GDB, the GNU debugger.
   2
   3    Copyright (C) 2018-2024 Free Software Foundation, Inc.
   4
   5    This program is free software; you can redistribute it and/or modify
   6    it under the terms of the GNU General Public License as published by
   7    the Free Software Foundation; either version 3 of the License, or
   8    (at your option) any later version.
   9
  10    This program is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13    GNU General Public License for more details.
  14
  15    You should have received a copy of the GNU General Public License
  16    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  17
  18 int main (void)
  19 {
  20   /* Touch DSCR.  Some kernels won't schedule the thread with a DSCR
  21      altered by ptrace unless the register was used at some point.  */
  22   unsigned long dscr = 0x0;
  23
  24   /* This is the non-privileged SPR number to access DSCR,
  25      available since isa 207.  */
  26   asm volatile ("mtspr 3,%0" : : "r" (dscr));
  27
  28   asm volatile ("tbegin."); // first marker
  29   asm volatile goto ("bc 12,2,%l[end]"
  30                      :
  31                      :
  32                      :
  33                      : end);
  34   asm volatile ("tabort. 0");
  35 end:
  36   asm volatile ("nop"); // second marker
  37
  38   return 0;
  39 }