1 /* Print Motorola 68k instructions.
2 Copyright (C) 1986-2024 Free Software Foundation, Inc.
4 This file is part of the GNU opcodes library.
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
22 #include "disassemble.h"
23 #include "floatformat.h"
24 #include "libiberty.h"
27 #include "opcode/m68k.h"
29 /* Local function prototypes. */
31 const char * const fpcr_names
[] =
33 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr",
34 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr"
37 static char *const reg_names
[] =
39 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
40 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp",
44 /* Name of register halves for MAC/EMAC.
45 Seperate from reg_names since 'spu', 'fpl' look weird. */
46 static char *const reg_half_names
[] =
48 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7",
49 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7",
53 /* Sign-extend an (unsigned char). */
55 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch))
57 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128)
60 /* Error code of print_insn_arg's return value. */
62 enum print_insn_arg_error
64 /* An invalid operand is found. */
65 PRINT_INSN_ARG_INVALID_OPERAND
= -1,
67 /* An opcode table error. */
68 PRINT_INSN_ARG_INVALID_OP_TABLE
= -2,
71 PRINT_INSN_ARG_MEMORY_ERROR
= -3,
74 /* Get a 1 byte signed integer. */
75 #define NEXTBYTE(p, val) \
79 if (!FETCH_DATA (info, p)) \
80 return PRINT_INSN_ARG_MEMORY_ERROR; \
81 val = COERCE_SIGNED_CHAR (p[-1]); \
85 /* Get a 2 byte signed integer. */
86 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
88 #define NEXTWORD(p, val, ret_val) \
92 if (!FETCH_DATA (info, p)) \
94 val = COERCE16 ((p[-2] << 8) + p[-1]); \
98 /* Get a 4 byte signed integer. */
99 #define COERCE32(x) (((bfd_vma) (x) ^ 0x80000000) - 0x80000000)
101 #define NEXTLONG(p, val, ret_val) \
105 if (!FETCH_DATA (info, p)) \
107 val = COERCE32 (((((((unsigned) p[-4] << 8) + p[-3]) << 8) \
108 + p[-2]) << 8) + p[-1]); \
112 /* Get a 4 byte unsigned integer. */
113 #define NEXTULONG(p, val) \
117 if (!FETCH_DATA (info, p)) \
118 return PRINT_INSN_ARG_MEMORY_ERROR; \
119 val = (((((((unsigned) p[-4] << 8) + p[-3]) << 8) \
120 + p[-2]) << 8) + p[-1]); \
124 /* Get a single precision float. */
125 #define NEXTSINGLE(val, p) \
129 if (!FETCH_DATA (info, p)) \
130 return PRINT_INSN_ARG_MEMORY_ERROR; \
131 floatformat_to_double (& floatformat_ieee_single_big, \
132 (char *) p - 4, & val); \
136 /* Get a double precision float. */
137 #define NEXTDOUBLE(val, p) \
141 if (!FETCH_DATA (info, p)) \
142 return PRINT_INSN_ARG_MEMORY_ERROR; \
143 floatformat_to_double (& floatformat_ieee_double_big, \
144 (char *) p - 8, & val); \
148 /* Get an extended precision float. */
149 #define NEXTEXTEND(val, p) \
153 if (!FETCH_DATA (info, p)) \
154 return PRINT_INSN_ARG_MEMORY_ERROR; \
155 floatformat_to_double (& floatformat_m68881_ext, \
156 (char *) p - 12, & val); \
160 /* Need a function to convert from packed to double
161 precision. Actually, it's easier to print a
162 packed number than a double anyway, so maybe
163 there should be a special case to handle this... */
164 #define NEXTPACKED(p, val) \
168 if (!FETCH_DATA (info, p)) \
169 return PRINT_INSN_ARG_MEMORY_ERROR; \
175 /* Maximum length of an instruction. */
180 /* Points to first byte not fetched. */
181 bfd_byte
*max_fetched
;
182 bfd_byte the_buffer
[MAXLEN
];
186 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
187 to ADDR (exclusive) are valid. Returns 1 for success, 0 on memory
189 #define FETCH_DATA(info, addr) \
190 ((addr) <= ((struct private *) (info->private_data))->max_fetched \
191 ? 1 : fetch_data ((info), (addr)))
194 fetch_data (struct disassemble_info
*info
, bfd_byte
*addr
)
197 struct private *priv
= (struct private *)info
->private_data
;
198 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
200 status
= (*info
->read_memory_func
) (start
,
202 addr
- priv
->max_fetched
,
206 (*info
->memory_error_func
) (status
, start
, info
);
210 priv
->max_fetched
= addr
;
214 /* This function is used to print to the bit-bucket. */
216 dummy_printer (void *file ATTRIBUTE_UNUSED
,
217 enum disassembler_style style ATTRIBUTE_UNUSED
,
218 const char *format ATTRIBUTE_UNUSED
,
225 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED
,
226 struct disassemble_info
*info ATTRIBUTE_UNUSED
)
230 /* Fetch BITS bits from a position in the instruction specified by CODE.
231 CODE is a "place to put an argument", or 'x' for a destination
232 that is a general address (mode and register).
233 BUFFER contains the instruction.
234 Returns -1 on failure. */
237 fetch_arg (unsigned char *buffer
,
240 disassemble_info
*info
)
246 case '/': /* MAC/EMAC mask bit. */
247 val
= buffer
[3] >> 5;
250 case 'G': /* EMAC ACC load. */
251 val
= ((buffer
[3] >> 3) & 0x2) | ((~buffer
[1] >> 7) & 0x1);
254 case 'H': /* EMAC ACC !load. */
255 val
= ((buffer
[3] >> 3) & 0x2) | ((buffer
[1] >> 7) & 0x1);
258 case ']': /* EMAC ACCEXT bit. */
259 val
= buffer
[0] >> 2;
262 case 'I': /* MAC/EMAC scale factor. */
263 val
= buffer
[2] >> 1;
266 case 'F': /* EMAC ACCx. */
267 val
= buffer
[0] >> 1;
278 case 'd': /* Destination, for register or quick. */
279 val
= (buffer
[0] << 8) + buffer
[1];
283 case 'x': /* Destination, for general arg. */
284 val
= (buffer
[0] << 8) + buffer
[1];
289 if (! FETCH_DATA (info
, buffer
+ 3))
291 val
= (buffer
[3] >> 4);
295 if (! FETCH_DATA (info
, buffer
+ 3))
301 if (! FETCH_DATA (info
, buffer
+ 3))
303 val
= (buffer
[2] << 8) + buffer
[3];
308 if (! FETCH_DATA (info
, buffer
+ 3))
310 val
= (buffer
[2] << 8) + buffer
[3];
316 if (! FETCH_DATA (info
, buffer
+ 3))
318 val
= (buffer
[2] << 8) + buffer
[3];
322 if (! FETCH_DATA (info
, buffer
+ 5))
324 val
= (buffer
[4] << 8) + buffer
[5];
329 if (! FETCH_DATA (info
, buffer
+ 5))
331 val
= (buffer
[4] << 8) + buffer
[5];
336 if (! FETCH_DATA (info
, buffer
+ 5))
338 val
= (buffer
[4] << 8) + buffer
[5];
342 if (! FETCH_DATA (info
, buffer
+ 3))
344 val
= (buffer
[2] << 8) + buffer
[3];
349 if (! FETCH_DATA (info
, buffer
+ 3))
351 val
= (buffer
[2] << 8) + buffer
[3];
356 if (! FETCH_DATA (info
, buffer
+ 3))
358 val
= (buffer
[2] << 8) + buffer
[3];
363 val
= (buffer
[1] >> 6);
367 if (! FETCH_DATA (info
, buffer
+ 3))
369 val
= (buffer
[2] >> 1);
373 val
= (buffer
[1] & 0x40 ? 0x8 : 0)
374 | ((buffer
[0] >> 1) & 0x7)
375 | (buffer
[3] & 0x80 ? 0x10 : 0);
379 val
= (buffer
[1] & 0x40 ? 0x8 : 0) | ((buffer
[0] >> 1) & 0x7);
383 val
= (buffer
[2] >> 4) | (buffer
[3] & 0x80 ? 0x10 : 0);
387 val
= (buffer
[1] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
391 val
= (buffer
[3] & 0xf) | (buffer
[3] & 0x40 ? 0x10 : 0);
395 val
= buffer
[2] >> 2;
402 /* bits is never too big. */
403 return val
& ((1 << bits
) - 1);
406 /* Check if an EA is valid for a particular code. This is required
407 for the EMAC instructions since the type of source address determines
408 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it
409 is a non-load EMAC instruction and the bits mean register Ry.
410 A similar case exists for the movem instructions where the register
411 mask is interpreted differently for different EAs. */
414 m68k_valid_ea (char code
, int val
)
417 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \
418 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \
419 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11)
424 mask
= M (1,1,1,1,1,1,1,1,1,1,1,1);
427 mask
= M (0,0,1,1,1,1,1,1,1,0,0,0);
430 mask
= M (1,1,1,1,1,1,1,1,1,0,0,0);
433 mask
= M (1,0,1,1,1,1,1,1,1,1,1,1);
436 mask
= M (1,0,1,1,1,1,1,1,1,1,1,0);
439 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
442 mask
= M (0,0,1,0,0,1,1,1,1,0,0,0);
445 mask
= M (1,0,1,1,1,1,1,1,1,0,0,0);
448 mask
= M (1,0,1,0,0,1,1,1,1,0,0,0);
451 mask
= M (1,0,1,0,0,1,1,1,1,1,1,0);
454 mask
= M (0,0,1,0,0,1,1,1,1,1,1,0);
457 mask
= M (0,0,1,0,1,1,1,1,1,0,0,0);
460 mask
= M (0,0,1,1,0,1,1,1,1,1,1,0);
463 mask
= M (1,1,1,1,1,0,0,0,0,0,0,0);
466 mask
= M (0,0,0,0,0,1,0,0,0,1,0,0);
469 mask
= M (0,0,0,0,0,0,1,1,1,0,1,1);
472 mask
= M (1,1,1,1,1,1,0,0,0,0,0,0);
475 mask
= M (1,0,1,1,1,1,0,0,0,0,0,0);
478 mask
= M (1,0,1,1,1,1,0,1,1,0,0,0);
481 mask
= M (1,0,1,1,1,1,0,0,0,1,0,0);
484 mask
= M (0,0,1,1,1,1,0,0,0,1,0,0);
487 mask
= M (0,0,1,0,0,1,0,0,0,0,0,0);
490 mask
= M (0,0,1,0,0,1,0,0,0,1,0,0);
493 mask
= M (0,0,1,1,1,1,0,0,0,0,0,0);
500 mode
= (val
>> 3) & 7;
503 return (mask
& (1 << mode
)) != 0;
506 /* Print a base register REGNO and displacement DISP, on INFO->STREAM.
507 REGNO = -1 for pc, -2 for none (suppressed). */
510 print_base (int regno
, bfd_vma disp
, disassemble_info
*info
)
514 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%pc");
515 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@(");
516 (*info
->print_address_func
) (disp
, info
);
521 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
523 else if (regno
!= -2)
524 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
525 "%s", reg_names
[regno
]);
526 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@(");
527 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
528 "%" PRIx64
, (uint64_t) disp
);
532 /* Print the index register of an indexed argument, as encoded in the
536 print_index_register (int ext
, disassemble_info
*info
)
538 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
539 "%s", reg_names
[(ext
>> 12) & 0xf]);
540 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
541 ":%c", ext
& 0x800 ? 'l' : 'w');
544 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ":");
545 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
546 "%d", 1 << ((ext
>> 9) & 3));
550 /* Print an indexed argument. The base register is BASEREG (-1 for pc).
551 P points to extension word, in buffer.
552 ADDR is the nominal core address of that extension word.
553 Returns NULL upon error. */
555 static unsigned char *
556 print_indexed (int basereg
,
559 disassemble_info
*info
)
564 bool print_index
= true;
566 NEXTWORD (p
, word
, NULL
);
568 /* Handle the 68000 style of indexing. */
570 if ((word
& 0x100) == 0)
572 base_disp
= word
& 0xff;
573 if ((base_disp
& 0x80) != 0)
577 print_base (basereg
, base_disp
, info
);
578 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ",");
579 print_index_register (word
, info
);
580 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
584 /* Handle the generalized kind. */
585 /* First, compute the displacement to add to the base register. */
596 switch ((word
>> 4) & 3)
599 NEXTWORD (p
, base_disp
, NULL
);
602 NEXTLONG (p
, base_disp
, NULL
);
607 /* Handle single-level case (not indirect). */
610 print_base (basereg
, base_disp
, info
);
613 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ",");
614 print_index_register (word
, info
);
616 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
620 /* Two level. Compute displacement to add after indirection. */
625 NEXTWORD (p
, outer_disp
, NULL
);
628 NEXTLONG (p
, outer_disp
, NULL
);
631 print_base (basereg
, base_disp
, info
);
632 if ((word
& 4) == 0 && print_index
)
634 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ",");
635 print_index_register (word
, info
);
638 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
640 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_address_offset
,
641 "%" PRIx64
, (uint64_t) outer_disp
);
644 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ",");
645 print_index_register (word
, info
);
647 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
652 #define FETCH_ARG(size, val) \
655 val = fetch_arg (buffer, place, size, info); \
657 return PRINT_INSN_ARG_MEMORY_ERROR; \
661 /* Returns number of bytes "eaten" by the operand, or
662 return enum print_insn_arg_error. ADDR is the pc for this arg to be
666 print_insn_arg (const char *d
,
667 unsigned char *buffer
,
670 disassemble_info
*info
)
674 unsigned char *p
= p0
;
685 case 'c': /* Cache identifier. */
687 static char *const cacheFieldName
[] = { "nc", "dc", "ic", "bc" };
689 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_sub_mnemonic
,
690 "%s", cacheFieldName
[val
]);
694 case 'a': /* Address register indirect only. Cf. case '+'. */
697 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%s",
699 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@");
703 case '_': /* 32-bit absolute address for move16. */
706 (*info
->print_address_func
) (uval
, info
);
711 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%ccr");
715 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%sr");
719 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%usp");
723 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%acc");
727 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%macsr");
731 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%mask");
736 /* FIXME: There's a problem here, different m68k processors call the
737 same address different names. The tables below try to get it right
738 using info->mach, but only for v4e. */
739 struct regname
{ char * name
; int value
; };
740 static const struct regname names
[] =
742 {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
743 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
744 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
745 {"%rgpiobar", 0x009}, {"%acr4",0x00c},
746 {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f},
747 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
748 {"%msp", 0x803}, {"%isp", 0x804},
750 /* Reg c04 is sometimes called flashbar or rambar.
751 Reg c05 is also sometimes called rambar. */
752 {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
754 /* reg c0e is sometimes called mbar2 or secmbar.
755 reg c0f is sometimes called mbar. */
756 {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f},
758 /* Should we be calling this psr like we do in case 'Y'? */
761 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
763 /* Fido added these. */
764 {"%cac", 0xffe}, {"%mbo", 0xfff}
766 /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */
767 static const struct regname names_v4e
[] =
769 {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
770 {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
772 unsigned int arch_mask
;
774 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
776 if (arch_mask
& (mcfisa_b
| mcfisa_c
))
778 for (regno
= ARRAY_SIZE (names_v4e
); --regno
>= 0;)
779 if (names_v4e
[regno
].value
== val
)
781 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
782 "%s", names_v4e
[regno
].name
);
788 for (regno
= ARRAY_SIZE (names
) - 1; regno
>= 0; regno
--)
789 if (names
[regno
].value
== val
)
791 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
792 "%s", names
[regno
].name
);
796 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "0x%x", val
);
802 /* 0 means 8, except for the bkpt instruction... */
803 if (val
== 0 && d
[1] != 's')
805 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
814 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
820 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
826 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
833 static char *const scalefactor_name
[] = { "<<", ">>" };
836 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_sub_mnemonic
,
837 "%s", scalefactor_name
[val
]);
844 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
851 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
857 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
858 "%s", reg_names
[val
]);
863 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
864 "%s", reg_names
[val
+ 010]);
869 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
870 "%s", reg_names
[val
]);
874 FETCH_ARG (4, regno
);
877 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
878 "%s", reg_names
[regno
]);
879 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@");
883 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@(");
884 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
885 "%s", reg_names
[regno
]);
886 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
892 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
899 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
900 "%s", reg_names
[val
& 7]);
902 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
908 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
909 "%s", reg_names
[val
+ 8]);
910 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@+");
915 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
916 "%s", reg_names
[val
+ 8]);
917 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@-");
924 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "{");
925 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
926 "%s", reg_names
[val
]);
927 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "}");
929 else if (place
== 'C')
932 if (val
> 63) /* This is a signed constant. */
934 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "{");
935 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
937 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "}");
940 return PRINT_INSN_ARG_INVALID_OPERAND
;
945 p1
= buffer
+ (*d
== '#' ? 2 : 4);
948 else if (place
== 'C')
950 else if (place
== '8')
952 else if (place
== '3')
954 else if (place
== 'b')
956 else if (place
== 'w' || place
== 'W')
957 NEXTWORD (p1
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
958 else if (place
== 'l')
959 NEXTLONG (p1
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
961 return PRINT_INSN_ARG_INVALID_OP_TABLE
;
963 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
970 else if (place
== 'B')
971 disp
= COERCE_SIGNED_CHAR (buffer
[1]);
972 else if (place
== 'w' || place
== 'W')
973 NEXTWORD (p
, disp
, PRINT_INSN_ARG_MEMORY_ERROR
);
974 else if (place
== 'l' || place
== 'L' || place
== 'C')
975 NEXTLONG (p
, disp
, PRINT_INSN_ARG_MEMORY_ERROR
);
976 else if (place
== 'g')
978 NEXTBYTE (buffer
, disp
);
980 NEXTWORD (p
, disp
, PRINT_INSN_ARG_MEMORY_ERROR
);
982 NEXTLONG (p
, disp
, PRINT_INSN_ARG_MEMORY_ERROR
);
984 else if (place
== 'c')
986 if (buffer
[1] & 0x40) /* If bit six is one, long offset. */
987 NEXTLONG (p
, disp
, PRINT_INSN_ARG_MEMORY_ERROR
);
989 NEXTWORD (p
, disp
, PRINT_INSN_ARG_MEMORY_ERROR
);
992 return PRINT_INSN_ARG_INVALID_OP_TABLE
;
994 info
->target
= addr
+ disp
;
996 (*info
->print_address_func
) (addr
+ disp
, info
);
1003 NEXTWORD (p
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1004 FETCH_ARG (3, val1
);
1005 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1006 "%s", reg_names
[val1
+ 8]);
1007 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@(");
1008 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_address_offset
,
1010 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
1016 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1017 "%s", fpcr_names
[val
]);
1022 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1028 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1029 "%%accext%s", val
== 0 ? "01" : "23");
1035 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_sub_mnemonic
,
1038 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_sub_mnemonic
,
1041 return PRINT_INSN_ARG_INVALID_OPERAND
;
1045 /* Get coprocessor ID... */
1046 val
= fetch_arg (buffer
, 'd', 3, info
);
1048 return PRINT_INSN_ARG_MEMORY_ERROR
;
1049 if (val
!= 1) /* Unusual coprocessor ID? */
1050 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
1080 val
= fetch_arg (buffer
, 'x', 6, info
);
1082 return PRINT_INSN_ARG_MEMORY_ERROR
;
1083 val
= ((val
& 7) << 3) + ((val
>> 3) & 7);
1087 val
= fetch_arg (buffer
, 's', 6, info
);
1089 return PRINT_INSN_ARG_MEMORY_ERROR
;
1092 /* If the <ea> is invalid for *d, then reject this match. */
1093 if (!m68k_valid_ea (*d
, val
))
1094 return PRINT_INSN_ARG_INVALID_OPERAND
;
1096 /* Get register number assuming address register. */
1097 regno
= (val
& 7) + 8;
1098 regname
= reg_names
[regno
];
1102 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1103 "%s", reg_names
[val
]);
1107 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1112 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1114 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@");
1118 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1120 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@+");
1124 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1126 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@-");
1130 NEXTWORD (p
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1131 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1133 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@(");
1134 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_address_offset
,
1136 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
1140 p
= print_indexed (regno
, p
, addr
, info
);
1142 return PRINT_INSN_ARG_MEMORY_ERROR
;
1149 NEXTWORD (p
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1150 (*info
->print_address_func
) (val
, info
);
1154 NEXTULONG (p
, uval
);
1155 (*info
->print_address_func
) (uval
, info
);
1159 NEXTWORD (p
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1160 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1162 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, "@(");
1163 (*info
->print_address_func
) (addr
+ val
, info
);
1164 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
, ")");
1168 p
= print_indexed (-1, p
, addr
, info
);
1170 return PRINT_INSN_ARG_MEMORY_ERROR
;
1174 flt_p
= 1; /* Assume it's a float... */
1183 NEXTWORD (p
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1188 NEXTLONG (p
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1193 NEXTSINGLE (flval
, p
);
1197 NEXTDOUBLE (flval
, p
);
1201 NEXTEXTEND (flval
, p
);
1205 NEXTPACKED (p
, flval
);
1209 return PRINT_INSN_ARG_INVALID_OPERAND
;
1211 if (flt_p
) /* Print a float? */
1212 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
1215 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
1220 return PRINT_INSN_ARG_INVALID_OPERAND
;
1224 /* If place is '/', then this is the case of the mask bit for
1225 mac/emac loads. Now that the arg has been printed, grab the
1226 mask bit and if set, add a '&' to the arg. */
1231 info
->fprintf_styled_func (info
->stream
, dis_style_text
, "&");
1241 NEXTWORD (p1
, val
, PRINT_INSN_ARG_MEMORY_ERROR
);
1242 /* Move the pointer ahead if this point is farther ahead
1244 p
= p1
> p
? p1
: p
;
1247 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
1255 for (regno
= 0; regno
< 16; ++regno
)
1256 if (val
& (0x8000 >> regno
))
1257 newval
|= 1 << regno
;
1262 for (regno
= 0; regno
< 16; ++regno
)
1263 if (val
& (1 << regno
))
1268 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
1271 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1272 "%s", reg_names
[regno
]);
1273 first_regno
= regno
;
1274 while (val
& (1 << (regno
+ 1)))
1276 if (regno
> first_regno
)
1278 (*info
->fprintf_styled_func
) (info
->stream
,
1279 dis_style_text
, "-");
1280 (*info
->fprintf_styled_func
) (info
->stream
,
1281 dis_style_register
, "%s",
1286 else if (place
== '3')
1288 /* `fmovem' insn. */
1294 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
1302 for (regno
= 0; regno
< 8; ++regno
)
1303 if (val
& (0x80 >> regno
))
1304 newval
|= 1 << regno
;
1309 for (regno
= 0; regno
< 8; ++regno
)
1310 if (val
& (1 << regno
))
1314 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
1317 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1319 first_regno
= regno
;
1320 while (val
& (1 << (regno
+ 1)))
1322 if (regno
> first_regno
)
1324 (*info
->fprintf_styled_func
) (info
->stream
,
1325 dis_style_text
, "-");
1326 (*info
->fprintf_styled_func
) (info
->stream
,
1332 else if (place
== '8')
1335 /* fmoveml for FP status registers. */
1336 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1337 "%s", fpcr_names
[val
]);
1340 return PRINT_INSN_ARG_INVALID_OP_TABLE
;
1359 case 2: name
= "%tt0"; break;
1360 case 3: name
= "%tt1"; break;
1361 case 0x10: name
= "%tc"; break;
1362 case 0x11: name
= "%drp"; break;
1363 case 0x12: name
= "%srp"; break;
1364 case 0x13: name
= "%crp"; break;
1365 case 0x14: name
= "%cal"; break;
1366 case 0x15: name
= "%val"; break;
1367 case 0x16: name
= "%scc"; break;
1368 case 0x17: name
= "%ac"; break;
1369 case 0x18: name
= "%psr"; break;
1370 case 0x19: name
= "%pcsr"; break;
1374 int break_reg
= ((buffer
[3] >> 2) & 7);
1376 (*info
->fprintf_styled_func
)
1377 (info
->stream
, dis_style_register
,
1378 val
== 0x1c ? "%%bad%d" : "%%bac%d", break_reg
);
1382 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
1383 "<mmu register %d>", val
);
1386 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1397 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1400 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
,
1403 /* xgettext:c-format */
1404 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_text
,
1405 _("<function code %d>"), fc
);
1410 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%%val");
1417 FETCH_ARG (3, level
);
1418 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_immediate
,
1434 (*info
->fprintf_styled_func
) (info
->stream
, dis_style_register
, "%s%s",
1435 reg_half_names
[reg
],
1436 is_upper
? "u" : "l");
1441 return PRINT_INSN_ARG_INVALID_OP_TABLE
;
1447 /* Return the insn type determined from the opcode information. */
1449 static enum dis_insn_type
1450 m68k_opcode_to_insn_type (const struct m68k_opcode
*opc
)
1452 /* All branches have an operand in 'B' format (the 'B' place only comes
1453 with the 'B' format). */
1454 if (strchr (opc
->args
, 'B') == NULL
)
1455 return dis_nonbranch
;
1457 /* Most branches are conditional branches, detect the ones that aren't
1458 from the opcode name. */
1459 if (strncmp (opc
->name
, "bra", 3) == 0)
1462 if (strncmp (opc
->name
, "bsr", 3) == 0)
1465 return dis_condbranch
;
1468 /* Try to match the current instruction to best and if so, return the
1469 number of bytes consumed from the instruction stream, else zero.
1470 Return -1 on memory error. */
1473 match_insn_m68k (bfd_vma memaddr
,
1474 disassemble_info
* info
,
1475 const struct m68k_opcode
* best
)
1477 unsigned char *save_p
;
1480 const char *args
= best
->args
;
1482 struct private *priv
= (struct private *) info
->private_data
;
1483 bfd_byte
*buffer
= priv
->the_buffer
;
1484 fprintf_styled_ftype save_printer
= info
->fprintf_styled_func
;
1485 void (* save_print_address
) (bfd_vma
, struct disassemble_info
*)
1486 = info
->print_address_func
;
1491 /* Point at first word of argument data,
1492 and at descriptor for first argument. */
1495 /* Figure out how long the fixed-size portion of the instruction is.
1496 The only place this is stored in the opcode table is
1497 in the arguments--look for arguments which specify fields in the 2nd
1498 or 3rd words of the instruction. */
1499 for (d
= args
; *d
; d
+= 2)
1501 /* I don't think it is necessary to be checking d[0] here;
1502 I suspect all this could be moved to the case statement below. */
1505 if (d
[1] == 'l' && p
- buffer
< 6)
1507 else if (p
- buffer
< 4 && d
[1] != 'C' && d
[1] != '8')
1511 if ((d
[0] == 'L' || d
[0] == 'l') && d
[1] == 'w' && p
- buffer
< 4)
1537 /* pflusha is an exceptions. It takes no arguments but is two words
1538 long. Recognize it by looking at the lower 16 bits of the mask. */
1539 if (p
- buffer
< 4 && (best
->match
& 0xFFFF) != 0)
1542 /* lpstop is another exception. It takes a one word argument but is
1543 three words long. */
1545 && (best
->match
& 0xffff) == 0xffff
1549 /* Copy the one word argument into the usual location for a one
1550 word argument, to simplify printing it. We can get away with
1551 this because we know exactly what the second word is, and we
1552 aren't going to print anything based on it. */
1554 if (!FETCH_DATA (info
, p
))
1556 buffer
[2] = buffer
[4];
1557 buffer
[3] = buffer
[5];
1560 if (!FETCH_DATA (info
, p
))
1564 info
->print_address_func
= dummy_print_address
;
1565 info
->fprintf_styled_func
= dummy_printer
;
1567 /* We scan the operands twice. The first time we don't print anything,
1568 but look for errors. */
1569 for (d
= args
; *d
; d
+= 2)
1571 int eaten
= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1575 else if (eaten
== PRINT_INSN_ARG_INVALID_OPERAND
1576 || eaten
== PRINT_INSN_ARG_MEMORY_ERROR
)
1578 info
->fprintf_styled_func
= save_printer
;
1579 info
->print_address_func
= save_print_address
;
1580 return eaten
== PRINT_INSN_ARG_MEMORY_ERROR
? -1 : 0;
1584 /* We must restore the print functions before trying to print the
1586 info
->fprintf_styled_func
= save_printer
;
1587 info
->print_address_func
= save_print_address
;
1588 info
->fprintf_styled_func (info
->stream
, dis_style_text
,
1589 /* xgettext:c-format */
1590 _("<internal error in opcode table: %s %s>\n"),
1591 best
->name
, best
->args
);
1597 info
->fprintf_styled_func
= save_printer
;
1598 info
->print_address_func
= save_print_address
;
1599 info
->insn_type
= m68k_opcode_to_insn_type (best
);
1603 info
->fprintf_styled_func (info
->stream
, dis_style_mnemonic
, "%s", best
->name
);
1606 info
->fprintf_styled_func (info
->stream
, dis_style_text
, " ");
1610 p
+= print_insn_arg (d
, buffer
, p
, memaddr
+ (p
- buffer
), info
);
1613 if (*d
&& *(d
- 2) != 'I' && *d
!= 'k')
1614 info
->fprintf_styled_func (info
->stream
, dis_style_text
, ",");
1620 /* Try to interpret the instruction at address MEMADDR as one that
1621 can execute on a processor with the features given by ARCH_MASK.
1622 If successful, print the instruction to INFO->STREAM and return
1623 its length in bytes. Return 0 otherwise. Return -1 on memory
1627 m68k_scan_mask (bfd_vma memaddr
, disassemble_info
*info
,
1628 unsigned int arch_mask
)
1632 static const struct m68k_opcode
**opcodes
[16];
1633 static int numopcodes
[16];
1637 struct private *priv
= (struct private *) info
->private_data
;
1638 bfd_byte
*buffer
= priv
->the_buffer
;
1642 /* Speed up the matching by sorting the opcode
1643 table on the upper four bits of the opcode. */
1644 const struct m68k_opcode
**opc_pointer
[16];
1646 /* First count how many opcodes are in each of the sixteen buckets. */
1647 for (i
= 0; i
< m68k_numopcodes
; i
++)
1648 numopcodes
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++;
1650 /* Then create a sorted table of pointers
1651 that point into the unsorted table. */
1652 opc_pointer
[0] = xmalloc (sizeof (struct m68k_opcode
*)
1654 opcodes
[0] = opc_pointer
[0];
1656 for (i
= 1; i
< 16; i
++)
1658 opc_pointer
[i
] = opc_pointer
[i
- 1] + numopcodes
[i
- 1];
1659 opcodes
[i
] = opc_pointer
[i
];
1662 for (i
= 0; i
< m68k_numopcodes
; i
++)
1663 *opc_pointer
[(m68k_opcodes
[i
].opcode
>> 28) & 15]++ = &m68k_opcodes
[i
];
1666 if (!FETCH_DATA (info
, buffer
+ 2))
1668 major_opcode
= (buffer
[0] >> 4) & 15;
1670 for (i
= 0; i
< numopcodes
[major_opcode
]; i
++)
1672 const struct m68k_opcode
*opc
= opcodes
[major_opcode
][i
];
1673 unsigned long opcode
= opc
->opcode
;
1674 unsigned long match
= opc
->match
;
1675 const char *args
= opc
->args
;
1680 if (((0xff & buffer
[0] & (match
>> 24)) == (0xff & (opcode
>> 24)))
1681 && ((0xff & buffer
[1] & (match
>> 16)) == (0xff & (opcode
>> 16)))
1682 /* Only fetch the next two bytes if we need to. */
1683 && (((0xffff & match
) == 0)
1685 (FETCH_DATA (info
, buffer
+ 4)
1686 && ((0xff & buffer
[2] & (match
>> 8)) == (0xff & (opcode
>> 8)))
1687 && ((0xff & buffer
[3] & match
) == (0xff & opcode
)))
1689 && (opc
->arch
& arch_mask
) != 0)
1691 /* Don't use for printout the variants of divul and divsl
1692 that have the same register number in two places.
1693 The more general variants will match instead. */
1694 for (d
= args
; *d
; d
+= 2)
1698 /* Don't use for printout the variants of most floating
1699 point coprocessor instructions which use the same
1700 register number in two places, as above. */
1702 for (d
= args
; *d
; d
+= 2)
1706 /* Don't match fmovel with more than one register;
1707 wait for fmoveml. */
1710 for (d
= args
; *d
; d
+= 2)
1712 if (d
[0] == 's' && d
[1] == '8')
1714 val
= fetch_arg (buffer
, d
[1], 3, info
);
1717 if ((val
& (val
- 1)) != 0)
1723 /* Don't match FPU insns with non-default coprocessor ID. */
1726 for (d
= args
; *d
; d
+= 2)
1730 val
= fetch_arg (buffer
, 'd', 3, info
);
1738 if ((val
= match_insn_m68k (memaddr
, info
, opc
)))
1745 /* Print the m68k instruction at address MEMADDR in debugged memory,
1746 on INFO->STREAM. Returns length of the instruction, in bytes. */
1749 print_insn_m68k (bfd_vma memaddr
, disassemble_info
*info
)
1751 unsigned int arch_mask
;
1752 struct private priv
;
1755 bfd_byte
*buffer
= priv
.the_buffer
;
1757 info
->insn_info_valid
= 1;
1758 info
->private_data
= & priv
;
1759 /* Tell objdump to use two bytes per chunk
1760 and six bytes per line for displaying raw data. */
1761 info
->bytes_per_chunk
= 2;
1762 info
->bytes_per_line
= 6;
1763 info
->display_endian
= BFD_ENDIAN_BIG
;
1764 priv
.max_fetched
= priv
.the_buffer
;
1765 priv
.insn_start
= memaddr
;
1767 arch_mask
= bfd_m68k_mach_to_features (info
->mach
);
1770 /* First try printing an m680x0 instruction. Try printing a Coldfire
1771 one if that fails. */
1772 val
= m68k_scan_mask (memaddr
, info
, m68k_mask
);
1774 val
= m68k_scan_mask (memaddr
, info
, mcf_mask
);
1778 val
= m68k_scan_mask (memaddr
, info
, arch_mask
);
1783 /* Handle undefined instructions. */
1784 info
->fprintf_styled_func (info
->stream
, dis_style_assembler_directive
,
1786 info
->fprintf_styled_func (info
->stream
, dis_style_text
, " ");
1787 info
->fprintf_styled_func (info
->stream
, dis_style_immediate
,
1788 "0x%04x", (buffer
[0] << 8) + buffer
[1]);
1790 info
->insn_type
= dis_noninsn
;
1793 return val
? val
: 2;