1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode header for mt.
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 Copyright (C) 1996-2024 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
35 /* Check applicability of instructions against machines. */
36 #define CGEN_VALIDATE_INSN_SUPPORTED
38 /* Allows reason codes to be output when assembler errors occur. */
39 #define CGEN_VERBOSE_ASSEMBLER_ERRORS
41 /* Override disassembly hashing - there are variable bits in the top
42 byte of these instructions. */
43 #define CGEN_DIS_HASH_SIZE 8
44 #define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
46 #define CGEN_ASM_HASH_SIZE 127
47 #define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
49 extern unsigned int mt_asm_hash (const char *);
51 extern int mt_cgen_insn_supported (CGEN_CPU_DESC
, const CGEN_INSN
*);
55 /* Enum declaration for mt instruction types. */
56 typedef enum cgen_insn_type
{
57 MT_INSN_INVALID
, MT_INSN_ADD
, MT_INSN_ADDU
, MT_INSN_ADDI
58 , MT_INSN_ADDUI
, MT_INSN_SUB
, MT_INSN_SUBU
, MT_INSN_SUBI
59 , MT_INSN_SUBUI
, MT_INSN_MUL
, MT_INSN_MULI
, MT_INSN_AND
60 , MT_INSN_ANDI
, MT_INSN_OR
, MT_INSN_NOP
, MT_INSN_ORI
61 , MT_INSN_XOR
, MT_INSN_XORI
, MT_INSN_NAND
, MT_INSN_NANDI
62 , MT_INSN_NOR
, MT_INSN_NORI
, MT_INSN_XNOR
, MT_INSN_XNORI
63 , MT_INSN_LDUI
, MT_INSN_LSL
, MT_INSN_LSLI
, MT_INSN_LSR
64 , MT_INSN_LSRI
, MT_INSN_ASR
, MT_INSN_ASRI
, MT_INSN_BRLT
65 , MT_INSN_BRLE
, MT_INSN_BREQ
, MT_INSN_BRNE
, MT_INSN_JMP
66 , MT_INSN_JAL
, MT_INSN_DBNZ
, MT_INSN_EI
, MT_INSN_DI
67 , MT_INSN_SI
, MT_INSN_RETI
, MT_INSN_LDW
, MT_INSN_STW
68 , MT_INSN_BREAK
, MT_INSN_IFLUSH
, MT_INSN_LDCTXT
, MT_INSN_LDFB
69 , MT_INSN_STFB
, MT_INSN_FBCB
, MT_INSN_MFBCB
, MT_INSN_FBCCI
70 , MT_INSN_FBRCI
, MT_INSN_FBCRI
, MT_INSN_FBRRI
, MT_INSN_MFBCCI
71 , MT_INSN_MFBRCI
, MT_INSN_MFBCRI
, MT_INSN_MFBRRI
, MT_INSN_FBCBDR
72 , MT_INSN_RCFBCB
, MT_INSN_MRCFBCB
, MT_INSN_CBCAST
, MT_INSN_DUPCBCAST
73 , MT_INSN_WFBI
, MT_INSN_WFB
, MT_INSN_RCRISC
, MT_INSN_FBCBINC
74 , MT_INSN_RCXMODE
, MT_INSN_INTERLEAVER
, MT_INSN_WFBINC
, MT_INSN_MWFBINC
75 , MT_INSN_WFBINCR
, MT_INSN_MWFBINCR
, MT_INSN_FBCBINCS
, MT_INSN_MFBCBINCS
76 , MT_INSN_FBCBINCRS
, MT_INSN_MFBCBINCRS
, MT_INSN_LOOP
, MT_INSN_LOOPI
77 , MT_INSN_DFBC
, MT_INSN_DWFB
, MT_INSN_FBWFB
, MT_INSN_DFBR
80 /* Index of `invalid' insn place holder. */
81 #define CGEN_INSN_INVALID MT_INSN_INVALID
83 /* Total number of insns in table. */
84 #define MAX_INSNS ((int) MT_INSN_DFBR + 1)
86 /* This struct records data prior to insertion or after extraction. */
170 #define CGEN_INIT_PARSE(od) \
173 #define CGEN_INIT_INSERT(od) \
176 #define CGEN_INIT_EXTRACT(od) \
179 #define CGEN_INIT_PRINT(od) \
188 #endif /* MT_OPC_H */