sim/cris/semcrisv10f-switch.c

   1 /* Simulator instruction semantics for crisv10f.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996-2024 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, write to the Free Software Foundation, Inc.,
  21    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26
  27   /* The labels have the case they have because the enum of insn types
  28      is all uppercase and in the non-stdc case the insn symbol is built
  29      into the enum name.  */
  30
  31   static struct {
  32     int index;
  33     void *label;
  34   } labels[] = {
  35     { CRISV10F_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
  36     { CRISV10F_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
  37     { CRISV10F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
  38     { CRISV10F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
  39     { CRISV10F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
  40     { CRISV10F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
  41     { CRISV10F_INSN_NOP, && case_sem_INSN_NOP },
  42     { CRISV10F_INSN_MOVE_B_R, && case_sem_INSN_MOVE_B_R },
  43     { CRISV10F_INSN_MOVE_W_R, && case_sem_INSN_MOVE_W_R },
  44     { CRISV10F_INSN_MOVE_D_R, && case_sem_INSN_MOVE_D_R },
  45     { CRISV10F_INSN_MOVEPCR, && case_sem_INSN_MOVEPCR },
  46     { CRISV10F_INSN_MOVEQ, && case_sem_INSN_MOVEQ },
  47     { CRISV10F_INSN_MOVS_B_R, && case_sem_INSN_MOVS_B_R },
  48     { CRISV10F_INSN_MOVS_W_R, && case_sem_INSN_MOVS_W_R },
  49     { CRISV10F_INSN_MOVU_B_R, && case_sem_INSN_MOVU_B_R },
  50     { CRISV10F_INSN_MOVU_W_R, && case_sem_INSN_MOVU_W_R },
  51     { CRISV10F_INSN_MOVECBR, && case_sem_INSN_MOVECBR },
  52     { CRISV10F_INSN_MOVECWR, && case_sem_INSN_MOVECWR },
  53     { CRISV10F_INSN_MOVECDR, && case_sem_INSN_MOVECDR },
  54     { CRISV10F_INSN_MOVSCBR, && case_sem_INSN_MOVSCBR },
  55     { CRISV10F_INSN_MOVSCWR, && case_sem_INSN_MOVSCWR },
  56     { CRISV10F_INSN_MOVUCBR, && case_sem_INSN_MOVUCBR },
  57     { CRISV10F_INSN_MOVUCWR, && case_sem_INSN_MOVUCWR },
  58     { CRISV10F_INSN_ADDQ, && case_sem_INSN_ADDQ },
  59     { CRISV10F_INSN_SUBQ, && case_sem_INSN_SUBQ },
  60     { CRISV10F_INSN_CMP_R_B_R, && case_sem_INSN_CMP_R_B_R },
  61     { CRISV10F_INSN_CMP_R_W_R, && case_sem_INSN_CMP_R_W_R },
  62     { CRISV10F_INSN_CMP_R_D_R, && case_sem_INSN_CMP_R_D_R },
  63     { CRISV10F_INSN_CMP_M_B_M, && case_sem_INSN_CMP_M_B_M },
  64     { CRISV10F_INSN_CMP_M_W_M, && case_sem_INSN_CMP_M_W_M },
  65     { CRISV10F_INSN_CMP_M_D_M, && case_sem_INSN_CMP_M_D_M },
  66     { CRISV10F_INSN_CMPCBR, && case_sem_INSN_CMPCBR },
  67     { CRISV10F_INSN_CMPCWR, && case_sem_INSN_CMPCWR },
  68     { CRISV10F_INSN_CMPCDR, && case_sem_INSN_CMPCDR },
  69     { CRISV10F_INSN_CMPQ, && case_sem_INSN_CMPQ },
  70     { CRISV10F_INSN_CMPS_M_B_M, && case_sem_INSN_CMPS_M_B_M },
  71     { CRISV10F_INSN_CMPS_M_W_M, && case_sem_INSN_CMPS_M_W_M },
  72     { CRISV10F_INSN_CMPSCBR, && case_sem_INSN_CMPSCBR },
  73     { CRISV10F_INSN_CMPSCWR, && case_sem_INSN_CMPSCWR },
  74     { CRISV10F_INSN_CMPU_M_B_M, && case_sem_INSN_CMPU_M_B_M },
  75     { CRISV10F_INSN_CMPU_M_W_M, && case_sem_INSN_CMPU_M_W_M },
  76     { CRISV10F_INSN_CMPUCBR, && case_sem_INSN_CMPUCBR },
  77     { CRISV10F_INSN_CMPUCWR, && case_sem_INSN_CMPUCWR },
  78     { CRISV10F_INSN_MOVE_M_B_M, && case_sem_INSN_MOVE_M_B_M },
  79     { CRISV10F_INSN_MOVE_M_W_M, && case_sem_INSN_MOVE_M_W_M },
  80     { CRISV10F_INSN_MOVE_M_D_M, && case_sem_INSN_MOVE_M_D_M },
  81     { CRISV10F_INSN_MOVS_M_B_M, && case_sem_INSN_MOVS_M_B_M },
  82     { CRISV10F_INSN_MOVS_M_W_M, && case_sem_INSN_MOVS_M_W_M },
  83     { CRISV10F_INSN_MOVU_M_B_M, && case_sem_INSN_MOVU_M_B_M },
  84     { CRISV10F_INSN_MOVU_M_W_M, && case_sem_INSN_MOVU_M_W_M },
  85     { CRISV10F_INSN_MOVE_R_SPRV10, && case_sem_INSN_MOVE_R_SPRV10 },
  86     { CRISV10F_INSN_MOVE_SPR_RV10, && case_sem_INSN_MOVE_SPR_RV10 },
  87     { CRISV10F_INSN_RET_TYPE, && case_sem_INSN_RET_TYPE },
  88     { CRISV10F_INSN_MOVE_M_SPRV10, && case_sem_INSN_MOVE_M_SPRV10 },
  89     { CRISV10F_INSN_MOVE_C_SPRV10_P5, && case_sem_INSN_MOVE_C_SPRV10_P5 },
  90     { CRISV10F_INSN_MOVE_C_SPRV10_P9, && case_sem_INSN_MOVE_C_SPRV10_P9 },
  91     { CRISV10F_INSN_MOVE_C_SPRV10_P10, && case_sem_INSN_MOVE_C_SPRV10_P10 },
  92     { CRISV10F_INSN_MOVE_C_SPRV10_P11, && case_sem_INSN_MOVE_C_SPRV10_P11 },
  93     { CRISV10F_INSN_MOVE_C_SPRV10_P12, && case_sem_INSN_MOVE_C_SPRV10_P12 },
  94     { CRISV10F_INSN_MOVE_C_SPRV10_P13, && case_sem_INSN_MOVE_C_SPRV10_P13 },
  95     { CRISV10F_INSN_MOVE_C_SPRV10_P7, && case_sem_INSN_MOVE_C_SPRV10_P7 },
  96     { CRISV10F_INSN_MOVE_C_SPRV10_P14, && case_sem_INSN_MOVE_C_SPRV10_P14 },
  97     { CRISV10F_INSN_MOVE_C_SPRV10_P15, && case_sem_INSN_MOVE_C_SPRV10_P15 },
  98     { CRISV10F_INSN_MOVE_SPR_MV10, && case_sem_INSN_MOVE_SPR_MV10 },
  99     { CRISV10F_INSN_SBFS, && case_sem_INSN_SBFS },
 100     { CRISV10F_INSN_MOVEM_R_M, && case_sem_INSN_MOVEM_R_M },
 101     { CRISV10F_INSN_MOVEM_M_R, && case_sem_INSN_MOVEM_M_R },
 102     { CRISV10F_INSN_MOVEM_M_PC, && case_sem_INSN_MOVEM_M_PC },
 103     { CRISV10F_INSN_ADD_B_R, && case_sem_INSN_ADD_B_R },
 104     { CRISV10F_INSN_ADD_W_R, && case_sem_INSN_ADD_W_R },
 105     { CRISV10F_INSN_ADD_D_R, && case_sem_INSN_ADD_D_R },
 106     { CRISV10F_INSN_ADD_M_B_M, && case_sem_INSN_ADD_M_B_M },
 107     { CRISV10F_INSN_ADD_M_W_M, && case_sem_INSN_ADD_M_W_M },
 108     { CRISV10F_INSN_ADD_M_D_M, && case_sem_INSN_ADD_M_D_M },
 109     { CRISV10F_INSN_ADDCBR, && case_sem_INSN_ADDCBR },
 110     { CRISV10F_INSN_ADDCWR, && case_sem_INSN_ADDCWR },
 111     { CRISV10F_INSN_ADDCDR, && case_sem_INSN_ADDCDR },
 112     { CRISV10F_INSN_ADDCPC, && case_sem_INSN_ADDCPC },
 113     { CRISV10F_INSN_ADDS_B_R, && case_sem_INSN_ADDS_B_R },
 114     { CRISV10F_INSN_ADDS_W_R, && case_sem_INSN_ADDS_W_R },
 115     { CRISV10F_INSN_ADDS_M_B_M, && case_sem_INSN_ADDS_M_B_M },
 116     { CRISV10F_INSN_ADDS_M_W_M, && case_sem_INSN_ADDS_M_W_M },
 117     { CRISV10F_INSN_ADDSCBR, && case_sem_INSN_ADDSCBR },
 118     { CRISV10F_INSN_ADDSCWR, && case_sem_INSN_ADDSCWR },
 119     { CRISV10F_INSN_ADDSPCPC, && case_sem_INSN_ADDSPCPC },
 120     { CRISV10F_INSN_ADDU_B_R, && case_sem_INSN_ADDU_B_R },
 121     { CRISV10F_INSN_ADDU_W_R, && case_sem_INSN_ADDU_W_R },
 122     { CRISV10F_INSN_ADDU_M_B_M, && case_sem_INSN_ADDU_M_B_M },
 123     { CRISV10F_INSN_ADDU_M_W_M, && case_sem_INSN_ADDU_M_W_M },
 124     { CRISV10F_INSN_ADDUCBR, && case_sem_INSN_ADDUCBR },
 125     { CRISV10F_INSN_ADDUCWR, && case_sem_INSN_ADDUCWR },
 126     { CRISV10F_INSN_SUB_B_R, && case_sem_INSN_SUB_B_R },
 127     { CRISV10F_INSN_SUB_W_R, && case_sem_INSN_SUB_W_R },
 128     { CRISV10F_INSN_SUB_D_R, && case_sem_INSN_SUB_D_R },
 129     { CRISV10F_INSN_SUB_M_B_M, && case_sem_INSN_SUB_M_B_M },
 130     { CRISV10F_INSN_SUB_M_W_M, && case_sem_INSN_SUB_M_W_M },
 131     { CRISV10F_INSN_SUB_M_D_M, && case_sem_INSN_SUB_M_D_M },
 132     { CRISV10F_INSN_SUBCBR, && case_sem_INSN_SUBCBR },
 133     { CRISV10F_INSN_SUBCWR, && case_sem_INSN_SUBCWR },
 134     { CRISV10F_INSN_SUBCDR, && case_sem_INSN_SUBCDR },
 135     { CRISV10F_INSN_SUBS_B_R, && case_sem_INSN_SUBS_B_R },
 136     { CRISV10F_INSN_SUBS_W_R, && case_sem_INSN_SUBS_W_R },
 137     { CRISV10F_INSN_SUBS_M_B_M, && case_sem_INSN_SUBS_M_B_M },
 138     { CRISV10F_INSN_SUBS_M_W_M, && case_sem_INSN_SUBS_M_W_M },
 139     { CRISV10F_INSN_SUBSCBR, && case_sem_INSN_SUBSCBR },
 140     { CRISV10F_INSN_SUBSCWR, && case_sem_INSN_SUBSCWR },
 141     { CRISV10F_INSN_SUBU_B_R, && case_sem_INSN_SUBU_B_R },
 142     { CRISV10F_INSN_SUBU_W_R, && case_sem_INSN_SUBU_W_R },
 143     { CRISV10F_INSN_SUBU_M_B_M, && case_sem_INSN_SUBU_M_B_M },
 144     { CRISV10F_INSN_SUBU_M_W_M, && case_sem_INSN_SUBU_M_W_M },
 145     { CRISV10F_INSN_SUBUCBR, && case_sem_INSN_SUBUCBR },
 146     { CRISV10F_INSN_SUBUCWR, && case_sem_INSN_SUBUCWR },
 147     { CRISV10F_INSN_ADDI_B_R, && case_sem_INSN_ADDI_B_R },
 148     { CRISV10F_INSN_ADDI_W_R, && case_sem_INSN_ADDI_W_R },
 149     { CRISV10F_INSN_ADDI_D_R, && case_sem_INSN_ADDI_D_R },
 150     { CRISV10F_INSN_NEG_B_R, && case_sem_INSN_NEG_B_R },
 151     { CRISV10F_INSN_NEG_W_R, && case_sem_INSN_NEG_W_R },
 152     { CRISV10F_INSN_NEG_D_R, && case_sem_INSN_NEG_D_R },
 153     { CRISV10F_INSN_TEST_M_B_M, && case_sem_INSN_TEST_M_B_M },
 154     { CRISV10F_INSN_TEST_M_W_M, && case_sem_INSN_TEST_M_W_M },
 155     { CRISV10F_INSN_TEST_M_D_M, && case_sem_INSN_TEST_M_D_M },
 156     { CRISV10F_INSN_MOVE_R_M_B_M, && case_sem_INSN_MOVE_R_M_B_M },
 157     { CRISV10F_INSN_MOVE_R_M_W_M, && case_sem_INSN_MOVE_R_M_W_M },
 158     { CRISV10F_INSN_MOVE_R_M_D_M, && case_sem_INSN_MOVE_R_M_D_M },
 159     { CRISV10F_INSN_MULS_B, && case_sem_INSN_MULS_B },
 160     { CRISV10F_INSN_MULS_W, && case_sem_INSN_MULS_W },
 161     { CRISV10F_INSN_MULS_D, && case_sem_INSN_MULS_D },
 162     { CRISV10F_INSN_MULU_B, && case_sem_INSN_MULU_B },
 163     { CRISV10F_INSN_MULU_W, && case_sem_INSN_MULU_W },
 164     { CRISV10F_INSN_MULU_D, && case_sem_INSN_MULU_D },
 165     { CRISV10F_INSN_MSTEP, && case_sem_INSN_MSTEP },
 166     { CRISV10F_INSN_DSTEP, && case_sem_INSN_DSTEP },
 167     { CRISV10F_INSN_ABS, && case_sem_INSN_ABS },
 168     { CRISV10F_INSN_AND_B_R, && case_sem_INSN_AND_B_R },
 169     { CRISV10F_INSN_AND_W_R, && case_sem_INSN_AND_W_R },
 170     { CRISV10F_INSN_AND_D_R, && case_sem_INSN_AND_D_R },
 171     { CRISV10F_INSN_AND_M_B_M, && case_sem_INSN_AND_M_B_M },
 172     { CRISV10F_INSN_AND_M_W_M, && case_sem_INSN_AND_M_W_M },
 173     { CRISV10F_INSN_AND_M_D_M, && case_sem_INSN_AND_M_D_M },
 174     { CRISV10F_INSN_ANDCBR, && case_sem_INSN_ANDCBR },
 175     { CRISV10F_INSN_ANDCWR, && case_sem_INSN_ANDCWR },
 176     { CRISV10F_INSN_ANDCDR, && case_sem_INSN_ANDCDR },
 177     { CRISV10F_INSN_ANDQ, && case_sem_INSN_ANDQ },
 178     { CRISV10F_INSN_ORR_B_R, && case_sem_INSN_ORR_B_R },
 179     { CRISV10F_INSN_ORR_W_R, && case_sem_INSN_ORR_W_R },
 180     { CRISV10F_INSN_ORR_D_R, && case_sem_INSN_ORR_D_R },
 181     { CRISV10F_INSN_OR_M_B_M, && case_sem_INSN_OR_M_B_M },
 182     { CRISV10F_INSN_OR_M_W_M, && case_sem_INSN_OR_M_W_M },
 183     { CRISV10F_INSN_OR_M_D_M, && case_sem_INSN_OR_M_D_M },
 184     { CRISV10F_INSN_ORCBR, && case_sem_INSN_ORCBR },
 185     { CRISV10F_INSN_ORCWR, && case_sem_INSN_ORCWR },
 186     { CRISV10F_INSN_ORCDR, && case_sem_INSN_ORCDR },
 187     { CRISV10F_INSN_ORQ, && case_sem_INSN_ORQ },
 188     { CRISV10F_INSN_XOR, && case_sem_INSN_XOR },
 189     { CRISV10F_INSN_SWAP, && case_sem_INSN_SWAP },
 190     { CRISV10F_INSN_ASRR_B_R, && case_sem_INSN_ASRR_B_R },
 191     { CRISV10F_INSN_ASRR_W_R, && case_sem_INSN_ASRR_W_R },
 192     { CRISV10F_INSN_ASRR_D_R, && case_sem_INSN_ASRR_D_R },
 193     { CRISV10F_INSN_ASRQ, && case_sem_INSN_ASRQ },
 194     { CRISV10F_INSN_LSRR_B_R, && case_sem_INSN_LSRR_B_R },
 195     { CRISV10F_INSN_LSRR_W_R, && case_sem_INSN_LSRR_W_R },
 196     { CRISV10F_INSN_LSRR_D_R, && case_sem_INSN_LSRR_D_R },
 197     { CRISV10F_INSN_LSRQ, && case_sem_INSN_LSRQ },
 198     { CRISV10F_INSN_LSLR_B_R, && case_sem_INSN_LSLR_B_R },
 199     { CRISV10F_INSN_LSLR_W_R, && case_sem_INSN_LSLR_W_R },
 200     { CRISV10F_INSN_LSLR_D_R, && case_sem_INSN_LSLR_D_R },
 201     { CRISV10F_INSN_LSLQ, && case_sem_INSN_LSLQ },
 202     { CRISV10F_INSN_BTST, && case_sem_INSN_BTST },
 203     { CRISV10F_INSN_BTSTQ, && case_sem_INSN_BTSTQ },
 204     { CRISV10F_INSN_SETF, && case_sem_INSN_SETF },
 205     { CRISV10F_INSN_CLEARF, && case_sem_INSN_CLEARF },
 206     { CRISV10F_INSN_BCC_B, && case_sem_INSN_BCC_B },
 207     { CRISV10F_INSN_BA_B, && case_sem_INSN_BA_B },
 208     { CRISV10F_INSN_BCC_W, && case_sem_INSN_BCC_W },
 209     { CRISV10F_INSN_BA_W, && case_sem_INSN_BA_W },
 210     { CRISV10F_INSN_JUMP_R, && case_sem_INSN_JUMP_R },
 211     { CRISV10F_INSN_JUMP_M, && case_sem_INSN_JUMP_M },
 212     { CRISV10F_INSN_JUMP_C, && case_sem_INSN_JUMP_C },
 213     { CRISV10F_INSN_BREAK, && case_sem_INSN_BREAK },
 214     { CRISV10F_INSN_BOUND_R_B_R, && case_sem_INSN_BOUND_R_B_R },
 215     { CRISV10F_INSN_BOUND_R_W_R, && case_sem_INSN_BOUND_R_W_R },
 216     { CRISV10F_INSN_BOUND_R_D_R, && case_sem_INSN_BOUND_R_D_R },
 217     { CRISV10F_INSN_BOUND_M_B_M, && case_sem_INSN_BOUND_M_B_M },
 218     { CRISV10F_INSN_BOUND_M_W_M, && case_sem_INSN_BOUND_M_W_M },
 219     { CRISV10F_INSN_BOUND_M_D_M, && case_sem_INSN_BOUND_M_D_M },
 220     { CRISV10F_INSN_BOUND_CB, && case_sem_INSN_BOUND_CB },
 221     { CRISV10F_INSN_BOUND_CW, && case_sem_INSN_BOUND_CW },
 222     { CRISV10F_INSN_BOUND_CD, && case_sem_INSN_BOUND_CD },
 223     { CRISV10F_INSN_SCC, && case_sem_INSN_SCC },
 224     { CRISV10F_INSN_LZ, && case_sem_INSN_LZ },
 225     { CRISV10F_INSN_ADDOQ, && case_sem_INSN_ADDOQ },
 226     { CRISV10F_INSN_BDAPQPC, && case_sem_INSN_BDAPQPC },
 227     { CRISV10F_INSN_BDAP_32_PC, && case_sem_INSN_BDAP_32_PC },
 228     { CRISV10F_INSN_MOVE_M_PCPLUS_P0, && case_sem_INSN_MOVE_M_PCPLUS_P0 },
 229     { CRISV10F_INSN_MOVE_M_SPPLUS_P8, && case_sem_INSN_MOVE_M_SPPLUS_P8 },
 230     { CRISV10F_INSN_ADDO_M_B_M, && case_sem_INSN_ADDO_M_B_M },
 231     { CRISV10F_INSN_ADDO_M_W_M, && case_sem_INSN_ADDO_M_W_M },
 232     { CRISV10F_INSN_ADDO_M_D_M, && case_sem_INSN_ADDO_M_D_M },
 233     { CRISV10F_INSN_ADDO_CB, && case_sem_INSN_ADDO_CB },
 234     { CRISV10F_INSN_ADDO_CW, && case_sem_INSN_ADDO_CW },
 235     { CRISV10F_INSN_ADDO_CD, && case_sem_INSN_ADDO_CD },
 236     { CRISV10F_INSN_DIP_M, && case_sem_INSN_DIP_M },
 237     { CRISV10F_INSN_DIP_C, && case_sem_INSN_DIP_C },
 238     { CRISV10F_INSN_ADDI_ACR_B_R, && case_sem_INSN_ADDI_ACR_B_R },
 239     { CRISV10F_INSN_ADDI_ACR_W_R, && case_sem_INSN_ADDI_ACR_W_R },
 240     { CRISV10F_INSN_ADDI_ACR_D_R, && case_sem_INSN_ADDI_ACR_D_R },
 241     { CRISV10F_INSN_BIAP_PC_B_R, && case_sem_INSN_BIAP_PC_B_R },
 242     { CRISV10F_INSN_BIAP_PC_W_R, && case_sem_INSN_BIAP_PC_W_R },
 243     { CRISV10F_INSN_BIAP_PC_D_R, && case_sem_INSN_BIAP_PC_D_R },
 244     { 0, 0 }
 245   };
 246   int i;
 247
 248   for (i = 0; labels[i].label != 0; ++i)
 249     {
 250 #if FAST_P
 251       CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 252 #else
 253       CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 254 #endif
 255     }
 256
 257 #undef DEFINE_LABELS
 258 #endif /* DEFINE_LABELS */
 259
 260 #ifdef DEFINE_SWITCH
 261
 262 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 263    off frills like tracing and profiling.  */
 264 /* FIXME: A better way would be to have CGEN_TRACE_RESULT check for something
 265    that can cause it to be optimized out.  Another way would be to emit
 266    special handlers into the instruction "stream".  */
 267
 268 #if FAST_P
 269 #undef CGEN_TRACE_RESULT
 270 #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val)
 271 #endif
 272
 273 #undef GET_ATTR
 274 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 275
 276 {
 277
 278 #if WITH_SCACHE_PBB
 279
 280 /* Branch to next handler without going around main loop.  */
 281 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
 282 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 283
 284 #else /* ! WITH_SCACHE_PBB */
 285
 286 #define NEXT(vpc) BREAK (sem)
 287 #ifdef __GNUC__
 288 #if FAST_P
 289   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
 290 #else
 291   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
 292 #endif
 293 #else
 294   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
 295 #endif
 296
 297 #endif /* ! WITH_SCACHE_PBB */
 298
 299     {
 300
 301   CASE (sem, INSN_X_INVALID) : /* --invalid-- */
 302 {
 303   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 304   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 305 #define FLD(f) abuf->fields.sfmt_empty.f
 306   int UNUSED written = 0;
 307   IADDR UNUSED pc = abuf->addr;
 308   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 309
 310   {
 311     /* Update the recorded pc in the cpu state struct.
 312        Only necessary for WITH_SCACHE case, but to avoid the
 313        conditional compilation ....  */
 314     SET_H_PC (pc);
 315     /* Virtual insns have zero size.  Overwrite vpc with address of next insn
 316        using the default-insn-bitsize spec.  When executing insns in parallel
 317        we may want to queue the fault and continue execution.  */
 318     vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 319     vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
 320   }
 321
 322 #undef FLD
 323 }
 324   NEXT (vpc);
 325
 326   CASE (sem, INSN_X_AFTER) : /* --after-- */
 327 {
 328   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 329   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 330 #define FLD(f) abuf->fields.sfmt_empty.f
 331   int UNUSED written = 0;
 332   IADDR UNUSED pc = abuf->addr;
 333   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 334
 335   {
 336 #if WITH_SCACHE_PBB_CRISV10F
 337     crisv10f_pbb_after (current_cpu, sem_arg);
 338 #endif
 339   }
 340
 341 #undef FLD
 342 }
 343   NEXT (vpc);
 344
 345   CASE (sem, INSN_X_BEFORE) : /* --before-- */
 346 {
 347   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 348   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 349 #define FLD(f) abuf->fields.sfmt_empty.f
 350   int UNUSED written = 0;
 351   IADDR UNUSED pc = abuf->addr;
 352   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 353
 354   {
 355 #if WITH_SCACHE_PBB_CRISV10F
 356     crisv10f_pbb_before (current_cpu, sem_arg);
 357 #endif
 358   }
 359
 360 #undef FLD
 361 }
 362   NEXT (vpc);
 363
 364   CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
 365 {
 366   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 367   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 368 #define FLD(f) abuf->fields.sfmt_empty.f
 369   int UNUSED written = 0;
 370   IADDR UNUSED pc = abuf->addr;
 371   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 372
 373   {
 374 #if WITH_SCACHE_PBB_CRISV10F
 375 #ifdef DEFINE_SWITCH
 376     vpc = crisv10f_pbb_cti_chain (current_cpu, sem_arg,
 377                                pbb_br_type, pbb_br_npc);
 378     BREAK (sem);
 379 #else
 380     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 381     vpc = crisv10f_pbb_cti_chain (current_cpu, sem_arg,
 382                                CPU_PBB_BR_TYPE (current_cpu),
 383                                CPU_PBB_BR_NPC (current_cpu));
 384 #endif
 385 #endif
 386   }
 387
 388 #undef FLD
 389 }
 390   NEXT (vpc);
 391
 392   CASE (sem, INSN_X_CHAIN) : /* --chain-- */
 393 {
 394   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 395   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 396 #define FLD(f) abuf->fields.sfmt_empty.f
 397   int UNUSED written = 0;
 398   IADDR UNUSED pc = abuf->addr;
 399   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 400
 401   {
 402 #if WITH_SCACHE_PBB_CRISV10F
 403     vpc = crisv10f_pbb_chain (current_cpu, sem_arg);
 404 #ifdef DEFINE_SWITCH
 405     BREAK (sem);
 406 #endif
 407 #endif
 408   }
 409
 410 #undef FLD
 411 }
 412   NEXT (vpc);
 413
 414   CASE (sem, INSN_X_BEGIN) : /* --begin-- */
 415 {
 416   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 418 #define FLD(f) abuf->fields.sfmt_empty.f
 419   int UNUSED written = 0;
 420   IADDR UNUSED pc = abuf->addr;
 421   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 422
 423   {
 424 #if WITH_SCACHE_PBB_CRISV10F
 425 #if defined DEFINE_SWITCH || defined FAST_P
 426     /* In the switch case FAST_P is a constant, allowing several optimizations
 427        in any called inline functions.  */
 428     vpc = crisv10f_pbb_begin (current_cpu, FAST_P);
 429 #else
 430 #if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
 431     vpc = crisv10f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 432 #else
 433     vpc = crisv10f_pbb_begin (current_cpu, 0);
 434 #endif
 435 #endif
 436 #endif
 437   }
 438
 439 #undef FLD
 440 }
 441   NEXT (vpc);
 442
 443   CASE (sem, INSN_NOP) : /* nop */
 444 {
 445   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 446   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 447 #define FLD(f) abuf->fields.sfmt_empty.f
 448   int UNUSED written = 0;
 449   IADDR UNUSED pc = abuf->addr;
 450   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 451
 452 {
 453   {
 454     BI opval = 0;
 455     CPU (h_xbit) = opval;
 456     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 457   }
 458   {
 459     BI opval = 0;
 460     SET_H_INSN_PREFIXED_P (opval);
 461     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 462   }
 463 }
 464
 465 #undef FLD
 466 }
 467   NEXT (vpc);
 468
 469   CASE (sem, INSN_MOVE_B_R) : /* move.b move.m ${Rs},${Rd} */
 470 {
 471   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 472   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 473 #define FLD(f) abuf->fields.sfmt_add_b_r.f
 474   int UNUSED written = 0;
 475   IADDR UNUSED pc = abuf->addr;
 476   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 477
 478 {
 479   QI tmp_newval;
 480   tmp_newval = GET_H_GR (FLD (f_operand1));
 481 {
 482   SI tmp_oldregval;
 483   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
 484   {
 485     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
 486     SET_H_GR (FLD (f_operand2), opval);
 487     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 488   }
 489 }
 490 {
 491   {
 492     BI opval = LTQI (tmp_newval, 0);
 493     CPU (h_nbit) = opval;
 494     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 495   }
 496   {
 497     BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 498     CPU (h_zbit) = opval;
 499     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 500   }
 501 SET_H_CBIT_MOVE (0);
 502 SET_H_VBIT_MOVE (0);
 503 {
 504   {
 505     BI opval = 0;
 506     CPU (h_xbit) = opval;
 507     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 508   }
 509   {
 510     BI opval = 0;
 511     SET_H_INSN_PREFIXED_P (opval);
 512     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 513   }
 514 }
 515 }
 516 }
 517
 518 #undef FLD
 519 }
 520   NEXT (vpc);
 521
 522   CASE (sem, INSN_MOVE_W_R) : /* move.w move.m ${Rs},${Rd} */
 523 {
 524   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 525   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 526 #define FLD(f) abuf->fields.sfmt_add_b_r.f
 527   int UNUSED written = 0;
 528   IADDR UNUSED pc = abuf->addr;
 529   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 530
 531 {
 532   HI tmp_newval;
 533   tmp_newval = GET_H_GR (FLD (f_operand1));
 534 {
 535   SI tmp_oldregval;
 536   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
 537   {
 538     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
 539     SET_H_GR (FLD (f_operand2), opval);
 540     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 541   }
 542 }
 543 {
 544   {
 545     BI opval = LTHI (tmp_newval, 0);
 546     CPU (h_nbit) = opval;
 547     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 548   }
 549   {
 550     BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 551     CPU (h_zbit) = opval;
 552     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 553   }
 554 SET_H_CBIT_MOVE (0);
 555 SET_H_VBIT_MOVE (0);
 556 {
 557   {
 558     BI opval = 0;
 559     CPU (h_xbit) = opval;
 560     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 561   }
 562   {
 563     BI opval = 0;
 564     SET_H_INSN_PREFIXED_P (opval);
 565     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 566   }
 567 }
 568 }
 569 }
 570
 571 #undef FLD
 572 }
 573   NEXT (vpc);
 574
 575   CASE (sem, INSN_MOVE_D_R) : /* move.d move.m ${Rs},${Rd} */
 576 {
 577   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 578   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 579 #define FLD(f) abuf->fields.sfmt_add_b_r.f
 580   int UNUSED written = 0;
 581   IADDR UNUSED pc = abuf->addr;
 582   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 583
 584 {
 585   SI tmp_newval;
 586   tmp_newval = GET_H_GR (FLD (f_operand1));
 587   {
 588     SI opval = tmp_newval;
 589     SET_H_GR (FLD (f_operand2), opval);
 590     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 591   }
 592 {
 593   {
 594     BI opval = LTSI (tmp_newval, 0);
 595     CPU (h_nbit) = opval;
 596     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 597   }
 598   {
 599     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 600     CPU (h_zbit) = opval;
 601     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 602   }
 603 SET_H_CBIT_MOVE (0);
 604 SET_H_VBIT_MOVE (0);
 605 {
 606   {
 607     BI opval = 0;
 608     CPU (h_xbit) = opval;
 609     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 610   }
 611   {
 612     BI opval = 0;
 613     SET_H_INSN_PREFIXED_P (opval);
 614     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 615   }
 616 }
 617 }
 618 }
 619
 620 #undef FLD
 621 }
 622   NEXT (vpc);
 623
 624   CASE (sem, INSN_MOVEPCR) : /* move.d PC,${Rd} */
 625 {
 626   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 627   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 628 #define FLD(f) abuf->fields.sfmt_moveq.f
 629   int UNUSED written = 0;
 630   IADDR UNUSED pc = abuf->addr;
 631   SEM_BRANCH_INIT
 632   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 633
 634 {
 635   SI tmp_pcval;
 636   tmp_pcval = ADDSI (pc, 2);
 637   {
 638     SI opval = tmp_pcval;
 639     SET_H_GR (FLD (f_operand2), opval);
 640     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 641   }
 642 {
 643   {
 644     BI opval = LTSI (tmp_pcval, 0);
 645     CPU (h_nbit) = opval;
 646     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 647   }
 648   {
 649     BI opval = ANDIF (EQSI (tmp_pcval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 650     CPU (h_zbit) = opval;
 651     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 652   }
 653 SET_H_CBIT_MOVE (0);
 654 SET_H_VBIT_MOVE (0);
 655 {
 656   {
 657     BI opval = 0;
 658     CPU (h_xbit) = opval;
 659     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 660   }
 661   {
 662     BI opval = 0;
 663     SET_H_INSN_PREFIXED_P (opval);
 664     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 665   }
 666 }
 667 }
 668 }
 669
 670   SEM_BRANCH_FINI (vpc);
 671 #undef FLD
 672 }
 673   NEXT (vpc);
 674
 675   CASE (sem, INSN_MOVEQ) : /* moveq $i,$Rd */
 676 {
 677   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 678   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 679 #define FLD(f) abuf->fields.sfmt_moveq.f
 680   int UNUSED written = 0;
 681   IADDR UNUSED pc = abuf->addr;
 682   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 683
 684 {
 685   SI tmp_newval;
 686   tmp_newval = FLD (f_s6);
 687   {
 688     SI opval = tmp_newval;
 689     SET_H_GR (FLD (f_operand2), opval);
 690     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 691   }
 692 {
 693 SET_H_NBIT_MOVE (LTSI (tmp_newval, 0));
 694 SET_H_ZBIT_MOVE (ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))));
 695 SET_H_CBIT_MOVE (0);
 696 SET_H_VBIT_MOVE (0);
 697 {
 698   {
 699     BI opval = 0;
 700     CPU (h_xbit) = opval;
 701     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 702   }
 703   {
 704     BI opval = 0;
 705     SET_H_INSN_PREFIXED_P (opval);
 706     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 707   }
 708 }
 709 }
 710 }
 711
 712 #undef FLD
 713 }
 714   NEXT (vpc);
 715
 716   CASE (sem, INSN_MOVS_B_R) : /* movs.b movs.m ${Rs},${Rd} */
 717 {
 718   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 719   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 720 #define FLD(f) abuf->fields.sfmt_muls_b.f
 721   int UNUSED written = 0;
 722   IADDR UNUSED pc = abuf->addr;
 723   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 724
 725 {
 726   QI tmp_tmpops;
 727   SI tmp_newval;
 728   tmp_tmpops = GET_H_GR (FLD (f_operand1));
 729   tmp_newval = EXTQISI (tmp_tmpops);
 730   {
 731     SI opval = tmp_newval;
 732     SET_H_GR (FLD (f_operand2), opval);
 733     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 734   }
 735 {
 736   {
 737     BI opval = LTSI (tmp_newval, 0);
 738     CPU (h_nbit) = opval;
 739     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 740   }
 741   {
 742     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 743     CPU (h_zbit) = opval;
 744     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 745   }
 746 SET_H_CBIT_MOVE (0);
 747 SET_H_VBIT_MOVE (0);
 748 {
 749   {
 750     BI opval = 0;
 751     CPU (h_xbit) = opval;
 752     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 753   }
 754   {
 755     BI opval = 0;
 756     SET_H_INSN_PREFIXED_P (opval);
 757     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 758   }
 759 }
 760 }
 761 }
 762
 763 #undef FLD
 764 }
 765   NEXT (vpc);
 766
 767   CASE (sem, INSN_MOVS_W_R) : /* movs.w movs.m ${Rs},${Rd} */
 768 {
 769   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 770   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 771 #define FLD(f) abuf->fields.sfmt_muls_b.f
 772   int UNUSED written = 0;
 773   IADDR UNUSED pc = abuf->addr;
 774   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 775
 776 {
 777   HI tmp_tmpops;
 778   SI tmp_newval;
 779   tmp_tmpops = GET_H_GR (FLD (f_operand1));
 780   tmp_newval = EXTHISI (tmp_tmpops);
 781   {
 782     SI opval = tmp_newval;
 783     SET_H_GR (FLD (f_operand2), opval);
 784     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 785   }
 786 {
 787   {
 788     BI opval = LTSI (tmp_newval, 0);
 789     CPU (h_nbit) = opval;
 790     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 791   }
 792   {
 793     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 794     CPU (h_zbit) = opval;
 795     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 796   }
 797 SET_H_CBIT_MOVE (0);
 798 SET_H_VBIT_MOVE (0);
 799 {
 800   {
 801     BI opval = 0;
 802     CPU (h_xbit) = opval;
 803     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 804   }
 805   {
 806     BI opval = 0;
 807     SET_H_INSN_PREFIXED_P (opval);
 808     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 809   }
 810 }
 811 }
 812 }
 813
 814 #undef FLD
 815 }
 816   NEXT (vpc);
 817
 818   CASE (sem, INSN_MOVU_B_R) : /* movu.b movu.m ${Rs},${Rd} */
 819 {
 820   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 821   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 822 #define FLD(f) abuf->fields.sfmt_muls_b.f
 823   int UNUSED written = 0;
 824   IADDR UNUSED pc = abuf->addr;
 825   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 826
 827 {
 828   QI tmp_tmpops;
 829   SI tmp_newval;
 830   tmp_tmpops = GET_H_GR (FLD (f_operand1));
 831   tmp_newval = ZEXTQISI (tmp_tmpops);
 832   {
 833     SI opval = tmp_newval;
 834     SET_H_GR (FLD (f_operand2), opval);
 835     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 836   }
 837 {
 838   {
 839     BI opval = LTSI (tmp_newval, 0);
 840     CPU (h_nbit) = opval;
 841     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 842   }
 843   {
 844     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 845     CPU (h_zbit) = opval;
 846     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 847   }
 848 SET_H_CBIT_MOVE (0);
 849 SET_H_VBIT_MOVE (0);
 850 {
 851   {
 852     BI opval = 0;
 853     CPU (h_xbit) = opval;
 854     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 855   }
 856   {
 857     BI opval = 0;
 858     SET_H_INSN_PREFIXED_P (opval);
 859     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 860   }
 861 }
 862 }
 863 }
 864
 865 #undef FLD
 866 }
 867   NEXT (vpc);
 868
 869   CASE (sem, INSN_MOVU_W_R) : /* movu.w movu.m ${Rs},${Rd} */
 870 {
 871   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 872   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 873 #define FLD(f) abuf->fields.sfmt_muls_b.f
 874   int UNUSED written = 0;
 875   IADDR UNUSED pc = abuf->addr;
 876   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 877
 878 {
 879   HI tmp_tmpops;
 880   SI tmp_newval;
 881   tmp_tmpops = GET_H_GR (FLD (f_operand1));
 882   tmp_newval = ZEXTHISI (tmp_tmpops);
 883   {
 884     SI opval = tmp_newval;
 885     SET_H_GR (FLD (f_operand2), opval);
 886     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 887   }
 888 {
 889   {
 890     BI opval = LTSI (tmp_newval, 0);
 891     CPU (h_nbit) = opval;
 892     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 893   }
 894   {
 895     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 896     CPU (h_zbit) = opval;
 897     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 898   }
 899 SET_H_CBIT_MOVE (0);
 900 SET_H_VBIT_MOVE (0);
 901 {
 902   {
 903     BI opval = 0;
 904     CPU (h_xbit) = opval;
 905     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 906   }
 907   {
 908     BI opval = 0;
 909     SET_H_INSN_PREFIXED_P (opval);
 910     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 911   }
 912 }
 913 }
 914 }
 915
 916 #undef FLD
 917 }
 918   NEXT (vpc);
 919
 920   CASE (sem, INSN_MOVECBR) : /* move.b ${sconst8},${Rd} */
 921 {
 922   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 923   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 924 #define FLD(f) abuf->fields.sfmt_addcbr.f
 925   int UNUSED written = 0;
 926   IADDR UNUSED pc = abuf->addr;
 927   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 928
 929 {
 930   QI tmp_newval;
 931   tmp_newval = FLD (f_indir_pc__byte);
 932 {
 933   SI tmp_oldregval;
 934   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
 935   {
 936     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
 937     SET_H_GR (FLD (f_operand2), opval);
 938     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 939   }
 940 }
 941 {
 942   {
 943     BI opval = LTQI (tmp_newval, 0);
 944     CPU (h_nbit) = opval;
 945     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 946   }
 947   {
 948     BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
 949     CPU (h_zbit) = opval;
 950     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
 951   }
 952 SET_H_CBIT_MOVE (0);
 953 SET_H_VBIT_MOVE (0);
 954 {
 955   {
 956     BI opval = 0;
 957     CPU (h_xbit) = opval;
 958     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
 959   }
 960   {
 961     BI opval = 0;
 962     SET_H_INSN_PREFIXED_P (opval);
 963     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
 964   }
 965 }
 966 }
 967 }
 968
 969 #undef FLD
 970 }
 971   NEXT (vpc);
 972
 973   CASE (sem, INSN_MOVECWR) : /* move.w ${sconst16},${Rd} */
 974 {
 975   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 976   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 977 #define FLD(f) abuf->fields.sfmt_addcwr.f
 978   int UNUSED written = 0;
 979   IADDR UNUSED pc = abuf->addr;
 980   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 981
 982 {
 983   HI tmp_newval;
 984   tmp_newval = FLD (f_indir_pc__word);
 985 {
 986   SI tmp_oldregval;
 987   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
 988   {
 989     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
 990     SET_H_GR (FLD (f_operand2), opval);
 991     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 992   }
 993 }
 994 {
 995   {
 996     BI opval = LTHI (tmp_newval, 0);
 997     CPU (h_nbit) = opval;
 998     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
 999   }
1000   {
1001     BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1002     CPU (h_zbit) = opval;
1003     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1004   }
1005 SET_H_CBIT_MOVE (0);
1006 SET_H_VBIT_MOVE (0);
1007 {
1008   {
1009     BI opval = 0;
1010     CPU (h_xbit) = opval;
1011     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1012   }
1013   {
1014     BI opval = 0;
1015     SET_H_INSN_PREFIXED_P (opval);
1016     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1017   }
1018 }
1019 }
1020 }
1021
1022 #undef FLD
1023 }
1024   NEXT (vpc);
1025
1026   CASE (sem, INSN_MOVECDR) : /* move.d ${const32},${Rd} */
1027 {
1028   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1029   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1030 #define FLD(f) abuf->fields.sfmt_bound_cd.f
1031   int UNUSED written = 0;
1032   IADDR UNUSED pc = abuf->addr;
1033   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
1034
1035 {
1036   SI tmp_newval;
1037   tmp_newval = FLD (f_indir_pc__dword);
1038   {
1039     SI opval = tmp_newval;
1040     SET_H_GR (FLD (f_operand2), opval);
1041     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1042   }
1043 {
1044   {
1045     BI opval = LTSI (tmp_newval, 0);
1046     CPU (h_nbit) = opval;
1047     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1048   }
1049   {
1050     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1051     CPU (h_zbit) = opval;
1052     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1053   }
1054 SET_H_CBIT_MOVE (0);
1055 SET_H_VBIT_MOVE (0);
1056 {
1057   {
1058     BI opval = 0;
1059     CPU (h_xbit) = opval;
1060     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1061   }
1062   {
1063     BI opval = 0;
1064     SET_H_INSN_PREFIXED_P (opval);
1065     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1066   }
1067 }
1068 }
1069 }
1070
1071 #undef FLD
1072 }
1073   NEXT (vpc);
1074
1075   CASE (sem, INSN_MOVSCBR) : /* movs.b ${sconst8},${Rd} */
1076 {
1077   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1078   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1079 #define FLD(f) abuf->fields.sfmt_bound_cb.f
1080   int UNUSED written = 0;
1081   IADDR UNUSED pc = abuf->addr;
1082   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1083
1084 {
1085   SI tmp_newval;
1086   tmp_newval = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
1087   {
1088     SI opval = tmp_newval;
1089     SET_H_GR (FLD (f_operand2), opval);
1090     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1091   }
1092 {
1093   {
1094     BI opval = LTSI (tmp_newval, 0);
1095     CPU (h_nbit) = opval;
1096     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1097   }
1098   {
1099     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1100     CPU (h_zbit) = opval;
1101     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1102   }
1103 SET_H_CBIT_MOVE (0);
1104 SET_H_VBIT_MOVE (0);
1105 {
1106   {
1107     BI opval = 0;
1108     CPU (h_xbit) = opval;
1109     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1110   }
1111   {
1112     BI opval = 0;
1113     SET_H_INSN_PREFIXED_P (opval);
1114     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1115   }
1116 }
1117 }
1118 }
1119
1120 #undef FLD
1121 }
1122   NEXT (vpc);
1123
1124   CASE (sem, INSN_MOVSCWR) : /* movs.w ${sconst16},${Rd} */
1125 {
1126   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1127   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1128 #define FLD(f) abuf->fields.sfmt_bound_cw.f
1129   int UNUSED written = 0;
1130   IADDR UNUSED pc = abuf->addr;
1131   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1132
1133 {
1134   SI tmp_newval;
1135   tmp_newval = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
1136   {
1137     SI opval = tmp_newval;
1138     SET_H_GR (FLD (f_operand2), opval);
1139     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1140   }
1141 {
1142   {
1143     BI opval = LTSI (tmp_newval, 0);
1144     CPU (h_nbit) = opval;
1145     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1146   }
1147   {
1148     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1149     CPU (h_zbit) = opval;
1150     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1151   }
1152 SET_H_CBIT_MOVE (0);
1153 SET_H_VBIT_MOVE (0);
1154 {
1155   {
1156     BI opval = 0;
1157     CPU (h_xbit) = opval;
1158     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1159   }
1160   {
1161     BI opval = 0;
1162     SET_H_INSN_PREFIXED_P (opval);
1163     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1164   }
1165 }
1166 }
1167 }
1168
1169 #undef FLD
1170 }
1171   NEXT (vpc);
1172
1173   CASE (sem, INSN_MOVUCBR) : /* movu.b ${uconst8},${Rd} */
1174 {
1175   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1176   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1177 #define FLD(f) abuf->fields.sfmt_bound_cb.f
1178   int UNUSED written = 0;
1179   IADDR UNUSED pc = abuf->addr;
1180   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1181
1182 {
1183   SI tmp_newval;
1184   tmp_newval = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
1185   {
1186     SI opval = tmp_newval;
1187     SET_H_GR (FLD (f_operand2), opval);
1188     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1189   }
1190 {
1191   {
1192     BI opval = LTSI (tmp_newval, 0);
1193     CPU (h_nbit) = opval;
1194     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1195   }
1196   {
1197     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1198     CPU (h_zbit) = opval;
1199     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1200   }
1201 SET_H_CBIT_MOVE (0);
1202 SET_H_VBIT_MOVE (0);
1203 {
1204   {
1205     BI opval = 0;
1206     CPU (h_xbit) = opval;
1207     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1208   }
1209   {
1210     BI opval = 0;
1211     SET_H_INSN_PREFIXED_P (opval);
1212     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1213   }
1214 }
1215 }
1216 }
1217
1218 #undef FLD
1219 }
1220   NEXT (vpc);
1221
1222   CASE (sem, INSN_MOVUCWR) : /* movu.w ${uconst16},${Rd} */
1223 {
1224   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1225   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1226 #define FLD(f) abuf->fields.sfmt_bound_cw.f
1227   int UNUSED written = 0;
1228   IADDR UNUSED pc = abuf->addr;
1229   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1230
1231 {
1232   SI tmp_newval;
1233   tmp_newval = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
1234   {
1235     SI opval = tmp_newval;
1236     SET_H_GR (FLD (f_operand2), opval);
1237     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1238   }
1239 {
1240   {
1241     BI opval = LTSI (tmp_newval, 0);
1242     CPU (h_nbit) = opval;
1243     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1244   }
1245   {
1246     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1247     CPU (h_zbit) = opval;
1248     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1249   }
1250 SET_H_CBIT_MOVE (0);
1251 SET_H_VBIT_MOVE (0);
1252 {
1253   {
1254     BI opval = 0;
1255     CPU (h_xbit) = opval;
1256     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1257   }
1258   {
1259     BI opval = 0;
1260     SET_H_INSN_PREFIXED_P (opval);
1261     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1262   }
1263 }
1264 }
1265 }
1266
1267 #undef FLD
1268 }
1269   NEXT (vpc);
1270
1271   CASE (sem, INSN_ADDQ) : /* addq $j,$Rd */
1272 {
1273   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1274   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1275 #define FLD(f) abuf->fields.sfmt_addq.f
1276   int UNUSED written = 0;
1277   IADDR UNUSED pc = abuf->addr;
1278   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1279
1280 {
1281   SI tmp_tmpopd;
1282   SI tmp_tmpops;
1283   BI tmp_carry;
1284   SI tmp_newval;
1285   tmp_tmpops = FLD (f_u6);
1286   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1287   tmp_carry = CPU (h_cbit);
1288   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1289   {
1290     SI opval = tmp_newval;
1291     SET_H_GR (FLD (f_operand2), opval);
1292     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1293   }
1294 {
1295   {
1296     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
1297     CPU (h_cbit) = opval;
1298     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1299   }
1300   {
1301     BI opval = LTSI (tmp_newval, 0);
1302     CPU (h_nbit) = opval;
1303     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1304   }
1305   {
1306     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1307     CPU (h_zbit) = opval;
1308     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1309   }
1310   {
1311     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1312     CPU (h_vbit) = opval;
1313     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1314   }
1315 {
1316   {
1317     BI opval = 0;
1318     CPU (h_xbit) = opval;
1319     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1320   }
1321   {
1322     BI opval = 0;
1323     SET_H_INSN_PREFIXED_P (opval);
1324     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1325   }
1326 }
1327 }
1328 }
1329
1330 #undef FLD
1331 }
1332   NEXT (vpc);
1333
1334   CASE (sem, INSN_SUBQ) : /* subq $j,$Rd */
1335 {
1336   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1337   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1338 #define FLD(f) abuf->fields.sfmt_addq.f
1339   int UNUSED written = 0;
1340   IADDR UNUSED pc = abuf->addr;
1341   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1342
1343 {
1344   SI tmp_tmpopd;
1345   SI tmp_tmpops;
1346   BI tmp_carry;
1347   SI tmp_newval;
1348   tmp_tmpops = FLD (f_u6);
1349   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1350   tmp_carry = CPU (h_cbit);
1351   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1352   {
1353     SI opval = tmp_newval;
1354     SET_H_GR (FLD (f_operand2), opval);
1355     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1356   }
1357 {
1358   {
1359     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1360     CPU (h_cbit) = opval;
1361     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1362   }
1363   {
1364     BI opval = LTSI (tmp_newval, 0);
1365     CPU (h_nbit) = opval;
1366     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1367   }
1368   {
1369     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1370     CPU (h_zbit) = opval;
1371     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1372   }
1373   {
1374     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1375     CPU (h_vbit) = opval;
1376     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1377   }
1378 {
1379   {
1380     BI opval = 0;
1381     CPU (h_xbit) = opval;
1382     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1383   }
1384   {
1385     BI opval = 0;
1386     SET_H_INSN_PREFIXED_P (opval);
1387     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1388   }
1389 }
1390 }
1391 }
1392
1393 #undef FLD
1394 }
1395   NEXT (vpc);
1396
1397   CASE (sem, INSN_CMP_R_B_R) : /* cmp-r.b $Rs,$Rd */
1398 {
1399   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1400   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1401 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1402   int UNUSED written = 0;
1403   IADDR UNUSED pc = abuf->addr;
1404   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1405
1406 {
1407   QI tmp_tmpopd;
1408   QI tmp_tmpops;
1409   BI tmp_carry;
1410   QI tmp_newval;
1411   tmp_tmpops = GET_H_GR (FLD (f_operand1));
1412   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1413   tmp_carry = CPU (h_cbit);
1414   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1415 ((void) 0); /*nop*/
1416 {
1417   {
1418     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
1419     CPU (h_cbit) = opval;
1420     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1421   }
1422   {
1423     BI opval = LTQI (tmp_newval, 0);
1424     CPU (h_nbit) = opval;
1425     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1426   }
1427   {
1428     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1429     CPU (h_zbit) = opval;
1430     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1431   }
1432   {
1433     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
1434     CPU (h_vbit) = opval;
1435     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1436   }
1437 {
1438   {
1439     BI opval = 0;
1440     CPU (h_xbit) = opval;
1441     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1442   }
1443   {
1444     BI opval = 0;
1445     SET_H_INSN_PREFIXED_P (opval);
1446     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1447   }
1448 }
1449 }
1450 }
1451
1452 #undef FLD
1453 }
1454   NEXT (vpc);
1455
1456   CASE (sem, INSN_CMP_R_W_R) : /* cmp-r.w $Rs,$Rd */
1457 {
1458   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1459   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1460 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1461   int UNUSED written = 0;
1462   IADDR UNUSED pc = abuf->addr;
1463   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1464
1465 {
1466   HI tmp_tmpopd;
1467   HI tmp_tmpops;
1468   BI tmp_carry;
1469   HI tmp_newval;
1470   tmp_tmpops = GET_H_GR (FLD (f_operand1));
1471   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1472   tmp_carry = CPU (h_cbit);
1473   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1474 ((void) 0); /*nop*/
1475 {
1476   {
1477     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
1478     CPU (h_cbit) = opval;
1479     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1480   }
1481   {
1482     BI opval = LTHI (tmp_newval, 0);
1483     CPU (h_nbit) = opval;
1484     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1485   }
1486   {
1487     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1488     CPU (h_zbit) = opval;
1489     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1490   }
1491   {
1492     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
1493     CPU (h_vbit) = opval;
1494     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1495   }
1496 {
1497   {
1498     BI opval = 0;
1499     CPU (h_xbit) = opval;
1500     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1501   }
1502   {
1503     BI opval = 0;
1504     SET_H_INSN_PREFIXED_P (opval);
1505     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1506   }
1507 }
1508 }
1509 }
1510
1511 #undef FLD
1512 }
1513   NEXT (vpc);
1514
1515   CASE (sem, INSN_CMP_R_D_R) : /* cmp-r.d $Rs,$Rd */
1516 {
1517   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1518   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1519 #define FLD(f) abuf->fields.sfmt_add_b_r.f
1520   int UNUSED written = 0;
1521   IADDR UNUSED pc = abuf->addr;
1522   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1523
1524 {
1525   SI tmp_tmpopd;
1526   SI tmp_tmpops;
1527   BI tmp_carry;
1528   SI tmp_newval;
1529   tmp_tmpops = GET_H_GR (FLD (f_operand1));
1530   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1531   tmp_carry = CPU (h_cbit);
1532   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1533 ((void) 0); /*nop*/
1534 {
1535   {
1536     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1537     CPU (h_cbit) = opval;
1538     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1539   }
1540   {
1541     BI opval = LTSI (tmp_newval, 0);
1542     CPU (h_nbit) = opval;
1543     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1544   }
1545   {
1546     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1547     CPU (h_zbit) = opval;
1548     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1549   }
1550   {
1551     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1552     CPU (h_vbit) = opval;
1553     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1554   }
1555 {
1556   {
1557     BI opval = 0;
1558     CPU (h_xbit) = opval;
1559     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1560   }
1561   {
1562     BI opval = 0;
1563     SET_H_INSN_PREFIXED_P (opval);
1564     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1565   }
1566 }
1567 }
1568 }
1569
1570 #undef FLD
1571 }
1572   NEXT (vpc);
1573
1574   CASE (sem, INSN_CMP_M_B_M) : /* cmp-m.b [${Rs}${inc}],${Rd} */
1575 {
1576   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1577   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1578 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
1579   int UNUSED written = 0;
1580   IADDR UNUSED pc = abuf->addr;
1581   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1582
1583 {
1584   QI tmp_tmpopd;
1585   QI tmp_tmpops;
1586   BI tmp_carry;
1587   QI tmp_newval;
1588   tmp_tmpops = ({   SI tmp_addr;
1589   QI tmp_tmp_mem;
1590   BI tmp_postinc;
1591   tmp_postinc = FLD (f_memmode);
1592 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
1593 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
1594 ; if (NEBI (tmp_postinc, 0)) {
1595 {
1596 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
1597   tmp_addr = ADDSI (tmp_addr, 1);
1598 }
1599   {
1600     SI opval = tmp_addr;
1601     SET_H_GR (FLD (f_operand1), opval);
1602     written |= (1 << 9);
1603     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1604   }
1605 }
1606 }
1607 ; tmp_tmp_mem; });
1608   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1609   tmp_carry = CPU (h_cbit);
1610   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1611 ((void) 0); /*nop*/
1612 {
1613   {
1614     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
1615     CPU (h_cbit) = opval;
1616     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1617   }
1618   {
1619     BI opval = LTQI (tmp_newval, 0);
1620     CPU (h_nbit) = opval;
1621     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1622   }
1623   {
1624     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1625     CPU (h_zbit) = opval;
1626     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1627   }
1628   {
1629     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
1630     CPU (h_vbit) = opval;
1631     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1632   }
1633 {
1634   {
1635     BI opval = 0;
1636     CPU (h_xbit) = opval;
1637     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1638   }
1639   {
1640     BI opval = 0;
1641     SET_H_INSN_PREFIXED_P (opval);
1642     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1643   }
1644 }
1645 }
1646 }
1647
1648   abuf->written = written;
1649 #undef FLD
1650 }
1651   NEXT (vpc);
1652
1653   CASE (sem, INSN_CMP_M_W_M) : /* cmp-m.w [${Rs}${inc}],${Rd} */
1654 {
1655   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1656   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1657 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
1658   int UNUSED written = 0;
1659   IADDR UNUSED pc = abuf->addr;
1660   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1661
1662 {
1663   HI tmp_tmpopd;
1664   HI tmp_tmpops;
1665   BI tmp_carry;
1666   HI tmp_newval;
1667   tmp_tmpops = ({   SI tmp_addr;
1668   HI tmp_tmp_mem;
1669   BI tmp_postinc;
1670   tmp_postinc = FLD (f_memmode);
1671 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
1672 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
1673 ; if (NEBI (tmp_postinc, 0)) {
1674 {
1675 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
1676   tmp_addr = ADDSI (tmp_addr, 2);
1677 }
1678   {
1679     SI opval = tmp_addr;
1680     SET_H_GR (FLD (f_operand1), opval);
1681     written |= (1 << 9);
1682     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1683   }
1684 }
1685 }
1686 ; tmp_tmp_mem; });
1687   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1688   tmp_carry = CPU (h_cbit);
1689   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1690 ((void) 0); /*nop*/
1691 {
1692   {
1693     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
1694     CPU (h_cbit) = opval;
1695     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1696   }
1697   {
1698     BI opval = LTHI (tmp_newval, 0);
1699     CPU (h_nbit) = opval;
1700     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1701   }
1702   {
1703     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1704     CPU (h_zbit) = opval;
1705     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1706   }
1707   {
1708     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
1709     CPU (h_vbit) = opval;
1710     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1711   }
1712 {
1713   {
1714     BI opval = 0;
1715     CPU (h_xbit) = opval;
1716     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1717   }
1718   {
1719     BI opval = 0;
1720     SET_H_INSN_PREFIXED_P (opval);
1721     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1722   }
1723 }
1724 }
1725 }
1726
1727   abuf->written = written;
1728 #undef FLD
1729 }
1730   NEXT (vpc);
1731
1732   CASE (sem, INSN_CMP_M_D_M) : /* cmp-m.d [${Rs}${inc}],${Rd} */
1733 {
1734   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1735   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1736 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
1737   int UNUSED written = 0;
1738   IADDR UNUSED pc = abuf->addr;
1739   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1740
1741 {
1742   SI tmp_tmpopd;
1743   SI tmp_tmpops;
1744   BI tmp_carry;
1745   SI tmp_newval;
1746   tmp_tmpops = ({   SI tmp_addr;
1747   SI tmp_tmp_mem;
1748   BI tmp_postinc;
1749   tmp_postinc = FLD (f_memmode);
1750 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
1751 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
1752 ; if (NEBI (tmp_postinc, 0)) {
1753 {
1754 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
1755   tmp_addr = ADDSI (tmp_addr, 4);
1756 }
1757   {
1758     SI opval = tmp_addr;
1759     SET_H_GR (FLD (f_operand1), opval);
1760     written |= (1 << 9);
1761     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1762   }
1763 }
1764 }
1765 ; tmp_tmp_mem; });
1766   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1767   tmp_carry = CPU (h_cbit);
1768   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1769 ((void) 0); /*nop*/
1770 {
1771   {
1772     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1773     CPU (h_cbit) = opval;
1774     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1775   }
1776   {
1777     BI opval = LTSI (tmp_newval, 0);
1778     CPU (h_nbit) = opval;
1779     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1780   }
1781   {
1782     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1783     CPU (h_zbit) = opval;
1784     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1785   }
1786   {
1787     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1788     CPU (h_vbit) = opval;
1789     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1790   }
1791 {
1792   {
1793     BI opval = 0;
1794     CPU (h_xbit) = opval;
1795     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1796   }
1797   {
1798     BI opval = 0;
1799     SET_H_INSN_PREFIXED_P (opval);
1800     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1801   }
1802 }
1803 }
1804 }
1805
1806   abuf->written = written;
1807 #undef FLD
1808 }
1809   NEXT (vpc);
1810
1811   CASE (sem, INSN_CMPCBR) : /* cmp.b $sconst8,$Rd */
1812 {
1813   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1814   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1815 #define FLD(f) abuf->fields.sfmt_bound_cb.f
1816   int UNUSED written = 0;
1817   IADDR UNUSED pc = abuf->addr;
1818   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1819
1820 {
1821   QI tmp_tmpopd;
1822   QI tmp_tmpops;
1823   BI tmp_carry;
1824   QI tmp_newval;
1825   tmp_tmpops = TRUNCSIQI (FLD (f_indir_pc__byte));
1826   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1827   tmp_carry = CPU (h_cbit);
1828   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1829 ((void) 0); /*nop*/
1830 {
1831   {
1832     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
1833     CPU (h_cbit) = opval;
1834     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1835   }
1836   {
1837     BI opval = LTQI (tmp_newval, 0);
1838     CPU (h_nbit) = opval;
1839     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1840   }
1841   {
1842     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1843     CPU (h_zbit) = opval;
1844     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1845   }
1846   {
1847     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
1848     CPU (h_vbit) = opval;
1849     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1850   }
1851 {
1852   {
1853     BI opval = 0;
1854     CPU (h_xbit) = opval;
1855     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1856   }
1857   {
1858     BI opval = 0;
1859     SET_H_INSN_PREFIXED_P (opval);
1860     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1861   }
1862 }
1863 }
1864 }
1865
1866 #undef FLD
1867 }
1868   NEXT (vpc);
1869
1870   CASE (sem, INSN_CMPCWR) : /* cmp.w $sconst16,$Rd */
1871 {
1872   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1873   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1874 #define FLD(f) abuf->fields.sfmt_bound_cw.f
1875   int UNUSED written = 0;
1876   IADDR UNUSED pc = abuf->addr;
1877   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1878
1879 {
1880   HI tmp_tmpopd;
1881   HI tmp_tmpops;
1882   BI tmp_carry;
1883   HI tmp_newval;
1884   tmp_tmpops = TRUNCSIHI (FLD (f_indir_pc__word));
1885   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1886   tmp_carry = CPU (h_cbit);
1887   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1888 ((void) 0); /*nop*/
1889 {
1890   {
1891     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
1892     CPU (h_cbit) = opval;
1893     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1894   }
1895   {
1896     BI opval = LTHI (tmp_newval, 0);
1897     CPU (h_nbit) = opval;
1898     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1899   }
1900   {
1901     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1902     CPU (h_zbit) = opval;
1903     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1904   }
1905   {
1906     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
1907     CPU (h_vbit) = opval;
1908     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1909   }
1910 {
1911   {
1912     BI opval = 0;
1913     CPU (h_xbit) = opval;
1914     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1915   }
1916   {
1917     BI opval = 0;
1918     SET_H_INSN_PREFIXED_P (opval);
1919     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1920   }
1921 }
1922 }
1923 }
1924
1925 #undef FLD
1926 }
1927   NEXT (vpc);
1928
1929   CASE (sem, INSN_CMPCDR) : /* cmp.d $const32,$Rd */
1930 {
1931   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1932   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1933 #define FLD(f) abuf->fields.sfmt_bound_cd.f
1934   int UNUSED written = 0;
1935   IADDR UNUSED pc = abuf->addr;
1936   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
1937
1938 {
1939   SI tmp_tmpopd;
1940   SI tmp_tmpops;
1941   BI tmp_carry;
1942   SI tmp_newval;
1943   tmp_tmpops = FLD (f_indir_pc__dword);
1944   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1945   tmp_carry = CPU (h_cbit);
1946   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1947 ((void) 0); /*nop*/
1948 {
1949   {
1950     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1951     CPU (h_cbit) = opval;
1952     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1953   }
1954   {
1955     BI opval = LTSI (tmp_newval, 0);
1956     CPU (h_nbit) = opval;
1957     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1958   }
1959   {
1960     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1961     CPU (h_zbit) = opval;
1962     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1963   }
1964   {
1965     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1966     CPU (h_vbit) = opval;
1967     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1968   }
1969 {
1970   {
1971     BI opval = 0;
1972     CPU (h_xbit) = opval;
1973     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1974   }
1975   {
1976     BI opval = 0;
1977     SET_H_INSN_PREFIXED_P (opval);
1978     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1979   }
1980 }
1981 }
1982 }
1983
1984 #undef FLD
1985 }
1986   NEXT (vpc);
1987
1988   CASE (sem, INSN_CMPQ) : /* cmpq $i,$Rd */
1989 {
1990   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1991   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1992 #define FLD(f) abuf->fields.sfmt_andq.f
1993   int UNUSED written = 0;
1994   IADDR UNUSED pc = abuf->addr;
1995   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1996
1997 {
1998   SI tmp_tmpopd;
1999   SI tmp_tmpops;
2000   BI tmp_carry;
2001   SI tmp_newval;
2002   tmp_tmpops = FLD (f_s6);
2003   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2004   tmp_carry = CPU (h_cbit);
2005   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2006 ((void) 0); /*nop*/
2007 {
2008   {
2009     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2010     CPU (h_cbit) = opval;
2011     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2012   }
2013   {
2014     BI opval = LTSI (tmp_newval, 0);
2015     CPU (h_nbit) = opval;
2016     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2017   }
2018   {
2019     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2020     CPU (h_zbit) = opval;
2021     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2022   }
2023   {
2024     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2025     CPU (h_vbit) = opval;
2026     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2027   }
2028 {
2029   {
2030     BI opval = 0;
2031     CPU (h_xbit) = opval;
2032     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2033   }
2034   {
2035     BI opval = 0;
2036     SET_H_INSN_PREFIXED_P (opval);
2037     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2038   }
2039 }
2040 }
2041 }
2042
2043 #undef FLD
2044 }
2045   NEXT (vpc);
2046
2047   CASE (sem, INSN_CMPS_M_B_M) : /* cmps-m.b [${Rs}${inc}],$Rd */
2048 {
2049   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2050   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2051 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2052   int UNUSED written = 0;
2053   IADDR UNUSED pc = abuf->addr;
2054   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2055
2056 {
2057   SI tmp_tmpopd;
2058   SI tmp_tmpops;
2059   BI tmp_carry;
2060   SI tmp_newval;
2061   tmp_tmpops = EXTQISI (({   SI tmp_addr;
2062   QI tmp_tmp_mem;
2063   BI tmp_postinc;
2064   tmp_postinc = FLD (f_memmode);
2065 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2066 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2067 ; if (NEBI (tmp_postinc, 0)) {
2068 {
2069 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2070   tmp_addr = ADDSI (tmp_addr, 1);
2071 }
2072   {
2073     SI opval = tmp_addr;
2074     SET_H_GR (FLD (f_operand1), opval);
2075     written |= (1 << 9);
2076     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2077   }
2078 }
2079 }
2080 ; tmp_tmp_mem; }));
2081   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2082   tmp_carry = CPU (h_cbit);
2083   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2084 ((void) 0); /*nop*/
2085 {
2086   {
2087     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2088     CPU (h_cbit) = opval;
2089     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2090   }
2091   {
2092     BI opval = LTSI (tmp_newval, 0);
2093     CPU (h_nbit) = opval;
2094     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2095   }
2096   {
2097     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2098     CPU (h_zbit) = opval;
2099     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2100   }
2101   {
2102     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2103     CPU (h_vbit) = opval;
2104     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2105   }
2106 {
2107   {
2108     BI opval = 0;
2109     CPU (h_xbit) = opval;
2110     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2111   }
2112   {
2113     BI opval = 0;
2114     SET_H_INSN_PREFIXED_P (opval);
2115     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2116   }
2117 }
2118 }
2119 }
2120
2121   abuf->written = written;
2122 #undef FLD
2123 }
2124   NEXT (vpc);
2125
2126   CASE (sem, INSN_CMPS_M_W_M) : /* cmps-m.w [${Rs}${inc}],$Rd */
2127 {
2128   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2129   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2130 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2131   int UNUSED written = 0;
2132   IADDR UNUSED pc = abuf->addr;
2133   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2134
2135 {
2136   SI tmp_tmpopd;
2137   SI tmp_tmpops;
2138   BI tmp_carry;
2139   SI tmp_newval;
2140   tmp_tmpops = EXTHISI (({   SI tmp_addr;
2141   HI tmp_tmp_mem;
2142   BI tmp_postinc;
2143   tmp_postinc = FLD (f_memmode);
2144 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2145 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2146 ; if (NEBI (tmp_postinc, 0)) {
2147 {
2148 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2149   tmp_addr = ADDSI (tmp_addr, 2);
2150 }
2151   {
2152     SI opval = tmp_addr;
2153     SET_H_GR (FLD (f_operand1), opval);
2154     written |= (1 << 9);
2155     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2156   }
2157 }
2158 }
2159 ; tmp_tmp_mem; }));
2160   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2161   tmp_carry = CPU (h_cbit);
2162   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2163 ((void) 0); /*nop*/
2164 {
2165   {
2166     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2167     CPU (h_cbit) = opval;
2168     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2169   }
2170   {
2171     BI opval = LTSI (tmp_newval, 0);
2172     CPU (h_nbit) = opval;
2173     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2174   }
2175   {
2176     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2177     CPU (h_zbit) = opval;
2178     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2179   }
2180   {
2181     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2182     CPU (h_vbit) = opval;
2183     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2184   }
2185 {
2186   {
2187     BI opval = 0;
2188     CPU (h_xbit) = opval;
2189     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2190   }
2191   {
2192     BI opval = 0;
2193     SET_H_INSN_PREFIXED_P (opval);
2194     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2195   }
2196 }
2197 }
2198 }
2199
2200   abuf->written = written;
2201 #undef FLD
2202 }
2203   NEXT (vpc);
2204
2205   CASE (sem, INSN_CMPSCBR) : /* [${Rs}${inc}],$Rd */
2206 {
2207   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2208   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2209 #define FLD(f) abuf->fields.sfmt_bound_cb.f
2210   int UNUSED written = 0;
2211   IADDR UNUSED pc = abuf->addr;
2212   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2213
2214 {
2215   SI tmp_tmpopd;
2216   SI tmp_tmpops;
2217   BI tmp_carry;
2218   SI tmp_newval;
2219   tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
2220   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2221   tmp_carry = CPU (h_cbit);
2222   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2223 ((void) 0); /*nop*/
2224 {
2225   {
2226     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2227     CPU (h_cbit) = opval;
2228     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2229   }
2230   {
2231     BI opval = LTSI (tmp_newval, 0);
2232     CPU (h_nbit) = opval;
2233     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2234   }
2235   {
2236     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2237     CPU (h_zbit) = opval;
2238     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2239   }
2240   {
2241     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2242     CPU (h_vbit) = opval;
2243     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2244   }
2245 {
2246   {
2247     BI opval = 0;
2248     CPU (h_xbit) = opval;
2249     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2250   }
2251   {
2252     BI opval = 0;
2253     SET_H_INSN_PREFIXED_P (opval);
2254     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2255   }
2256 }
2257 }
2258 }
2259
2260 #undef FLD
2261 }
2262   NEXT (vpc);
2263
2264   CASE (sem, INSN_CMPSCWR) : /* [${Rs}${inc}],$Rd */
2265 {
2266   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2267   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2268 #define FLD(f) abuf->fields.sfmt_bound_cw.f
2269   int UNUSED written = 0;
2270   IADDR UNUSED pc = abuf->addr;
2271   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2272
2273 {
2274   SI tmp_tmpopd;
2275   SI tmp_tmpops;
2276   BI tmp_carry;
2277   SI tmp_newval;
2278   tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
2279   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2280   tmp_carry = CPU (h_cbit);
2281   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2282 ((void) 0); /*nop*/
2283 {
2284   {
2285     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2286     CPU (h_cbit) = opval;
2287     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2288   }
2289   {
2290     BI opval = LTSI (tmp_newval, 0);
2291     CPU (h_nbit) = opval;
2292     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2293   }
2294   {
2295     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2296     CPU (h_zbit) = opval;
2297     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2298   }
2299   {
2300     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2301     CPU (h_vbit) = opval;
2302     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2303   }
2304 {
2305   {
2306     BI opval = 0;
2307     CPU (h_xbit) = opval;
2308     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2309   }
2310   {
2311     BI opval = 0;
2312     SET_H_INSN_PREFIXED_P (opval);
2313     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2314   }
2315 }
2316 }
2317 }
2318
2319 #undef FLD
2320 }
2321   NEXT (vpc);
2322
2323   CASE (sem, INSN_CMPU_M_B_M) : /* cmpu-m.b [${Rs}${inc}],$Rd */
2324 {
2325   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2326   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2327 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2328   int UNUSED written = 0;
2329   IADDR UNUSED pc = abuf->addr;
2330   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2331
2332 {
2333   SI tmp_tmpopd;
2334   SI tmp_tmpops;
2335   BI tmp_carry;
2336   SI tmp_newval;
2337   tmp_tmpops = ZEXTQISI (({   SI tmp_addr;
2338   QI tmp_tmp_mem;
2339   BI tmp_postinc;
2340   tmp_postinc = FLD (f_memmode);
2341 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2342 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2343 ; if (NEBI (tmp_postinc, 0)) {
2344 {
2345 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2346   tmp_addr = ADDSI (tmp_addr, 1);
2347 }
2348   {
2349     SI opval = tmp_addr;
2350     SET_H_GR (FLD (f_operand1), opval);
2351     written |= (1 << 9);
2352     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2353   }
2354 }
2355 }
2356 ; tmp_tmp_mem; }));
2357   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2358   tmp_carry = CPU (h_cbit);
2359   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2360 ((void) 0); /*nop*/
2361 {
2362   {
2363     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2364     CPU (h_cbit) = opval;
2365     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2366   }
2367   {
2368     BI opval = LTSI (tmp_newval, 0);
2369     CPU (h_nbit) = opval;
2370     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2371   }
2372   {
2373     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2374     CPU (h_zbit) = opval;
2375     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2376   }
2377   {
2378     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2379     CPU (h_vbit) = opval;
2380     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2381   }
2382 {
2383   {
2384     BI opval = 0;
2385     CPU (h_xbit) = opval;
2386     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2387   }
2388   {
2389     BI opval = 0;
2390     SET_H_INSN_PREFIXED_P (opval);
2391     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2392   }
2393 }
2394 }
2395 }
2396
2397   abuf->written = written;
2398 #undef FLD
2399 }
2400   NEXT (vpc);
2401
2402   CASE (sem, INSN_CMPU_M_W_M) : /* cmpu-m.w [${Rs}${inc}],$Rd */
2403 {
2404   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2405   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2406 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2407   int UNUSED written = 0;
2408   IADDR UNUSED pc = abuf->addr;
2409   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2410
2411 {
2412   SI tmp_tmpopd;
2413   SI tmp_tmpops;
2414   BI tmp_carry;
2415   SI tmp_newval;
2416   tmp_tmpops = ZEXTHISI (({   SI tmp_addr;
2417   HI tmp_tmp_mem;
2418   BI tmp_postinc;
2419   tmp_postinc = FLD (f_memmode);
2420 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2421 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2422 ; if (NEBI (tmp_postinc, 0)) {
2423 {
2424 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2425   tmp_addr = ADDSI (tmp_addr, 2);
2426 }
2427   {
2428     SI opval = tmp_addr;
2429     SET_H_GR (FLD (f_operand1), opval);
2430     written |= (1 << 9);
2431     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2432   }
2433 }
2434 }
2435 ; tmp_tmp_mem; }));
2436   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2437   tmp_carry = CPU (h_cbit);
2438   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2439 ((void) 0); /*nop*/
2440 {
2441   {
2442     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2443     CPU (h_cbit) = opval;
2444     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2445   }
2446   {
2447     BI opval = LTSI (tmp_newval, 0);
2448     CPU (h_nbit) = opval;
2449     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2450   }
2451   {
2452     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2453     CPU (h_zbit) = opval;
2454     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2455   }
2456   {
2457     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2458     CPU (h_vbit) = opval;
2459     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2460   }
2461 {
2462   {
2463     BI opval = 0;
2464     CPU (h_xbit) = opval;
2465     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2466   }
2467   {
2468     BI opval = 0;
2469     SET_H_INSN_PREFIXED_P (opval);
2470     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2471   }
2472 }
2473 }
2474 }
2475
2476   abuf->written = written;
2477 #undef FLD
2478 }
2479   NEXT (vpc);
2480
2481   CASE (sem, INSN_CMPUCBR) : /* [${Rs}${inc}],$Rd */
2482 {
2483   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2484   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2485 #define FLD(f) abuf->fields.sfmt_bound_cb.f
2486   int UNUSED written = 0;
2487   IADDR UNUSED pc = abuf->addr;
2488   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2489
2490 {
2491   SI tmp_tmpopd;
2492   SI tmp_tmpops;
2493   BI tmp_carry;
2494   SI tmp_newval;
2495   tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
2496   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2497   tmp_carry = CPU (h_cbit);
2498   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2499 ((void) 0); /*nop*/
2500 {
2501   {
2502     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2503     CPU (h_cbit) = opval;
2504     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2505   }
2506   {
2507     BI opval = LTSI (tmp_newval, 0);
2508     CPU (h_nbit) = opval;
2509     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2510   }
2511   {
2512     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2513     CPU (h_zbit) = opval;
2514     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2515   }
2516   {
2517     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2518     CPU (h_vbit) = opval;
2519     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2520   }
2521 {
2522   {
2523     BI opval = 0;
2524     CPU (h_xbit) = opval;
2525     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2526   }
2527   {
2528     BI opval = 0;
2529     SET_H_INSN_PREFIXED_P (opval);
2530     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2531   }
2532 }
2533 }
2534 }
2535
2536 #undef FLD
2537 }
2538   NEXT (vpc);
2539
2540   CASE (sem, INSN_CMPUCWR) : /* [${Rs}${inc}],$Rd */
2541 {
2542   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2543   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2544 #define FLD(f) abuf->fields.sfmt_bound_cw.f
2545   int UNUSED written = 0;
2546   IADDR UNUSED pc = abuf->addr;
2547   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2548
2549 {
2550   SI tmp_tmpopd;
2551   SI tmp_tmpops;
2552   BI tmp_carry;
2553   SI tmp_newval;
2554   tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
2555   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2556   tmp_carry = CPU (h_cbit);
2557   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2558 ((void) 0); /*nop*/
2559 {
2560   {
2561     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2562     CPU (h_cbit) = opval;
2563     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2564   }
2565   {
2566     BI opval = LTSI (tmp_newval, 0);
2567     CPU (h_nbit) = opval;
2568     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2569   }
2570   {
2571     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2572     CPU (h_zbit) = opval;
2573     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2574   }
2575   {
2576     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2577     CPU (h_vbit) = opval;
2578     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2579   }
2580 {
2581   {
2582     BI opval = 0;
2583     CPU (h_xbit) = opval;
2584     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2585   }
2586   {
2587     BI opval = 0;
2588     SET_H_INSN_PREFIXED_P (opval);
2589     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2590   }
2591 }
2592 }
2593 }
2594
2595 #undef FLD
2596 }
2597   NEXT (vpc);
2598
2599   CASE (sem, INSN_MOVE_M_B_M) : /* move-m.b [${Rs}${inc}],${Rd} */
2600 {
2601   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2602   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2603 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2604   int UNUSED written = 0;
2605   IADDR UNUSED pc = abuf->addr;
2606   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2607
2608 {
2609   SI tmp_tmp;
2610   tmp_tmp = ({   SI tmp_addr;
2611   QI tmp_tmp_mem;
2612   BI tmp_postinc;
2613   tmp_postinc = FLD (f_memmode);
2614 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2615 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2616 ; if (NEBI (tmp_postinc, 0)) {
2617 {
2618 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2619   tmp_addr = ADDSI (tmp_addr, 1);
2620 }
2621   {
2622     SI opval = tmp_addr;
2623     SET_H_GR (FLD (f_operand1), opval);
2624     written |= (1 << 10);
2625     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2626   }
2627 }
2628 }
2629 ; tmp_tmp_mem; });
2630 {
2631   SI tmp_oldregval;
2632   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
2633   {
2634     SI opval = ORSI (ANDSI (tmp_tmp, 255), ANDSI (tmp_oldregval, 0xffffff00));
2635     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
2636     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2637   }
2638 }
2639 {
2640   {
2641     BI opval = LTQI (tmp_tmp, 0);
2642     CPU (h_nbit) = opval;
2643     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2644   }
2645   {
2646     BI opval = ANDIF (EQQI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2647     CPU (h_zbit) = opval;
2648     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2649   }
2650 SET_H_CBIT_MOVE (0);
2651 SET_H_VBIT_MOVE (0);
2652 {
2653   {
2654     BI opval = 0;
2655     CPU (h_xbit) = opval;
2656     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2657   }
2658   {
2659     BI opval = 0;
2660     SET_H_INSN_PREFIXED_P (opval);
2661     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2662   }
2663 }
2664 }
2665 }
2666
2667   abuf->written = written;
2668 #undef FLD
2669 }
2670   NEXT (vpc);
2671
2672   CASE (sem, INSN_MOVE_M_W_M) : /* move-m.w [${Rs}${inc}],${Rd} */
2673 {
2674   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2675   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2676 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2677   int UNUSED written = 0;
2678   IADDR UNUSED pc = abuf->addr;
2679   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2680
2681 {
2682   SI tmp_tmp;
2683   tmp_tmp = ({   SI tmp_addr;
2684   HI tmp_tmp_mem;
2685   BI tmp_postinc;
2686   tmp_postinc = FLD (f_memmode);
2687 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2688 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2689 ; if (NEBI (tmp_postinc, 0)) {
2690 {
2691 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2692   tmp_addr = ADDSI (tmp_addr, 2);
2693 }
2694   {
2695     SI opval = tmp_addr;
2696     SET_H_GR (FLD (f_operand1), opval);
2697     written |= (1 << 10);
2698     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2699   }
2700 }
2701 }
2702 ; tmp_tmp_mem; });
2703 {
2704   SI tmp_oldregval;
2705   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
2706   {
2707     SI opval = ORSI (ANDSI (tmp_tmp, 65535), ANDSI (tmp_oldregval, 0xffff0000));
2708     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
2709     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2710   }
2711 }
2712 {
2713   {
2714     BI opval = LTHI (tmp_tmp, 0);
2715     CPU (h_nbit) = opval;
2716     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2717   }
2718   {
2719     BI opval = ANDIF (EQHI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2720     CPU (h_zbit) = opval;
2721     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2722   }
2723 SET_H_CBIT_MOVE (0);
2724 SET_H_VBIT_MOVE (0);
2725 {
2726   {
2727     BI opval = 0;
2728     CPU (h_xbit) = opval;
2729     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2730   }
2731   {
2732     BI opval = 0;
2733     SET_H_INSN_PREFIXED_P (opval);
2734     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2735   }
2736 }
2737 }
2738 }
2739
2740   abuf->written = written;
2741 #undef FLD
2742 }
2743   NEXT (vpc);
2744
2745   CASE (sem, INSN_MOVE_M_D_M) : /* move-m.d [${Rs}${inc}],${Rd} */
2746 {
2747   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2748   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2749 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2750   int UNUSED written = 0;
2751   IADDR UNUSED pc = abuf->addr;
2752   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2753
2754 {
2755   SI tmp_tmp;
2756   tmp_tmp = ({   SI tmp_addr;
2757   SI tmp_tmp_mem;
2758   BI tmp_postinc;
2759   tmp_postinc = FLD (f_memmode);
2760 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2761 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
2762 ; if (NEBI (tmp_postinc, 0)) {
2763 {
2764 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2765   tmp_addr = ADDSI (tmp_addr, 4);
2766 }
2767   {
2768     SI opval = tmp_addr;
2769     SET_H_GR (FLD (f_operand1), opval);
2770     written |= (1 << 9);
2771     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2772   }
2773 }
2774 }
2775 ; tmp_tmp_mem; });
2776   {
2777     SI opval = tmp_tmp;
2778     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
2779     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2780   }
2781 {
2782   {
2783     BI opval = LTSI (tmp_tmp, 0);
2784     CPU (h_nbit) = opval;
2785     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2786   }
2787   {
2788     BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2789     CPU (h_zbit) = opval;
2790     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2791   }
2792 SET_H_CBIT_MOVE (0);
2793 SET_H_VBIT_MOVE (0);
2794 {
2795   {
2796     BI opval = 0;
2797     CPU (h_xbit) = opval;
2798     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2799   }
2800   {
2801     BI opval = 0;
2802     SET_H_INSN_PREFIXED_P (opval);
2803     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2804   }
2805 }
2806 }
2807 }
2808
2809   abuf->written = written;
2810 #undef FLD
2811 }
2812   NEXT (vpc);
2813
2814   CASE (sem, INSN_MOVS_M_B_M) : /* movs-m.b [${Rs}${inc}],${Rd} */
2815 {
2816   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2817   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2818 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2819   int UNUSED written = 0;
2820   IADDR UNUSED pc = abuf->addr;
2821   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2822
2823 {
2824   SI tmp_tmp;
2825   tmp_tmp = EXTQISI (({   SI tmp_addr;
2826   QI tmp_tmp_mem;
2827   BI tmp_postinc;
2828   tmp_postinc = FLD (f_memmode);
2829 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2830 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2831 ; if (NEBI (tmp_postinc, 0)) {
2832 {
2833 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2834   tmp_addr = ADDSI (tmp_addr, 1);
2835 }
2836   {
2837     SI opval = tmp_addr;
2838     SET_H_GR (FLD (f_operand1), opval);
2839     written |= (1 << 8);
2840     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2841   }
2842 }
2843 }
2844 ; tmp_tmp_mem; }));
2845 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
2846   {
2847     SI opval = tmp_tmp;
2848     SET_H_GR (FLD (f_operand1), opval);
2849     written |= (1 << 8);
2850     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2851   }
2852 } else {
2853   {
2854     SI opval = tmp_tmp;
2855     SET_H_GR (FLD (f_operand2), opval);
2856     written |= (1 << 7);
2857     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2858   }
2859 }
2860 {
2861   {
2862     BI opval = LTSI (tmp_tmp, 0);
2863     CPU (h_nbit) = opval;
2864     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2865   }
2866   {
2867     BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2868     CPU (h_zbit) = opval;
2869     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2870   }
2871 SET_H_CBIT_MOVE (0);
2872 SET_H_VBIT_MOVE (0);
2873 {
2874   {
2875     BI opval = 0;
2876     CPU (h_xbit) = opval;
2877     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2878   }
2879   {
2880     BI opval = 0;
2881     SET_H_INSN_PREFIXED_P (opval);
2882     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2883   }
2884 }
2885 }
2886 }
2887
2888   abuf->written = written;
2889 #undef FLD
2890 }
2891   NEXT (vpc);
2892
2893   CASE (sem, INSN_MOVS_M_W_M) : /* movs-m.w [${Rs}${inc}],${Rd} */
2894 {
2895   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2896   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2897 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2898   int UNUSED written = 0;
2899   IADDR UNUSED pc = abuf->addr;
2900   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2901
2902 {
2903   SI tmp_tmp;
2904   tmp_tmp = EXTHISI (({   SI tmp_addr;
2905   HI tmp_tmp_mem;
2906   BI tmp_postinc;
2907   tmp_postinc = FLD (f_memmode);
2908 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2909 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2910 ; if (NEBI (tmp_postinc, 0)) {
2911 {
2912 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2913   tmp_addr = ADDSI (tmp_addr, 2);
2914 }
2915   {
2916     SI opval = tmp_addr;
2917     SET_H_GR (FLD (f_operand1), opval);
2918     written |= (1 << 8);
2919     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2920   }
2921 }
2922 }
2923 ; tmp_tmp_mem; }));
2924 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
2925   {
2926     SI opval = tmp_tmp;
2927     SET_H_GR (FLD (f_operand1), opval);
2928     written |= (1 << 8);
2929     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2930   }
2931 } else {
2932   {
2933     SI opval = tmp_tmp;
2934     SET_H_GR (FLD (f_operand2), opval);
2935     written |= (1 << 7);
2936     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2937   }
2938 }
2939 {
2940   {
2941     BI opval = LTSI (tmp_tmp, 0);
2942     CPU (h_nbit) = opval;
2943     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2944   }
2945   {
2946     BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2947     CPU (h_zbit) = opval;
2948     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2949   }
2950 SET_H_CBIT_MOVE (0);
2951 SET_H_VBIT_MOVE (0);
2952 {
2953   {
2954     BI opval = 0;
2955     CPU (h_xbit) = opval;
2956     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2957   }
2958   {
2959     BI opval = 0;
2960     SET_H_INSN_PREFIXED_P (opval);
2961     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2962   }
2963 }
2964 }
2965 }
2966
2967   abuf->written = written;
2968 #undef FLD
2969 }
2970   NEXT (vpc);
2971
2972   CASE (sem, INSN_MOVU_M_B_M) : /* movu-m.b [${Rs}${inc}],${Rd} */
2973 {
2974   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2975   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2976 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2977   int UNUSED written = 0;
2978   IADDR UNUSED pc = abuf->addr;
2979   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2980
2981 {
2982   SI tmp_tmp;
2983   tmp_tmp = ZEXTQISI (({   SI tmp_addr;
2984   QI tmp_tmp_mem;
2985   BI tmp_postinc;
2986   tmp_postinc = FLD (f_memmode);
2987 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2988 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2989 ; if (NEBI (tmp_postinc, 0)) {
2990 {
2991 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2992   tmp_addr = ADDSI (tmp_addr, 1);
2993 }
2994   {
2995     SI opval = tmp_addr;
2996     SET_H_GR (FLD (f_operand1), opval);
2997     written |= (1 << 8);
2998     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2999   }
3000 }
3001 }
3002 ; tmp_tmp_mem; }));
3003 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
3004   {
3005     SI opval = tmp_tmp;
3006     SET_H_GR (FLD (f_operand1), opval);
3007     written |= (1 << 8);
3008     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3009   }
3010 } else {
3011   {
3012     SI opval = tmp_tmp;
3013     SET_H_GR (FLD (f_operand2), opval);
3014     written |= (1 << 7);
3015     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3016   }
3017 }
3018 {
3019   {
3020     BI opval = LTSI (tmp_tmp, 0);
3021     CPU (h_nbit) = opval;
3022     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
3023   }
3024   {
3025     BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
3026     CPU (h_zbit) = opval;
3027     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
3028   }
3029 SET_H_CBIT_MOVE (0);
3030 SET_H_VBIT_MOVE (0);
3031 {
3032   {
3033     BI opval = 0;
3034     CPU (h_xbit) = opval;
3035     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3036   }
3037   {
3038     BI opval = 0;
3039     SET_H_INSN_PREFIXED_P (opval);
3040     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3041   }
3042 }
3043 }
3044 }
3045
3046   abuf->written = written;
3047 #undef FLD
3048 }
3049   NEXT (vpc);
3050
3051   CASE (sem, INSN_MOVU_M_W_M) : /* movu-m.w [${Rs}${inc}],${Rd} */
3052 {
3053   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3054   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3055 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3056   int UNUSED written = 0;
3057   IADDR UNUSED pc = abuf->addr;
3058   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3059
3060 {
3061   SI tmp_tmp;
3062   tmp_tmp = ZEXTHISI (({   SI tmp_addr;
3063   HI tmp_tmp_mem;
3064   BI tmp_postinc;
3065   tmp_postinc = FLD (f_memmode);
3066 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3067 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
3068 ; if (NEBI (tmp_postinc, 0)) {
3069 {
3070 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3071   tmp_addr = ADDSI (tmp_addr, 2);
3072 }
3073   {
3074     SI opval = tmp_addr;
3075     SET_H_GR (FLD (f_operand1), opval);
3076     written |= (1 << 8);
3077     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3078   }
3079 }
3080 }
3081 ; tmp_tmp_mem; }));
3082 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
3083   {
3084     SI opval = tmp_tmp;
3085     SET_H_GR (FLD (f_operand1), opval);
3086     written |= (1 << 8);
3087     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3088   }
3089 } else {
3090   {
3091     SI opval = tmp_tmp;
3092     SET_H_GR (FLD (f_operand2), opval);
3093     written |= (1 << 7);
3094     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3095   }
3096 }
3097 {
3098   {
3099     BI opval = LTSI (tmp_tmp, 0);
3100     CPU (h_nbit) = opval;
3101     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
3102   }
3103   {
3104     BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
3105     CPU (h_zbit) = opval;
3106     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
3107   }
3108 SET_H_CBIT_MOVE (0);
3109 SET_H_VBIT_MOVE (0);
3110 {
3111   {
3112     BI opval = 0;
3113     CPU (h_xbit) = opval;
3114     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3115   }
3116   {
3117     BI opval = 0;
3118     SET_H_INSN_PREFIXED_P (opval);
3119     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3120   }
3121 }
3122 }
3123 }
3124
3125   abuf->written = written;
3126 #undef FLD
3127 }
3128   NEXT (vpc);
3129
3130   CASE (sem, INSN_MOVE_R_SPRV10) : /* move ${Rs},${Pd} */
3131 {
3132   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3133   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3134 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
3135   int UNUSED written = 0;
3136   IADDR UNUSED pc = abuf->addr;
3137   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3138
3139 {
3140   SI tmp_tmp;
3141   SI tmp_rno;
3142   tmp_tmp = GET_H_GR (FLD (f_operand1));
3143   tmp_rno = FLD (f_operand2);
3144 if (ORIF (ORIF (EQSI (tmp_rno, 0), EQSI (tmp_rno, 1)), ORIF (EQSI (tmp_rno, 4), EQSI (tmp_rno, 8)))) {
3145 cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special register");
3146 }
3147  else {
3148   {
3149     SI opval = tmp_tmp;
3150     SET_H_SR (FLD (f_operand2), opval);
3151     written |= (1 << 2);
3152     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3153   }
3154 }
3155 {
3156   {
3157     BI opval = 0;
3158     CPU (h_xbit) = opval;
3159     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3160   }
3161   {
3162     BI opval = 0;
3163     SET_H_INSN_PREFIXED_P (opval);
3164     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3165   }
3166 }
3167 }
3168
3169   abuf->written = written;
3170 #undef FLD
3171 }
3172   NEXT (vpc);
3173
3174   CASE (sem, INSN_MOVE_SPR_RV10) : /* move ${Ps},${Rd-sfield} */
3175 {
3176   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3177   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3178 #define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
3179   int UNUSED written = 0;
3180   IADDR UNUSED pc = abuf->addr;
3181   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3182
3183 {
3184   SI tmp_prno;
3185   SI tmp_newval;
3186   tmp_prno = FLD (f_operand2);
3187   tmp_newval = GET_H_SR (FLD (f_operand2));
3188 if (EQSI (tmp_prno, 5)) {
3189 {
3190   SI tmp_oldregval;
3191   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
3192   {
3193     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
3194     SET_H_GR (FLD (f_operand1), opval);
3195     written |= (1 << 4);
3196     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3197   }
3198 }
3199 }
3200  else if (EQSI (tmp_prno, 9)) {
3201   {
3202     SI opval = tmp_newval;
3203     SET_H_GR (FLD (f_operand1), opval);
3204     written |= (1 << 4);
3205     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3206   }
3207 }
3208  else if (EQSI (tmp_prno, 10)) {
3209   {
3210     SI opval = tmp_newval;
3211     SET_H_GR (FLD (f_operand1), opval);
3212     written |= (1 << 4);
3213     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3214   }
3215 }
3216  else if (EQSI (tmp_prno, 11)) {
3217   {
3218     SI opval = tmp_newval;
3219     SET_H_GR (FLD (f_operand1), opval);
3220     written |= (1 << 4);
3221     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3222   }
3223 }
3224  else if (EQSI (tmp_prno, 12)) {
3225   {
3226     SI opval = tmp_newval;
3227     SET_H_GR (FLD (f_operand1), opval);
3228     written |= (1 << 4);
3229     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3230   }
3231 }
3232  else if (EQSI (tmp_prno, 13)) {
3233   {
3234     SI opval = tmp_newval;
3235     SET_H_GR (FLD (f_operand1), opval);
3236     written |= (1 << 4);
3237     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3238   }
3239 }
3240  else if (EQSI (tmp_prno, 0)) {
3241 {
3242   SI tmp_oldregval;
3243   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
3244   {
3245     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
3246     SET_H_GR (FLD (f_operand1), opval);
3247     written |= (1 << 4);
3248     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3249   }
3250 }
3251 }
3252  else if (EQSI (tmp_prno, 1)) {
3253 {
3254   SI tmp_oldregval;
3255   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
3256   {
3257     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
3258     SET_H_GR (FLD (f_operand1), opval);
3259     written |= (1 << 4);
3260     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3261   }
3262 }
3263 }
3264  else if (EQSI (tmp_prno, 4)) {
3265 {
3266   SI tmp_oldregval;
3267   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
3268   {
3269     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
3270     SET_H_GR (FLD (f_operand1), opval);
3271     written |= (1 << 4);
3272     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3273   }
3274 }
3275 }
3276  else if (EQSI (tmp_prno, 8)) {
3277   {
3278     SI opval = tmp_newval;
3279     SET_H_GR (FLD (f_operand1), opval);
3280     written |= (1 << 4);
3281     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3282   }
3283 }
3284  else if (EQSI (tmp_prno, 7)) {
3285   {
3286     SI opval = tmp_newval;
3287     SET_H_GR (FLD (f_operand1), opval);
3288     written |= (1 << 4);
3289     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3290   }
3291 }
3292  else if (EQSI (tmp_prno, 14)) {
3293   {
3294     SI opval = tmp_newval;
3295     SET_H_GR (FLD (f_operand1), opval);
3296     written |= (1 << 4);
3297     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3298   }
3299 }
3300  else if (EQSI (tmp_prno, 15)) {
3301   {
3302     SI opval = tmp_newval;
3303     SET_H_GR (FLD (f_operand1), opval);
3304     written |= (1 << 4);
3305     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3306   }
3307 }
3308  else {
3309 cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register");
3310 }
3311 {
3312   {
3313     BI opval = 0;
3314     CPU (h_xbit) = opval;
3315     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3316   }
3317   {
3318     BI opval = 0;
3319     SET_H_INSN_PREFIXED_P (opval);
3320     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3321   }
3322 }
3323 }
3324
3325   abuf->written = written;
3326 #undef FLD
3327 }
3328   NEXT (vpc);
3329
3330   CASE (sem, INSN_RET_TYPE) : /* ret/reti/retb */
3331 {
3332   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3333   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3334 #define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
3335   int UNUSED written = 0;
3336   IADDR UNUSED pc = abuf->addr;
3337   SEM_BRANCH_INIT
3338   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3339
3340 {
3341   SI tmp_retaddr;
3342   tmp_retaddr = GET_H_SR (FLD (f_operand2));
3343 {
3344   {
3345     BI opval = 0;
3346     CPU (h_xbit) = opval;
3347     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3348   }
3349   {
3350     BI opval = 0;
3351     SET_H_INSN_PREFIXED_P (opval);
3352     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3353   }
3354 }
3355 {
3356   {
3357     USI opval = tmp_retaddr;
3358     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3359     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3360   }
3361 }
3362 }
3363
3364   SEM_BRANCH_FINI (vpc);
3365 #undef FLD
3366 }
3367   NEXT (vpc);
3368
3369   CASE (sem, INSN_MOVE_M_SPRV10) : /* move [${Rs}${inc}],${Pd} */
3370 {
3371   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3372   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3373 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
3374   int UNUSED written = 0;
3375   IADDR UNUSED pc = abuf->addr;
3376   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3377
3378 {
3379   SI tmp_rno;
3380   SI tmp_newval;
3381   tmp_rno = FLD (f_operand2);
3382 if (EQSI (tmp_rno, 5)) {
3383   tmp_newval = EXTHISI (({   SI tmp_addr;
3384   HI tmp_tmp_mem;
3385   BI tmp_postinc;
3386   tmp_postinc = FLD (f_memmode);
3387 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3388 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
3389 ; if (NEBI (tmp_postinc, 0)) {
3390 {
3391 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3392   tmp_addr = ADDSI (tmp_addr, 2);
3393 }
3394   {
3395     SI opval = tmp_addr;
3396     SET_H_GR (FLD (f_operand1), opval);
3397     written |= (1 << 8);
3398     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3399   }
3400 }
3401 }
3402 ; tmp_tmp_mem; }));
3403 }
3404  else if (EQSI (tmp_rno, 9)) {
3405   tmp_newval = ({   SI tmp_addr;
3406   SI tmp_tmp_mem;
3407   BI tmp_postinc;
3408   tmp_postinc = FLD (f_memmode);
3409 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3410 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3411 ; if (NEBI (tmp_postinc, 0)) {
3412 {
3413 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3414   tmp_addr = ADDSI (tmp_addr, 4);
3415 }
3416   {
3417     SI opval = tmp_addr;
3418     SET_H_GR (FLD (f_operand1), opval);
3419     written |= (1 << 8);
3420     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3421   }
3422 }
3423 }
3424 ; tmp_tmp_mem; });
3425 }
3426  else if (EQSI (tmp_rno, 10)) {
3427   tmp_newval = ({   SI tmp_addr;
3428   SI tmp_tmp_mem;
3429   BI tmp_postinc;
3430   tmp_postinc = FLD (f_memmode);
3431 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3432 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3433 ; if (NEBI (tmp_postinc, 0)) {
3434 {
3435 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3436   tmp_addr = ADDSI (tmp_addr, 4);
3437 }
3438   {
3439     SI opval = tmp_addr;
3440     SET_H_GR (FLD (f_operand1), opval);
3441     written |= (1 << 8);
3442     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3443   }
3444 }
3445 }
3446 ; tmp_tmp_mem; });
3447 }
3448  else if (EQSI (tmp_rno, 11)) {
3449   tmp_newval = ({   SI tmp_addr;
3450   SI tmp_tmp_mem;
3451   BI tmp_postinc;
3452   tmp_postinc = FLD (f_memmode);
3453 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3454 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3455 ; if (NEBI (tmp_postinc, 0)) {
3456 {
3457 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3458   tmp_addr = ADDSI (tmp_addr, 4);
3459 }
3460   {
3461     SI opval = tmp_addr;
3462     SET_H_GR (FLD (f_operand1), opval);
3463     written |= (1 << 8);
3464     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3465   }
3466 }
3467 }
3468 ; tmp_tmp_mem; });
3469 }
3470  else if (EQSI (tmp_rno, 12)) {
3471   tmp_newval = ({   SI tmp_addr;
3472   SI tmp_tmp_mem;
3473   BI tmp_postinc;
3474   tmp_postinc = FLD (f_memmode);
3475 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3476 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3477 ; if (NEBI (tmp_postinc, 0)) {
3478 {
3479 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3480   tmp_addr = ADDSI (tmp_addr, 4);
3481 }
3482   {
3483     SI opval = tmp_addr;
3484     SET_H_GR (FLD (f_operand1), opval);
3485     written |= (1 << 8);
3486     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3487   }
3488 }
3489 }
3490 ; tmp_tmp_mem; });
3491 }
3492  else if (EQSI (tmp_rno, 13)) {
3493   tmp_newval = ({   SI tmp_addr;
3494   SI tmp_tmp_mem;
3495   BI tmp_postinc;
3496   tmp_postinc = FLD (f_memmode);
3497 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3498 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3499 ; if (NEBI (tmp_postinc, 0)) {
3500 {
3501 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3502   tmp_addr = ADDSI (tmp_addr, 4);
3503 }
3504   {
3505     SI opval = tmp_addr;
3506     SET_H_GR (FLD (f_operand1), opval);
3507     written |= (1 << 8);
3508     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3509   }
3510 }
3511 }
3512 ; tmp_tmp_mem; });
3513 }
3514  else if (EQSI (tmp_rno, 7)) {
3515   tmp_newval = ({   SI tmp_addr;
3516   SI tmp_tmp_mem;
3517   BI tmp_postinc;
3518   tmp_postinc = FLD (f_memmode);
3519 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3520 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3521 ; if (NEBI (tmp_postinc, 0)) {
3522 {
3523 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3524   tmp_addr = ADDSI (tmp_addr, 4);
3525 }
3526   {
3527     SI opval = tmp_addr;
3528     SET_H_GR (FLD (f_operand1), opval);
3529     written |= (1 << 8);
3530     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3531   }
3532 }
3533 }
3534 ; tmp_tmp_mem; });
3535 }
3536  else if (EQSI (tmp_rno, 14)) {
3537   tmp_newval = ({   SI tmp_addr;
3538   SI tmp_tmp_mem;
3539   BI tmp_postinc;
3540   tmp_postinc = FLD (f_memmode);
3541 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3542 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3543 ; if (NEBI (tmp_postinc, 0)) {
3544 {
3545 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3546   tmp_addr = ADDSI (tmp_addr, 4);
3547 }
3548   {
3549     SI opval = tmp_addr;
3550     SET_H_GR (FLD (f_operand1), opval);
3551     written |= (1 << 8);
3552     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3553   }
3554 }
3555 }
3556 ; tmp_tmp_mem; });
3557 }
3558  else if (EQSI (tmp_rno, 15)) {
3559   tmp_newval = ({   SI tmp_addr;
3560   SI tmp_tmp_mem;
3561   BI tmp_postinc;
3562   tmp_postinc = FLD (f_memmode);
3563 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3564 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3565 ; if (NEBI (tmp_postinc, 0)) {
3566 {
3567 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3568   tmp_addr = ADDSI (tmp_addr, 4);
3569 }
3570   {
3571     SI opval = tmp_addr;
3572     SET_H_GR (FLD (f_operand1), opval);
3573     written |= (1 << 8);
3574     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3575   }
3576 }
3577 }
3578 ; tmp_tmp_mem; });
3579 }
3580  else {
3581 cgen_rtx_error (current_cpu, "Trying to set unimplemented special register");
3582 }
3583   {
3584     SI opval = tmp_newval;
3585     SET_H_SR (FLD (f_operand2), opval);
3586     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3587   }
3588 {
3589   {
3590     BI opval = 0;
3591     CPU (h_xbit) = opval;
3592     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3593   }
3594   {
3595     BI opval = 0;
3596     SET_H_INSN_PREFIXED_P (opval);
3597     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3598   }
3599 }
3600 }
3601
3602   abuf->written = written;
3603 #undef FLD
3604 }
3605   NEXT (vpc);
3606
3607   CASE (sem, INSN_MOVE_C_SPRV10_P5) : /* move ${sconst16},${Pd} */
3608 {
3609   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3610   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3611 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p5.f
3612   int UNUSED written = 0;
3613   IADDR UNUSED pc = abuf->addr;
3614   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3615
3616 {
3617   {
3618     SI opval = FLD (f_indir_pc__word);
3619     SET_H_SR (FLD (f_operand2), opval);
3620     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3621   }
3622 {
3623   {
3624     BI opval = 0;
3625     CPU (h_xbit) = opval;
3626     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3627   }
3628   {
3629     BI opval = 0;
3630     SET_H_INSN_PREFIXED_P (opval);
3631     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3632   }
3633 }
3634 }
3635
3636 #undef FLD
3637 }
3638   NEXT (vpc);
3639
3640   CASE (sem, INSN_MOVE_C_SPRV10_P9) : /* move ${const32},${Pd} */
3641 {
3642   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3643   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3644 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3645   int UNUSED written = 0;
3646   IADDR UNUSED pc = abuf->addr;
3647   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3648
3649 {
3650   {
3651     SI opval = FLD (f_indir_pc__dword);
3652     SET_H_SR (FLD (f_operand2), opval);
3653     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3654   }
3655 {
3656   {
3657     BI opval = 0;
3658     CPU (h_xbit) = opval;
3659     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3660   }
3661   {
3662     BI opval = 0;
3663     SET_H_INSN_PREFIXED_P (opval);
3664     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3665   }
3666 }
3667 }
3668
3669 #undef FLD
3670 }
3671   NEXT (vpc);
3672
3673   CASE (sem, INSN_MOVE_C_SPRV10_P10) : /* move ${const32},${Pd} */
3674 {
3675   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3676   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3677 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3678   int UNUSED written = 0;
3679   IADDR UNUSED pc = abuf->addr;
3680   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3681
3682 {
3683   {
3684     SI opval = FLD (f_indir_pc__dword);
3685     SET_H_SR (FLD (f_operand2), opval);
3686     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3687   }
3688 {
3689   {
3690     BI opval = 0;
3691     CPU (h_xbit) = opval;
3692     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3693   }
3694   {
3695     BI opval = 0;
3696     SET_H_INSN_PREFIXED_P (opval);
3697     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3698   }
3699 }
3700 }
3701
3702 #undef FLD
3703 }
3704   NEXT (vpc);
3705
3706   CASE (sem, INSN_MOVE_C_SPRV10_P11) : /* move ${const32},${Pd} */
3707 {
3708   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3709   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3710 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3711   int UNUSED written = 0;
3712   IADDR UNUSED pc = abuf->addr;
3713   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3714
3715 {
3716   {
3717     SI opval = FLD (f_indir_pc__dword);
3718     SET_H_SR (FLD (f_operand2), opval);
3719     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3720   }
3721 {
3722   {
3723     BI opval = 0;
3724     CPU (h_xbit) = opval;
3725     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3726   }
3727   {
3728     BI opval = 0;
3729     SET_H_INSN_PREFIXED_P (opval);
3730     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3731   }
3732 }
3733 }
3734
3735 #undef FLD
3736 }
3737   NEXT (vpc);
3738
3739   CASE (sem, INSN_MOVE_C_SPRV10_P12) : /* move ${const32},${Pd} */
3740 {
3741   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3742   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3743 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3744   int UNUSED written = 0;
3745   IADDR UNUSED pc = abuf->addr;
3746   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3747
3748 {
3749   {
3750     SI opval = FLD (f_indir_pc__dword);
3751     SET_H_SR (FLD (f_operand2), opval);
3752     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3753   }
3754 {
3755   {
3756     BI opval = 0;
3757     CPU (h_xbit) = opval;
3758     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3759   }
3760   {
3761     BI opval = 0;
3762     SET_H_INSN_PREFIXED_P (opval);
3763     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3764   }
3765 }
3766 }
3767
3768 #undef FLD
3769 }
3770   NEXT (vpc);
3771
3772   CASE (sem, INSN_MOVE_C_SPRV10_P13) : /* move ${const32},${Pd} */
3773 {
3774   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3775   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3776 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3777   int UNUSED written = 0;
3778   IADDR UNUSED pc = abuf->addr;
3779   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3780
3781 {
3782   {
3783     SI opval = FLD (f_indir_pc__dword);
3784     SET_H_SR (FLD (f_operand2), opval);
3785     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3786   }
3787 {
3788   {
3789     BI opval = 0;
3790     CPU (h_xbit) = opval;
3791     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3792   }
3793   {
3794     BI opval = 0;
3795     SET_H_INSN_PREFIXED_P (opval);
3796     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3797   }
3798 }
3799 }
3800
3801 #undef FLD
3802 }
3803   NEXT (vpc);
3804
3805   CASE (sem, INSN_MOVE_C_SPRV10_P7) : /* move ${const32},${Pd} */
3806 {
3807   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3808   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3809 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3810   int UNUSED written = 0;
3811   IADDR UNUSED pc = abuf->addr;
3812   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3813
3814 {
3815   {
3816     SI opval = FLD (f_indir_pc__dword);
3817     SET_H_SR (FLD (f_operand2), opval);
3818     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3819   }
3820 {
3821   {
3822     BI opval = 0;
3823     CPU (h_xbit) = opval;
3824     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3825   }
3826   {
3827     BI opval = 0;
3828     SET_H_INSN_PREFIXED_P (opval);
3829     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3830   }
3831 }
3832 }
3833
3834 #undef FLD
3835 }
3836   NEXT (vpc);
3837
3838   CASE (sem, INSN_MOVE_C_SPRV10_P14) : /* move ${const32},${Pd} */
3839 {
3840   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3841   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3842 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3843   int UNUSED written = 0;
3844   IADDR UNUSED pc = abuf->addr;
3845   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3846
3847 {
3848   {
3849     SI opval = FLD (f_indir_pc__dword);
3850     SET_H_SR (FLD (f_operand2), opval);
3851     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3852   }
3853 {
3854   {
3855     BI opval = 0;
3856     CPU (h_xbit) = opval;
3857     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3858   }
3859   {
3860     BI opval = 0;
3861     SET_H_INSN_PREFIXED_P (opval);
3862     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3863   }
3864 }
3865 }
3866
3867 #undef FLD
3868 }
3869   NEXT (vpc);
3870
3871   CASE (sem, INSN_MOVE_C_SPRV10_P15) : /* move ${const32},${Pd} */
3872 {
3873   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3874   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3875 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
3876   int UNUSED written = 0;
3877   IADDR UNUSED pc = abuf->addr;
3878   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3879
3880 {
3881   {
3882     SI opval = FLD (f_indir_pc__dword);
3883     SET_H_SR (FLD (f_operand2), opval);
3884     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3885   }
3886 {
3887   {
3888     BI opval = 0;
3889     CPU (h_xbit) = opval;
3890     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3891   }
3892   {
3893     BI opval = 0;
3894     SET_H_INSN_PREFIXED_P (opval);
3895     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3896   }
3897 }
3898 }
3899
3900 #undef FLD
3901 }
3902   NEXT (vpc);
3903
3904   CASE (sem, INSN_MOVE_SPR_MV10) : /* move ${Ps},[${Rd-sfield}${inc}] */
3905 {
3906   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3907   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3908 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
3909   int UNUSED written = 0;
3910   IADDR UNUSED pc = abuf->addr;
3911   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3912
3913 {
3914   SI tmp_rno;
3915   tmp_rno = FLD (f_operand2);
3916 if (EQSI (tmp_rno, 5)) {
3917 {
3918   SI tmp_addr;
3919   BI tmp_postinc;
3920   tmp_postinc = FLD (f_memmode);
3921   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3922 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
3923 if (EQBI (CPU (h_pbit), 0)) {
3924 {
3925   {
3926     HI opval = GET_H_SR (FLD (f_operand2));
3927     SETMEMHI (current_cpu, pc, tmp_addr, opval);
3928     written |= (1 << 11);
3929     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3930   }
3931   {
3932     BI opval = CPU (h_pbit);
3933     CPU (h_cbit) = opval;
3934     written |= (1 << 10);
3935     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3936   }
3937 }
3938 } else {
3939   {
3940     BI opval = 1;
3941     CPU (h_cbit) = opval;
3942     written |= (1 << 10);
3943     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3944   }
3945 }
3946 } else {
3947   {
3948     HI opval = GET_H_SR (FLD (f_operand2));
3949     SETMEMHI (current_cpu, pc, tmp_addr, opval);
3950     written |= (1 << 11);
3951     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3952   }
3953 }
3954 if (NEBI (tmp_postinc, 0)) {
3955 {
3956 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3957   tmp_addr = ADDSI (tmp_addr, 2);
3958 }
3959   {
3960     SI opval = tmp_addr;
3961     SET_H_GR (FLD (f_operand1), opval);
3962     written |= (1 << 9);
3963     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3964   }
3965 }
3966 }
3967 }
3968 }
3969  else if (EQSI (tmp_rno, 9)) {
3970 {
3971   SI tmp_addr;
3972   BI tmp_postinc;
3973   tmp_postinc = FLD (f_memmode);
3974   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3975 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
3976 if (EQBI (CPU (h_pbit), 0)) {
3977 {
3978   {
3979     SI opval = GET_H_SR (FLD (f_operand2));
3980     SETMEMSI (current_cpu, pc, tmp_addr, opval);
3981     written |= (1 << 13);
3982     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3983   }
3984   {
3985     BI opval = CPU (h_pbit);
3986     CPU (h_cbit) = opval;
3987     written |= (1 << 10);
3988     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3989   }
3990 }
3991 } else {
3992   {
3993     BI opval = 1;
3994     CPU (h_cbit) = opval;
3995     written |= (1 << 10);
3996     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3997   }
3998 }
3999 } else {
4000   {
4001     SI opval = GET_H_SR (FLD (f_operand2));
4002     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4003     written |= (1 << 13);
4004     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4005   }
4006 }
4007 if (NEBI (tmp_postinc, 0)) {
4008 {
4009 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4010   tmp_addr = ADDSI (tmp_addr, 4);
4011 }
4012   {
4013     SI opval = tmp_addr;
4014     SET_H_GR (FLD (f_operand1), opval);
4015     written |= (1 << 9);
4016     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4017   }
4018 }
4019 }
4020 }
4021 }
4022  else if (EQSI (tmp_rno, 10)) {
4023 {
4024   SI tmp_addr;
4025   BI tmp_postinc;
4026   tmp_postinc = FLD (f_memmode);
4027   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4028 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4029 if (EQBI (CPU (h_pbit), 0)) {
4030 {
4031   {
4032     SI opval = GET_H_SR (FLD (f_operand2));
4033     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4034     written |= (1 << 13);
4035     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4036   }
4037   {
4038     BI opval = CPU (h_pbit);
4039     CPU (h_cbit) = opval;
4040     written |= (1 << 10);
4041     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4042   }
4043 }
4044 } else {
4045   {
4046     BI opval = 1;
4047     CPU (h_cbit) = opval;
4048     written |= (1 << 10);
4049     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4050   }
4051 }
4052 } else {
4053   {
4054     SI opval = GET_H_SR (FLD (f_operand2));
4055     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4056     written |= (1 << 13);
4057     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4058   }
4059 }
4060 if (NEBI (tmp_postinc, 0)) {
4061 {
4062 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4063   tmp_addr = ADDSI (tmp_addr, 4);
4064 }
4065   {
4066     SI opval = tmp_addr;
4067     SET_H_GR (FLD (f_operand1), opval);
4068     written |= (1 << 9);
4069     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4070   }
4071 }
4072 }
4073 }
4074 }
4075  else if (EQSI (tmp_rno, 11)) {
4076 {
4077   SI tmp_addr;
4078   BI tmp_postinc;
4079   tmp_postinc = FLD (f_memmode);
4080   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4081 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4082 if (EQBI (CPU (h_pbit), 0)) {
4083 {
4084   {
4085     SI opval = GET_H_SR (FLD (f_operand2));
4086     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4087     written |= (1 << 13);
4088     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4089   }
4090   {
4091     BI opval = CPU (h_pbit);
4092     CPU (h_cbit) = opval;
4093     written |= (1 << 10);
4094     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4095   }
4096 }
4097 } else {
4098   {
4099     BI opval = 1;
4100     CPU (h_cbit) = opval;
4101     written |= (1 << 10);
4102     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4103   }
4104 }
4105 } else {
4106   {
4107     SI opval = GET_H_SR (FLD (f_operand2));
4108     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4109     written |= (1 << 13);
4110     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4111   }
4112 }
4113 if (NEBI (tmp_postinc, 0)) {
4114 {
4115 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4116   tmp_addr = ADDSI (tmp_addr, 4);
4117 }
4118   {
4119     SI opval = tmp_addr;
4120     SET_H_GR (FLD (f_operand1), opval);
4121     written |= (1 << 9);
4122     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4123   }
4124 }
4125 }
4126 }
4127 }
4128  else if (EQSI (tmp_rno, 12)) {
4129 {
4130   SI tmp_addr;
4131   BI tmp_postinc;
4132   tmp_postinc = FLD (f_memmode);
4133   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4134 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4135 if (EQBI (CPU (h_pbit), 0)) {
4136 {
4137   {
4138     SI opval = GET_H_SR (FLD (f_operand2));
4139     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4140     written |= (1 << 13);
4141     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4142   }
4143   {
4144     BI opval = CPU (h_pbit);
4145     CPU (h_cbit) = opval;
4146     written |= (1 << 10);
4147     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4148   }
4149 }
4150 } else {
4151   {
4152     BI opval = 1;
4153     CPU (h_cbit) = opval;
4154     written |= (1 << 10);
4155     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4156   }
4157 }
4158 } else {
4159   {
4160     SI opval = GET_H_SR (FLD (f_operand2));
4161     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4162     written |= (1 << 13);
4163     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4164   }
4165 }
4166 if (NEBI (tmp_postinc, 0)) {
4167 {
4168 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4169   tmp_addr = ADDSI (tmp_addr, 4);
4170 }
4171   {
4172     SI opval = tmp_addr;
4173     SET_H_GR (FLD (f_operand1), opval);
4174     written |= (1 << 9);
4175     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4176   }
4177 }
4178 }
4179 }
4180 }
4181  else if (EQSI (tmp_rno, 13)) {
4182 {
4183   SI tmp_addr;
4184   BI tmp_postinc;
4185   tmp_postinc = FLD (f_memmode);
4186   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4187 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4188 if (EQBI (CPU (h_pbit), 0)) {
4189 {
4190   {
4191     SI opval = GET_H_SR (FLD (f_operand2));
4192     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4193     written |= (1 << 13);
4194     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4195   }
4196   {
4197     BI opval = CPU (h_pbit);
4198     CPU (h_cbit) = opval;
4199     written |= (1 << 10);
4200     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4201   }
4202 }
4203 } else {
4204   {
4205     BI opval = 1;
4206     CPU (h_cbit) = opval;
4207     written |= (1 << 10);
4208     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4209   }
4210 }
4211 } else {
4212   {
4213     SI opval = GET_H_SR (FLD (f_operand2));
4214     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4215     written |= (1 << 13);
4216     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4217   }
4218 }
4219 if (NEBI (tmp_postinc, 0)) {
4220 {
4221 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4222   tmp_addr = ADDSI (tmp_addr, 4);
4223 }
4224   {
4225     SI opval = tmp_addr;
4226     SET_H_GR (FLD (f_operand1), opval);
4227     written |= (1 << 9);
4228     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4229   }
4230 }
4231 }
4232 }
4233 }
4234  else if (EQSI (tmp_rno, 0)) {
4235 {
4236   SI tmp_addr;
4237   BI tmp_postinc;
4238   tmp_postinc = FLD (f_memmode);
4239   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4240 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4241 if (EQBI (CPU (h_pbit), 0)) {
4242 {
4243   {
4244     QI opval = GET_H_SR (FLD (f_operand2));
4245     SETMEMQI (current_cpu, pc, tmp_addr, opval);
4246     written |= (1 << 12);
4247     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4248   }
4249   {
4250     BI opval = CPU (h_pbit);
4251     CPU (h_cbit) = opval;
4252     written |= (1 << 10);
4253     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4254   }
4255 }
4256 } else {
4257   {
4258     BI opval = 1;
4259     CPU (h_cbit) = opval;
4260     written |= (1 << 10);
4261     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4262   }
4263 }
4264 } else {
4265   {
4266     QI opval = GET_H_SR (FLD (f_operand2));
4267     SETMEMQI (current_cpu, pc, tmp_addr, opval);
4268     written |= (1 << 12);
4269     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4270   }
4271 }
4272 if (NEBI (tmp_postinc, 0)) {
4273 {
4274 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4275   tmp_addr = ADDSI (tmp_addr, 1);
4276 }
4277   {
4278     SI opval = tmp_addr;
4279     SET_H_GR (FLD (f_operand1), opval);
4280     written |= (1 << 9);
4281     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4282   }
4283 }
4284 }
4285 }
4286 }
4287  else if (EQSI (tmp_rno, 1)) {
4288 {
4289   SI tmp_addr;
4290   BI tmp_postinc;
4291   tmp_postinc = FLD (f_memmode);
4292   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4293 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4294 if (EQBI (CPU (h_pbit), 0)) {
4295 {
4296   {
4297     QI opval = GET_H_SR (FLD (f_operand2));
4298     SETMEMQI (current_cpu, pc, tmp_addr, opval);
4299     written |= (1 << 12);
4300     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4301   }
4302   {
4303     BI opval = CPU (h_pbit);
4304     CPU (h_cbit) = opval;
4305     written |= (1 << 10);
4306     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4307   }
4308 }
4309 } else {
4310   {
4311     BI opval = 1;
4312     CPU (h_cbit) = opval;
4313     written |= (1 << 10);
4314     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4315   }
4316 }
4317 } else {
4318   {
4319     QI opval = GET_H_SR (FLD (f_operand2));
4320     SETMEMQI (current_cpu, pc, tmp_addr, opval);
4321     written |= (1 << 12);
4322     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4323   }
4324 }
4325 if (NEBI (tmp_postinc, 0)) {
4326 {
4327 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4328   tmp_addr = ADDSI (tmp_addr, 1);
4329 }
4330   {
4331     SI opval = tmp_addr;
4332     SET_H_GR (FLD (f_operand1), opval);
4333     written |= (1 << 9);
4334     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4335   }
4336 }
4337 }
4338 }
4339 }
4340  else if (EQSI (tmp_rno, 4)) {
4341 {
4342   SI tmp_addr;
4343   BI tmp_postinc;
4344   tmp_postinc = FLD (f_memmode);
4345   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4346 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4347 if (EQBI (CPU (h_pbit), 0)) {
4348 {
4349   {
4350     HI opval = GET_H_SR (FLD (f_operand2));
4351     SETMEMHI (current_cpu, pc, tmp_addr, opval);
4352     written |= (1 << 11);
4353     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4354   }
4355   {
4356     BI opval = CPU (h_pbit);
4357     CPU (h_cbit) = opval;
4358     written |= (1 << 10);
4359     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4360   }
4361 }
4362 } else {
4363   {
4364     BI opval = 1;
4365     CPU (h_cbit) = opval;
4366     written |= (1 << 10);
4367     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4368   }
4369 }
4370 } else {
4371   {
4372     HI opval = GET_H_SR (FLD (f_operand2));
4373     SETMEMHI (current_cpu, pc, tmp_addr, opval);
4374     written |= (1 << 11);
4375     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4376   }
4377 }
4378 if (NEBI (tmp_postinc, 0)) {
4379 {
4380 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4381   tmp_addr = ADDSI (tmp_addr, 2);
4382 }
4383   {
4384     SI opval = tmp_addr;
4385     SET_H_GR (FLD (f_operand1), opval);
4386     written |= (1 << 9);
4387     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4388   }
4389 }
4390 }
4391 }
4392 }
4393  else if (EQSI (tmp_rno, 8)) {
4394 {
4395   SI tmp_addr;
4396   BI tmp_postinc;
4397   tmp_postinc = FLD (f_memmode);
4398   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4399 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4400 if (EQBI (CPU (h_pbit), 0)) {
4401 {
4402   {
4403     SI opval = GET_H_SR (FLD (f_operand2));
4404     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4405     written |= (1 << 13);
4406     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4407   }
4408   {
4409     BI opval = CPU (h_pbit);
4410     CPU (h_cbit) = opval;
4411     written |= (1 << 10);
4412     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4413   }
4414 }
4415 } else {
4416   {
4417     BI opval = 1;
4418     CPU (h_cbit) = opval;
4419     written |= (1 << 10);
4420     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4421   }
4422 }
4423 } else {
4424   {
4425     SI opval = GET_H_SR (FLD (f_operand2));
4426     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4427     written |= (1 << 13);
4428     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4429   }
4430 }
4431 if (NEBI (tmp_postinc, 0)) {
4432 {
4433 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4434   tmp_addr = ADDSI (tmp_addr, 4);
4435 }
4436   {
4437     SI opval = tmp_addr;
4438     SET_H_GR (FLD (f_operand1), opval);
4439     written |= (1 << 9);
4440     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4441   }
4442 }
4443 }
4444 }
4445 }
4446  else if (EQSI (tmp_rno, 7)) {
4447 {
4448   SI tmp_addr;
4449   BI tmp_postinc;
4450   tmp_postinc = FLD (f_memmode);
4451   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4452 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4453 if (EQBI (CPU (h_pbit), 0)) {
4454 {
4455   {
4456     SI opval = GET_H_SR (FLD (f_operand2));
4457     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4458     written |= (1 << 13);
4459     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4460   }
4461   {
4462     BI opval = CPU (h_pbit);
4463     CPU (h_cbit) = opval;
4464     written |= (1 << 10);
4465     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4466   }
4467 }
4468 } else {
4469   {
4470     BI opval = 1;
4471     CPU (h_cbit) = opval;
4472     written |= (1 << 10);
4473     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4474   }
4475 }
4476 } else {
4477   {
4478     SI opval = GET_H_SR (FLD (f_operand2));
4479     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4480     written |= (1 << 13);
4481     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4482   }
4483 }
4484 if (NEBI (tmp_postinc, 0)) {
4485 {
4486 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4487   tmp_addr = ADDSI (tmp_addr, 4);
4488 }
4489   {
4490     SI opval = tmp_addr;
4491     SET_H_GR (FLD (f_operand1), opval);
4492     written |= (1 << 9);
4493     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4494   }
4495 }
4496 }
4497 }
4498 }
4499  else if (EQSI (tmp_rno, 14)) {
4500 {
4501   SI tmp_addr;
4502   BI tmp_postinc;
4503   tmp_postinc = FLD (f_memmode);
4504   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4505 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4506 if (EQBI (CPU (h_pbit), 0)) {
4507 {
4508   {
4509     SI opval = GET_H_SR (FLD (f_operand2));
4510     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4511     written |= (1 << 13);
4512     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4513   }
4514   {
4515     BI opval = CPU (h_pbit);
4516     CPU (h_cbit) = opval;
4517     written |= (1 << 10);
4518     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4519   }
4520 }
4521 } else {
4522   {
4523     BI opval = 1;
4524     CPU (h_cbit) = opval;
4525     written |= (1 << 10);
4526     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4527   }
4528 }
4529 } else {
4530   {
4531     SI opval = GET_H_SR (FLD (f_operand2));
4532     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4533     written |= (1 << 13);
4534     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4535   }
4536 }
4537 if (NEBI (tmp_postinc, 0)) {
4538 {
4539 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4540   tmp_addr = ADDSI (tmp_addr, 4);
4541 }
4542   {
4543     SI opval = tmp_addr;
4544     SET_H_GR (FLD (f_operand1), opval);
4545     written |= (1 << 9);
4546     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4547   }
4548 }
4549 }
4550 }
4551 }
4552  else if (EQSI (tmp_rno, 15)) {
4553 {
4554   SI tmp_addr;
4555   BI tmp_postinc;
4556   tmp_postinc = FLD (f_memmode);
4557   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4558 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4559 if (EQBI (CPU (h_pbit), 0)) {
4560 {
4561   {
4562     SI opval = GET_H_SR (FLD (f_operand2));
4563     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4564     written |= (1 << 13);
4565     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4566   }
4567   {
4568     BI opval = CPU (h_pbit);
4569     CPU (h_cbit) = opval;
4570     written |= (1 << 10);
4571     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4572   }
4573 }
4574 } else {
4575   {
4576     BI opval = 1;
4577     CPU (h_cbit) = opval;
4578     written |= (1 << 10);
4579     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4580   }
4581 }
4582 } else {
4583   {
4584     SI opval = GET_H_SR (FLD (f_operand2));
4585     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4586     written |= (1 << 13);
4587     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4588   }
4589 }
4590 if (NEBI (tmp_postinc, 0)) {
4591 {
4592 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4593   tmp_addr = ADDSI (tmp_addr, 4);
4594 }
4595   {
4596     SI opval = tmp_addr;
4597     SET_H_GR (FLD (f_operand1), opval);
4598     written |= (1 << 9);
4599     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4600   }
4601 }
4602 }
4603 }
4604 }
4605  else {
4606 cgen_rtx_error (current_cpu, "write from unimplemented special register");
4607 }
4608 {
4609   {
4610     BI opval = 0;
4611     CPU (h_xbit) = opval;
4612     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
4613   }
4614   {
4615     BI opval = 0;
4616     SET_H_INSN_PREFIXED_P (opval);
4617     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
4618   }
4619 }
4620 }
4621
4622   abuf->written = written;
4623 #undef FLD
4624 }
4625   NEXT (vpc);
4626
4627   CASE (sem, INSN_SBFS) : /* sbfs [${Rd-sfield}${inc}] */
4628 {
4629   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4630   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4631 #define FLD(f) abuf->fields.sfmt_empty.f
4632   int UNUSED written = 0;
4633   IADDR UNUSED pc = abuf->addr;
4634   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4635
4636 cgen_rtx_error (current_cpu, "SBFS isn't implemented");
4637
4638 #undef FLD
4639 }
4640   NEXT (vpc);
4641
4642   CASE (sem, INSN_MOVEM_R_M) : /* movem ${Rs-dfield},[${Rd-sfield}${inc}] */
4643 {
4644   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4645   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4646 #define FLD(f) abuf->fields.sfmt_movem_r_m.f
4647   int UNUSED written = 0;
4648   IADDR UNUSED pc = abuf->addr;
4649   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4650
4651 {
4652   SI tmp_addr;
4653   BI tmp_postinc;
4654   tmp_postinc = FLD (f_memmode);
4655 {
4656   SI tmp_dummy;
4657   tmp_dummy = GET_H_GR (FLD (f_operand2));
4658 }
4659   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4660 {
4661 if (GESI (FLD (f_operand2), 15)) {
4662 {
4663   SI tmp_tmp;
4664   tmp_tmp = GET_H_GR (((UINT) 15));
4665   {
4666     SI opval = tmp_tmp;
4667     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4668     written |= (1 << 23);
4669     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4670   }
4671   tmp_addr = ADDSI (tmp_addr, 4);
4672 }
4673 }
4674 if (GESI (FLD (f_operand2), 14)) {
4675 {
4676   SI tmp_tmp;
4677   tmp_tmp = GET_H_GR (((UINT) 14));
4678   {
4679     SI opval = tmp_tmp;
4680     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4681     written |= (1 << 23);
4682     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4683   }
4684   tmp_addr = ADDSI (tmp_addr, 4);
4685 }
4686 }
4687 if (GESI (FLD (f_operand2), 13)) {
4688 {
4689   SI tmp_tmp;
4690   tmp_tmp = GET_H_GR (((UINT) 13));
4691   {
4692     SI opval = tmp_tmp;
4693     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4694     written |= (1 << 23);
4695     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4696   }
4697   tmp_addr = ADDSI (tmp_addr, 4);
4698 }
4699 }
4700 if (GESI (FLD (f_operand2), 12)) {
4701 {
4702   SI tmp_tmp;
4703   tmp_tmp = GET_H_GR (((UINT) 12));
4704   {
4705     SI opval = tmp_tmp;
4706     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4707     written |= (1 << 23);
4708     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4709   }
4710   tmp_addr = ADDSI (tmp_addr, 4);
4711 }
4712 }
4713 if (GESI (FLD (f_operand2), 11)) {
4714 {
4715   SI tmp_tmp;
4716   tmp_tmp = GET_H_GR (((UINT) 11));
4717   {
4718     SI opval = tmp_tmp;
4719     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4720     written |= (1 << 23);
4721     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4722   }
4723   tmp_addr = ADDSI (tmp_addr, 4);
4724 }
4725 }
4726 if (GESI (FLD (f_operand2), 10)) {
4727 {
4728   SI tmp_tmp;
4729   tmp_tmp = GET_H_GR (((UINT) 10));
4730   {
4731     SI opval = tmp_tmp;
4732     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4733     written |= (1 << 23);
4734     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4735   }
4736   tmp_addr = ADDSI (tmp_addr, 4);
4737 }
4738 }
4739 if (GESI (FLD (f_operand2), 9)) {
4740 {
4741   SI tmp_tmp;
4742   tmp_tmp = GET_H_GR (((UINT) 9));
4743   {
4744     SI opval = tmp_tmp;
4745     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4746     written |= (1 << 23);
4747     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4748   }
4749   tmp_addr = ADDSI (tmp_addr, 4);
4750 }
4751 }
4752 if (GESI (FLD (f_operand2), 8)) {
4753 {
4754   SI tmp_tmp;
4755   tmp_tmp = GET_H_GR (((UINT) 8));
4756   {
4757     SI opval = tmp_tmp;
4758     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4759     written |= (1 << 23);
4760     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4761   }
4762   tmp_addr = ADDSI (tmp_addr, 4);
4763 }
4764 }
4765 if (GESI (FLD (f_operand2), 7)) {
4766 {
4767   SI tmp_tmp;
4768   tmp_tmp = GET_H_GR (((UINT) 7));
4769   {
4770     SI opval = tmp_tmp;
4771     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4772     written |= (1 << 23);
4773     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4774   }
4775   tmp_addr = ADDSI (tmp_addr, 4);
4776 }
4777 }
4778 if (GESI (FLD (f_operand2), 6)) {
4779 {
4780   SI tmp_tmp;
4781   tmp_tmp = GET_H_GR (((UINT) 6));
4782   {
4783     SI opval = tmp_tmp;
4784     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4785     written |= (1 << 23);
4786     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4787   }
4788   tmp_addr = ADDSI (tmp_addr, 4);
4789 }
4790 }
4791 if (GESI (FLD (f_operand2), 5)) {
4792 {
4793   SI tmp_tmp;
4794   tmp_tmp = GET_H_GR (((UINT) 5));
4795   {
4796     SI opval = tmp_tmp;
4797     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4798     written |= (1 << 23);
4799     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4800   }
4801   tmp_addr = ADDSI (tmp_addr, 4);
4802 }
4803 }
4804 if (GESI (FLD (f_operand2), 4)) {
4805 {
4806   SI tmp_tmp;
4807   tmp_tmp = GET_H_GR (((UINT) 4));
4808   {
4809     SI opval = tmp_tmp;
4810     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4811     written |= (1 << 23);
4812     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4813   }
4814   tmp_addr = ADDSI (tmp_addr, 4);
4815 }
4816 }
4817 if (GESI (FLD (f_operand2), 3)) {
4818 {
4819   SI tmp_tmp;
4820   tmp_tmp = GET_H_GR (((UINT) 3));
4821   {
4822     SI opval = tmp_tmp;
4823     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4824     written |= (1 << 23);
4825     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4826   }
4827   tmp_addr = ADDSI (tmp_addr, 4);
4828 }
4829 }
4830 if (GESI (FLD (f_operand2), 2)) {
4831 {
4832   SI tmp_tmp;
4833   tmp_tmp = GET_H_GR (((UINT) 2));
4834   {
4835     SI opval = tmp_tmp;
4836     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4837     written |= (1 << 23);
4838     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4839   }
4840   tmp_addr = ADDSI (tmp_addr, 4);
4841 }
4842 }
4843 if (GESI (FLD (f_operand2), 1)) {
4844 {
4845   SI tmp_tmp;
4846   tmp_tmp = GET_H_GR (((UINT) 1));
4847   {
4848     SI opval = tmp_tmp;
4849     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4850     written |= (1 << 23);
4851     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4852   }
4853   tmp_addr = ADDSI (tmp_addr, 4);
4854 }
4855 }
4856 if (GESI (FLD (f_operand2), 0)) {
4857 {
4858   SI tmp_tmp;
4859   tmp_tmp = GET_H_GR (((UINT) 0));
4860   {
4861     SI opval = tmp_tmp;
4862     SETMEMSI (current_cpu, pc, tmp_addr, opval);
4863     written |= (1 << 23);
4864     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4865   }
4866   tmp_addr = ADDSI (tmp_addr, 4);
4867 }
4868 }
4869 }
4870 if (NEBI (tmp_postinc, 0)) {
4871   {
4872     SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32)));
4873     SET_H_GR (FLD (f_operand1), opval);
4874     written |= (1 << 22);
4875     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4876   }
4877 }
4878 {
4879   {
4880     BI opval = 0;
4881     CPU (h_xbit) = opval;
4882     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
4883   }
4884   {
4885     BI opval = 0;
4886     SET_H_INSN_PREFIXED_P (opval);
4887     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
4888   }
4889 }
4890 }
4891
4892   abuf->written = written;
4893 #undef FLD
4894 }
4895   NEXT (vpc);
4896
4897   CASE (sem, INSN_MOVEM_M_R) : /* movem [${Rs}${inc}],${Rd} */
4898 {
4899   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4900   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4901 #define FLD(f) abuf->fields.sfmt_movem_m_r.f
4902   int UNUSED written = 0;
4903   IADDR UNUSED pc = abuf->addr;
4904   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4905
4906 {
4907   SI tmp_addr;
4908   BI tmp_postinc;
4909   tmp_postinc = FLD (f_memmode);
4910   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4911 {
4912   SI tmp_dummy;
4913   tmp_dummy = GET_H_GR (FLD (f_operand2));
4914 }
4915 {
4916 if (GESI (FLD (f_operand2), 14)) {
4917 {
4918   SI tmp_tmp;
4919   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4920   {
4921     SI opval = tmp_tmp;
4922     SET_H_GR (((UINT) 14), opval);
4923     written |= (1 << 14);
4924     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4925   }
4926   tmp_addr = ADDSI (tmp_addr, 4);
4927 }
4928 }
4929 if (GESI (FLD (f_operand2), 13)) {
4930 {
4931   SI tmp_tmp;
4932   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4933   {
4934     SI opval = tmp_tmp;
4935     SET_H_GR (((UINT) 13), opval);
4936     written |= (1 << 13);
4937     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4938   }
4939   tmp_addr = ADDSI (tmp_addr, 4);
4940 }
4941 }
4942 if (GESI (FLD (f_operand2), 12)) {
4943 {
4944   SI tmp_tmp;
4945   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4946   {
4947     SI opval = tmp_tmp;
4948     SET_H_GR (((UINT) 12), opval);
4949     written |= (1 << 12);
4950     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4951   }
4952   tmp_addr = ADDSI (tmp_addr, 4);
4953 }
4954 }
4955 if (GESI (FLD (f_operand2), 11)) {
4956 {
4957   SI tmp_tmp;
4958   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4959   {
4960     SI opval = tmp_tmp;
4961     SET_H_GR (((UINT) 11), opval);
4962     written |= (1 << 11);
4963     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4964   }
4965   tmp_addr = ADDSI (tmp_addr, 4);
4966 }
4967 }
4968 if (GESI (FLD (f_operand2), 10)) {
4969 {
4970   SI tmp_tmp;
4971   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4972   {
4973     SI opval = tmp_tmp;
4974     SET_H_GR (((UINT) 10), opval);
4975     written |= (1 << 10);
4976     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4977   }
4978   tmp_addr = ADDSI (tmp_addr, 4);
4979 }
4980 }
4981 if (GESI (FLD (f_operand2), 9)) {
4982 {
4983   SI tmp_tmp;
4984   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4985   {
4986     SI opval = tmp_tmp;
4987     SET_H_GR (((UINT) 9), opval);
4988     written |= (1 << 22);
4989     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4990   }
4991   tmp_addr = ADDSI (tmp_addr, 4);
4992 }
4993 }
4994 if (GESI (FLD (f_operand2), 8)) {
4995 {
4996   SI tmp_tmp;
4997   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4998   {
4999     SI opval = tmp_tmp;
5000     SET_H_GR (((UINT) 8), opval);
5001     written |= (1 << 21);
5002     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5003   }
5004   tmp_addr = ADDSI (tmp_addr, 4);
5005 }
5006 }
5007 if (GESI (FLD (f_operand2), 7)) {
5008 {
5009   SI tmp_tmp;
5010   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5011   {
5012     SI opval = tmp_tmp;
5013     SET_H_GR (((UINT) 7), opval);
5014     written |= (1 << 20);
5015     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5016   }
5017   tmp_addr = ADDSI (tmp_addr, 4);
5018 }
5019 }
5020 if (GESI (FLD (f_operand2), 6)) {
5021 {
5022   SI tmp_tmp;
5023   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5024   {
5025     SI opval = tmp_tmp;
5026     SET_H_GR (((UINT) 6), opval);
5027     written |= (1 << 19);
5028     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5029   }
5030   tmp_addr = ADDSI (tmp_addr, 4);
5031 }
5032 }
5033 if (GESI (FLD (f_operand2), 5)) {
5034 {
5035   SI tmp_tmp;
5036   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5037   {
5038     SI opval = tmp_tmp;
5039     SET_H_GR (((UINT) 5), opval);
5040     written |= (1 << 18);
5041     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5042   }
5043   tmp_addr = ADDSI (tmp_addr, 4);
5044 }
5045 }
5046 if (GESI (FLD (f_operand2), 4)) {
5047 {
5048   SI tmp_tmp;
5049   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5050   {
5051     SI opval = tmp_tmp;
5052     SET_H_GR (((UINT) 4), opval);
5053     written |= (1 << 17);
5054     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5055   }
5056   tmp_addr = ADDSI (tmp_addr, 4);
5057 }
5058 }
5059 if (GESI (FLD (f_operand2), 3)) {
5060 {
5061   SI tmp_tmp;
5062   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5063   {
5064     SI opval = tmp_tmp;
5065     SET_H_GR (((UINT) 3), opval);
5066     written |= (1 << 16);
5067     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5068   }
5069   tmp_addr = ADDSI (tmp_addr, 4);
5070 }
5071 }
5072 if (GESI (FLD (f_operand2), 2)) {
5073 {
5074   SI tmp_tmp;
5075   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5076   {
5077     SI opval = tmp_tmp;
5078     SET_H_GR (((UINT) 2), opval);
5079     written |= (1 << 15);
5080     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5081   }
5082   tmp_addr = ADDSI (tmp_addr, 4);
5083 }
5084 }
5085 if (GESI (FLD (f_operand2), 1)) {
5086 {
5087   SI tmp_tmp;
5088   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5089   {
5090     SI opval = tmp_tmp;
5091     SET_H_GR (((UINT) 1), opval);
5092     written |= (1 << 9);
5093     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5094   }
5095   tmp_addr = ADDSI (tmp_addr, 4);
5096 }
5097 }
5098 if (GESI (FLD (f_operand2), 0)) {
5099 {
5100   SI tmp_tmp;
5101   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5102   {
5103     SI opval = tmp_tmp;
5104     SET_H_GR (((UINT) 0), opval);
5105     written |= (1 << 8);
5106     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5107   }
5108   tmp_addr = ADDSI (tmp_addr, 4);
5109 }
5110 }
5111 }
5112 if (NEBI (tmp_postinc, 0)) {
5113   {
5114     SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32)));
5115     SET_H_GR (FLD (f_operand1), opval);
5116     written |= (1 << 7);
5117     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5118   }
5119 }
5120 {
5121   {
5122     BI opval = 0;
5123     CPU (h_xbit) = opval;
5124     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5125   }
5126   {
5127     BI opval = 0;
5128     SET_H_INSN_PREFIXED_P (opval);
5129     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5130   }
5131 }
5132 }
5133
5134   abuf->written = written;
5135 #undef FLD
5136 }
5137   NEXT (vpc);
5138
5139   CASE (sem, INSN_MOVEM_M_PC) : /* movem [${Rs}${inc}],${Rd} */
5140 {
5141   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5142   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5143 #define FLD(f) abuf->fields.sfmt_movem_m_r.f
5144   int UNUSED written = 0;
5145   IADDR UNUSED pc = abuf->addr;
5146   SEM_BRANCH_INIT
5147   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5148
5149 {
5150   SI tmp_addr;
5151   BI tmp_postinc;
5152   tmp_postinc = FLD (f_memmode);
5153   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5154 {
5155   {
5156     USI opval = GETMEMSI (current_cpu, pc, tmp_addr);
5157     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5158     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5159   }
5160   tmp_addr = ADDSI (tmp_addr, 4);
5161 {
5162   SI tmp_tmp;
5163   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5164   {
5165     SI opval = tmp_tmp;
5166     SET_H_GR (((UINT) 14), opval);
5167     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5168   }
5169   tmp_addr = ADDSI (tmp_addr, 4);
5170 }
5171 {
5172   SI tmp_tmp;
5173   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5174   {
5175     SI opval = tmp_tmp;
5176     SET_H_GR (((UINT) 13), opval);
5177     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5178   }
5179   tmp_addr = ADDSI (tmp_addr, 4);
5180 }
5181 {
5182   SI tmp_tmp;
5183   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5184   {
5185     SI opval = tmp_tmp;
5186     SET_H_GR (((UINT) 12), opval);
5187     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5188   }
5189   tmp_addr = ADDSI (tmp_addr, 4);
5190 }
5191 {
5192   SI tmp_tmp;
5193   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5194   {
5195     SI opval = tmp_tmp;
5196     SET_H_GR (((UINT) 11), opval);
5197     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5198   }
5199   tmp_addr = ADDSI (tmp_addr, 4);
5200 }
5201 {
5202   SI tmp_tmp;
5203   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5204   {
5205     SI opval = tmp_tmp;
5206     SET_H_GR (((UINT) 10), opval);
5207     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5208   }
5209   tmp_addr = ADDSI (tmp_addr, 4);
5210 }
5211 {
5212   SI tmp_tmp;
5213   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5214   {
5215     SI opval = tmp_tmp;
5216     SET_H_GR (((UINT) 9), opval);
5217     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5218   }
5219   tmp_addr = ADDSI (tmp_addr, 4);
5220 }
5221 {
5222   SI tmp_tmp;
5223   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5224   {
5225     SI opval = tmp_tmp;
5226     SET_H_GR (((UINT) 8), opval);
5227     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5228   }
5229   tmp_addr = ADDSI (tmp_addr, 4);
5230 }
5231 {
5232   SI tmp_tmp;
5233   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5234   {
5235     SI opval = tmp_tmp;
5236     SET_H_GR (((UINT) 7), opval);
5237     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5238   }
5239   tmp_addr = ADDSI (tmp_addr, 4);
5240 }
5241 {
5242   SI tmp_tmp;
5243   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5244   {
5245     SI opval = tmp_tmp;
5246     SET_H_GR (((UINT) 6), opval);
5247     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5248   }
5249   tmp_addr = ADDSI (tmp_addr, 4);
5250 }
5251 {
5252   SI tmp_tmp;
5253   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5254   {
5255     SI opval = tmp_tmp;
5256     SET_H_GR (((UINT) 5), opval);
5257     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5258   }
5259   tmp_addr = ADDSI (tmp_addr, 4);
5260 }
5261 {
5262   SI tmp_tmp;
5263   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5264   {
5265     SI opval = tmp_tmp;
5266     SET_H_GR (((UINT) 4), opval);
5267     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5268   }
5269   tmp_addr = ADDSI (tmp_addr, 4);
5270 }
5271 {
5272   SI tmp_tmp;
5273   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5274   {
5275     SI opval = tmp_tmp;
5276     SET_H_GR (((UINT) 3), opval);
5277     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5278   }
5279   tmp_addr = ADDSI (tmp_addr, 4);
5280 }
5281 {
5282   SI tmp_tmp;
5283   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5284   {
5285     SI opval = tmp_tmp;
5286     SET_H_GR (((UINT) 2), opval);
5287     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5288   }
5289   tmp_addr = ADDSI (tmp_addr, 4);
5290 }
5291 {
5292   SI tmp_tmp;
5293   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5294   {
5295     SI opval = tmp_tmp;
5296     SET_H_GR (((UINT) 1), opval);
5297     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5298   }
5299   tmp_addr = ADDSI (tmp_addr, 4);
5300 }
5301 {
5302   SI tmp_tmp;
5303   tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5304   {
5305     SI opval = tmp_tmp;
5306     SET_H_GR (((UINT) 0), opval);
5307     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5308   }
5309   tmp_addr = ADDSI (tmp_addr, 4);
5310 }
5311 }
5312 if (NEBI (tmp_postinc, 0)) {
5313   {
5314     SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32)));
5315     SET_H_GR (FLD (f_operand1), opval);
5316     written |= (1 << 5);
5317     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5318   }
5319 }
5320 {
5321   {
5322     BI opval = 0;
5323     CPU (h_xbit) = opval;
5324     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5325   }
5326   {
5327     BI opval = 0;
5328     SET_H_INSN_PREFIXED_P (opval);
5329     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5330   }
5331 }
5332 }
5333
5334   abuf->written = written;
5335   SEM_BRANCH_FINI (vpc);
5336 #undef FLD
5337 }
5338   NEXT (vpc);
5339
5340   CASE (sem, INSN_ADD_B_R) : /* add.b $Rs,$Rd */
5341 {
5342   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5343   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5344 #define FLD(f) abuf->fields.sfmt_add_b_r.f
5345   int UNUSED written = 0;
5346   IADDR UNUSED pc = abuf->addr;
5347   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5348
5349 {
5350   QI tmp_tmpopd;
5351   QI tmp_tmpops;
5352   BI tmp_carry;
5353   QI tmp_newval;
5354   tmp_tmpops = GET_H_GR (FLD (f_operand1));
5355   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5356   tmp_carry = CPU (h_cbit);
5357   tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5358 {
5359   SI tmp_oldregval;
5360   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5361   {
5362     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
5363     SET_H_GR (FLD (f_operand2), opval);
5364     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5365   }
5366 }
5367 {
5368   {
5369     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0))));
5370     CPU (h_cbit) = opval;
5371     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5372   }
5373   {
5374     BI opval = LTQI (tmp_newval, 0);
5375     CPU (h_nbit) = opval;
5376     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5377   }
5378   {
5379     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5380     CPU (h_zbit) = opval;
5381     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5382   }
5383   {
5384     BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
5385     CPU (h_vbit) = opval;
5386     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5387   }
5388 {
5389   {
5390     BI opval = 0;
5391     CPU (h_xbit) = opval;
5392     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5393   }
5394   {
5395     BI opval = 0;
5396     SET_H_INSN_PREFIXED_P (opval);
5397     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5398   }
5399 }
5400 }
5401 }
5402
5403 #undef FLD
5404 }
5405   NEXT (vpc);
5406
5407   CASE (sem, INSN_ADD_W_R) : /* add.w $Rs,$Rd */
5408 {
5409   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5410   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5411 #define FLD(f) abuf->fields.sfmt_add_b_r.f
5412   int UNUSED written = 0;
5413   IADDR UNUSED pc = abuf->addr;
5414   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5415
5416 {
5417   HI tmp_tmpopd;
5418   HI tmp_tmpops;
5419   BI tmp_carry;
5420   HI tmp_newval;
5421   tmp_tmpops = GET_H_GR (FLD (f_operand1));
5422   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5423   tmp_carry = CPU (h_cbit);
5424   tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5425 {
5426   SI tmp_oldregval;
5427   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5428   {
5429     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
5430     SET_H_GR (FLD (f_operand2), opval);
5431     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5432   }
5433 }
5434 {
5435   {
5436     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0))));
5437     CPU (h_cbit) = opval;
5438     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5439   }
5440   {
5441     BI opval = LTHI (tmp_newval, 0);
5442     CPU (h_nbit) = opval;
5443     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5444   }
5445   {
5446     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5447     CPU (h_zbit) = opval;
5448     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5449   }
5450   {
5451     BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
5452     CPU (h_vbit) = opval;
5453     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5454   }
5455 {
5456   {
5457     BI opval = 0;
5458     CPU (h_xbit) = opval;
5459     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5460   }
5461   {
5462     BI opval = 0;
5463     SET_H_INSN_PREFIXED_P (opval);
5464     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5465   }
5466 }
5467 }
5468 }
5469
5470 #undef FLD
5471 }
5472   NEXT (vpc);
5473
5474   CASE (sem, INSN_ADD_D_R) : /* add.d $Rs,$Rd */
5475 {
5476   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5477   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5478 #define FLD(f) abuf->fields.sfmt_add_b_r.f
5479   int UNUSED written = 0;
5480   IADDR UNUSED pc = abuf->addr;
5481   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5482
5483 {
5484   SI tmp_tmpopd;
5485   SI tmp_tmpops;
5486   BI tmp_carry;
5487   SI tmp_newval;
5488   tmp_tmpops = GET_H_GR (FLD (f_operand1));
5489   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5490   tmp_carry = CPU (h_cbit);
5491   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5492   {
5493     SI opval = tmp_newval;
5494     SET_H_GR (FLD (f_operand2), opval);
5495     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5496   }
5497 {
5498   {
5499     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
5500     CPU (h_cbit) = opval;
5501     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5502   }
5503   {
5504     BI opval = LTSI (tmp_newval, 0);
5505     CPU (h_nbit) = opval;
5506     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5507   }
5508   {
5509     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5510     CPU (h_zbit) = opval;
5511     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5512   }
5513   {
5514     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
5515     CPU (h_vbit) = opval;
5516     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5517   }
5518 {
5519   {
5520     BI opval = 0;
5521     CPU (h_xbit) = opval;
5522     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5523   }
5524   {
5525     BI opval = 0;
5526     SET_H_INSN_PREFIXED_P (opval);
5527     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5528   }
5529 }
5530 }
5531 }
5532
5533 #undef FLD
5534 }
5535   NEXT (vpc);
5536
5537   CASE (sem, INSN_ADD_M_B_M) : /* add-m.b [${Rs}${inc}],${Rd} */
5538 {
5539   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5540   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5541 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
5542   int UNUSED written = 0;
5543   IADDR UNUSED pc = abuf->addr;
5544   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5545
5546 {
5547   QI tmp_tmpopd;
5548   QI tmp_tmpops;
5549   BI tmp_carry;
5550   QI tmp_newval;
5551   tmp_tmpops = ({   SI tmp_addr;
5552   QI tmp_tmp_mem;
5553   BI tmp_postinc;
5554   tmp_postinc = FLD (f_memmode);
5555 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5556 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
5557 ; if (NEBI (tmp_postinc, 0)) {
5558 {
5559 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
5560   tmp_addr = ADDSI (tmp_addr, 1);
5561 }
5562   {
5563     SI opval = tmp_addr;
5564     SET_H_GR (FLD (f_operand1), opval);
5565     written |= (1 << 12);
5566     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5567   }
5568 }
5569 }
5570 ; tmp_tmp_mem; });
5571   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5572   tmp_carry = CPU (h_cbit);
5573   tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5574 {
5575   SI tmp_oldregval;
5576   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
5577   {
5578     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
5579     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
5580     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5581   }
5582 }
5583 {
5584   {
5585     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0))));
5586     CPU (h_cbit) = opval;
5587     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5588   }
5589   {
5590     BI opval = LTQI (tmp_newval, 0);
5591     CPU (h_nbit) = opval;
5592     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5593   }
5594   {
5595     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5596     CPU (h_zbit) = opval;
5597     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5598   }
5599   {
5600     BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
5601     CPU (h_vbit) = opval;
5602     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5603   }
5604 {
5605   {
5606     BI opval = 0;
5607     CPU (h_xbit) = opval;
5608     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5609   }
5610   {
5611     BI opval = 0;
5612     SET_H_INSN_PREFIXED_P (opval);
5613     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5614   }
5615 }
5616 }
5617 }
5618
5619   abuf->written = written;
5620 #undef FLD
5621 }
5622   NEXT (vpc);
5623
5624   CASE (sem, INSN_ADD_M_W_M) : /* add-m.w [${Rs}${inc}],${Rd} */
5625 {
5626   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5627   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5628 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
5629   int UNUSED written = 0;
5630   IADDR UNUSED pc = abuf->addr;
5631   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5632
5633 {
5634   HI tmp_tmpopd;
5635   HI tmp_tmpops;
5636   BI tmp_carry;
5637   HI tmp_newval;
5638   tmp_tmpops = ({   SI tmp_addr;
5639   HI tmp_tmp_mem;
5640   BI tmp_postinc;
5641   tmp_postinc = FLD (f_memmode);
5642 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5643 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
5644 ; if (NEBI (tmp_postinc, 0)) {
5645 {
5646 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
5647   tmp_addr = ADDSI (tmp_addr, 2);
5648 }
5649   {
5650     SI opval = tmp_addr;
5651     SET_H_GR (FLD (f_operand1), opval);
5652     written |= (1 << 12);
5653     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5654   }
5655 }
5656 }
5657 ; tmp_tmp_mem; });
5658   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5659   tmp_carry = CPU (h_cbit);
5660   tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5661 {
5662   SI tmp_oldregval;
5663   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
5664   {
5665     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
5666     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
5667     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5668   }
5669 }
5670 {
5671   {
5672     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0))));
5673     CPU (h_cbit) = opval;
5674     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5675   }
5676   {
5677     BI opval = LTHI (tmp_newval, 0);
5678     CPU (h_nbit) = opval;
5679     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5680   }
5681   {
5682     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5683     CPU (h_zbit) = opval;
5684     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5685   }
5686   {
5687     BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
5688     CPU (h_vbit) = opval;
5689     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5690   }
5691 {
5692   {
5693     BI opval = 0;
5694     CPU (h_xbit) = opval;
5695     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5696   }
5697   {
5698     BI opval = 0;
5699     SET_H_INSN_PREFIXED_P (opval);
5700     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5701   }
5702 }
5703 }
5704 }
5705
5706   abuf->written = written;
5707 #undef FLD
5708 }
5709   NEXT (vpc);
5710
5711   CASE (sem, INSN_ADD_M_D_M) : /* add-m.d [${Rs}${inc}],${Rd} */
5712 {
5713   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5714   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5715 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
5716   int UNUSED written = 0;
5717   IADDR UNUSED pc = abuf->addr;
5718   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5719
5720 {
5721   SI tmp_tmpopd;
5722   SI tmp_tmpops;
5723   BI tmp_carry;
5724   SI tmp_newval;
5725   tmp_tmpops = ({   SI tmp_addr;
5726   SI tmp_tmp_mem;
5727   BI tmp_postinc;
5728   tmp_postinc = FLD (f_memmode);
5729 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5730 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
5731 ; if (NEBI (tmp_postinc, 0)) {
5732 {
5733 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
5734   tmp_addr = ADDSI (tmp_addr, 4);
5735 }
5736   {
5737     SI opval = tmp_addr;
5738     SET_H_GR (FLD (f_operand1), opval);
5739     written |= (1 << 11);
5740     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5741   }
5742 }
5743 }
5744 ; tmp_tmp_mem; });
5745   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5746   tmp_carry = CPU (h_cbit);
5747   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5748   {
5749     SI opval = tmp_newval;
5750     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
5751     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5752   }
5753 {
5754   {
5755     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
5756     CPU (h_cbit) = opval;
5757     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5758   }
5759   {
5760     BI opval = LTSI (tmp_newval, 0);
5761     CPU (h_nbit) = opval;
5762     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5763   }
5764   {
5765     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5766     CPU (h_zbit) = opval;
5767     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5768   }
5769   {
5770     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
5771     CPU (h_vbit) = opval;
5772     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5773   }
5774 {
5775   {
5776     BI opval = 0;
5777     CPU (h_xbit) = opval;
5778     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5779   }
5780   {
5781     BI opval = 0;
5782     SET_H_INSN_PREFIXED_P (opval);
5783     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5784   }
5785 }
5786 }
5787 }
5788
5789   abuf->written = written;
5790 #undef FLD
5791 }
5792   NEXT (vpc);
5793
5794   CASE (sem, INSN_ADDCBR) : /* add.b ${sconst8}],${Rd} */
5795 {
5796   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5797   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5798 #define FLD(f) abuf->fields.sfmt_addcbr.f
5799   int UNUSED written = 0;
5800   IADDR UNUSED pc = abuf->addr;
5801   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5802
5803 {
5804   QI tmp_tmpopd;
5805   QI tmp_tmpops;
5806   BI tmp_carry;
5807   QI tmp_newval;
5808   tmp_tmpops = FLD (f_indir_pc__byte);
5809   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5810   tmp_carry = CPU (h_cbit);
5811   tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5812 {
5813   SI tmp_oldregval;
5814   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5815   {
5816     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
5817     SET_H_GR (FLD (f_operand2), opval);
5818     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5819   }
5820 }
5821 {
5822   {
5823     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0))));
5824     CPU (h_cbit) = opval;
5825     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5826   }
5827   {
5828     BI opval = LTQI (tmp_newval, 0);
5829     CPU (h_nbit) = opval;
5830     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5831   }
5832   {
5833     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5834     CPU (h_zbit) = opval;
5835     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5836   }
5837   {
5838     BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
5839     CPU (h_vbit) = opval;
5840     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5841   }
5842 {
5843   {
5844     BI opval = 0;
5845     CPU (h_xbit) = opval;
5846     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5847   }
5848   {
5849     BI opval = 0;
5850     SET_H_INSN_PREFIXED_P (opval);
5851     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5852   }
5853 }
5854 }
5855 }
5856
5857 #undef FLD
5858 }
5859   NEXT (vpc);
5860
5861   CASE (sem, INSN_ADDCWR) : /* add.w ${sconst16}],${Rd} */
5862 {
5863   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5864   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5865 #define FLD(f) abuf->fields.sfmt_addcwr.f
5866   int UNUSED written = 0;
5867   IADDR UNUSED pc = abuf->addr;
5868   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5869
5870 {
5871   HI tmp_tmpopd;
5872   HI tmp_tmpops;
5873   BI tmp_carry;
5874   HI tmp_newval;
5875   tmp_tmpops = FLD (f_indir_pc__word);
5876   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5877   tmp_carry = CPU (h_cbit);
5878   tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5879 {
5880   SI tmp_oldregval;
5881   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5882   {
5883     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
5884     SET_H_GR (FLD (f_operand2), opval);
5885     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5886   }
5887 }
5888 {
5889   {
5890     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0))));
5891     CPU (h_cbit) = opval;
5892     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5893   }
5894   {
5895     BI opval = LTHI (tmp_newval, 0);
5896     CPU (h_nbit) = opval;
5897     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5898   }
5899   {
5900     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5901     CPU (h_zbit) = opval;
5902     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5903   }
5904   {
5905     BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
5906     CPU (h_vbit) = opval;
5907     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5908   }
5909 {
5910   {
5911     BI opval = 0;
5912     CPU (h_xbit) = opval;
5913     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5914   }
5915   {
5916     BI opval = 0;
5917     SET_H_INSN_PREFIXED_P (opval);
5918     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5919   }
5920 }
5921 }
5922 }
5923
5924 #undef FLD
5925 }
5926   NEXT (vpc);
5927
5928   CASE (sem, INSN_ADDCDR) : /* add.d ${const32}],${Rd} */
5929 {
5930   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5931   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5932 #define FLD(f) abuf->fields.sfmt_addcdr.f
5933   int UNUSED written = 0;
5934   IADDR UNUSED pc = abuf->addr;
5935   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
5936
5937 {
5938   SI tmp_tmpopd;
5939   SI tmp_tmpops;
5940   BI tmp_carry;
5941   SI tmp_newval;
5942   tmp_tmpops = FLD (f_indir_pc__dword);
5943   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5944   tmp_carry = CPU (h_cbit);
5945   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5946   {
5947     SI opval = tmp_newval;
5948     SET_H_GR (FLD (f_operand2), opval);
5949     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5950   }
5951 {
5952   {
5953     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
5954     CPU (h_cbit) = opval;
5955     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5956   }
5957   {
5958     BI opval = LTSI (tmp_newval, 0);
5959     CPU (h_nbit) = opval;
5960     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5961   }
5962   {
5963     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5964     CPU (h_zbit) = opval;
5965     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5966   }
5967   {
5968     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
5969     CPU (h_vbit) = opval;
5970     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5971   }
5972 {
5973   {
5974     BI opval = 0;
5975     CPU (h_xbit) = opval;
5976     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5977   }
5978   {
5979     BI opval = 0;
5980     SET_H_INSN_PREFIXED_P (opval);
5981     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5982   }
5983 }
5984 }
5985 }
5986
5987 #undef FLD
5988 }
5989   NEXT (vpc);
5990
5991   CASE (sem, INSN_ADDCPC) : /* add.d ${sconst32},PC */
5992 {
5993   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5994   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5995 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
5996   int UNUSED written = 0;
5997   IADDR UNUSED pc = abuf->addr;
5998   SEM_BRANCH_INIT
5999   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
6000
6001 {
6002   SI tmp_newpc;
6003   SI tmp_oldpc;
6004   SI tmp_offs;
6005   tmp_offs = FLD (f_indir_pc__dword);
6006   tmp_oldpc = ADDSI (pc, 6);
6007   tmp_newpc = ADDSI (tmp_oldpc, tmp_offs);
6008   {
6009     USI opval = tmp_newpc;
6010     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6011     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6012   }
6013 {
6014   {
6015     BI opval = ORIF (ANDIF (LTSI (tmp_offs, 0), LTSI (tmp_oldpc, 0)), ORIF (ANDIF (LTSI (tmp_oldpc, 0), GESI (tmp_newpc, 0)), ANDIF (LTSI (tmp_offs, 0), GESI (tmp_newpc, 0))));
6016     CPU (h_cbit) = opval;
6017     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6018   }
6019   {
6020     BI opval = LTSI (tmp_newpc, 0);
6021     CPU (h_nbit) = opval;
6022     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6023   }
6024   {
6025     BI opval = ANDIF (EQSI (tmp_newpc, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6026     CPU (h_zbit) = opval;
6027     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6028   }
6029   {
6030     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_offs, 0), LTSI (tmp_oldpc, 0)), GESI (tmp_newpc, 0)), ANDIF (ANDIF (GESI (tmp_offs, 0), GESI (tmp_oldpc, 0)), LTSI (tmp_newpc, 0)));
6031     CPU (h_vbit) = opval;
6032     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6033   }
6034 {
6035   {
6036     BI opval = 0;
6037     CPU (h_xbit) = opval;
6038     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6039   }
6040   {
6041     BI opval = 0;
6042     SET_H_INSN_PREFIXED_P (opval);
6043     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6044   }
6045 }
6046 }
6047 }
6048
6049   SEM_BRANCH_FINI (vpc);
6050 #undef FLD
6051 }
6052   NEXT (vpc);
6053
6054   CASE (sem, INSN_ADDS_B_R) : /* adds.b $Rs,$Rd */
6055 {
6056   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6057   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6058 #define FLD(f) abuf->fields.sfmt_add_b_r.f
6059   int UNUSED written = 0;
6060   IADDR UNUSED pc = abuf->addr;
6061   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6062
6063 {
6064   SI tmp_tmpopd;
6065   SI tmp_tmpops;
6066   BI tmp_carry;
6067   SI tmp_newval;
6068   tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
6069   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6070   tmp_carry = CPU (h_cbit);
6071   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6072   {
6073     SI opval = tmp_newval;
6074     SET_H_GR (FLD (f_operand2), opval);
6075     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6076   }
6077 {
6078   {
6079     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6080     CPU (h_cbit) = opval;
6081     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6082   }
6083   {
6084     BI opval = LTSI (tmp_newval, 0);
6085     CPU (h_nbit) = opval;
6086     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6087   }
6088   {
6089     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6090     CPU (h_zbit) = opval;
6091     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6092   }
6093   {
6094     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6095     CPU (h_vbit) = opval;
6096     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6097   }
6098 {
6099   {
6100     BI opval = 0;
6101     CPU (h_xbit) = opval;
6102     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6103   }
6104   {
6105     BI opval = 0;
6106     SET_H_INSN_PREFIXED_P (opval);
6107     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6108   }
6109 }
6110 }
6111 }
6112
6113 #undef FLD
6114 }
6115   NEXT (vpc);
6116
6117   CASE (sem, INSN_ADDS_W_R) : /* adds.w $Rs,$Rd */
6118 {
6119   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6120   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6121 #define FLD(f) abuf->fields.sfmt_add_b_r.f
6122   int UNUSED written = 0;
6123   IADDR UNUSED pc = abuf->addr;
6124   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6125
6126 {
6127   SI tmp_tmpopd;
6128   SI tmp_tmpops;
6129   BI tmp_carry;
6130   SI tmp_newval;
6131   tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
6132   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6133   tmp_carry = CPU (h_cbit);
6134   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6135   {
6136     SI opval = tmp_newval;
6137     SET_H_GR (FLD (f_operand2), opval);
6138     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6139   }
6140 {
6141   {
6142     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6143     CPU (h_cbit) = opval;
6144     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6145   }
6146   {
6147     BI opval = LTSI (tmp_newval, 0);
6148     CPU (h_nbit) = opval;
6149     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6150   }
6151   {
6152     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6153     CPU (h_zbit) = opval;
6154     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6155   }
6156   {
6157     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6158     CPU (h_vbit) = opval;
6159     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6160   }
6161 {
6162   {
6163     BI opval = 0;
6164     CPU (h_xbit) = opval;
6165     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6166   }
6167   {
6168     BI opval = 0;
6169     SET_H_INSN_PREFIXED_P (opval);
6170     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6171   }
6172 }
6173 }
6174 }
6175
6176 #undef FLD
6177 }
6178   NEXT (vpc);
6179
6180   CASE (sem, INSN_ADDS_M_B_M) : /* adds-m.b [${Rs}${inc}],$Rd */
6181 {
6182   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6183   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6184 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6185   int UNUSED written = 0;
6186   IADDR UNUSED pc = abuf->addr;
6187   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6188
6189 {
6190   SI tmp_tmpopd;
6191   SI tmp_tmpops;
6192   BI tmp_carry;
6193   SI tmp_newval;
6194   tmp_tmpops = EXTQISI (({   SI tmp_addr;
6195   QI tmp_tmp_mem;
6196   BI tmp_postinc;
6197   tmp_postinc = FLD (f_memmode);
6198 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6199 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
6200 ; if (NEBI (tmp_postinc, 0)) {
6201 {
6202 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6203   tmp_addr = ADDSI (tmp_addr, 1);
6204 }
6205   {
6206     SI opval = tmp_addr;
6207     SET_H_GR (FLD (f_operand1), opval);
6208     written |= (1 << 11);
6209     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6210   }
6211 }
6212 }
6213 ; tmp_tmp_mem; }));
6214   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6215   tmp_carry = CPU (h_cbit);
6216   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6217   {
6218     SI opval = tmp_newval;
6219     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6220     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6221   }
6222 {
6223   {
6224     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6225     CPU (h_cbit) = opval;
6226     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6227   }
6228   {
6229     BI opval = LTSI (tmp_newval, 0);
6230     CPU (h_nbit) = opval;
6231     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6232   }
6233   {
6234     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6235     CPU (h_zbit) = opval;
6236     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6237   }
6238   {
6239     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6240     CPU (h_vbit) = opval;
6241     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6242   }
6243 {
6244   {
6245     BI opval = 0;
6246     CPU (h_xbit) = opval;
6247     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6248   }
6249   {
6250     BI opval = 0;
6251     SET_H_INSN_PREFIXED_P (opval);
6252     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6253   }
6254 }
6255 }
6256 }
6257
6258   abuf->written = written;
6259 #undef FLD
6260 }
6261   NEXT (vpc);
6262
6263   CASE (sem, INSN_ADDS_M_W_M) : /* adds-m.w [${Rs}${inc}],$Rd */
6264 {
6265   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6266   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6267 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6268   int UNUSED written = 0;
6269   IADDR UNUSED pc = abuf->addr;
6270   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6271
6272 {
6273   SI tmp_tmpopd;
6274   SI tmp_tmpops;
6275   BI tmp_carry;
6276   SI tmp_newval;
6277   tmp_tmpops = EXTHISI (({   SI tmp_addr;
6278   HI tmp_tmp_mem;
6279   BI tmp_postinc;
6280   tmp_postinc = FLD (f_memmode);
6281 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6282 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
6283 ; if (NEBI (tmp_postinc, 0)) {
6284 {
6285 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6286   tmp_addr = ADDSI (tmp_addr, 2);
6287 }
6288   {
6289     SI opval = tmp_addr;
6290     SET_H_GR (FLD (f_operand1), opval);
6291     written |= (1 << 11);
6292     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6293   }
6294 }
6295 }
6296 ; tmp_tmp_mem; }));
6297   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6298   tmp_carry = CPU (h_cbit);
6299   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6300   {
6301     SI opval = tmp_newval;
6302     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6303     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6304   }
6305 {
6306   {
6307     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6308     CPU (h_cbit) = opval;
6309     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6310   }
6311   {
6312     BI opval = LTSI (tmp_newval, 0);
6313     CPU (h_nbit) = opval;
6314     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6315   }
6316   {
6317     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6318     CPU (h_zbit) = opval;
6319     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6320   }
6321   {
6322     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6323     CPU (h_vbit) = opval;
6324     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6325   }
6326 {
6327   {
6328     BI opval = 0;
6329     CPU (h_xbit) = opval;
6330     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6331   }
6332   {
6333     BI opval = 0;
6334     SET_H_INSN_PREFIXED_P (opval);
6335     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6336   }
6337 }
6338 }
6339 }
6340
6341   abuf->written = written;
6342 #undef FLD
6343 }
6344   NEXT (vpc);
6345
6346   CASE (sem, INSN_ADDSCBR) : /* [${Rs}${inc}],$Rd */
6347 {
6348   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6349   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6350 #define FLD(f) abuf->fields.sfmt_addcbr.f
6351   int UNUSED written = 0;
6352   IADDR UNUSED pc = abuf->addr;
6353   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6354
6355 {
6356   SI tmp_tmpopd;
6357   SI tmp_tmpops;
6358   BI tmp_carry;
6359   SI tmp_newval;
6360   tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
6361   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6362   tmp_carry = CPU (h_cbit);
6363   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6364   {
6365     SI opval = tmp_newval;
6366     SET_H_GR (FLD (f_operand2), opval);
6367     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6368   }
6369 {
6370   {
6371     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6372     CPU (h_cbit) = opval;
6373     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6374   }
6375   {
6376     BI opval = LTSI (tmp_newval, 0);
6377     CPU (h_nbit) = opval;
6378     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6379   }
6380   {
6381     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6382     CPU (h_zbit) = opval;
6383     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6384   }
6385   {
6386     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6387     CPU (h_vbit) = opval;
6388     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6389   }
6390 {
6391   {
6392     BI opval = 0;
6393     CPU (h_xbit) = opval;
6394     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6395   }
6396   {
6397     BI opval = 0;
6398     SET_H_INSN_PREFIXED_P (opval);
6399     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6400   }
6401 }
6402 }
6403 }
6404
6405 #undef FLD
6406 }
6407   NEXT (vpc);
6408
6409   CASE (sem, INSN_ADDSCWR) : /* [${Rs}${inc}],$Rd */
6410 {
6411   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6412   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6413 #define FLD(f) abuf->fields.sfmt_addcwr.f
6414   int UNUSED written = 0;
6415   IADDR UNUSED pc = abuf->addr;
6416   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6417
6418 {
6419   SI tmp_tmpopd;
6420   SI tmp_tmpops;
6421   BI tmp_carry;
6422   SI tmp_newval;
6423   tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
6424   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6425   tmp_carry = CPU (h_cbit);
6426   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6427   {
6428     SI opval = tmp_newval;
6429     SET_H_GR (FLD (f_operand2), opval);
6430     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6431   }
6432 {
6433   {
6434     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6435     CPU (h_cbit) = opval;
6436     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6437   }
6438   {
6439     BI opval = LTSI (tmp_newval, 0);
6440     CPU (h_nbit) = opval;
6441     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6442   }
6443   {
6444     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6445     CPU (h_zbit) = opval;
6446     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6447   }
6448   {
6449     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6450     CPU (h_vbit) = opval;
6451     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6452   }
6453 {
6454   {
6455     BI opval = 0;
6456     CPU (h_xbit) = opval;
6457     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6458   }
6459   {
6460     BI opval = 0;
6461     SET_H_INSN_PREFIXED_P (opval);
6462     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6463   }
6464 }
6465 }
6466 }
6467
6468 #undef FLD
6469 }
6470   NEXT (vpc);
6471
6472   CASE (sem, INSN_ADDSPCPC) : /* adds.w [PC],PC */
6473 {
6474   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6475   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6476 #define FLD(f) abuf->fields.sfmt_empty.f
6477   int UNUSED written = 0;
6478   IADDR UNUSED pc = abuf->addr;
6479   SEM_BRANCH_INIT
6480   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6481
6482 {
6483   SI tmp_newpc;
6484   SI tmp_oldpc;
6485   HI tmp_offs;
6486 if (NOTBI (GET_H_INSN_PREFIXED_P ())) {
6487 cgen_rtx_error (current_cpu, "Unexpected adds.w [PC],PC without prefix");
6488 }
6489   tmp_offs = GETMEMHI (current_cpu, pc, CPU (h_prefixreg_pre_v32));
6490   tmp_oldpc = ADDSI (pc, 2);
6491   tmp_newpc = ADDSI (tmp_oldpc, tmp_offs);
6492   {
6493     USI opval = tmp_newpc;
6494     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6495     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6496   }
6497 {
6498   {
6499     BI opval = ORIF (ANDIF (LTSI (EXTHISI (tmp_offs), 0), LTSI (tmp_oldpc, 0)), ORIF (ANDIF (LTSI (tmp_oldpc, 0), GESI (tmp_newpc, 0)), ANDIF (LTSI (EXTHISI (tmp_offs), 0), GESI (tmp_newpc, 0))));
6500     CPU (h_cbit) = opval;
6501     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6502   }
6503   {
6504     BI opval = LTSI (tmp_newpc, 0);
6505     CPU (h_nbit) = opval;
6506     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6507   }
6508   {
6509     BI opval = ANDIF (EQSI (tmp_newpc, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6510     CPU (h_zbit) = opval;
6511     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6512   }
6513   {
6514     BI opval = ORIF (ANDIF (ANDIF (LTSI (EXTHISI (tmp_offs), 0), LTSI (tmp_oldpc, 0)), GESI (tmp_newpc, 0)), ANDIF (ANDIF (GESI (EXTHISI (tmp_offs), 0), GESI (tmp_oldpc, 0)), LTSI (tmp_newpc, 0)));
6515     CPU (h_vbit) = opval;
6516     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6517   }
6518 {
6519   {
6520     BI opval = 0;
6521     CPU (h_xbit) = opval;
6522     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6523   }
6524   {
6525     BI opval = 0;
6526     SET_H_INSN_PREFIXED_P (opval);
6527     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6528   }
6529 }
6530 }
6531 }
6532
6533   SEM_BRANCH_FINI (vpc);
6534 #undef FLD
6535 }
6536   NEXT (vpc);
6537
6538   CASE (sem, INSN_ADDU_B_R) : /* addu.b $Rs,$Rd */
6539 {
6540   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6541   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6542 #define FLD(f) abuf->fields.sfmt_add_b_r.f
6543   int UNUSED written = 0;
6544   IADDR UNUSED pc = abuf->addr;
6545   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6546
6547 {
6548   SI tmp_tmpopd;
6549   SI tmp_tmpops;
6550   BI tmp_carry;
6551   SI tmp_newval;
6552   tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
6553   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6554   tmp_carry = CPU (h_cbit);
6555   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6556   {
6557     SI opval = tmp_newval;
6558     SET_H_GR (FLD (f_operand2), opval);
6559     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6560   }
6561 {
6562   {
6563     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6564     CPU (h_cbit) = opval;
6565     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6566   }
6567   {
6568     BI opval = LTSI (tmp_newval, 0);
6569     CPU (h_nbit) = opval;
6570     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6571   }
6572   {
6573     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6574     CPU (h_zbit) = opval;
6575     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6576   }
6577   {
6578     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6579     CPU (h_vbit) = opval;
6580     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6581   }
6582 {
6583   {
6584     BI opval = 0;
6585     CPU (h_xbit) = opval;
6586     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6587   }
6588   {
6589     BI opval = 0;
6590     SET_H_INSN_PREFIXED_P (opval);
6591     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6592   }
6593 }
6594 }
6595 }
6596
6597 #undef FLD
6598 }
6599   NEXT (vpc);
6600
6601   CASE (sem, INSN_ADDU_W_R) : /* addu.w $Rs,$Rd */
6602 {
6603   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6604   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6605 #define FLD(f) abuf->fields.sfmt_add_b_r.f
6606   int UNUSED written = 0;
6607   IADDR UNUSED pc = abuf->addr;
6608   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6609
6610 {
6611   SI tmp_tmpopd;
6612   SI tmp_tmpops;
6613   BI tmp_carry;
6614   SI tmp_newval;
6615   tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
6616   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6617   tmp_carry = CPU (h_cbit);
6618   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6619   {
6620     SI opval = tmp_newval;
6621     SET_H_GR (FLD (f_operand2), opval);
6622     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6623   }
6624 {
6625   {
6626     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6627     CPU (h_cbit) = opval;
6628     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6629   }
6630   {
6631     BI opval = LTSI (tmp_newval, 0);
6632     CPU (h_nbit) = opval;
6633     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6634   }
6635   {
6636     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6637     CPU (h_zbit) = opval;
6638     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6639   }
6640   {
6641     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6642     CPU (h_vbit) = opval;
6643     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6644   }
6645 {
6646   {
6647     BI opval = 0;
6648     CPU (h_xbit) = opval;
6649     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6650   }
6651   {
6652     BI opval = 0;
6653     SET_H_INSN_PREFIXED_P (opval);
6654     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6655   }
6656 }
6657 }
6658 }
6659
6660 #undef FLD
6661 }
6662   NEXT (vpc);
6663
6664   CASE (sem, INSN_ADDU_M_B_M) : /* addu-m.b [${Rs}${inc}],$Rd */
6665 {
6666   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6667   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6668 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6669   int UNUSED written = 0;
6670   IADDR UNUSED pc = abuf->addr;
6671   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6672
6673 {
6674   SI tmp_tmpopd;
6675   SI tmp_tmpops;
6676   BI tmp_carry;
6677   SI tmp_newval;
6678   tmp_tmpops = ZEXTQISI (({   SI tmp_addr;
6679   QI tmp_tmp_mem;
6680   BI tmp_postinc;
6681   tmp_postinc = FLD (f_memmode);
6682 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6683 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
6684 ; if (NEBI (tmp_postinc, 0)) {
6685 {
6686 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6687   tmp_addr = ADDSI (tmp_addr, 1);
6688 }
6689   {
6690     SI opval = tmp_addr;
6691     SET_H_GR (FLD (f_operand1), opval);
6692     written |= (1 << 11);
6693     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6694   }
6695 }
6696 }
6697 ; tmp_tmp_mem; }));
6698   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6699   tmp_carry = CPU (h_cbit);
6700   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6701   {
6702     SI opval = tmp_newval;
6703     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6704     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6705   }
6706 {
6707   {
6708     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6709     CPU (h_cbit) = opval;
6710     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6711   }
6712   {
6713     BI opval = LTSI (tmp_newval, 0);
6714     CPU (h_nbit) = opval;
6715     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6716   }
6717   {
6718     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6719     CPU (h_zbit) = opval;
6720     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6721   }
6722   {
6723     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6724     CPU (h_vbit) = opval;
6725     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6726   }
6727 {
6728   {
6729     BI opval = 0;
6730     CPU (h_xbit) = opval;
6731     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6732   }
6733   {
6734     BI opval = 0;
6735     SET_H_INSN_PREFIXED_P (opval);
6736     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6737   }
6738 }
6739 }
6740 }
6741
6742   abuf->written = written;
6743 #undef FLD
6744 }
6745   NEXT (vpc);
6746
6747   CASE (sem, INSN_ADDU_M_W_M) : /* addu-m.w [${Rs}${inc}],$Rd */
6748 {
6749   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6750   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6751 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6752   int UNUSED written = 0;
6753   IADDR UNUSED pc = abuf->addr;
6754   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6755
6756 {
6757   SI tmp_tmpopd;
6758   SI tmp_tmpops;
6759   BI tmp_carry;
6760   SI tmp_newval;
6761   tmp_tmpops = ZEXTHISI (({   SI tmp_addr;
6762   HI tmp_tmp_mem;
6763   BI tmp_postinc;
6764   tmp_postinc = FLD (f_memmode);
6765 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6766 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
6767 ; if (NEBI (tmp_postinc, 0)) {
6768 {
6769 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6770   tmp_addr = ADDSI (tmp_addr, 2);
6771 }
6772   {
6773     SI opval = tmp_addr;
6774     SET_H_GR (FLD (f_operand1), opval);
6775     written |= (1 << 11);
6776     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6777   }
6778 }
6779 }
6780 ; tmp_tmp_mem; }));
6781   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6782   tmp_carry = CPU (h_cbit);
6783   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6784   {
6785     SI opval = tmp_newval;
6786     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6787     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6788   }
6789 {
6790   {
6791     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6792     CPU (h_cbit) = opval;
6793     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6794   }
6795   {
6796     BI opval = LTSI (tmp_newval, 0);
6797     CPU (h_nbit) = opval;
6798     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6799   }
6800   {
6801     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6802     CPU (h_zbit) = opval;
6803     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6804   }
6805   {
6806     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6807     CPU (h_vbit) = opval;
6808     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6809   }
6810 {
6811   {
6812     BI opval = 0;
6813     CPU (h_xbit) = opval;
6814     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6815   }
6816   {
6817     BI opval = 0;
6818     SET_H_INSN_PREFIXED_P (opval);
6819     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6820   }
6821 }
6822 }
6823 }
6824
6825   abuf->written = written;
6826 #undef FLD
6827 }
6828   NEXT (vpc);
6829
6830   CASE (sem, INSN_ADDUCBR) : /* [${Rs}${inc}],$Rd */
6831 {
6832   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6833   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6834 #define FLD(f) abuf->fields.sfmt_addcbr.f
6835   int UNUSED written = 0;
6836   IADDR UNUSED pc = abuf->addr;
6837   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6838
6839 {
6840   SI tmp_tmpopd;
6841   SI tmp_tmpops;
6842   BI tmp_carry;
6843   SI tmp_newval;
6844   tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
6845   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6846   tmp_carry = CPU (h_cbit);
6847   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6848   {
6849     SI opval = tmp_newval;
6850     SET_H_GR (FLD (f_operand2), opval);
6851     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6852   }
6853 {
6854   {
6855     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6856     CPU (h_cbit) = opval;
6857     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6858   }
6859   {
6860     BI opval = LTSI (tmp_newval, 0);
6861     CPU (h_nbit) = opval;
6862     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6863   }
6864   {
6865     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6866     CPU (h_zbit) = opval;
6867     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6868   }
6869   {
6870     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6871     CPU (h_vbit) = opval;
6872     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6873   }
6874 {
6875   {
6876     BI opval = 0;
6877     CPU (h_xbit) = opval;
6878     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6879   }
6880   {
6881     BI opval = 0;
6882     SET_H_INSN_PREFIXED_P (opval);
6883     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6884   }
6885 }
6886 }
6887 }
6888
6889 #undef FLD
6890 }
6891   NEXT (vpc);
6892
6893   CASE (sem, INSN_ADDUCWR) : /* [${Rs}${inc}],$Rd */
6894 {
6895   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6896   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6897 #define FLD(f) abuf->fields.sfmt_addcwr.f
6898   int UNUSED written = 0;
6899   IADDR UNUSED pc = abuf->addr;
6900   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6901
6902 {
6903   SI tmp_tmpopd;
6904   SI tmp_tmpops;
6905   BI tmp_carry;
6906   SI tmp_newval;
6907   tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
6908   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6909   tmp_carry = CPU (h_cbit);
6910   tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6911   {
6912     SI opval = tmp_newval;
6913     SET_H_GR (FLD (f_operand2), opval);
6914     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6915   }
6916 {
6917   {
6918     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6919     CPU (h_cbit) = opval;
6920     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6921   }
6922   {
6923     BI opval = LTSI (tmp_newval, 0);
6924     CPU (h_nbit) = opval;
6925     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6926   }
6927   {
6928     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6929     CPU (h_zbit) = opval;
6930     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6931   }
6932   {
6933     BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6934     CPU (h_vbit) = opval;
6935     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6936   }
6937 {
6938   {
6939     BI opval = 0;
6940     CPU (h_xbit) = opval;
6941     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6942   }
6943   {
6944     BI opval = 0;
6945     SET_H_INSN_PREFIXED_P (opval);
6946     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6947   }
6948 }
6949 }
6950 }
6951
6952 #undef FLD
6953 }
6954   NEXT (vpc);
6955
6956   CASE (sem, INSN_SUB_B_R) : /* sub.b $Rs,$Rd */
6957 {
6958   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6959   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6960 #define FLD(f) abuf->fields.sfmt_add_b_r.f
6961   int UNUSED written = 0;
6962   IADDR UNUSED pc = abuf->addr;
6963   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6964
6965 {
6966   QI tmp_tmpopd;
6967   QI tmp_tmpops;
6968   BI tmp_carry;
6969   QI tmp_newval;
6970   tmp_tmpops = GET_H_GR (FLD (f_operand1));
6971   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6972   tmp_carry = CPU (h_cbit);
6973   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6974 {
6975   SI tmp_oldregval;
6976   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
6977   {
6978     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
6979     SET_H_GR (FLD (f_operand2), opval);
6980     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6981   }
6982 }
6983 {
6984   {
6985     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
6986     CPU (h_cbit) = opval;
6987     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6988   }
6989   {
6990     BI opval = LTQI (tmp_newval, 0);
6991     CPU (h_nbit) = opval;
6992     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6993   }
6994   {
6995     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6996     CPU (h_zbit) = opval;
6997     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6998   }
6999   {
7000     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
7001     CPU (h_vbit) = opval;
7002     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7003   }
7004 {
7005   {
7006     BI opval = 0;
7007     CPU (h_xbit) = opval;
7008     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7009   }
7010   {
7011     BI opval = 0;
7012     SET_H_INSN_PREFIXED_P (opval);
7013     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7014   }
7015 }
7016 }
7017 }
7018
7019 #undef FLD
7020 }
7021   NEXT (vpc);
7022
7023   CASE (sem, INSN_SUB_W_R) : /* sub.w $Rs,$Rd */
7024 {
7025   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7026   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7027 #define FLD(f) abuf->fields.sfmt_add_b_r.f
7028   int UNUSED written = 0;
7029   IADDR UNUSED pc = abuf->addr;
7030   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7031
7032 {
7033   HI tmp_tmpopd;
7034   HI tmp_tmpops;
7035   BI tmp_carry;
7036   HI tmp_newval;
7037   tmp_tmpops = GET_H_GR (FLD (f_operand1));
7038   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7039   tmp_carry = CPU (h_cbit);
7040   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7041 {
7042   SI tmp_oldregval;
7043   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
7044   {
7045     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
7046     SET_H_GR (FLD (f_operand2), opval);
7047     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7048   }
7049 }
7050 {
7051   {
7052     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
7053     CPU (h_cbit) = opval;
7054     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7055   }
7056   {
7057     BI opval = LTHI (tmp_newval, 0);
7058     CPU (h_nbit) = opval;
7059     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7060   }
7061   {
7062     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7063     CPU (h_zbit) = opval;
7064     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7065   }
7066   {
7067     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
7068     CPU (h_vbit) = opval;
7069     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7070   }
7071 {
7072   {
7073     BI opval = 0;
7074     CPU (h_xbit) = opval;
7075     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7076   }
7077   {
7078     BI opval = 0;
7079     SET_H_INSN_PREFIXED_P (opval);
7080     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7081   }
7082 }
7083 }
7084 }
7085
7086 #undef FLD
7087 }
7088   NEXT (vpc);
7089
7090   CASE (sem, INSN_SUB_D_R) : /* sub.d $Rs,$Rd */
7091 {
7092   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7093   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7094 #define FLD(f) abuf->fields.sfmt_add_b_r.f
7095   int UNUSED written = 0;
7096   IADDR UNUSED pc = abuf->addr;
7097   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7098
7099 {
7100   SI tmp_tmpopd;
7101   SI tmp_tmpops;
7102   BI tmp_carry;
7103   SI tmp_newval;
7104   tmp_tmpops = GET_H_GR (FLD (f_operand1));
7105   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7106   tmp_carry = CPU (h_cbit);
7107   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7108   {
7109     SI opval = tmp_newval;
7110     SET_H_GR (FLD (f_operand2), opval);
7111     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7112   }
7113 {
7114   {
7115     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7116     CPU (h_cbit) = opval;
7117     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7118   }
7119   {
7120     BI opval = LTSI (tmp_newval, 0);
7121     CPU (h_nbit) = opval;
7122     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7123   }
7124   {
7125     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7126     CPU (h_zbit) = opval;
7127     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7128   }
7129   {
7130     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7131     CPU (h_vbit) = opval;
7132     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7133   }
7134 {
7135   {
7136     BI opval = 0;
7137     CPU (h_xbit) = opval;
7138     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7139   }
7140   {
7141     BI opval = 0;
7142     SET_H_INSN_PREFIXED_P (opval);
7143     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7144   }
7145 }
7146 }
7147 }
7148
7149 #undef FLD
7150 }
7151   NEXT (vpc);
7152
7153   CASE (sem, INSN_SUB_M_B_M) : /* sub-m.b [${Rs}${inc}],${Rd} */
7154 {
7155   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7156   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7157 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7158   int UNUSED written = 0;
7159   IADDR UNUSED pc = abuf->addr;
7160   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7161
7162 {
7163   QI tmp_tmpopd;
7164   QI tmp_tmpops;
7165   BI tmp_carry;
7166   QI tmp_newval;
7167   tmp_tmpops = ({   SI tmp_addr;
7168   QI tmp_tmp_mem;
7169   BI tmp_postinc;
7170   tmp_postinc = FLD (f_memmode);
7171 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7172 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
7173 ; if (NEBI (tmp_postinc, 0)) {
7174 {
7175 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7176   tmp_addr = ADDSI (tmp_addr, 1);
7177 }
7178   {
7179     SI opval = tmp_addr;
7180     SET_H_GR (FLD (f_operand1), opval);
7181     written |= (1 << 12);
7182     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7183   }
7184 }
7185 }
7186 ; tmp_tmp_mem; });
7187   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7188   tmp_carry = CPU (h_cbit);
7189   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7190 {
7191   SI tmp_oldregval;
7192   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
7193   {
7194     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
7195     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7196     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7197   }
7198 }
7199 {
7200   {
7201     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
7202     CPU (h_cbit) = opval;
7203     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7204   }
7205   {
7206     BI opval = LTQI (tmp_newval, 0);
7207     CPU (h_nbit) = opval;
7208     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7209   }
7210   {
7211     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7212     CPU (h_zbit) = opval;
7213     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7214   }
7215   {
7216     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
7217     CPU (h_vbit) = opval;
7218     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7219   }
7220 {
7221   {
7222     BI opval = 0;
7223     CPU (h_xbit) = opval;
7224     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7225   }
7226   {
7227     BI opval = 0;
7228     SET_H_INSN_PREFIXED_P (opval);
7229     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7230   }
7231 }
7232 }
7233 }
7234
7235   abuf->written = written;
7236 #undef FLD
7237 }
7238   NEXT (vpc);
7239
7240   CASE (sem, INSN_SUB_M_W_M) : /* sub-m.w [${Rs}${inc}],${Rd} */
7241 {
7242   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7243   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7244 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7245   int UNUSED written = 0;
7246   IADDR UNUSED pc = abuf->addr;
7247   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7248
7249 {
7250   HI tmp_tmpopd;
7251   HI tmp_tmpops;
7252   BI tmp_carry;
7253   HI tmp_newval;
7254   tmp_tmpops = ({   SI tmp_addr;
7255   HI tmp_tmp_mem;
7256   BI tmp_postinc;
7257   tmp_postinc = FLD (f_memmode);
7258 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7259 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
7260 ; if (NEBI (tmp_postinc, 0)) {
7261 {
7262 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7263   tmp_addr = ADDSI (tmp_addr, 2);
7264 }
7265   {
7266     SI opval = tmp_addr;
7267     SET_H_GR (FLD (f_operand1), opval);
7268     written |= (1 << 12);
7269     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7270   }
7271 }
7272 }
7273 ; tmp_tmp_mem; });
7274   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7275   tmp_carry = CPU (h_cbit);
7276   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7277 {
7278   SI tmp_oldregval;
7279   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
7280   {
7281     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
7282     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7283     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7284   }
7285 }
7286 {
7287   {
7288     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
7289     CPU (h_cbit) = opval;
7290     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7291   }
7292   {
7293     BI opval = LTHI (tmp_newval, 0);
7294     CPU (h_nbit) = opval;
7295     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7296   }
7297   {
7298     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7299     CPU (h_zbit) = opval;
7300     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7301   }
7302   {
7303     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
7304     CPU (h_vbit) = opval;
7305     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7306   }
7307 {
7308   {
7309     BI opval = 0;
7310     CPU (h_xbit) = opval;
7311     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7312   }
7313   {
7314     BI opval = 0;
7315     SET_H_INSN_PREFIXED_P (opval);
7316     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7317   }
7318 }
7319 }
7320 }
7321
7322   abuf->written = written;
7323 #undef FLD
7324 }
7325   NEXT (vpc);
7326
7327   CASE (sem, INSN_SUB_M_D_M) : /* sub-m.d [${Rs}${inc}],${Rd} */
7328 {
7329   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7330   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7331 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7332   int UNUSED written = 0;
7333   IADDR UNUSED pc = abuf->addr;
7334   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7335
7336 {
7337   SI tmp_tmpopd;
7338   SI tmp_tmpops;
7339   BI tmp_carry;
7340   SI tmp_newval;
7341   tmp_tmpops = ({   SI tmp_addr;
7342   SI tmp_tmp_mem;
7343   BI tmp_postinc;
7344   tmp_postinc = FLD (f_memmode);
7345 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7346 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
7347 ; if (NEBI (tmp_postinc, 0)) {
7348 {
7349 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7350   tmp_addr = ADDSI (tmp_addr, 4);
7351 }
7352   {
7353     SI opval = tmp_addr;
7354     SET_H_GR (FLD (f_operand1), opval);
7355     written |= (1 << 11);
7356     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7357   }
7358 }
7359 }
7360 ; tmp_tmp_mem; });
7361   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7362   tmp_carry = CPU (h_cbit);
7363   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7364   {
7365     SI opval = tmp_newval;
7366     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7367     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7368   }
7369 {
7370   {
7371     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7372     CPU (h_cbit) = opval;
7373     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7374   }
7375   {
7376     BI opval = LTSI (tmp_newval, 0);
7377     CPU (h_nbit) = opval;
7378     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7379   }
7380   {
7381     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7382     CPU (h_zbit) = opval;
7383     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7384   }
7385   {
7386     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7387     CPU (h_vbit) = opval;
7388     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7389   }
7390 {
7391   {
7392     BI opval = 0;
7393     CPU (h_xbit) = opval;
7394     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7395   }
7396   {
7397     BI opval = 0;
7398     SET_H_INSN_PREFIXED_P (opval);
7399     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7400   }
7401 }
7402 }
7403 }
7404
7405   abuf->written = written;
7406 #undef FLD
7407 }
7408   NEXT (vpc);
7409
7410   CASE (sem, INSN_SUBCBR) : /* sub.b ${sconst8}],${Rd} */
7411 {
7412   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7413   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7414 #define FLD(f) abuf->fields.sfmt_addcbr.f
7415   int UNUSED written = 0;
7416   IADDR UNUSED pc = abuf->addr;
7417   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7418
7419 {
7420   QI tmp_tmpopd;
7421   QI tmp_tmpops;
7422   BI tmp_carry;
7423   QI tmp_newval;
7424   tmp_tmpops = FLD (f_indir_pc__byte);
7425   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7426   tmp_carry = CPU (h_cbit);
7427   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7428 {
7429   SI tmp_oldregval;
7430   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
7431   {
7432     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
7433     SET_H_GR (FLD (f_operand2), opval);
7434     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7435   }
7436 }
7437 {
7438   {
7439     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
7440     CPU (h_cbit) = opval;
7441     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7442   }
7443   {
7444     BI opval = LTQI (tmp_newval, 0);
7445     CPU (h_nbit) = opval;
7446     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7447   }
7448   {
7449     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7450     CPU (h_zbit) = opval;
7451     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7452   }
7453   {
7454     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
7455     CPU (h_vbit) = opval;
7456     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7457   }
7458 {
7459   {
7460     BI opval = 0;
7461     CPU (h_xbit) = opval;
7462     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7463   }
7464   {
7465     BI opval = 0;
7466     SET_H_INSN_PREFIXED_P (opval);
7467     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7468   }
7469 }
7470 }
7471 }
7472
7473 #undef FLD
7474 }
7475   NEXT (vpc);
7476
7477   CASE (sem, INSN_SUBCWR) : /* sub.w ${sconst16}],${Rd} */
7478 {
7479   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7480   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7481 #define FLD(f) abuf->fields.sfmt_addcwr.f
7482   int UNUSED written = 0;
7483   IADDR UNUSED pc = abuf->addr;
7484   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7485
7486 {
7487   HI tmp_tmpopd;
7488   HI tmp_tmpops;
7489   BI tmp_carry;
7490   HI tmp_newval;
7491   tmp_tmpops = FLD (f_indir_pc__word);
7492   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7493   tmp_carry = CPU (h_cbit);
7494   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7495 {
7496   SI tmp_oldregval;
7497   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
7498   {
7499     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
7500     SET_H_GR (FLD (f_operand2), opval);
7501     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7502   }
7503 }
7504 {
7505   {
7506     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
7507     CPU (h_cbit) = opval;
7508     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7509   }
7510   {
7511     BI opval = LTHI (tmp_newval, 0);
7512     CPU (h_nbit) = opval;
7513     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7514   }
7515   {
7516     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7517     CPU (h_zbit) = opval;
7518     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7519   }
7520   {
7521     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
7522     CPU (h_vbit) = opval;
7523     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7524   }
7525 {
7526   {
7527     BI opval = 0;
7528     CPU (h_xbit) = opval;
7529     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7530   }
7531   {
7532     BI opval = 0;
7533     SET_H_INSN_PREFIXED_P (opval);
7534     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7535   }
7536 }
7537 }
7538 }
7539
7540 #undef FLD
7541 }
7542   NEXT (vpc);
7543
7544   CASE (sem, INSN_SUBCDR) : /* sub.d ${const32}],${Rd} */
7545 {
7546   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7547   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7548 #define FLD(f) abuf->fields.sfmt_addcdr.f
7549   int UNUSED written = 0;
7550   IADDR UNUSED pc = abuf->addr;
7551   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
7552
7553 {
7554   SI tmp_tmpopd;
7555   SI tmp_tmpops;
7556   BI tmp_carry;
7557   SI tmp_newval;
7558   tmp_tmpops = FLD (f_indir_pc__dword);
7559   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7560   tmp_carry = CPU (h_cbit);
7561   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7562   {
7563     SI opval = tmp_newval;
7564     SET_H_GR (FLD (f_operand2), opval);
7565     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7566   }
7567 {
7568   {
7569     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7570     CPU (h_cbit) = opval;
7571     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7572   }
7573   {
7574     BI opval = LTSI (tmp_newval, 0);
7575     CPU (h_nbit) = opval;
7576     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7577   }
7578   {
7579     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7580     CPU (h_zbit) = opval;
7581     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7582   }
7583   {
7584     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7585     CPU (h_vbit) = opval;
7586     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7587   }
7588 {
7589   {
7590     BI opval = 0;
7591     CPU (h_xbit) = opval;
7592     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7593   }
7594   {
7595     BI opval = 0;
7596     SET_H_INSN_PREFIXED_P (opval);
7597     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7598   }
7599 }
7600 }
7601 }
7602
7603 #undef FLD
7604 }
7605   NEXT (vpc);
7606
7607   CASE (sem, INSN_SUBS_B_R) : /* subs.b $Rs,$Rd */
7608 {
7609   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7610   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7611 #define FLD(f) abuf->fields.sfmt_add_b_r.f
7612   int UNUSED written = 0;
7613   IADDR UNUSED pc = abuf->addr;
7614   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7615
7616 {
7617   SI tmp_tmpopd;
7618   SI tmp_tmpops;
7619   BI tmp_carry;
7620   SI tmp_newval;
7621   tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
7622   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7623   tmp_carry = CPU (h_cbit);
7624   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7625   {
7626     SI opval = tmp_newval;
7627     SET_H_GR (FLD (f_operand2), opval);
7628     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7629   }
7630 {
7631   {
7632     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7633     CPU (h_cbit) = opval;
7634     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7635   }
7636   {
7637     BI opval = LTSI (tmp_newval, 0);
7638     CPU (h_nbit) = opval;
7639     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7640   }
7641   {
7642     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7643     CPU (h_zbit) = opval;
7644     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7645   }
7646   {
7647     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7648     CPU (h_vbit) = opval;
7649     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7650   }
7651 {
7652   {
7653     BI opval = 0;
7654     CPU (h_xbit) = opval;
7655     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7656   }
7657   {
7658     BI opval = 0;
7659     SET_H_INSN_PREFIXED_P (opval);
7660     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7661   }
7662 }
7663 }
7664 }
7665
7666 #undef FLD
7667 }
7668   NEXT (vpc);
7669
7670   CASE (sem, INSN_SUBS_W_R) : /* subs.w $Rs,$Rd */
7671 {
7672   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7673   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7674 #define FLD(f) abuf->fields.sfmt_add_b_r.f
7675   int UNUSED written = 0;
7676   IADDR UNUSED pc = abuf->addr;
7677   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7678
7679 {
7680   SI tmp_tmpopd;
7681   SI tmp_tmpops;
7682   BI tmp_carry;
7683   SI tmp_newval;
7684   tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
7685   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7686   tmp_carry = CPU (h_cbit);
7687   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7688   {
7689     SI opval = tmp_newval;
7690     SET_H_GR (FLD (f_operand2), opval);
7691     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7692   }
7693 {
7694   {
7695     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7696     CPU (h_cbit) = opval;
7697     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7698   }
7699   {
7700     BI opval = LTSI (tmp_newval, 0);
7701     CPU (h_nbit) = opval;
7702     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7703   }
7704   {
7705     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7706     CPU (h_zbit) = opval;
7707     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7708   }
7709   {
7710     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7711     CPU (h_vbit) = opval;
7712     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7713   }
7714 {
7715   {
7716     BI opval = 0;
7717     CPU (h_xbit) = opval;
7718     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7719   }
7720   {
7721     BI opval = 0;
7722     SET_H_INSN_PREFIXED_P (opval);
7723     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7724   }
7725 }
7726 }
7727 }
7728
7729 #undef FLD
7730 }
7731   NEXT (vpc);
7732
7733   CASE (sem, INSN_SUBS_M_B_M) : /* subs-m.b [${Rs}${inc}],$Rd */
7734 {
7735   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7736   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7737 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7738   int UNUSED written = 0;
7739   IADDR UNUSED pc = abuf->addr;
7740   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7741
7742 {
7743   SI tmp_tmpopd;
7744   SI tmp_tmpops;
7745   BI tmp_carry;
7746   SI tmp_newval;
7747   tmp_tmpops = EXTQISI (({   SI tmp_addr;
7748   QI tmp_tmp_mem;
7749   BI tmp_postinc;
7750   tmp_postinc = FLD (f_memmode);
7751 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7752 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
7753 ; if (NEBI (tmp_postinc, 0)) {
7754 {
7755 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7756   tmp_addr = ADDSI (tmp_addr, 1);
7757 }
7758   {
7759     SI opval = tmp_addr;
7760     SET_H_GR (FLD (f_operand1), opval);
7761     written |= (1 << 11);
7762     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7763   }
7764 }
7765 }
7766 ; tmp_tmp_mem; }));
7767   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7768   tmp_carry = CPU (h_cbit);
7769   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7770   {
7771     SI opval = tmp_newval;
7772     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7773     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7774   }
7775 {
7776   {
7777     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7778     CPU (h_cbit) = opval;
7779     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7780   }
7781   {
7782     BI opval = LTSI (tmp_newval, 0);
7783     CPU (h_nbit) = opval;
7784     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7785   }
7786   {
7787     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7788     CPU (h_zbit) = opval;
7789     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7790   }
7791   {
7792     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7793     CPU (h_vbit) = opval;
7794     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7795   }
7796 {
7797   {
7798     BI opval = 0;
7799     CPU (h_xbit) = opval;
7800     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7801   }
7802   {
7803     BI opval = 0;
7804     SET_H_INSN_PREFIXED_P (opval);
7805     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7806   }
7807 }
7808 }
7809 }
7810
7811   abuf->written = written;
7812 #undef FLD
7813 }
7814   NEXT (vpc);
7815
7816   CASE (sem, INSN_SUBS_M_W_M) : /* subs-m.w [${Rs}${inc}],$Rd */
7817 {
7818   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7819   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7820 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7821   int UNUSED written = 0;
7822   IADDR UNUSED pc = abuf->addr;
7823   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7824
7825 {
7826   SI tmp_tmpopd;
7827   SI tmp_tmpops;
7828   BI tmp_carry;
7829   SI tmp_newval;
7830   tmp_tmpops = EXTHISI (({   SI tmp_addr;
7831   HI tmp_tmp_mem;
7832   BI tmp_postinc;
7833   tmp_postinc = FLD (f_memmode);
7834 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7835 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
7836 ; if (NEBI (tmp_postinc, 0)) {
7837 {
7838 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7839   tmp_addr = ADDSI (tmp_addr, 2);
7840 }
7841   {
7842     SI opval = tmp_addr;
7843     SET_H_GR (FLD (f_operand1), opval);
7844     written |= (1 << 11);
7845     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7846   }
7847 }
7848 }
7849 ; tmp_tmp_mem; }));
7850   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7851   tmp_carry = CPU (h_cbit);
7852   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7853   {
7854     SI opval = tmp_newval;
7855     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7856     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7857   }
7858 {
7859   {
7860     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7861     CPU (h_cbit) = opval;
7862     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7863   }
7864   {
7865     BI opval = LTSI (tmp_newval, 0);
7866     CPU (h_nbit) = opval;
7867     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7868   }
7869   {
7870     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7871     CPU (h_zbit) = opval;
7872     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7873   }
7874   {
7875     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7876     CPU (h_vbit) = opval;
7877     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7878   }
7879 {
7880   {
7881     BI opval = 0;
7882     CPU (h_xbit) = opval;
7883     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7884   }
7885   {
7886     BI opval = 0;
7887     SET_H_INSN_PREFIXED_P (opval);
7888     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7889   }
7890 }
7891 }
7892 }
7893
7894   abuf->written = written;
7895 #undef FLD
7896 }
7897   NEXT (vpc);
7898
7899   CASE (sem, INSN_SUBSCBR) : /* [${Rs}${inc}],$Rd */
7900 {
7901   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7902   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7903 #define FLD(f) abuf->fields.sfmt_addcbr.f
7904   int UNUSED written = 0;
7905   IADDR UNUSED pc = abuf->addr;
7906   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7907
7908 {
7909   SI tmp_tmpopd;
7910   SI tmp_tmpops;
7911   BI tmp_carry;
7912   SI tmp_newval;
7913   tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
7914   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7915   tmp_carry = CPU (h_cbit);
7916   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7917   {
7918     SI opval = tmp_newval;
7919     SET_H_GR (FLD (f_operand2), opval);
7920     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7921   }
7922 {
7923   {
7924     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7925     CPU (h_cbit) = opval;
7926     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7927   }
7928   {
7929     BI opval = LTSI (tmp_newval, 0);
7930     CPU (h_nbit) = opval;
7931     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7932   }
7933   {
7934     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7935     CPU (h_zbit) = opval;
7936     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7937   }
7938   {
7939     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7940     CPU (h_vbit) = opval;
7941     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7942   }
7943 {
7944   {
7945     BI opval = 0;
7946     CPU (h_xbit) = opval;
7947     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7948   }
7949   {
7950     BI opval = 0;
7951     SET_H_INSN_PREFIXED_P (opval);
7952     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7953   }
7954 }
7955 }
7956 }
7957
7958 #undef FLD
7959 }
7960   NEXT (vpc);
7961
7962   CASE (sem, INSN_SUBSCWR) : /* [${Rs}${inc}],$Rd */
7963 {
7964   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7965   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7966 #define FLD(f) abuf->fields.sfmt_addcwr.f
7967   int UNUSED written = 0;
7968   IADDR UNUSED pc = abuf->addr;
7969   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7970
7971 {
7972   SI tmp_tmpopd;
7973   SI tmp_tmpops;
7974   BI tmp_carry;
7975   SI tmp_newval;
7976   tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
7977   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7978   tmp_carry = CPU (h_cbit);
7979   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7980   {
7981     SI opval = tmp_newval;
7982     SET_H_GR (FLD (f_operand2), opval);
7983     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7984   }
7985 {
7986   {
7987     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7988     CPU (h_cbit) = opval;
7989     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7990   }
7991   {
7992     BI opval = LTSI (tmp_newval, 0);
7993     CPU (h_nbit) = opval;
7994     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7995   }
7996   {
7997     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7998     CPU (h_zbit) = opval;
7999     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8000   }
8001   {
8002     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8003     CPU (h_vbit) = opval;
8004     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8005   }
8006 {
8007   {
8008     BI opval = 0;
8009     CPU (h_xbit) = opval;
8010     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8011   }
8012   {
8013     BI opval = 0;
8014     SET_H_INSN_PREFIXED_P (opval);
8015     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8016   }
8017 }
8018 }
8019 }
8020
8021 #undef FLD
8022 }
8023   NEXT (vpc);
8024
8025   CASE (sem, INSN_SUBU_B_R) : /* subu.b $Rs,$Rd */
8026 {
8027   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8028   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8029 #define FLD(f) abuf->fields.sfmt_add_b_r.f
8030   int UNUSED written = 0;
8031   IADDR UNUSED pc = abuf->addr;
8032   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8033
8034 {
8035   SI tmp_tmpopd;
8036   SI tmp_tmpops;
8037   BI tmp_carry;
8038   SI tmp_newval;
8039   tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
8040   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8041   tmp_carry = CPU (h_cbit);
8042   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8043   {
8044     SI opval = tmp_newval;
8045     SET_H_GR (FLD (f_operand2), opval);
8046     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8047   }
8048 {
8049   {
8050     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8051     CPU (h_cbit) = opval;
8052     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8053   }
8054   {
8055     BI opval = LTSI (tmp_newval, 0);
8056     CPU (h_nbit) = opval;
8057     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8058   }
8059   {
8060     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8061     CPU (h_zbit) = opval;
8062     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8063   }
8064   {
8065     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8066     CPU (h_vbit) = opval;
8067     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8068   }
8069 {
8070   {
8071     BI opval = 0;
8072     CPU (h_xbit) = opval;
8073     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8074   }
8075   {
8076     BI opval = 0;
8077     SET_H_INSN_PREFIXED_P (opval);
8078     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8079   }
8080 }
8081 }
8082 }
8083
8084 #undef FLD
8085 }
8086   NEXT (vpc);
8087
8088   CASE (sem, INSN_SUBU_W_R) : /* subu.w $Rs,$Rd */
8089 {
8090   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8091   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8092 #define FLD(f) abuf->fields.sfmt_add_b_r.f
8093   int UNUSED written = 0;
8094   IADDR UNUSED pc = abuf->addr;
8095   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8096
8097 {
8098   SI tmp_tmpopd;
8099   SI tmp_tmpops;
8100   BI tmp_carry;
8101   SI tmp_newval;
8102   tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
8103   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8104   tmp_carry = CPU (h_cbit);
8105   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8106   {
8107     SI opval = tmp_newval;
8108     SET_H_GR (FLD (f_operand2), opval);
8109     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8110   }
8111 {
8112   {
8113     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8114     CPU (h_cbit) = opval;
8115     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8116   }
8117   {
8118     BI opval = LTSI (tmp_newval, 0);
8119     CPU (h_nbit) = opval;
8120     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8121   }
8122   {
8123     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8124     CPU (h_zbit) = opval;
8125     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8126   }
8127   {
8128     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8129     CPU (h_vbit) = opval;
8130     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8131   }
8132 {
8133   {
8134     BI opval = 0;
8135     CPU (h_xbit) = opval;
8136     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8137   }
8138   {
8139     BI opval = 0;
8140     SET_H_INSN_PREFIXED_P (opval);
8141     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8142   }
8143 }
8144 }
8145 }
8146
8147 #undef FLD
8148 }
8149   NEXT (vpc);
8150
8151   CASE (sem, INSN_SUBU_M_B_M) : /* subu-m.b [${Rs}${inc}],$Rd */
8152 {
8153   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8154   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8155 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
8156   int UNUSED written = 0;
8157   IADDR UNUSED pc = abuf->addr;
8158   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8159
8160 {
8161   SI tmp_tmpopd;
8162   SI tmp_tmpops;
8163   BI tmp_carry;
8164   SI tmp_newval;
8165   tmp_tmpops = ZEXTQISI (({   SI tmp_addr;
8166   QI tmp_tmp_mem;
8167   BI tmp_postinc;
8168   tmp_postinc = FLD (f_memmode);
8169 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8170 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
8171 ; if (NEBI (tmp_postinc, 0)) {
8172 {
8173 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8174   tmp_addr = ADDSI (tmp_addr, 1);
8175 }
8176   {
8177     SI opval = tmp_addr;
8178     SET_H_GR (FLD (f_operand1), opval);
8179     written |= (1 << 11);
8180     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8181   }
8182 }
8183 }
8184 ; tmp_tmp_mem; }));
8185   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8186   tmp_carry = CPU (h_cbit);
8187   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8188   {
8189     SI opval = tmp_newval;
8190     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
8191     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8192   }
8193 {
8194   {
8195     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8196     CPU (h_cbit) = opval;
8197     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8198   }
8199   {
8200     BI opval = LTSI (tmp_newval, 0);
8201     CPU (h_nbit) = opval;
8202     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8203   }
8204   {
8205     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8206     CPU (h_zbit) = opval;
8207     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8208   }
8209   {
8210     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8211     CPU (h_vbit) = opval;
8212     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8213   }
8214 {
8215   {
8216     BI opval = 0;
8217     CPU (h_xbit) = opval;
8218     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8219   }
8220   {
8221     BI opval = 0;
8222     SET_H_INSN_PREFIXED_P (opval);
8223     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8224   }
8225 }
8226 }
8227 }
8228
8229   abuf->written = written;
8230 #undef FLD
8231 }
8232   NEXT (vpc);
8233
8234   CASE (sem, INSN_SUBU_M_W_M) : /* subu-m.w [${Rs}${inc}],$Rd */
8235 {
8236   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8237   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8238 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
8239   int UNUSED written = 0;
8240   IADDR UNUSED pc = abuf->addr;
8241   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8242
8243 {
8244   SI tmp_tmpopd;
8245   SI tmp_tmpops;
8246   BI tmp_carry;
8247   SI tmp_newval;
8248   tmp_tmpops = ZEXTHISI (({   SI tmp_addr;
8249   HI tmp_tmp_mem;
8250   BI tmp_postinc;
8251   tmp_postinc = FLD (f_memmode);
8252 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8253 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
8254 ; if (NEBI (tmp_postinc, 0)) {
8255 {
8256 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8257   tmp_addr = ADDSI (tmp_addr, 2);
8258 }
8259   {
8260     SI opval = tmp_addr;
8261     SET_H_GR (FLD (f_operand1), opval);
8262     written |= (1 << 11);
8263     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8264   }
8265 }
8266 }
8267 ; tmp_tmp_mem; }));
8268   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8269   tmp_carry = CPU (h_cbit);
8270   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8271   {
8272     SI opval = tmp_newval;
8273     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
8274     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8275   }
8276 {
8277   {
8278     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8279     CPU (h_cbit) = opval;
8280     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8281   }
8282   {
8283     BI opval = LTSI (tmp_newval, 0);
8284     CPU (h_nbit) = opval;
8285     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8286   }
8287   {
8288     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8289     CPU (h_zbit) = opval;
8290     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8291   }
8292   {
8293     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8294     CPU (h_vbit) = opval;
8295     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8296   }
8297 {
8298   {
8299     BI opval = 0;
8300     CPU (h_xbit) = opval;
8301     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8302   }
8303   {
8304     BI opval = 0;
8305     SET_H_INSN_PREFIXED_P (opval);
8306     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8307   }
8308 }
8309 }
8310 }
8311
8312   abuf->written = written;
8313 #undef FLD
8314 }
8315   NEXT (vpc);
8316
8317   CASE (sem, INSN_SUBUCBR) : /* [${Rs}${inc}],$Rd */
8318 {
8319   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8320   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8321 #define FLD(f) abuf->fields.sfmt_addcbr.f
8322   int UNUSED written = 0;
8323   IADDR UNUSED pc = abuf->addr;
8324   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
8325
8326 {
8327   SI tmp_tmpopd;
8328   SI tmp_tmpops;
8329   BI tmp_carry;
8330   SI tmp_newval;
8331   tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
8332   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8333   tmp_carry = CPU (h_cbit);
8334   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8335   {
8336     SI opval = tmp_newval;
8337     SET_H_GR (FLD (f_operand2), opval);
8338     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8339   }
8340 {
8341   {
8342     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8343     CPU (h_cbit) = opval;
8344     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8345   }
8346   {
8347     BI opval = LTSI (tmp_newval, 0);
8348     CPU (h_nbit) = opval;
8349     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8350   }
8351   {
8352     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8353     CPU (h_zbit) = opval;
8354     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8355   }
8356   {
8357     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8358     CPU (h_vbit) = opval;
8359     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8360   }
8361 {
8362   {
8363     BI opval = 0;
8364     CPU (h_xbit) = opval;
8365     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8366   }
8367   {
8368     BI opval = 0;
8369     SET_H_INSN_PREFIXED_P (opval);
8370     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8371   }
8372 }
8373 }
8374 }
8375
8376 #undef FLD
8377 }
8378   NEXT (vpc);
8379
8380   CASE (sem, INSN_SUBUCWR) : /* [${Rs}${inc}],$Rd */
8381 {
8382   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8383   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8384 #define FLD(f) abuf->fields.sfmt_addcwr.f
8385   int UNUSED written = 0;
8386   IADDR UNUSED pc = abuf->addr;
8387   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
8388
8389 {
8390   SI tmp_tmpopd;
8391   SI tmp_tmpops;
8392   BI tmp_carry;
8393   SI tmp_newval;
8394   tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
8395   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8396   tmp_carry = CPU (h_cbit);
8397   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8398   {
8399     SI opval = tmp_newval;
8400     SET_H_GR (FLD (f_operand2), opval);
8401     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8402   }
8403 {
8404   {
8405     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8406     CPU (h_cbit) = opval;
8407     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8408   }
8409   {
8410     BI opval = LTSI (tmp_newval, 0);
8411     CPU (h_nbit) = opval;
8412     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8413   }
8414   {
8415     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8416     CPU (h_zbit) = opval;
8417     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8418   }
8419   {
8420     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8421     CPU (h_vbit) = opval;
8422     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8423   }
8424 {
8425   {
8426     BI opval = 0;
8427     CPU (h_xbit) = opval;
8428     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8429   }
8430   {
8431     BI opval = 0;
8432     SET_H_INSN_PREFIXED_P (opval);
8433     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8434   }
8435 }
8436 }
8437 }
8438
8439 #undef FLD
8440 }
8441   NEXT (vpc);
8442
8443   CASE (sem, INSN_ADDI_B_R) : /* addi.b ${Rs-dfield}.m,${Rd-sfield} */
8444 {
8445   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8446   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8447 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8448   int UNUSED written = 0;
8449   IADDR UNUSED pc = abuf->addr;
8450   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8451
8452 {
8453   {
8454     SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1));
8455     SET_H_GR (FLD (f_operand1), opval);
8456     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8457   }
8458 {
8459   {
8460     BI opval = 0;
8461     CPU (h_xbit) = opval;
8462     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8463   }
8464   {
8465     BI opval = 0;
8466     SET_H_INSN_PREFIXED_P (opval);
8467     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8468   }
8469 }
8470 }
8471
8472 #undef FLD
8473 }
8474   NEXT (vpc);
8475
8476   CASE (sem, INSN_ADDI_W_R) : /* addi.w ${Rs-dfield}.m,${Rd-sfield} */
8477 {
8478   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8479   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8480 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8481   int UNUSED written = 0;
8482   IADDR UNUSED pc = abuf->addr;
8483   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8484
8485 {
8486   {
8487     SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2));
8488     SET_H_GR (FLD (f_operand1), opval);
8489     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8490   }
8491 {
8492   {
8493     BI opval = 0;
8494     CPU (h_xbit) = opval;
8495     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8496   }
8497   {
8498     BI opval = 0;
8499     SET_H_INSN_PREFIXED_P (opval);
8500     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8501   }
8502 }
8503 }
8504
8505 #undef FLD
8506 }
8507   NEXT (vpc);
8508
8509   CASE (sem, INSN_ADDI_D_R) : /* addi.d ${Rs-dfield}.m,${Rd-sfield} */
8510 {
8511   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8512   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8513 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8514   int UNUSED written = 0;
8515   IADDR UNUSED pc = abuf->addr;
8516   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8517
8518 {
8519   {
8520     SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4));
8521     SET_H_GR (FLD (f_operand1), opval);
8522     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8523   }
8524 {
8525   {
8526     BI opval = 0;
8527     CPU (h_xbit) = opval;
8528     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8529   }
8530   {
8531     BI opval = 0;
8532     SET_H_INSN_PREFIXED_P (opval);
8533     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8534   }
8535 }
8536 }
8537
8538 #undef FLD
8539 }
8540   NEXT (vpc);
8541
8542   CASE (sem, INSN_NEG_B_R) : /* neg.b $Rs,$Rd */
8543 {
8544   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8545   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8546 #define FLD(f) abuf->fields.sfmt_add_b_r.f
8547   int UNUSED written = 0;
8548   IADDR UNUSED pc = abuf->addr;
8549   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8550
8551 {
8552   QI tmp_tmpopd;
8553   QI tmp_tmpops;
8554   BI tmp_carry;
8555   QI tmp_newval;
8556   tmp_tmpops = GET_H_GR (FLD (f_operand1));
8557   tmp_tmpopd = 0;
8558   tmp_carry = CPU (h_cbit);
8559   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8560 {
8561   SI tmp_oldregval;
8562   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
8563   {
8564     SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
8565     SET_H_GR (FLD (f_operand2), opval);
8566     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8567   }
8568 }
8569 {
8570   {
8571     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
8572     CPU (h_cbit) = opval;
8573     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8574   }
8575   {
8576     BI opval = LTQI (tmp_newval, 0);
8577     CPU (h_nbit) = opval;
8578     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8579   }
8580   {
8581     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8582     CPU (h_zbit) = opval;
8583     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8584   }
8585   {
8586     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
8587     CPU (h_vbit) = opval;
8588     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8589   }
8590 {
8591   {
8592     BI opval = 0;
8593     CPU (h_xbit) = opval;
8594     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8595   }
8596   {
8597     BI opval = 0;
8598     SET_H_INSN_PREFIXED_P (opval);
8599     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8600   }
8601 }
8602 }
8603 }
8604
8605 #undef FLD
8606 }
8607   NEXT (vpc);
8608
8609   CASE (sem, INSN_NEG_W_R) : /* neg.w $Rs,$Rd */
8610 {
8611   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8612   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8613 #define FLD(f) abuf->fields.sfmt_add_b_r.f
8614   int UNUSED written = 0;
8615   IADDR UNUSED pc = abuf->addr;
8616   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8617
8618 {
8619   HI tmp_tmpopd;
8620   HI tmp_tmpops;
8621   BI tmp_carry;
8622   HI tmp_newval;
8623   tmp_tmpops = GET_H_GR (FLD (f_operand1));
8624   tmp_tmpopd = 0;
8625   tmp_carry = CPU (h_cbit);
8626   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8627 {
8628   SI tmp_oldregval;
8629   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
8630   {
8631     SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
8632     SET_H_GR (FLD (f_operand2), opval);
8633     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8634   }
8635 }
8636 {
8637   {
8638     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
8639     CPU (h_cbit) = opval;
8640     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8641   }
8642   {
8643     BI opval = LTHI (tmp_newval, 0);
8644     CPU (h_nbit) = opval;
8645     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8646   }
8647   {
8648     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8649     CPU (h_zbit) = opval;
8650     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8651   }
8652   {
8653     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
8654     CPU (h_vbit) = opval;
8655     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8656   }
8657 {
8658   {
8659     BI opval = 0;
8660     CPU (h_xbit) = opval;
8661     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8662   }
8663   {
8664     BI opval = 0;
8665     SET_H_INSN_PREFIXED_P (opval);
8666     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8667   }
8668 }
8669 }
8670 }
8671
8672 #undef FLD
8673 }
8674   NEXT (vpc);
8675
8676   CASE (sem, INSN_NEG_D_R) : /* neg.d $Rs,$Rd */
8677 {
8678   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8679   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8680 #define FLD(f) abuf->fields.sfmt_add_b_r.f
8681   int UNUSED written = 0;
8682   IADDR UNUSED pc = abuf->addr;
8683   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8684
8685 {
8686   SI tmp_tmpopd;
8687   SI tmp_tmpops;
8688   BI tmp_carry;
8689   SI tmp_newval;
8690   tmp_tmpops = GET_H_GR (FLD (f_operand1));
8691   tmp_tmpopd = 0;
8692   tmp_carry = CPU (h_cbit);
8693   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8694   {
8695     SI opval = tmp_newval;
8696     SET_H_GR (FLD (f_operand2), opval);
8697     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8698   }
8699 {
8700   {
8701     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8702     CPU (h_cbit) = opval;
8703     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8704   }
8705   {
8706     BI opval = LTSI (tmp_newval, 0);
8707     CPU (h_nbit) = opval;
8708     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8709   }
8710   {
8711     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8712     CPU (h_zbit) = opval;
8713     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8714   }
8715   {
8716     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8717     CPU (h_vbit) = opval;
8718     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8719   }
8720 {
8721   {
8722     BI opval = 0;
8723     CPU (h_xbit) = opval;
8724     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8725   }
8726   {
8727     BI opval = 0;
8728     SET_H_INSN_PREFIXED_P (opval);
8729     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8730   }
8731 }
8732 }
8733 }
8734
8735 #undef FLD
8736 }
8737   NEXT (vpc);
8738
8739   CASE (sem, INSN_TEST_M_B_M) : /* test-m.b [${Rs}${inc}] */
8740 {
8741   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8742   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8743 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
8744   int UNUSED written = 0;
8745   IADDR UNUSED pc = abuf->addr;
8746   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8747
8748 {
8749   QI tmp_tmpd;
8750   tmp_tmpd = ({   SI tmp_addr;
8751   QI tmp_tmp_mem;
8752   BI tmp_postinc;
8753   tmp_postinc = FLD (f_memmode);
8754 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8755 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
8756 ; if (NEBI (tmp_postinc, 0)) {
8757 {
8758 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8759   tmp_addr = ADDSI (tmp_addr, 1);
8760 }
8761   {
8762     SI opval = tmp_addr;
8763     SET_H_GR (FLD (f_operand1), opval);
8764     written |= (1 << 8);
8765     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8766   }
8767 }
8768 }
8769 ; tmp_tmp_mem; });
8770 {
8771   QI tmp_tmpopd;
8772   QI tmp_tmpops;
8773   BI tmp_carry;
8774   QI tmp_newval;
8775   tmp_tmpops = 0;
8776   tmp_tmpopd = tmp_tmpd;
8777   tmp_carry = CPU (h_cbit);
8778   tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8779 ((void) 0); /*nop*/
8780 {
8781   {
8782     BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
8783     CPU (h_cbit) = opval;
8784     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8785   }
8786   {
8787     BI opval = LTQI (tmp_newval, 0);
8788     CPU (h_nbit) = opval;
8789     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8790   }
8791   {
8792     BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8793     CPU (h_zbit) = opval;
8794     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8795   }
8796   {
8797     BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
8798     CPU (h_vbit) = opval;
8799     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8800   }
8801 {
8802   {
8803     BI opval = 0;
8804     CPU (h_xbit) = opval;
8805     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8806   }
8807   {
8808     BI opval = 0;
8809     SET_H_INSN_PREFIXED_P (opval);
8810     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8811   }
8812 }
8813 }
8814 }
8815 }
8816
8817   abuf->written = written;
8818 #undef FLD
8819 }
8820   NEXT (vpc);
8821
8822   CASE (sem, INSN_TEST_M_W_M) : /* test-m.w [${Rs}${inc}] */
8823 {
8824   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8825   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8826 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
8827   int UNUSED written = 0;
8828   IADDR UNUSED pc = abuf->addr;
8829   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8830
8831 {
8832   HI tmp_tmpd;
8833   tmp_tmpd = ({   SI tmp_addr;
8834   HI tmp_tmp_mem;
8835   BI tmp_postinc;
8836   tmp_postinc = FLD (f_memmode);
8837 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8838 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
8839 ; if (NEBI (tmp_postinc, 0)) {
8840 {
8841 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8842   tmp_addr = ADDSI (tmp_addr, 2);
8843 }
8844   {
8845     SI opval = tmp_addr;
8846     SET_H_GR (FLD (f_operand1), opval);
8847     written |= (1 << 8);
8848     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8849   }
8850 }
8851 }
8852 ; tmp_tmp_mem; });
8853 {
8854   HI tmp_tmpopd;
8855   HI tmp_tmpops;
8856   BI tmp_carry;
8857   HI tmp_newval;
8858   tmp_tmpops = 0;
8859   tmp_tmpopd = tmp_tmpd;
8860   tmp_carry = CPU (h_cbit);
8861   tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8862 ((void) 0); /*nop*/
8863 {
8864   {
8865     BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
8866     CPU (h_cbit) = opval;
8867     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8868   }
8869   {
8870     BI opval = LTHI (tmp_newval, 0);
8871     CPU (h_nbit) = opval;
8872     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8873   }
8874   {
8875     BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8876     CPU (h_zbit) = opval;
8877     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8878   }
8879   {
8880     BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
8881     CPU (h_vbit) = opval;
8882     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8883   }
8884 {
8885   {
8886     BI opval = 0;
8887     CPU (h_xbit) = opval;
8888     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8889   }
8890   {
8891     BI opval = 0;
8892     SET_H_INSN_PREFIXED_P (opval);
8893     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8894   }
8895 }
8896 }
8897 }
8898 }
8899
8900   abuf->written = written;
8901 #undef FLD
8902 }
8903   NEXT (vpc);
8904
8905   CASE (sem, INSN_TEST_M_D_M) : /* test-m.d [${Rs}${inc}] */
8906 {
8907   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8908   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8909 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
8910   int UNUSED written = 0;
8911   IADDR UNUSED pc = abuf->addr;
8912   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8913
8914 {
8915   SI tmp_tmpd;
8916   tmp_tmpd = ({   SI tmp_addr;
8917   SI tmp_tmp_mem;
8918   BI tmp_postinc;
8919   tmp_postinc = FLD (f_memmode);
8920 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8921 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
8922 ; if (NEBI (tmp_postinc, 0)) {
8923 {
8924 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8925   tmp_addr = ADDSI (tmp_addr, 4);
8926 }
8927   {
8928     SI opval = tmp_addr;
8929     SET_H_GR (FLD (f_operand1), opval);
8930     written |= (1 << 8);
8931     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8932   }
8933 }
8934 }
8935 ; tmp_tmp_mem; });
8936 {
8937   SI tmp_tmpopd;
8938   SI tmp_tmpops;
8939   BI tmp_carry;
8940   SI tmp_newval;
8941   tmp_tmpops = 0;
8942   tmp_tmpopd = tmp_tmpd;
8943   tmp_carry = CPU (h_cbit);
8944   tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8945 ((void) 0); /*nop*/
8946 {
8947   {
8948     BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8949     CPU (h_cbit) = opval;
8950     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8951   }
8952   {
8953     BI opval = LTSI (tmp_newval, 0);
8954     CPU (h_nbit) = opval;
8955     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8956   }
8957   {
8958     BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8959     CPU (h_zbit) = opval;
8960     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8961   }
8962   {
8963     BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8964     CPU (h_vbit) = opval;
8965     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8966   }
8967 {
8968   {
8969     BI opval = 0;
8970     CPU (h_xbit) = opval;
8971     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8972   }
8973   {
8974     BI opval = 0;
8975     SET_H_INSN_PREFIXED_P (opval);
8976     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8977   }
8978 }
8979 }
8980 }
8981 }
8982
8983   abuf->written = written;
8984 #undef FLD
8985 }
8986   NEXT (vpc);
8987
8988   CASE (sem, INSN_MOVE_R_M_B_M) : /* move-r-m.b ${Rs-dfield},[${Rd-sfield}${inc}] */
8989 {
8990   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8991   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8992 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8993   int UNUSED written = 0;
8994   IADDR UNUSED pc = abuf->addr;
8995   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8996
8997 {
8998   QI tmp_tmpd;
8999   tmp_tmpd = GET_H_GR (FLD (f_operand2));
9000 {
9001   SI tmp_addr;
9002   BI tmp_postinc;
9003   tmp_postinc = FLD (f_memmode);
9004   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9005 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
9006 if (EQBI (CPU (h_pbit), 0)) {
9007 {
9008   {
9009     QI opval = tmp_tmpd;
9010     SETMEMQI (current_cpu, pc, tmp_addr, opval);
9011     written |= (1 << 10);
9012     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9013   }
9014   {
9015     BI opval = CPU (h_pbit);
9016     CPU (h_cbit) = opval;
9017     written |= (1 << 9);
9018     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9019   }
9020 }
9021 } else {
9022   {
9023     BI opval = 1;
9024     CPU (h_cbit) = opval;
9025     written |= (1 << 9);
9026     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9027   }
9028 }
9029 } else {
9030   {
9031     QI opval = tmp_tmpd;
9032     SETMEMQI (current_cpu, pc, tmp_addr, opval);
9033     written |= (1 << 10);
9034     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9035   }
9036 }
9037 if (NEBI (tmp_postinc, 0)) {
9038 {
9039 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9040   tmp_addr = ADDSI (tmp_addr, 1);
9041 }
9042   {
9043     SI opval = tmp_addr;
9044     SET_H_GR (FLD (f_operand1), opval);
9045     written |= (1 << 8);
9046     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9047   }
9048 }
9049 }
9050 }
9051 {
9052   {
9053     BI opval = 0;
9054     CPU (h_xbit) = opval;
9055     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9056   }
9057   {
9058     BI opval = 0;
9059     SET_H_INSN_PREFIXED_P (opval);
9060     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9061   }
9062 }
9063 }
9064
9065   abuf->written = written;
9066 #undef FLD
9067 }
9068   NEXT (vpc);
9069
9070   CASE (sem, INSN_MOVE_R_M_W_M) : /* move-r-m.w ${Rs-dfield},[${Rd-sfield}${inc}] */
9071 {
9072   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9073   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9074 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
9075   int UNUSED written = 0;
9076   IADDR UNUSED pc = abuf->addr;
9077   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9078
9079 {
9080   HI tmp_tmpd;
9081   tmp_tmpd = GET_H_GR (FLD (f_operand2));
9082 {
9083   SI tmp_addr;
9084   BI tmp_postinc;
9085   tmp_postinc = FLD (f_memmode);
9086   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9087 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
9088 if (EQBI (CPU (h_pbit), 0)) {
9089 {
9090   {
9091     HI opval = tmp_tmpd;
9092     SETMEMHI (current_cpu, pc, tmp_addr, opval);
9093     written |= (1 << 10);
9094     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9095   }
9096   {
9097     BI opval = CPU (h_pbit);
9098     CPU (h_cbit) = opval;
9099     written |= (1 << 9);
9100     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9101   }
9102 }
9103 } else {
9104   {
9105     BI opval = 1;
9106     CPU (h_cbit) = opval;
9107     written |= (1 << 9);
9108     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9109   }
9110 }
9111 } else {
9112   {
9113     HI opval = tmp_tmpd;
9114     SETMEMHI (current_cpu, pc, tmp_addr, opval);
9115     written |= (1 << 10);
9116     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9117   }
9118 }
9119 if (NEBI (tmp_postinc, 0)) {
9120 {
9121 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9122   tmp_addr = ADDSI (tmp_addr, 2);
9123 }
9124   {
9125     SI opval = tmp_addr;
9126     SET_H_GR (FLD (f_operand1), opval);
9127     written |= (1 << 8);
9128     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9129   }
9130 }
9131 }
9132 }
9133 {
9134   {
9135     BI opval = 0;
9136     CPU (h_xbit) = opval;
9137     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9138   }
9139   {
9140     BI opval = 0;
9141     SET_H_INSN_PREFIXED_P (opval);
9142     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9143   }
9144 }
9145 }
9146
9147   abuf->written = written;
9148 #undef FLD
9149 }
9150   NEXT (vpc);
9151
9152   CASE (sem, INSN_MOVE_R_M_D_M) : /* move-r-m.d ${Rs-dfield},[${Rd-sfield}${inc}] */
9153 {
9154   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9155   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9156 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
9157   int UNUSED written = 0;
9158   IADDR UNUSED pc = abuf->addr;
9159   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9160
9161 {
9162   SI tmp_tmpd;
9163   tmp_tmpd = GET_H_GR (FLD (f_operand2));
9164 {
9165   SI tmp_addr;
9166   BI tmp_postinc;
9167   tmp_postinc = FLD (f_memmode);
9168   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9169 if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
9170 if (EQBI (CPU (h_pbit), 0)) {
9171 {
9172   {
9173     SI opval = tmp_tmpd;
9174     SETMEMSI (current_cpu, pc, tmp_addr, opval);
9175     written |= (1 << 10);
9176     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9177   }
9178   {
9179     BI opval = CPU (h_pbit);
9180     CPU (h_cbit) = opval;
9181     written |= (1 << 9);
9182     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9183   }
9184 }
9185 } else {
9186   {
9187     BI opval = 1;
9188     CPU (h_cbit) = opval;
9189     written |= (1 << 9);
9190     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9191   }
9192 }
9193 } else {
9194   {
9195     SI opval = tmp_tmpd;
9196     SETMEMSI (current_cpu, pc, tmp_addr, opval);
9197     written |= (1 << 10);
9198     CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9199   }
9200 }
9201 if (NEBI (tmp_postinc, 0)) {
9202 {
9203 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9204   tmp_addr = ADDSI (tmp_addr, 4);
9205 }
9206   {
9207     SI opval = tmp_addr;
9208     SET_H_GR (FLD (f_operand1), opval);
9209     written |= (1 << 8);
9210     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9211   }
9212 }
9213 }
9214 }
9215 {
9216   {
9217     BI opval = 0;
9218     CPU (h_xbit) = opval;
9219     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9220   }
9221   {
9222     BI opval = 0;
9223     SET_H_INSN_PREFIXED_P (opval);
9224     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9225   }
9226 }
9227 }
9228
9229   abuf->written = written;
9230 #undef FLD
9231 }
9232   NEXT (vpc);
9233
9234   CASE (sem, INSN_MULS_B) : /* muls.b $Rs,$Rd */
9235 {
9236   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9237   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9238 #define FLD(f) abuf->fields.sfmt_muls_b.f
9239   int UNUSED written = 0;
9240   IADDR UNUSED pc = abuf->addr;
9241   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9242
9243 {
9244   DI tmp_src1;
9245   DI tmp_src2;
9246   DI tmp_tmpr;
9247   tmp_src1 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
9248   tmp_src2 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2))));
9249   tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9250   {
9251     SI opval = TRUNCDISI (tmp_tmpr);
9252     SET_H_GR (FLD (f_operand2), opval);
9253     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9254   }
9255   {
9256     SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9257     SET_H_SR (((UINT) 7), opval);
9258     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9259   }
9260 {
9261   {
9262     BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9263     CPU (h_cbit) = opval;
9264     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9265   }
9266   {
9267     BI opval = LTDI (tmp_tmpr, 0);
9268     CPU (h_nbit) = opval;
9269     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9270   }
9271   {
9272     BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9273     CPU (h_zbit) = opval;
9274     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9275   }
9276   {
9277     BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr)));
9278     CPU (h_vbit) = opval;
9279     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9280   }
9281 {
9282   {
9283     BI opval = 0;
9284     CPU (h_xbit) = opval;
9285     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9286   }
9287   {
9288     BI opval = 0;
9289     SET_H_INSN_PREFIXED_P (opval);
9290     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9291   }
9292 }
9293 }
9294 }
9295
9296 #undef FLD
9297 }
9298   NEXT (vpc);
9299
9300   CASE (sem, INSN_MULS_W) : /* muls.w $Rs,$Rd */
9301 {
9302   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9303   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9304 #define FLD(f) abuf->fields.sfmt_muls_b.f
9305   int UNUSED written = 0;
9306   IADDR UNUSED pc = abuf->addr;
9307   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9308
9309 {
9310   DI tmp_src1;
9311   DI tmp_src2;
9312   DI tmp_tmpr;
9313   tmp_src1 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
9314   tmp_src2 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2))));
9315   tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9316   {
9317     SI opval = TRUNCDISI (tmp_tmpr);
9318     SET_H_GR (FLD (f_operand2), opval);
9319     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9320   }
9321   {
9322     SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9323     SET_H_SR (((UINT) 7), opval);
9324     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9325   }
9326 {
9327   {
9328     BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9329     CPU (h_cbit) = opval;
9330     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9331   }
9332   {
9333     BI opval = LTDI (tmp_tmpr, 0);
9334     CPU (h_nbit) = opval;
9335     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9336   }
9337   {
9338     BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9339     CPU (h_zbit) = opval;
9340     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9341   }
9342   {
9343     BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr)));
9344     CPU (h_vbit) = opval;
9345     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9346   }
9347 {
9348   {
9349     BI opval = 0;
9350     CPU (h_xbit) = opval;
9351     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9352   }
9353   {
9354     BI opval = 0;
9355     SET_H_INSN_PREFIXED_P (opval);
9356     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9357   }
9358 }
9359 }
9360 }
9361
9362 #undef FLD
9363 }
9364   NEXT (vpc);
9365
9366   CASE (sem, INSN_MULS_D) : /* muls.d $Rs,$Rd */
9367 {
9368   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9369   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9370 #define FLD(f) abuf->fields.sfmt_muls_b.f
9371   int UNUSED written = 0;
9372   IADDR UNUSED pc = abuf->addr;
9373   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9374
9375 {
9376   DI tmp_src1;
9377   DI tmp_src2;
9378   DI tmp_tmpr;
9379   tmp_src1 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1))));
9380   tmp_src2 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2))));
9381   tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9382   {
9383     SI opval = TRUNCDISI (tmp_tmpr);
9384     SET_H_GR (FLD (f_operand2), opval);
9385     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9386   }
9387   {
9388     SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9389     SET_H_SR (((UINT) 7), opval);
9390     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9391   }
9392 {
9393   {
9394     BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9395     CPU (h_cbit) = opval;
9396     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9397   }
9398   {
9399     BI opval = LTDI (tmp_tmpr, 0);
9400     CPU (h_nbit) = opval;
9401     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9402   }
9403   {
9404     BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9405     CPU (h_zbit) = opval;
9406     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9407   }
9408   {
9409     BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr)));
9410     CPU (h_vbit) = opval;
9411     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9412   }
9413 {
9414   {
9415     BI opval = 0;
9416     CPU (h_xbit) = opval;
9417     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9418   }
9419   {
9420     BI opval = 0;
9421     SET_H_INSN_PREFIXED_P (opval);
9422     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9423   }
9424 }
9425 }
9426 }
9427
9428 #undef FLD
9429 }
9430   NEXT (vpc);
9431
9432   CASE (sem, INSN_MULU_B) : /* mulu.b $Rs,$Rd */
9433 {
9434   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9435   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9436 #define FLD(f) abuf->fields.sfmt_muls_b.f
9437   int UNUSED written = 0;
9438   IADDR UNUSED pc = abuf->addr;
9439   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9440
9441 {
9442   DI tmp_src1;
9443   DI tmp_src2;
9444   DI tmp_tmpr;
9445   tmp_src1 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
9446   tmp_src2 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2))));
9447   tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9448   {
9449     SI opval = TRUNCDISI (tmp_tmpr);
9450     SET_H_GR (FLD (f_operand2), opval);
9451     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9452   }
9453   {
9454     SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9455     SET_H_SR (((UINT) 7), opval);
9456     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9457   }
9458 {
9459   {
9460     BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9461     CPU (h_cbit) = opval;
9462     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9463   }
9464   {
9465     BI opval = LTDI (tmp_tmpr, 0);
9466     CPU (h_nbit) = opval;
9467     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9468   }
9469   {
9470     BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9471     CPU (h_zbit) = opval;
9472     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9473   }
9474   {
9475     BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr)));
9476     CPU (h_vbit) = opval;
9477     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9478   }
9479 {
9480   {
9481     BI opval = 0;
9482     CPU (h_xbit) = opval;
9483     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9484   }
9485   {
9486     BI opval = 0;
9487     SET_H_INSN_PREFIXED_P (opval);
9488     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9489   }
9490 }
9491 }
9492 }
9493
9494 #undef FLD
9495 }
9496   NEXT (vpc);
9497
9498   CASE (sem, INSN_MULU_W) : /* mulu.w $Rs,$Rd */
9499 {
9500   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9501   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9502 #define FLD(f) abuf->fields.sfmt_muls_b.f
9503   int UNUSED written = 0;
9504   IADDR UNUSED pc = abuf->addr;
9505   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9506
9507 {
9508   DI tmp_src1;
9509   DI tmp_src2;
9510   DI tmp_tmpr;
9511   tmp_src1 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
9512   tmp_src2 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2))));
9513   tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9514   {
9515     SI opval = TRUNCDISI (tmp_tmpr);
9516     SET_H_GR (FLD (f_operand2), opval);
9517     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9518   }
9519   {
9520     SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9521     SET_H_SR (((UINT) 7), opval);
9522     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9523   }
9524 {
9525   {
9526     BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9527     CPU (h_cbit) = opval;
9528     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9529   }
9530   {
9531     BI opval = LTDI (tmp_tmpr, 0);
9532     CPU (h_nbit) = opval;
9533     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9534   }
9535   {
9536     BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9537     CPU (h_zbit) = opval;
9538     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9539   }
9540   {
9541     BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr)));
9542     CPU (h_vbit) = opval;
9543     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9544   }
9545 {
9546   {
9547     BI opval = 0;
9548     CPU (h_xbit) = opval;
9549     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9550   }
9551   {
9552     BI opval = 0;
9553     SET_H_INSN_PREFIXED_P (opval);
9554     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9555   }
9556 }
9557 }
9558 }
9559
9560 #undef FLD
9561 }
9562   NEXT (vpc);
9563
9564   CASE (sem, INSN_MULU_D) : /* mulu.d $Rs,$Rd */
9565 {
9566   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9567   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9568 #define FLD(f) abuf->fields.sfmt_muls_b.f
9569   int UNUSED written = 0;
9570   IADDR UNUSED pc = abuf->addr;
9571   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9572
9573 {
9574   DI tmp_src1;
9575   DI tmp_src2;
9576   DI tmp_tmpr;
9577   tmp_src1 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1))));
9578   tmp_src2 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2))));
9579   tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9580   {
9581     SI opval = TRUNCDISI (tmp_tmpr);
9582     SET_H_GR (FLD (f_operand2), opval);
9583     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9584   }
9585   {
9586     SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9587     SET_H_SR (((UINT) 7), opval);
9588     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9589   }
9590 {
9591   {
9592     BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9593     CPU (h_cbit) = opval;
9594     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9595   }
9596   {
9597     BI opval = LTDI (tmp_tmpr, 0);
9598     CPU (h_nbit) = opval;
9599     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9600   }
9601   {
9602     BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9603     CPU (h_zbit) = opval;
9604     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9605   }
9606   {
9607     BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr)));
9608     CPU (h_vbit) = opval;
9609     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9610   }
9611 {
9612   {
9613     BI opval = 0;
9614     CPU (h_xbit) = opval;
9615     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9616   }
9617   {
9618     BI opval = 0;
9619     SET_H_INSN_PREFIXED_P (opval);
9620     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9621   }
9622 }
9623 }
9624 }
9625
9626 #undef FLD
9627 }
9628   NEXT (vpc);
9629
9630   CASE (sem, INSN_MSTEP) : /* mstep $Rs,$Rd */
9631 {
9632   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9633   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9634 #define FLD(f) abuf->fields.sfmt_muls_b.f
9635   int UNUSED written = 0;
9636   IADDR UNUSED pc = abuf->addr;
9637   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9638
9639 {
9640   SI tmp_tmpd;
9641   SI tmp_tmps;
9642   tmp_tmps = GET_H_GR (FLD (f_operand1));
9643   tmp_tmpd = ADDSI (SLLSI (GET_H_GR (FLD (f_operand2)), 1), ((CPU (h_nbit)) ? (tmp_tmps) : (0)));
9644   {
9645     SI opval = tmp_tmpd;
9646     SET_H_GR (FLD (f_operand2), opval);
9647     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9648   }
9649 {
9650   {
9651     BI opval = LTSI (tmp_tmpd, 0);
9652     CPU (h_nbit) = opval;
9653     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9654   }
9655   {
9656     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9657     CPU (h_zbit) = opval;
9658     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9659   }
9660 SET_H_CBIT_MOVE (0);
9661 SET_H_VBIT_MOVE (0);
9662 {
9663   {
9664     BI opval = 0;
9665     CPU (h_xbit) = opval;
9666     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9667   }
9668   {
9669     BI opval = 0;
9670     SET_H_INSN_PREFIXED_P (opval);
9671     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9672   }
9673 }
9674 }
9675 }
9676
9677 #undef FLD
9678 }
9679   NEXT (vpc);
9680
9681   CASE (sem, INSN_DSTEP) : /* dstep $Rs,$Rd */
9682 {
9683   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9684   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9685 #define FLD(f) abuf->fields.sfmt_muls_b.f
9686   int UNUSED written = 0;
9687   IADDR UNUSED pc = abuf->addr;
9688   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9689
9690 {
9691   SI tmp_tmp;
9692   SI tmp_tmps;
9693   SI tmp_tmpd;
9694   tmp_tmps = GET_H_GR (FLD (f_operand1));
9695   tmp_tmp = SLLSI (GET_H_GR (FLD (f_operand2)), 1);
9696   tmp_tmpd = ((GEUSI (tmp_tmp, tmp_tmps)) ? (SUBSI (tmp_tmp, tmp_tmps)) : (tmp_tmp));
9697   {
9698     SI opval = tmp_tmpd;
9699     SET_H_GR (FLD (f_operand2), opval);
9700     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9701   }
9702 {
9703   {
9704     BI opval = LTSI (tmp_tmpd, 0);
9705     CPU (h_nbit) = opval;
9706     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9707   }
9708   {
9709     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9710     CPU (h_zbit) = opval;
9711     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9712   }
9713 SET_H_CBIT_MOVE (0);
9714 SET_H_VBIT_MOVE (0);
9715 {
9716   {
9717     BI opval = 0;
9718     CPU (h_xbit) = opval;
9719     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9720   }
9721   {
9722     BI opval = 0;
9723     SET_H_INSN_PREFIXED_P (opval);
9724     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9725   }
9726 }
9727 }
9728 }
9729
9730 #undef FLD
9731 }
9732   NEXT (vpc);
9733
9734   CASE (sem, INSN_ABS) : /* abs $Rs,$Rd */
9735 {
9736   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9737   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9738 #define FLD(f) abuf->fields.sfmt_muls_b.f
9739   int UNUSED written = 0;
9740   IADDR UNUSED pc = abuf->addr;
9741   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9742
9743 {
9744   SI tmp_tmpd;
9745   tmp_tmpd = ABSSI (GET_H_GR (FLD (f_operand1)));
9746   {
9747     SI opval = tmp_tmpd;
9748     SET_H_GR (FLD (f_operand2), opval);
9749     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9750   }
9751 {
9752   {
9753     BI opval = LTSI (tmp_tmpd, 0);
9754     CPU (h_nbit) = opval;
9755     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9756   }
9757   {
9758     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9759     CPU (h_zbit) = opval;
9760     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9761   }
9762 SET_H_CBIT_MOVE (0);
9763 SET_H_VBIT_MOVE (0);
9764 {
9765   {
9766     BI opval = 0;
9767     CPU (h_xbit) = opval;
9768     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9769   }
9770   {
9771     BI opval = 0;
9772     SET_H_INSN_PREFIXED_P (opval);
9773     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9774   }
9775 }
9776 }
9777 }
9778
9779 #undef FLD
9780 }
9781   NEXT (vpc);
9782
9783   CASE (sem, INSN_AND_B_R) : /* and.b $Rs,$Rd */
9784 {
9785   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9786   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9787 #define FLD(f) abuf->fields.sfmt_add_b_r.f
9788   int UNUSED written = 0;
9789   IADDR UNUSED pc = abuf->addr;
9790   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9791
9792 {
9793   QI tmp_tmpd;
9794   tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
9795 {
9796   SI tmp_oldregval;
9797   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
9798   {
9799     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
9800     SET_H_GR (FLD (f_operand2), opval);
9801     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9802   }
9803 }
9804 {
9805   {
9806     BI opval = LTQI (tmp_tmpd, 0);
9807     CPU (h_nbit) = opval;
9808     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9809   }
9810   {
9811     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9812     CPU (h_zbit) = opval;
9813     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9814   }
9815 SET_H_CBIT_MOVE (0);
9816 SET_H_VBIT_MOVE (0);
9817 {
9818   {
9819     BI opval = 0;
9820     CPU (h_xbit) = opval;
9821     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9822   }
9823   {
9824     BI opval = 0;
9825     SET_H_INSN_PREFIXED_P (opval);
9826     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9827   }
9828 }
9829 }
9830 }
9831
9832 #undef FLD
9833 }
9834   NEXT (vpc);
9835
9836   CASE (sem, INSN_AND_W_R) : /* and.w $Rs,$Rd */
9837 {
9838   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9839   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9840 #define FLD(f) abuf->fields.sfmt_add_b_r.f
9841   int UNUSED written = 0;
9842   IADDR UNUSED pc = abuf->addr;
9843   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9844
9845 {
9846   HI tmp_tmpd;
9847   tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
9848 {
9849   SI tmp_oldregval;
9850   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
9851   {
9852     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
9853     SET_H_GR (FLD (f_operand2), opval);
9854     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9855   }
9856 }
9857 {
9858   {
9859     BI opval = LTHI (tmp_tmpd, 0);
9860     CPU (h_nbit) = opval;
9861     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9862   }
9863   {
9864     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9865     CPU (h_zbit) = opval;
9866     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9867   }
9868 SET_H_CBIT_MOVE (0);
9869 SET_H_VBIT_MOVE (0);
9870 {
9871   {
9872     BI opval = 0;
9873     CPU (h_xbit) = opval;
9874     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9875   }
9876   {
9877     BI opval = 0;
9878     SET_H_INSN_PREFIXED_P (opval);
9879     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9880   }
9881 }
9882 }
9883 }
9884
9885 #undef FLD
9886 }
9887   NEXT (vpc);
9888
9889   CASE (sem, INSN_AND_D_R) : /* and.d $Rs,$Rd */
9890 {
9891   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9892   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9893 #define FLD(f) abuf->fields.sfmt_add_b_r.f
9894   int UNUSED written = 0;
9895   IADDR UNUSED pc = abuf->addr;
9896   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9897
9898 {
9899   SI tmp_tmpd;
9900   tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
9901   {
9902     SI opval = tmp_tmpd;
9903     SET_H_GR (FLD (f_operand2), opval);
9904     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9905   }
9906 {
9907   {
9908     BI opval = LTSI (tmp_tmpd, 0);
9909     CPU (h_nbit) = opval;
9910     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9911   }
9912   {
9913     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9914     CPU (h_zbit) = opval;
9915     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9916   }
9917 SET_H_CBIT_MOVE (0);
9918 SET_H_VBIT_MOVE (0);
9919 {
9920   {
9921     BI opval = 0;
9922     CPU (h_xbit) = opval;
9923     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9924   }
9925   {
9926     BI opval = 0;
9927     SET_H_INSN_PREFIXED_P (opval);
9928     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9929   }
9930 }
9931 }
9932 }
9933
9934 #undef FLD
9935 }
9936   NEXT (vpc);
9937
9938   CASE (sem, INSN_AND_M_B_M) : /* and-m.b [${Rs}${inc}],${Rd} */
9939 {
9940   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9941   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9942 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
9943   int UNUSED written = 0;
9944   IADDR UNUSED pc = abuf->addr;
9945   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9946
9947 {
9948   QI tmp_tmpd;
9949   tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), ({   SI tmp_addr;
9950   QI tmp_tmp_mem;
9951   BI tmp_postinc;
9952   tmp_postinc = FLD (f_memmode);
9953 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9954 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
9955 ; if (NEBI (tmp_postinc, 0)) {
9956 {
9957 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9958   tmp_addr = ADDSI (tmp_addr, 1);
9959 }
9960   {
9961     SI opval = tmp_addr;
9962     SET_H_GR (FLD (f_operand1), opval);
9963     written |= (1 << 11);
9964     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9965   }
9966 }
9967 }
9968 ; tmp_tmp_mem; }));
9969 {
9970   SI tmp_oldregval;
9971   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
9972   {
9973     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
9974     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
9975     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9976   }
9977 }
9978 {
9979   {
9980     BI opval = LTQI (tmp_tmpd, 0);
9981     CPU (h_nbit) = opval;
9982     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9983   }
9984   {
9985     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9986     CPU (h_zbit) = opval;
9987     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9988   }
9989 SET_H_CBIT_MOVE (0);
9990 SET_H_VBIT_MOVE (0);
9991 {
9992   {
9993     BI opval = 0;
9994     CPU (h_xbit) = opval;
9995     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9996   }
9997   {
9998     BI opval = 0;
9999     SET_H_INSN_PREFIXED_P (opval);
10000     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10001   }
10002 }
10003 }
10004 }
10005
10006   abuf->written = written;
10007 #undef FLD
10008 }
10009   NEXT (vpc);
10010
10011   CASE (sem, INSN_AND_M_W_M) : /* and-m.w [${Rs}${inc}],${Rd} */
10012 {
10013   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10014   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10015 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10016   int UNUSED written = 0;
10017   IADDR UNUSED pc = abuf->addr;
10018   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10019
10020 {
10021   HI tmp_tmpd;
10022   tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), ({   SI tmp_addr;
10023   HI tmp_tmp_mem;
10024   BI tmp_postinc;
10025   tmp_postinc = FLD (f_memmode);
10026 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10027 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
10028 ; if (NEBI (tmp_postinc, 0)) {
10029 {
10030 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10031   tmp_addr = ADDSI (tmp_addr, 2);
10032 }
10033   {
10034     SI opval = tmp_addr;
10035     SET_H_GR (FLD (f_operand1), opval);
10036     written |= (1 << 11);
10037     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10038   }
10039 }
10040 }
10041 ; tmp_tmp_mem; }));
10042 {
10043   SI tmp_oldregval;
10044   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
10045   {
10046     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10047     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10048     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10049   }
10050 }
10051 {
10052   {
10053     BI opval = LTHI (tmp_tmpd, 0);
10054     CPU (h_nbit) = opval;
10055     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10056   }
10057   {
10058     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10059     CPU (h_zbit) = opval;
10060     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10061   }
10062 SET_H_CBIT_MOVE (0);
10063 SET_H_VBIT_MOVE (0);
10064 {
10065   {
10066     BI opval = 0;
10067     CPU (h_xbit) = opval;
10068     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10069   }
10070   {
10071     BI opval = 0;
10072     SET_H_INSN_PREFIXED_P (opval);
10073     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10074   }
10075 }
10076 }
10077 }
10078
10079   abuf->written = written;
10080 #undef FLD
10081 }
10082   NEXT (vpc);
10083
10084   CASE (sem, INSN_AND_M_D_M) : /* and-m.d [${Rs}${inc}],${Rd} */
10085 {
10086   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10087   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10088 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10089   int UNUSED written = 0;
10090   IADDR UNUSED pc = abuf->addr;
10091   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10092
10093 {
10094   SI tmp_tmpd;
10095   tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), ({   SI tmp_addr;
10096   SI tmp_tmp_mem;
10097   BI tmp_postinc;
10098   tmp_postinc = FLD (f_memmode);
10099 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10100 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
10101 ; if (NEBI (tmp_postinc, 0)) {
10102 {
10103 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10104   tmp_addr = ADDSI (tmp_addr, 4);
10105 }
10106   {
10107     SI opval = tmp_addr;
10108     SET_H_GR (FLD (f_operand1), opval);
10109     written |= (1 << 10);
10110     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10111   }
10112 }
10113 }
10114 ; tmp_tmp_mem; }));
10115   {
10116     SI opval = tmp_tmpd;
10117     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10118     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10119   }
10120 {
10121   {
10122     BI opval = LTSI (tmp_tmpd, 0);
10123     CPU (h_nbit) = opval;
10124     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10125   }
10126   {
10127     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10128     CPU (h_zbit) = opval;
10129     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10130   }
10131 SET_H_CBIT_MOVE (0);
10132 SET_H_VBIT_MOVE (0);
10133 {
10134   {
10135     BI opval = 0;
10136     CPU (h_xbit) = opval;
10137     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10138   }
10139   {
10140     BI opval = 0;
10141     SET_H_INSN_PREFIXED_P (opval);
10142     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10143   }
10144 }
10145 }
10146 }
10147
10148   abuf->written = written;
10149 #undef FLD
10150 }
10151   NEXT (vpc);
10152
10153   CASE (sem, INSN_ANDCBR) : /* and.b ${sconst8}],${Rd} */
10154 {
10155   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10156   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10157 #define FLD(f) abuf->fields.sfmt_addcbr.f
10158   int UNUSED written = 0;
10159   IADDR UNUSED pc = abuf->addr;
10160   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10161
10162 {
10163   QI tmp_tmpd;
10164   tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte));
10165 {
10166   SI tmp_oldregval;
10167   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10168   {
10169     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10170     SET_H_GR (FLD (f_operand2), opval);
10171     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10172   }
10173 }
10174 {
10175   {
10176     BI opval = LTQI (tmp_tmpd, 0);
10177     CPU (h_nbit) = opval;
10178     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10179   }
10180   {
10181     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10182     CPU (h_zbit) = opval;
10183     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10184   }
10185 SET_H_CBIT_MOVE (0);
10186 SET_H_VBIT_MOVE (0);
10187 {
10188   {
10189     BI opval = 0;
10190     CPU (h_xbit) = opval;
10191     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10192   }
10193   {
10194     BI opval = 0;
10195     SET_H_INSN_PREFIXED_P (opval);
10196     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10197   }
10198 }
10199 }
10200 }
10201
10202 #undef FLD
10203 }
10204   NEXT (vpc);
10205
10206   CASE (sem, INSN_ANDCWR) : /* and.w ${sconst16}],${Rd} */
10207 {
10208   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10209   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10210 #define FLD(f) abuf->fields.sfmt_addcwr.f
10211   int UNUSED written = 0;
10212   IADDR UNUSED pc = abuf->addr;
10213   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10214
10215 {
10216   HI tmp_tmpd;
10217   tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word));
10218 {
10219   SI tmp_oldregval;
10220   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10221   {
10222     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10223     SET_H_GR (FLD (f_operand2), opval);
10224     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10225   }
10226 }
10227 {
10228   {
10229     BI opval = LTHI (tmp_tmpd, 0);
10230     CPU (h_nbit) = opval;
10231     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10232   }
10233   {
10234     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10235     CPU (h_zbit) = opval;
10236     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10237   }
10238 SET_H_CBIT_MOVE (0);
10239 SET_H_VBIT_MOVE (0);
10240 {
10241   {
10242     BI opval = 0;
10243     CPU (h_xbit) = opval;
10244     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10245   }
10246   {
10247     BI opval = 0;
10248     SET_H_INSN_PREFIXED_P (opval);
10249     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10250   }
10251 }
10252 }
10253 }
10254
10255 #undef FLD
10256 }
10257   NEXT (vpc);
10258
10259   CASE (sem, INSN_ANDCDR) : /* and.d ${const32}],${Rd} */
10260 {
10261   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10262   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10263 #define FLD(f) abuf->fields.sfmt_addcdr.f
10264   int UNUSED written = 0;
10265   IADDR UNUSED pc = abuf->addr;
10266   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
10267
10268 {
10269   SI tmp_tmpd;
10270   tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword));
10271   {
10272     SI opval = tmp_tmpd;
10273     SET_H_GR (FLD (f_operand2), opval);
10274     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10275   }
10276 {
10277   {
10278     BI opval = LTSI (tmp_tmpd, 0);
10279     CPU (h_nbit) = opval;
10280     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10281   }
10282   {
10283     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10284     CPU (h_zbit) = opval;
10285     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10286   }
10287 SET_H_CBIT_MOVE (0);
10288 SET_H_VBIT_MOVE (0);
10289 {
10290   {
10291     BI opval = 0;
10292     CPU (h_xbit) = opval;
10293     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10294   }
10295   {
10296     BI opval = 0;
10297     SET_H_INSN_PREFIXED_P (opval);
10298     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10299   }
10300 }
10301 }
10302 }
10303
10304 #undef FLD
10305 }
10306   NEXT (vpc);
10307
10308   CASE (sem, INSN_ANDQ) : /* andq $i,$Rd */
10309 {
10310   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10311   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10312 #define FLD(f) abuf->fields.sfmt_andq.f
10313   int UNUSED written = 0;
10314   IADDR UNUSED pc = abuf->addr;
10315   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10316
10317 {
10318   SI tmp_tmpd;
10319   tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6));
10320   {
10321     SI opval = tmp_tmpd;
10322     SET_H_GR (FLD (f_operand2), opval);
10323     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10324   }
10325 {
10326   {
10327     BI opval = LTSI (tmp_tmpd, 0);
10328     CPU (h_nbit) = opval;
10329     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10330   }
10331   {
10332     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10333     CPU (h_zbit) = opval;
10334     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10335   }
10336 SET_H_CBIT_MOVE (0);
10337 SET_H_VBIT_MOVE (0);
10338 {
10339   {
10340     BI opval = 0;
10341     CPU (h_xbit) = opval;
10342     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10343   }
10344   {
10345     BI opval = 0;
10346     SET_H_INSN_PREFIXED_P (opval);
10347     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10348   }
10349 }
10350 }
10351 }
10352
10353 #undef FLD
10354 }
10355   NEXT (vpc);
10356
10357   CASE (sem, INSN_ORR_B_R) : /* orr.b $Rs,$Rd */
10358 {
10359   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10360   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10361 #define FLD(f) abuf->fields.sfmt_add_b_r.f
10362   int UNUSED written = 0;
10363   IADDR UNUSED pc = abuf->addr;
10364   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10365
10366 {
10367   QI tmp_tmpd;
10368   tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10369 {
10370   SI tmp_oldregval;
10371   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10372   {
10373     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10374     SET_H_GR (FLD (f_operand2), opval);
10375     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10376   }
10377 }
10378 {
10379   {
10380     BI opval = LTQI (tmp_tmpd, 0);
10381     CPU (h_nbit) = opval;
10382     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10383   }
10384   {
10385     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10386     CPU (h_zbit) = opval;
10387     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10388   }
10389 SET_H_CBIT_MOVE (0);
10390 SET_H_VBIT_MOVE (0);
10391 {
10392   {
10393     BI opval = 0;
10394     CPU (h_xbit) = opval;
10395     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10396   }
10397   {
10398     BI opval = 0;
10399     SET_H_INSN_PREFIXED_P (opval);
10400     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10401   }
10402 }
10403 }
10404 }
10405
10406 #undef FLD
10407 }
10408   NEXT (vpc);
10409
10410   CASE (sem, INSN_ORR_W_R) : /* orr.w $Rs,$Rd */
10411 {
10412   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10413   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10414 #define FLD(f) abuf->fields.sfmt_add_b_r.f
10415   int UNUSED written = 0;
10416   IADDR UNUSED pc = abuf->addr;
10417   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10418
10419 {
10420   HI tmp_tmpd;
10421   tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10422 {
10423   SI tmp_oldregval;
10424   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10425   {
10426     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10427     SET_H_GR (FLD (f_operand2), opval);
10428     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10429   }
10430 }
10431 {
10432   {
10433     BI opval = LTHI (tmp_tmpd, 0);
10434     CPU (h_nbit) = opval;
10435     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10436   }
10437   {
10438     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10439     CPU (h_zbit) = opval;
10440     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10441   }
10442 SET_H_CBIT_MOVE (0);
10443 SET_H_VBIT_MOVE (0);
10444 {
10445   {
10446     BI opval = 0;
10447     CPU (h_xbit) = opval;
10448     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10449   }
10450   {
10451     BI opval = 0;
10452     SET_H_INSN_PREFIXED_P (opval);
10453     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10454   }
10455 }
10456 }
10457 }
10458
10459 #undef FLD
10460 }
10461   NEXT (vpc);
10462
10463   CASE (sem, INSN_ORR_D_R) : /* orr.d $Rs,$Rd */
10464 {
10465   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10466   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10467 #define FLD(f) abuf->fields.sfmt_add_b_r.f
10468   int UNUSED written = 0;
10469   IADDR UNUSED pc = abuf->addr;
10470   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10471
10472 {
10473   SI tmp_tmpd;
10474   tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10475   {
10476     SI opval = tmp_tmpd;
10477     SET_H_GR (FLD (f_operand2), opval);
10478     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10479   }
10480 {
10481   {
10482     BI opval = LTSI (tmp_tmpd, 0);
10483     CPU (h_nbit) = opval;
10484     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10485   }
10486   {
10487     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10488     CPU (h_zbit) = opval;
10489     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10490   }
10491 SET_H_CBIT_MOVE (0);
10492 SET_H_VBIT_MOVE (0);
10493 {
10494   {
10495     BI opval = 0;
10496     CPU (h_xbit) = opval;
10497     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10498   }
10499   {
10500     BI opval = 0;
10501     SET_H_INSN_PREFIXED_P (opval);
10502     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10503   }
10504 }
10505 }
10506 }
10507
10508 #undef FLD
10509 }
10510   NEXT (vpc);
10511
10512   CASE (sem, INSN_OR_M_B_M) : /* or-m.b [${Rs}${inc}],${Rd} */
10513 {
10514   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10515   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10516 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10517   int UNUSED written = 0;
10518   IADDR UNUSED pc = abuf->addr;
10519   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10520
10521 {
10522   QI tmp_tmpd;
10523   tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), ({   SI tmp_addr;
10524   QI tmp_tmp_mem;
10525   BI tmp_postinc;
10526   tmp_postinc = FLD (f_memmode);
10527 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10528 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
10529 ; if (NEBI (tmp_postinc, 0)) {
10530 {
10531 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10532   tmp_addr = ADDSI (tmp_addr, 1);
10533 }
10534   {
10535     SI opval = tmp_addr;
10536     SET_H_GR (FLD (f_operand1), opval);
10537     written |= (1 << 11);
10538     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10539   }
10540 }
10541 }
10542 ; tmp_tmp_mem; }));
10543 {
10544   SI tmp_oldregval;
10545   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
10546   {
10547     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10548     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10549     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10550   }
10551 }
10552 {
10553   {
10554     BI opval = LTQI (tmp_tmpd, 0);
10555     CPU (h_nbit) = opval;
10556     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10557   }
10558   {
10559     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10560     CPU (h_zbit) = opval;
10561     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10562   }
10563 SET_H_CBIT_MOVE (0);
10564 SET_H_VBIT_MOVE (0);
10565 {
10566   {
10567     BI opval = 0;
10568     CPU (h_xbit) = opval;
10569     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10570   }
10571   {
10572     BI opval = 0;
10573     SET_H_INSN_PREFIXED_P (opval);
10574     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10575   }
10576 }
10577 }
10578 }
10579
10580   abuf->written = written;
10581 #undef FLD
10582 }
10583   NEXT (vpc);
10584
10585   CASE (sem, INSN_OR_M_W_M) : /* or-m.w [${Rs}${inc}],${Rd} */
10586 {
10587   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10588   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10589 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10590   int UNUSED written = 0;
10591   IADDR UNUSED pc = abuf->addr;
10592   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10593
10594 {
10595   HI tmp_tmpd;
10596   tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), ({   SI tmp_addr;
10597   HI tmp_tmp_mem;
10598   BI tmp_postinc;
10599   tmp_postinc = FLD (f_memmode);
10600 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10601 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
10602 ; if (NEBI (tmp_postinc, 0)) {
10603 {
10604 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10605   tmp_addr = ADDSI (tmp_addr, 2);
10606 }
10607   {
10608     SI opval = tmp_addr;
10609     SET_H_GR (FLD (f_operand1), opval);
10610     written |= (1 << 11);
10611     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10612   }
10613 }
10614 }
10615 ; tmp_tmp_mem; }));
10616 {
10617   SI tmp_oldregval;
10618   tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
10619   {
10620     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10621     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10622     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10623   }
10624 }
10625 {
10626   {
10627     BI opval = LTHI (tmp_tmpd, 0);
10628     CPU (h_nbit) = opval;
10629     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10630   }
10631   {
10632     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10633     CPU (h_zbit) = opval;
10634     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10635   }
10636 SET_H_CBIT_MOVE (0);
10637 SET_H_VBIT_MOVE (0);
10638 {
10639   {
10640     BI opval = 0;
10641     CPU (h_xbit) = opval;
10642     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10643   }
10644   {
10645     BI opval = 0;
10646     SET_H_INSN_PREFIXED_P (opval);
10647     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10648   }
10649 }
10650 }
10651 }
10652
10653   abuf->written = written;
10654 #undef FLD
10655 }
10656   NEXT (vpc);
10657
10658   CASE (sem, INSN_OR_M_D_M) : /* or-m.d [${Rs}${inc}],${Rd} */
10659 {
10660   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10661   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10662 #define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10663   int UNUSED written = 0;
10664   IADDR UNUSED pc = abuf->addr;
10665   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10666
10667 {
10668   SI tmp_tmpd;
10669   tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), ({   SI tmp_addr;
10670   SI tmp_tmp_mem;
10671   BI tmp_postinc;
10672   tmp_postinc = FLD (f_memmode);
10673 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10674 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
10675 ; if (NEBI (tmp_postinc, 0)) {
10676 {
10677 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10678   tmp_addr = ADDSI (tmp_addr, 4);
10679 }
10680   {
10681     SI opval = tmp_addr;
10682     SET_H_GR (FLD (f_operand1), opval);
10683     written |= (1 << 10);
10684     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10685   }
10686 }
10687 }
10688 ; tmp_tmp_mem; }));
10689   {
10690     SI opval = tmp_tmpd;
10691     SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10692     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10693   }
10694 {
10695   {
10696     BI opval = LTSI (tmp_tmpd, 0);
10697     CPU (h_nbit) = opval;
10698     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10699   }
10700   {
10701     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10702     CPU (h_zbit) = opval;
10703     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10704   }
10705 SET_H_CBIT_MOVE (0);
10706 SET_H_VBIT_MOVE (0);
10707 {
10708   {
10709     BI opval = 0;
10710     CPU (h_xbit) = opval;
10711     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10712   }
10713   {
10714     BI opval = 0;
10715     SET_H_INSN_PREFIXED_P (opval);
10716     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10717   }
10718 }
10719 }
10720 }
10721
10722   abuf->written = written;
10723 #undef FLD
10724 }
10725   NEXT (vpc);
10726
10727   CASE (sem, INSN_ORCBR) : /* or.b ${sconst8}],${Rd} */
10728 {
10729   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10730   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10731 #define FLD(f) abuf->fields.sfmt_addcbr.f
10732   int UNUSED written = 0;
10733   IADDR UNUSED pc = abuf->addr;
10734   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10735
10736 {
10737   QI tmp_tmpd;
10738   tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte));
10739 {
10740   SI tmp_oldregval;
10741   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10742   {
10743     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10744     SET_H_GR (FLD (f_operand2), opval);
10745     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10746   }
10747 }
10748 {
10749   {
10750     BI opval = LTQI (tmp_tmpd, 0);
10751     CPU (h_nbit) = opval;
10752     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10753   }
10754   {
10755     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10756     CPU (h_zbit) = opval;
10757     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10758   }
10759 SET_H_CBIT_MOVE (0);
10760 SET_H_VBIT_MOVE (0);
10761 {
10762   {
10763     BI opval = 0;
10764     CPU (h_xbit) = opval;
10765     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10766   }
10767   {
10768     BI opval = 0;
10769     SET_H_INSN_PREFIXED_P (opval);
10770     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10771   }
10772 }
10773 }
10774 }
10775
10776 #undef FLD
10777 }
10778   NEXT (vpc);
10779
10780   CASE (sem, INSN_ORCWR) : /* or.w ${sconst16}],${Rd} */
10781 {
10782   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10783   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10784 #define FLD(f) abuf->fields.sfmt_addcwr.f
10785   int UNUSED written = 0;
10786   IADDR UNUSED pc = abuf->addr;
10787   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10788
10789 {
10790   HI tmp_tmpd;
10791   tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word));
10792 {
10793   SI tmp_oldregval;
10794   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10795   {
10796     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10797     SET_H_GR (FLD (f_operand2), opval);
10798     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10799   }
10800 }
10801 {
10802   {
10803     BI opval = LTHI (tmp_tmpd, 0);
10804     CPU (h_nbit) = opval;
10805     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10806   }
10807   {
10808     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10809     CPU (h_zbit) = opval;
10810     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10811   }
10812 SET_H_CBIT_MOVE (0);
10813 SET_H_VBIT_MOVE (0);
10814 {
10815   {
10816     BI opval = 0;
10817     CPU (h_xbit) = opval;
10818     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10819   }
10820   {
10821     BI opval = 0;
10822     SET_H_INSN_PREFIXED_P (opval);
10823     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10824   }
10825 }
10826 }
10827 }
10828
10829 #undef FLD
10830 }
10831   NEXT (vpc);
10832
10833   CASE (sem, INSN_ORCDR) : /* or.d ${const32}],${Rd} */
10834 {
10835   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10836   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10837 #define FLD(f) abuf->fields.sfmt_addcdr.f
10838   int UNUSED written = 0;
10839   IADDR UNUSED pc = abuf->addr;
10840   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
10841
10842 {
10843   SI tmp_tmpd;
10844   tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword));
10845   {
10846     SI opval = tmp_tmpd;
10847     SET_H_GR (FLD (f_operand2), opval);
10848     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10849   }
10850 {
10851   {
10852     BI opval = LTSI (tmp_tmpd, 0);
10853     CPU (h_nbit) = opval;
10854     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10855   }
10856   {
10857     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10858     CPU (h_zbit) = opval;
10859     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10860   }
10861 SET_H_CBIT_MOVE (0);
10862 SET_H_VBIT_MOVE (0);
10863 {
10864   {
10865     BI opval = 0;
10866     CPU (h_xbit) = opval;
10867     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10868   }
10869   {
10870     BI opval = 0;
10871     SET_H_INSN_PREFIXED_P (opval);
10872     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10873   }
10874 }
10875 }
10876 }
10877
10878 #undef FLD
10879 }
10880   NEXT (vpc);
10881
10882   CASE (sem, INSN_ORQ) : /* orq $i,$Rd */
10883 {
10884   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10885   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10886 #define FLD(f) abuf->fields.sfmt_andq.f
10887   int UNUSED written = 0;
10888   IADDR UNUSED pc = abuf->addr;
10889   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10890
10891 {
10892   SI tmp_tmpd;
10893   tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6));
10894   {
10895     SI opval = tmp_tmpd;
10896     SET_H_GR (FLD (f_operand2), opval);
10897     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10898   }
10899 {
10900   {
10901     BI opval = LTSI (tmp_tmpd, 0);
10902     CPU (h_nbit) = opval;
10903     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10904   }
10905   {
10906     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10907     CPU (h_zbit) = opval;
10908     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10909   }
10910 SET_H_CBIT_MOVE (0);
10911 SET_H_VBIT_MOVE (0);
10912 {
10913   {
10914     BI opval = 0;
10915     CPU (h_xbit) = opval;
10916     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10917   }
10918   {
10919     BI opval = 0;
10920     SET_H_INSN_PREFIXED_P (opval);
10921     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10922   }
10923 }
10924 }
10925 }
10926
10927 #undef FLD
10928 }
10929   NEXT (vpc);
10930
10931   CASE (sem, INSN_XOR) : /* xor $Rs,$Rd */
10932 {
10933   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10934   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10935 #define FLD(f) abuf->fields.sfmt_muls_b.f
10936   int UNUSED written = 0;
10937   IADDR UNUSED pc = abuf->addr;
10938   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10939
10940 {
10941   SI tmp_tmpd;
10942   tmp_tmpd = XORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10943   {
10944     SI opval = tmp_tmpd;
10945     SET_H_GR (FLD (f_operand2), opval);
10946     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10947   }
10948 {
10949   {
10950     BI opval = LTSI (tmp_tmpd, 0);
10951     CPU (h_nbit) = opval;
10952     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10953   }
10954   {
10955     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10956     CPU (h_zbit) = opval;
10957     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10958   }
10959 SET_H_CBIT_MOVE (0);
10960 SET_H_VBIT_MOVE (0);
10961 {
10962   {
10963     BI opval = 0;
10964     CPU (h_xbit) = opval;
10965     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10966   }
10967   {
10968     BI opval = 0;
10969     SET_H_INSN_PREFIXED_P (opval);
10970     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10971   }
10972 }
10973 }
10974 }
10975
10976 #undef FLD
10977 }
10978   NEXT (vpc);
10979
10980   CASE (sem, INSN_SWAP) : /* swap${swapoption} ${Rs} */
10981 {
10982   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10983   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10984 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
10985   int UNUSED written = 0;
10986   IADDR UNUSED pc = abuf->addr;
10987   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10988
10989 {
10990   SI tmp_tmps;
10991   SI tmp_tmpd;
10992   tmp_tmps = GET_H_GR (FLD (f_operand1));
10993   tmp_tmpd = ({   SI tmp_tmpcode;
10994   SI tmp_tmpval;
10995   SI tmp_tmpres;
10996   tmp_tmpcode = FLD (f_operand2);
10997 ;   tmp_tmpval = tmp_tmps;
10998 ; if (EQSI (tmp_tmpcode, 0)) {
10999   tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0);
11000 }
11001  else if (EQSI (tmp_tmpcode, 1)) {
11002   tmp_tmpres = ({   SI tmp_tmpr;
11003   tmp_tmpr = tmp_tmpval;
11004 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11005 }
11006  else if (EQSI (tmp_tmpcode, 2)) {
11007   tmp_tmpres = ({   SI tmp_tmpb;
11008   tmp_tmpb = tmp_tmpval;
11009 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11010 }
11011  else if (EQSI (tmp_tmpcode, 3)) {
11012   tmp_tmpres = ({   SI tmp_tmpr;
11013   tmp_tmpr = ({   SI tmp_tmpb;
11014   tmp_tmpb = tmp_tmpval;
11015 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11016 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11017 }
11018  else if (EQSI (tmp_tmpcode, 4)) {
11019   tmp_tmpres = ({   SI tmp_tmpw;
11020   tmp_tmpw = tmp_tmpval;
11021 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11022 }
11023  else if (EQSI (tmp_tmpcode, 5)) {
11024   tmp_tmpres = ({   SI tmp_tmpr;
11025   tmp_tmpr = ({   SI tmp_tmpw;
11026   tmp_tmpw = tmp_tmpval;
11027 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11028 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11029 }
11030  else if (EQSI (tmp_tmpcode, 6)) {
11031   tmp_tmpres = ({   SI tmp_tmpb;
11032   tmp_tmpb = ({   SI tmp_tmpw;
11033   tmp_tmpw = tmp_tmpval;
11034 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11035 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11036 }
11037  else if (EQSI (tmp_tmpcode, 7)) {
11038   tmp_tmpres = ({   SI tmp_tmpr;
11039   tmp_tmpr = ({   SI tmp_tmpb;
11040   tmp_tmpb = ({   SI tmp_tmpw;
11041   tmp_tmpw = tmp_tmpval;
11042 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11043 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11044 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11045 }
11046  else if (EQSI (tmp_tmpcode, 8)) {
11047   tmp_tmpres = INVSI (tmp_tmpval);
11048 }
11049  else if (EQSI (tmp_tmpcode, 9)) {
11050   tmp_tmpres = ({   SI tmp_tmpr;
11051   tmp_tmpr = INVSI (tmp_tmpval);
11052 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11053 }
11054  else if (EQSI (tmp_tmpcode, 10)) {
11055   tmp_tmpres = ({   SI tmp_tmpb;
11056   tmp_tmpb = INVSI (tmp_tmpval);
11057 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11058 }
11059  else if (EQSI (tmp_tmpcode, 11)) {
11060   tmp_tmpres = ({   SI tmp_tmpr;
11061   tmp_tmpr = ({   SI tmp_tmpb;
11062   tmp_tmpb = INVSI (tmp_tmpval);
11063 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11064 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11065 }
11066  else if (EQSI (tmp_tmpcode, 12)) {
11067   tmp_tmpres = ({   SI tmp_tmpw;
11068   tmp_tmpw = INVSI (tmp_tmpval);
11069 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11070 }
11071  else if (EQSI (tmp_tmpcode, 13)) {
11072   tmp_tmpres = ({   SI tmp_tmpr;
11073   tmp_tmpr = ({   SI tmp_tmpw;
11074   tmp_tmpw = INVSI (tmp_tmpval);
11075 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11076 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11077 }
11078  else if (EQSI (tmp_tmpcode, 14)) {
11079   tmp_tmpres = ({   SI tmp_tmpb;
11080   tmp_tmpb = ({   SI tmp_tmpw;
11081   tmp_tmpw = INVSI (tmp_tmpval);
11082 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11083 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11084 }
11085  else if (EQSI (tmp_tmpcode, 15)) {
11086   tmp_tmpres = ({   SI tmp_tmpr;
11087   tmp_tmpr = ({   SI tmp_tmpb;
11088   tmp_tmpb = ({   SI tmp_tmpw;
11089   tmp_tmpw = INVSI (tmp_tmpval);
11090 ; ORSI (ANDSI (SLLSI (tmp_tmpw, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpw, 16), 65535)); });
11091 ; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11092 ; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11093 }
11094  else {
11095 cgen_rtx_error (current_cpu, "Unknown swapcode");
11096 }
11097 ; tmp_tmpres; });
11098   {
11099     SI opval = tmp_tmpd;
11100     SET_H_GR (FLD (f_operand1), opval);
11101     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11102   }
11103 {
11104   {
11105     BI opval = LTSI (tmp_tmpd, 0);
11106     CPU (h_nbit) = opval;
11107     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11108   }
11109   {
11110     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11111     CPU (h_zbit) = opval;
11112     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11113   }
11114 SET_H_CBIT_MOVE (0);
11115 SET_H_VBIT_MOVE (0);
11116 {
11117   {
11118     BI opval = 0;
11119     CPU (h_xbit) = opval;
11120     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11121   }
11122   {
11123     BI opval = 0;
11124     SET_H_INSN_PREFIXED_P (opval);
11125     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11126   }
11127 }
11128 }
11129 }
11130
11131 #undef FLD
11132 }
11133   NEXT (vpc);
11134
11135   CASE (sem, INSN_ASRR_B_R) : /* asrr.b $Rs,$Rd */
11136 {
11137   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11138   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11139 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11140   int UNUSED written = 0;
11141   IADDR UNUSED pc = abuf->addr;
11142   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11143
11144 {
11145   QI tmp_tmpd;
11146   SI tmp_cnt1;
11147   SI tmp_cnt2;
11148   tmp_cnt1 = GET_H_GR (FLD (f_operand1));
11149   tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31)));
11150   tmp_tmpd = SRASI (EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2);
11151 {
11152   SI tmp_oldregval;
11153   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11154   {
11155     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
11156     SET_H_GR (FLD (f_operand2), opval);
11157     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11158   }
11159 }
11160 {
11161   {
11162     BI opval = LTQI (tmp_tmpd, 0);
11163     CPU (h_nbit) = opval;
11164     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11165   }
11166   {
11167     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11168     CPU (h_zbit) = opval;
11169     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11170   }
11171 SET_H_CBIT_MOVE (0);
11172 SET_H_VBIT_MOVE (0);
11173 {
11174   {
11175     BI opval = 0;
11176     CPU (h_xbit) = opval;
11177     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11178   }
11179   {
11180     BI opval = 0;
11181     SET_H_INSN_PREFIXED_P (opval);
11182     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11183   }
11184 }
11185 }
11186 }
11187
11188 #undef FLD
11189 }
11190   NEXT (vpc);
11191
11192   CASE (sem, INSN_ASRR_W_R) : /* asrr.w $Rs,$Rd */
11193 {
11194   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11195   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11196 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11197   int UNUSED written = 0;
11198   IADDR UNUSED pc = abuf->addr;
11199   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11200
11201 {
11202   HI tmp_tmpd;
11203   SI tmp_cnt1;
11204   SI tmp_cnt2;
11205   tmp_cnt1 = GET_H_GR (FLD (f_operand1));
11206   tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31)));
11207   tmp_tmpd = SRASI (EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2);
11208 {
11209   SI tmp_oldregval;
11210   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11211   {
11212     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
11213     SET_H_GR (FLD (f_operand2), opval);
11214     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11215   }
11216 }
11217 {
11218   {
11219     BI opval = LTHI (tmp_tmpd, 0);
11220     CPU (h_nbit) = opval;
11221     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11222   }
11223   {
11224     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11225     CPU (h_zbit) = opval;
11226     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11227   }
11228 SET_H_CBIT_MOVE (0);
11229 SET_H_VBIT_MOVE (0);
11230 {
11231   {
11232     BI opval = 0;
11233     CPU (h_xbit) = opval;
11234     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11235   }
11236   {
11237     BI opval = 0;
11238     SET_H_INSN_PREFIXED_P (opval);
11239     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11240   }
11241 }
11242 }
11243 }
11244
11245 #undef FLD
11246 }
11247   NEXT (vpc);
11248
11249   CASE (sem, INSN_ASRR_D_R) : /* asrr.d $Rs,$Rd */
11250 {
11251   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11252   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11253 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11254   int UNUSED written = 0;
11255   IADDR UNUSED pc = abuf->addr;
11256   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11257
11258 {
11259   SI tmp_tmpd;
11260   SI tmp_cnt1;
11261   SI tmp_cnt2;
11262   tmp_cnt1 = GET_H_GR (FLD (f_operand1));
11263   tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31)));
11264   tmp_tmpd = SRASI (EXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2);
11265   {
11266     SI opval = tmp_tmpd;
11267     SET_H_GR (FLD (f_operand2), opval);
11268     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11269   }
11270 {
11271   {
11272     BI opval = LTSI (tmp_tmpd, 0);
11273     CPU (h_nbit) = opval;
11274     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11275   }
11276   {
11277     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11278     CPU (h_zbit) = opval;
11279     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11280   }
11281 SET_H_CBIT_MOVE (0);
11282 SET_H_VBIT_MOVE (0);
11283 {
11284   {
11285     BI opval = 0;
11286     CPU (h_xbit) = opval;
11287     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11288   }
11289   {
11290     BI opval = 0;
11291     SET_H_INSN_PREFIXED_P (opval);
11292     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11293   }
11294 }
11295 }
11296 }
11297
11298 #undef FLD
11299 }
11300   NEXT (vpc);
11301
11302   CASE (sem, INSN_ASRQ) : /* asrq $c,${Rd} */
11303 {
11304   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11305   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11306 #define FLD(f) abuf->fields.sfmt_asrq.f
11307   int UNUSED written = 0;
11308   IADDR UNUSED pc = abuf->addr;
11309   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11310
11311 {
11312   SI tmp_tmpd;
11313   tmp_tmpd = SRASI (GET_H_GR (FLD (f_operand2)), FLD (f_u5));
11314   {
11315     SI opval = tmp_tmpd;
11316     SET_H_GR (FLD (f_operand2), opval);
11317     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11318   }
11319 {
11320   {
11321     BI opval = LTSI (tmp_tmpd, 0);
11322     CPU (h_nbit) = opval;
11323     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11324   }
11325   {
11326     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11327     CPU (h_zbit) = opval;
11328     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11329   }
11330 SET_H_CBIT_MOVE (0);
11331 SET_H_VBIT_MOVE (0);
11332 {
11333   {
11334     BI opval = 0;
11335     CPU (h_xbit) = opval;
11336     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11337   }
11338   {
11339     BI opval = 0;
11340     SET_H_INSN_PREFIXED_P (opval);
11341     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11342   }
11343 }
11344 }
11345 }
11346
11347 #undef FLD
11348 }
11349   NEXT (vpc);
11350
11351   CASE (sem, INSN_LSRR_B_R) : /* lsrr.b $Rs,$Rd */
11352 {
11353   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11354   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11355 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11356   int UNUSED written = 0;
11357   IADDR UNUSED pc = abuf->addr;
11358   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11359
11360 {
11361   SI tmp_tmpd;
11362   SI tmp_cnt;
11363   tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11364   tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11365 {
11366   SI tmp_oldregval;
11367   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11368   {
11369     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
11370     SET_H_GR (FLD (f_operand2), opval);
11371     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11372   }
11373 }
11374 {
11375   {
11376     BI opval = LTQI (tmp_tmpd, 0);
11377     CPU (h_nbit) = opval;
11378     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11379   }
11380   {
11381     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11382     CPU (h_zbit) = opval;
11383     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11384   }
11385 SET_H_CBIT_MOVE (0);
11386 SET_H_VBIT_MOVE (0);
11387 {
11388   {
11389     BI opval = 0;
11390     CPU (h_xbit) = opval;
11391     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11392   }
11393   {
11394     BI opval = 0;
11395     SET_H_INSN_PREFIXED_P (opval);
11396     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11397   }
11398 }
11399 }
11400 }
11401
11402 #undef FLD
11403 }
11404   NEXT (vpc);
11405
11406   CASE (sem, INSN_LSRR_W_R) : /* lsrr.w $Rs,$Rd */
11407 {
11408   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11409   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11410 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11411   int UNUSED written = 0;
11412   IADDR UNUSED pc = abuf->addr;
11413   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11414
11415 {
11416   SI tmp_tmpd;
11417   SI tmp_cnt;
11418   tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11419   tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11420 {
11421   SI tmp_oldregval;
11422   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11423   {
11424     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
11425     SET_H_GR (FLD (f_operand2), opval);
11426     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11427   }
11428 }
11429 {
11430   {
11431     BI opval = LTHI (tmp_tmpd, 0);
11432     CPU (h_nbit) = opval;
11433     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11434   }
11435   {
11436     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11437     CPU (h_zbit) = opval;
11438     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11439   }
11440 SET_H_CBIT_MOVE (0);
11441 SET_H_VBIT_MOVE (0);
11442 {
11443   {
11444     BI opval = 0;
11445     CPU (h_xbit) = opval;
11446     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11447   }
11448   {
11449     BI opval = 0;
11450     SET_H_INSN_PREFIXED_P (opval);
11451     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11452   }
11453 }
11454 }
11455 }
11456
11457 #undef FLD
11458 }
11459   NEXT (vpc);
11460
11461   CASE (sem, INSN_LSRR_D_R) : /* lsrr.d $Rs,$Rd */
11462 {
11463   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11464   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11465 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11466   int UNUSED written = 0;
11467   IADDR UNUSED pc = abuf->addr;
11468   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11469
11470 {
11471   SI tmp_tmpd;
11472   SI tmp_cnt;
11473   tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11474   tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11475   {
11476     SI opval = tmp_tmpd;
11477     SET_H_GR (FLD (f_operand2), opval);
11478     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11479   }
11480 {
11481   {
11482     BI opval = LTSI (tmp_tmpd, 0);
11483     CPU (h_nbit) = opval;
11484     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11485   }
11486   {
11487     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11488     CPU (h_zbit) = opval;
11489     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11490   }
11491 SET_H_CBIT_MOVE (0);
11492 SET_H_VBIT_MOVE (0);
11493 {
11494   {
11495     BI opval = 0;
11496     CPU (h_xbit) = opval;
11497     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11498   }
11499   {
11500     BI opval = 0;
11501     SET_H_INSN_PREFIXED_P (opval);
11502     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11503   }
11504 }
11505 }
11506 }
11507
11508 #undef FLD
11509 }
11510   NEXT (vpc);
11511
11512   CASE (sem, INSN_LSRQ) : /* lsrq $c,${Rd} */
11513 {
11514   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11515   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11516 #define FLD(f) abuf->fields.sfmt_asrq.f
11517   int UNUSED written = 0;
11518   IADDR UNUSED pc = abuf->addr;
11519   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11520
11521 {
11522   SI tmp_tmpd;
11523   tmp_tmpd = SRLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5));
11524   {
11525     SI opval = tmp_tmpd;
11526     SET_H_GR (FLD (f_operand2), opval);
11527     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11528   }
11529 {
11530   {
11531     BI opval = LTSI (tmp_tmpd, 0);
11532     CPU (h_nbit) = opval;
11533     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11534   }
11535   {
11536     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11537     CPU (h_zbit) = opval;
11538     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11539   }
11540 SET_H_CBIT_MOVE (0);
11541 SET_H_VBIT_MOVE (0);
11542 {
11543   {
11544     BI opval = 0;
11545     CPU (h_xbit) = opval;
11546     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11547   }
11548   {
11549     BI opval = 0;
11550     SET_H_INSN_PREFIXED_P (opval);
11551     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11552   }
11553 }
11554 }
11555 }
11556
11557 #undef FLD
11558 }
11559   NEXT (vpc);
11560
11561   CASE (sem, INSN_LSLR_B_R) : /* lslr.b $Rs,$Rd */
11562 {
11563   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11564   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11565 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11566   int UNUSED written = 0;
11567   IADDR UNUSED pc = abuf->addr;
11568   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11569
11570 {
11571   SI tmp_tmpd;
11572   SI tmp_cnt;
11573   tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11574   tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11575 {
11576   SI tmp_oldregval;
11577   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11578   {
11579     SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
11580     SET_H_GR (FLD (f_operand2), opval);
11581     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11582   }
11583 }
11584 {
11585   {
11586     BI opval = LTQI (tmp_tmpd, 0);
11587     CPU (h_nbit) = opval;
11588     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11589   }
11590   {
11591     BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11592     CPU (h_zbit) = opval;
11593     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11594   }
11595 SET_H_CBIT_MOVE (0);
11596 SET_H_VBIT_MOVE (0);
11597 {
11598   {
11599     BI opval = 0;
11600     CPU (h_xbit) = opval;
11601     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11602   }
11603   {
11604     BI opval = 0;
11605     SET_H_INSN_PREFIXED_P (opval);
11606     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11607   }
11608 }
11609 }
11610 }
11611
11612 #undef FLD
11613 }
11614   NEXT (vpc);
11615
11616   CASE (sem, INSN_LSLR_W_R) : /* lslr.w $Rs,$Rd */
11617 {
11618   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11619   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11620 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11621   int UNUSED written = 0;
11622   IADDR UNUSED pc = abuf->addr;
11623   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11624
11625 {
11626   SI tmp_tmpd;
11627   SI tmp_cnt;
11628   tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11629   tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11630 {
11631   SI tmp_oldregval;
11632   tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11633   {
11634     SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
11635     SET_H_GR (FLD (f_operand2), opval);
11636     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11637   }
11638 }
11639 {
11640   {
11641     BI opval = LTHI (tmp_tmpd, 0);
11642     CPU (h_nbit) = opval;
11643     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11644   }
11645   {
11646     BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11647     CPU (h_zbit) = opval;
11648     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11649   }
11650 SET_H_CBIT_MOVE (0);
11651 SET_H_VBIT_MOVE (0);
11652 {
11653   {
11654     BI opval = 0;
11655     CPU (h_xbit) = opval;
11656     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11657   }
11658   {
11659     BI opval = 0;
11660     SET_H_INSN_PREFIXED_P (opval);
11661     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11662   }
11663 }
11664 }
11665 }
11666
11667 #undef FLD
11668 }
11669   NEXT (vpc);
11670
11671   CASE (sem, INSN_LSLR_D_R) : /* lslr.d $Rs,$Rd */
11672 {
11673   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11674   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11675 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11676   int UNUSED written = 0;
11677   IADDR UNUSED pc = abuf->addr;
11678   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11679
11680 {
11681   SI tmp_tmpd;
11682   SI tmp_cnt;
11683   tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11684   tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11685   {
11686     SI opval = tmp_tmpd;
11687     SET_H_GR (FLD (f_operand2), opval);
11688     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11689   }
11690 {
11691   {
11692     BI opval = LTSI (tmp_tmpd, 0);
11693     CPU (h_nbit) = opval;
11694     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11695   }
11696   {
11697     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11698     CPU (h_zbit) = opval;
11699     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11700   }
11701 SET_H_CBIT_MOVE (0);
11702 SET_H_VBIT_MOVE (0);
11703 {
11704   {
11705     BI opval = 0;
11706     CPU (h_xbit) = opval;
11707     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11708   }
11709   {
11710     BI opval = 0;
11711     SET_H_INSN_PREFIXED_P (opval);
11712     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11713   }
11714 }
11715 }
11716 }
11717
11718 #undef FLD
11719 }
11720   NEXT (vpc);
11721
11722   CASE (sem, INSN_LSLQ) : /* lslq $c,${Rd} */
11723 {
11724   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11725   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11726 #define FLD(f) abuf->fields.sfmt_asrq.f
11727   int UNUSED written = 0;
11728   IADDR UNUSED pc = abuf->addr;
11729   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11730
11731 {
11732   SI tmp_tmpd;
11733   tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5));
11734   {
11735     SI opval = tmp_tmpd;
11736     SET_H_GR (FLD (f_operand2), opval);
11737     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11738   }
11739 {
11740   {
11741     BI opval = LTSI (tmp_tmpd, 0);
11742     CPU (h_nbit) = opval;
11743     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11744   }
11745   {
11746     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11747     CPU (h_zbit) = opval;
11748     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11749   }
11750 SET_H_CBIT_MOVE (0);
11751 SET_H_VBIT_MOVE (0);
11752 {
11753   {
11754     BI opval = 0;
11755     CPU (h_xbit) = opval;
11756     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11757   }
11758   {
11759     BI opval = 0;
11760     SET_H_INSN_PREFIXED_P (opval);
11761     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11762   }
11763 }
11764 }
11765 }
11766
11767 #undef FLD
11768 }
11769   NEXT (vpc);
11770
11771   CASE (sem, INSN_BTST) : /* $Rs,$Rd */
11772 {
11773   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11774   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11775 #define FLD(f) abuf->fields.sfmt_add_b_r.f
11776   int UNUSED written = 0;
11777   IADDR UNUSED pc = abuf->addr;
11778   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11779
11780 {
11781   SI tmp_tmpd;
11782   SI tmp_cnt;
11783   tmp_cnt = SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31));
11784   tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), tmp_cnt);
11785 {
11786   {
11787     BI opval = LTSI (tmp_tmpd, 0);
11788     CPU (h_nbit) = opval;
11789     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11790   }
11791   {
11792     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11793     CPU (h_zbit) = opval;
11794     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11795   }
11796 SET_H_CBIT_MOVE (0);
11797 SET_H_VBIT_MOVE (0);
11798 {
11799   {
11800     BI opval = 0;
11801     CPU (h_xbit) = opval;
11802     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11803   }
11804   {
11805     BI opval = 0;
11806     SET_H_INSN_PREFIXED_P (opval);
11807     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11808   }
11809 }
11810 }
11811 }
11812
11813 #undef FLD
11814 }
11815   NEXT (vpc);
11816
11817   CASE (sem, INSN_BTSTQ) : /* btstq $c,${Rd} */
11818 {
11819   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11820   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11821 #define FLD(f) abuf->fields.sfmt_asrq.f
11822   int UNUSED written = 0;
11823   IADDR UNUSED pc = abuf->addr;
11824   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11825
11826 {
11827   SI tmp_tmpd;
11828   tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, FLD (f_u5)));
11829 {
11830   {
11831     BI opval = LTSI (tmp_tmpd, 0);
11832     CPU (h_nbit) = opval;
11833     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11834   }
11835   {
11836     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11837     CPU (h_zbit) = opval;
11838     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11839   }
11840 SET_H_CBIT_MOVE (0);
11841 SET_H_VBIT_MOVE (0);
11842 {
11843   {
11844     BI opval = 0;
11845     CPU (h_xbit) = opval;
11846     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11847   }
11848   {
11849     BI opval = 0;
11850     SET_H_INSN_PREFIXED_P (opval);
11851     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11852   }
11853 }
11854 }
11855 }
11856
11857 #undef FLD
11858 }
11859   NEXT (vpc);
11860
11861   CASE (sem, INSN_SETF) : /* setf ${list-of-flags} */
11862 {
11863   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11864   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11865 #define FLD(f) abuf->fields.sfmt_setf.f
11866   int UNUSED written = 0;
11867   IADDR UNUSED pc = abuf->addr;
11868   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11869
11870 {
11871   SI tmp_tmp;
11872   tmp_tmp = FLD (f_dstsrc);
11873 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) {
11874   {
11875     BI opval = 1;
11876     CPU (h_cbit) = opval;
11877     written |= (1 << 1);
11878     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
11879   }
11880 }
11881 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) {
11882   {
11883     BI opval = 1;
11884     CPU (h_vbit) = opval;
11885     written |= (1 << 7);
11886     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
11887   }
11888 }
11889 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) {
11890   {
11891     BI opval = 1;
11892     CPU (h_zbit) = opval;
11893     written |= (1 << 9);
11894     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11895   }
11896 }
11897 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) {
11898   {
11899     BI opval = 1;
11900     CPU (h_nbit) = opval;
11901     written |= (1 << 3);
11902     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11903   }
11904 }
11905 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) {
11906   {
11907     BI opval = 1;
11908     CPU (h_xbit) = opval;
11909     written |= (1 << 8);
11910     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11911   }
11912 }
11913 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) {
11914   {
11915     BI opval = 1;
11916     SET_H_IBIT (opval);
11917     written |= (1 << 2);
11918     CGEN_TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval);
11919   }
11920 }
11921 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) {
11922   {
11923     BI opval = 1;
11924     SET_H_UBIT (opval);
11925     written |= (1 << 6);
11926     CGEN_TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval);
11927   }
11928 }
11929 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) {
11930   {
11931     BI opval = 1;
11932     CPU (h_pbit) = opval;
11933     written |= (1 << 4);
11934     CGEN_TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval);
11935   }
11936 }
11937   {
11938     BI opval = 0;
11939     SET_H_INSN_PREFIXED_P (opval);
11940     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11941   }
11942 if (EQSI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) {
11943   {
11944     BI opval = 0;
11945     CPU (h_xbit) = opval;
11946     written |= (1 << 8);
11947     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11948   }
11949 }
11950 }
11951
11952   abuf->written = written;
11953 #undef FLD
11954 }
11955   NEXT (vpc);
11956
11957   CASE (sem, INSN_CLEARF) : /* clearf ${list-of-flags} */
11958 {
11959   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11960   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11961 #define FLD(f) abuf->fields.sfmt_setf.f
11962   int UNUSED written = 0;
11963   IADDR UNUSED pc = abuf->addr;
11964   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11965
11966 {
11967   SI tmp_tmp;
11968   tmp_tmp = FLD (f_dstsrc);
11969 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) {
11970   {
11971     BI opval = 0;
11972     CPU (h_cbit) = opval;
11973     written |= (1 << 1);
11974     CGEN_TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
11975   }
11976 }
11977 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) {
11978   {
11979     BI opval = 0;
11980     CPU (h_vbit) = opval;
11981     written |= (1 << 7);
11982     CGEN_TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
11983   }
11984 }
11985 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) {
11986   {
11987     BI opval = 0;
11988     CPU (h_zbit) = opval;
11989     written |= (1 << 9);
11990     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11991   }
11992 }
11993 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) {
11994   {
11995     BI opval = 0;
11996     CPU (h_nbit) = opval;
11997     written |= (1 << 3);
11998     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11999   }
12000 }
12001 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) {
12002   {
12003     BI opval = 0;
12004     CPU (h_xbit) = opval;
12005     written |= (1 << 8);
12006     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12007   }
12008 }
12009 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) {
12010   {
12011     BI opval = 0;
12012     SET_H_IBIT (opval);
12013     written |= (1 << 2);
12014     CGEN_TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval);
12015   }
12016 }
12017 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) {
12018   {
12019     BI opval = 0;
12020     SET_H_UBIT (opval);
12021     written |= (1 << 6);
12022     CGEN_TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval);
12023   }
12024 }
12025 if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) {
12026   {
12027     BI opval = 0;
12028     CPU (h_pbit) = opval;
12029     written |= (1 << 4);
12030     CGEN_TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval);
12031   }
12032 }
12033 {
12034   {
12035     BI opval = 0;
12036     CPU (h_xbit) = opval;
12037     written |= (1 << 8);
12038     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12039   }
12040   {
12041     BI opval = 0;
12042     SET_H_INSN_PREFIXED_P (opval);
12043     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12044   }
12045 }
12046 }
12047
12048   abuf->written = written;
12049 #undef FLD
12050 }
12051   NEXT (vpc);
12052
12053   CASE (sem, INSN_BCC_B) : /* b${cc} ${o-pcrel} */
12054 {
12055   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12056   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12057 #define FLD(f) abuf->fields.sfmt_bcc_b.f
12058   int UNUSED written = 0;
12059   IADDR UNUSED pc = abuf->addr;
12060   SEM_BRANCH_INIT
12061   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12062
12063 {
12064   BI tmp_truthval;
12065   tmp_truthval = ({   SI tmp_tmpcond;
12066   BI tmp_condres;
12067   tmp_tmpcond = FLD (f_operand2);
12068 ; if (EQSI (tmp_tmpcond, 0)) {
12069   tmp_condres = NOTBI (CPU (h_cbit));
12070 }
12071  else if (EQSI (tmp_tmpcond, 1)) {
12072   tmp_condres = CPU (h_cbit);
12073 }
12074  else if (EQSI (tmp_tmpcond, 2)) {
12075   tmp_condres = NOTBI (CPU (h_zbit));
12076 }
12077  else if (EQSI (tmp_tmpcond, 3)) {
12078   tmp_condres = CPU (h_zbit);
12079 }
12080  else if (EQSI (tmp_tmpcond, 4)) {
12081   tmp_condres = NOTBI (CPU (h_vbit));
12082 }
12083  else if (EQSI (tmp_tmpcond, 5)) {
12084   tmp_condres = CPU (h_vbit);
12085 }
12086  else if (EQSI (tmp_tmpcond, 6)) {
12087   tmp_condres = NOTBI (CPU (h_nbit));
12088 }
12089  else if (EQSI (tmp_tmpcond, 7)) {
12090   tmp_condres = CPU (h_nbit);
12091 }
12092  else if (EQSI (tmp_tmpcond, 8)) {
12093   tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit));
12094 }
12095  else if (EQSI (tmp_tmpcond, 9)) {
12096   tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)));
12097 }
12098  else if (EQSI (tmp_tmpcond, 10)) {
12099   tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)));
12100 }
12101  else if (EQSI (tmp_tmpcond, 11)) {
12102   tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit));
12103 }
12104  else if (EQSI (tmp_tmpcond, 12)) {
12105   tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)));
12106 }
12107  else if (EQSI (tmp_tmpcond, 13)) {
12108   tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit));
12109 }
12110  else if (EQSI (tmp_tmpcond, 14)) {
12111   tmp_condres = 1;
12112 }
12113  else if (EQSI (tmp_tmpcond, 15)) {
12114   tmp_condres = CPU (h_pbit);
12115 }
12116  else {
12117 cgen_rtx_error (current_cpu, "Unknown condition code");
12118 }
12119 ; tmp_condres; });
12120 crisv10f_branch_taken (current_cpu, pc, FLD (i_o_pcrel), tmp_truthval);
12121 {
12122   {
12123     BI opval = 0;
12124     CPU (h_xbit) = opval;
12125     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12126   }
12127   {
12128     BI opval = 0;
12129     SET_H_INSN_PREFIXED_P (opval);
12130     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12131   }
12132 }
12133 if (tmp_truthval) {
12134 {
12135   {
12136     USI opval = FLD (i_o_pcrel);
12137     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12138     written |= (1 << 8);
12139     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12140   }
12141 }
12142 }
12143 }
12144
12145   abuf->written = written;
12146   SEM_BRANCH_FINI (vpc);
12147 #undef FLD
12148 }
12149   NEXT (vpc);
12150
12151   CASE (sem, INSN_BA_B) : /* ba ${o-pcrel} */
12152 {
12153   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12154   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12155 #define FLD(f) abuf->fields.sfmt_bcc_b.f
12156   int UNUSED written = 0;
12157   IADDR UNUSED pc = abuf->addr;
12158   SEM_BRANCH_INIT
12159   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12160
12161 {
12162 {
12163   {
12164     BI opval = 0;
12165     CPU (h_xbit) = opval;
12166     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12167   }
12168   {
12169     BI opval = 0;
12170     SET_H_INSN_PREFIXED_P (opval);
12171     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12172   }
12173 }
12174 {
12175   {
12176     USI opval = FLD (i_o_pcrel);
12177     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12178     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12179   }
12180 }
12181 }
12182
12183   SEM_BRANCH_FINI (vpc);
12184 #undef FLD
12185 }
12186   NEXT (vpc);
12187
12188   CASE (sem, INSN_BCC_W) : /* b${cc} ${o-word-pcrel} */
12189 {
12190   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12191   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12192 #define FLD(f) abuf->fields.sfmt_bcc_w.f
12193   int UNUSED written = 0;
12194   IADDR UNUSED pc = abuf->addr;
12195   SEM_BRANCH_INIT
12196   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12197
12198 {
12199   BI tmp_truthval;
12200   tmp_truthval = ({   SI tmp_tmpcond;
12201   BI tmp_condres;
12202   tmp_tmpcond = FLD (f_operand2);
12203 ; if (EQSI (tmp_tmpcond, 0)) {
12204   tmp_condres = NOTBI (CPU (h_cbit));
12205 }
12206  else if (EQSI (tmp_tmpcond, 1)) {
12207   tmp_condres = CPU (h_cbit);
12208 }
12209  else if (EQSI (tmp_tmpcond, 2)) {
12210   tmp_condres = NOTBI (CPU (h_zbit));
12211 }
12212  else if (EQSI (tmp_tmpcond, 3)) {
12213   tmp_condres = CPU (h_zbit);
12214 }
12215  else if (EQSI (tmp_tmpcond, 4)) {
12216   tmp_condres = NOTBI (CPU (h_vbit));
12217 }
12218  else if (EQSI (tmp_tmpcond, 5)) {
12219   tmp_condres = CPU (h_vbit);
12220 }
12221  else if (EQSI (tmp_tmpcond, 6)) {
12222   tmp_condres = NOTBI (CPU (h_nbit));
12223 }
12224  else if (EQSI (tmp_tmpcond, 7)) {
12225   tmp_condres = CPU (h_nbit);
12226 }
12227  else if (EQSI (tmp_tmpcond, 8)) {
12228   tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit));
12229 }
12230  else if (EQSI (tmp_tmpcond, 9)) {
12231   tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)));
12232 }
12233  else if (EQSI (tmp_tmpcond, 10)) {
12234   tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)));
12235 }
12236  else if (EQSI (tmp_tmpcond, 11)) {
12237   tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit));
12238 }
12239  else if (EQSI (tmp_tmpcond, 12)) {
12240   tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)));
12241 }
12242  else if (EQSI (tmp_tmpcond, 13)) {
12243   tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit));
12244 }
12245  else if (EQSI (tmp_tmpcond, 14)) {
12246   tmp_condres = 1;
12247 }
12248  else if (EQSI (tmp_tmpcond, 15)) {
12249   tmp_condres = CPU (h_pbit);
12250 }
12251  else {
12252 cgen_rtx_error (current_cpu, "Unknown condition code");
12253 }
12254 ; tmp_condres; });
12255 crisv10f_branch_taken (current_cpu, pc, FLD (i_o_word_pcrel), tmp_truthval);
12256 {
12257   {
12258     BI opval = 0;
12259     CPU (h_xbit) = opval;
12260     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12261   }
12262   {
12263     BI opval = 0;
12264     SET_H_INSN_PREFIXED_P (opval);
12265     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12266   }
12267 }
12268 if (tmp_truthval) {
12269 {
12270   {
12271     USI opval = FLD (i_o_word_pcrel);
12272     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12273     written |= (1 << 8);
12274     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12275   }
12276 }
12277 }
12278 }
12279
12280   abuf->written = written;
12281   SEM_BRANCH_FINI (vpc);
12282 #undef FLD
12283 }
12284   NEXT (vpc);
12285
12286   CASE (sem, INSN_BA_W) : /* ba ${o-word-pcrel} */
12287 {
12288   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12290 #define FLD(f) abuf->fields.sfmt_bcc_w.f
12291   int UNUSED written = 0;
12292   IADDR UNUSED pc = abuf->addr;
12293   SEM_BRANCH_INIT
12294   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12295
12296 {
12297 {
12298   {
12299     BI opval = 0;
12300     CPU (h_xbit) = opval;
12301     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12302   }
12303   {
12304     BI opval = 0;
12305     SET_H_INSN_PREFIXED_P (opval);
12306     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12307   }
12308 }
12309 {
12310   {
12311     USI opval = FLD (i_o_word_pcrel);
12312     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12313     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12314   }
12315 }
12316 }
12317
12318   SEM_BRANCH_FINI (vpc);
12319 #undef FLD
12320 }
12321   NEXT (vpc);
12322
12323   CASE (sem, INSN_JUMP_R) : /* jump/jsr/jir ${Rs} */
12324 {
12325   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12326   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12327 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
12328   int UNUSED written = 0;
12329   IADDR UNUSED pc = abuf->addr;
12330   SEM_BRANCH_INIT
12331   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12332
12333 {
12334   {
12335     SI opval = ADDSI (pc, 2);
12336     SET_H_SR (FLD (f_operand2), opval);
12337     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
12338   }
12339   {
12340     USI opval = GET_H_GR (FLD (f_operand1));
12341     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
12342     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12343   }
12344 {
12345   {
12346     BI opval = 0;
12347     CPU (h_xbit) = opval;
12348     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12349   }
12350   {
12351     BI opval = 0;
12352     SET_H_INSN_PREFIXED_P (opval);
12353     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12354   }
12355 }
12356 }
12357
12358   SEM_BRANCH_FINI (vpc);
12359 #undef FLD
12360 }
12361   NEXT (vpc);
12362
12363   CASE (sem, INSN_JUMP_M) : /* jump/jsr/jir [${Rs}${inc}] */
12364 {
12365   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12366   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12367 #define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
12368   int UNUSED written = 0;
12369   IADDR UNUSED pc = abuf->addr;
12370   SEM_BRANCH_INIT
12371   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12372
12373 {
12374   {
12375     SI opval = ADDSI (pc, 2);
12376     SET_H_SR (FLD (f_operand2), opval);
12377     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
12378   }
12379   {
12380     USI opval = ({   SI tmp_addr;
12381   SI tmp_tmp_mem;
12382   BI tmp_postinc;
12383   tmp_postinc = FLD (f_memmode);
12384 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12385 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
12386 ; if (NEBI (tmp_postinc, 0)) {
12387 {
12388 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12389   tmp_addr = ADDSI (tmp_addr, 4);
12390 }
12391   {
12392     SI opval = tmp_addr;
12393     SET_H_GR (FLD (f_operand1), opval);
12394     written |= (1 << 7);
12395     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12396   }
12397 }
12398 }
12399 ; tmp_tmp_mem; });
12400     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
12401     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12402   }
12403 {
12404   {
12405     BI opval = 0;
12406     CPU (h_xbit) = opval;
12407     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12408   }
12409   {
12410     BI opval = 0;
12411     SET_H_INSN_PREFIXED_P (opval);
12412     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12413   }
12414 }
12415 }
12416
12417   abuf->written = written;
12418   SEM_BRANCH_FINI (vpc);
12419 #undef FLD
12420 }
12421   NEXT (vpc);
12422
12423   CASE (sem, INSN_JUMP_C) : /* jump/jsr/jir ${const32} */
12424 {
12425   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12426   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12427 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
12428   int UNUSED written = 0;
12429   IADDR UNUSED pc = abuf->addr;
12430   SEM_BRANCH_INIT
12431   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
12432
12433 {
12434   {
12435     SI opval = ADDSI (pc, 6);
12436     SET_H_SR (FLD (f_operand2), opval);
12437     CGEN_TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
12438   }
12439   {
12440     USI opval = FLD (f_indir_pc__dword);
12441     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12442     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12443   }
12444 {
12445   {
12446     BI opval = 0;
12447     CPU (h_xbit) = opval;
12448     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12449   }
12450   {
12451     BI opval = 0;
12452     SET_H_INSN_PREFIXED_P (opval);
12453     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12454   }
12455 }
12456 }
12457
12458   SEM_BRANCH_FINI (vpc);
12459 #undef FLD
12460 }
12461   NEXT (vpc);
12462
12463   CASE (sem, INSN_BREAK) : /* break $n */
12464 {
12465   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12466   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12467 #define FLD(f) abuf->fields.sfmt_break.f
12468   int UNUSED written = 0;
12469   IADDR UNUSED pc = abuf->addr;
12470   SEM_BRANCH_INIT
12471   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12472
12473 {
12474 {
12475   {
12476     BI opval = 0;
12477     CPU (h_xbit) = opval;
12478     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12479   }
12480   {
12481     BI opval = 0;
12482     SET_H_INSN_PREFIXED_P (opval);
12483     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12484   }
12485 }
12486   {
12487     USI opval = crisv10f_break_handler (current_cpu, FLD (f_u4), pc);
12488     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
12489     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12490   }
12491 }
12492
12493   SEM_BRANCH_FINI (vpc);
12494 #undef FLD
12495 }
12496   NEXT (vpc);
12497
12498   CASE (sem, INSN_BOUND_R_B_R) : /* bound-r.b ${Rs},${Rd} */
12499 {
12500   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12501   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12502 #define FLD(f) abuf->fields.sfmt_muls_b.f
12503   int UNUSED written = 0;
12504   IADDR UNUSED pc = abuf->addr;
12505   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12506
12507 {
12508   SI tmp_tmpopd;
12509   SI tmp_tmpops;
12510   SI tmp_newval;
12511   tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
12512   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12513   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12514   {
12515     SI opval = tmp_newval;
12516     SET_H_GR (FLD (f_operand2), opval);
12517     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12518   }
12519 {
12520   {
12521     BI opval = LTSI (tmp_newval, 0);
12522     CPU (h_nbit) = opval;
12523     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12524   }
12525   {
12526     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12527     CPU (h_zbit) = opval;
12528     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12529   }
12530 SET_H_CBIT_MOVE (0);
12531 SET_H_VBIT_MOVE (0);
12532 {
12533   {
12534     BI opval = 0;
12535     CPU (h_xbit) = opval;
12536     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12537   }
12538   {
12539     BI opval = 0;
12540     SET_H_INSN_PREFIXED_P (opval);
12541     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12542   }
12543 }
12544 }
12545 }
12546
12547 #undef FLD
12548 }
12549   NEXT (vpc);
12550
12551   CASE (sem, INSN_BOUND_R_W_R) : /* bound-r.w ${Rs},${Rd} */
12552 {
12553   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12554   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12555 #define FLD(f) abuf->fields.sfmt_muls_b.f
12556   int UNUSED written = 0;
12557   IADDR UNUSED pc = abuf->addr;
12558   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12559
12560 {
12561   SI tmp_tmpopd;
12562   SI tmp_tmpops;
12563   SI tmp_newval;
12564   tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
12565   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12566   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12567   {
12568     SI opval = tmp_newval;
12569     SET_H_GR (FLD (f_operand2), opval);
12570     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12571   }
12572 {
12573   {
12574     BI opval = LTSI (tmp_newval, 0);
12575     CPU (h_nbit) = opval;
12576     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12577   }
12578   {
12579     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12580     CPU (h_zbit) = opval;
12581     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12582   }
12583 SET_H_CBIT_MOVE (0);
12584 SET_H_VBIT_MOVE (0);
12585 {
12586   {
12587     BI opval = 0;
12588     CPU (h_xbit) = opval;
12589     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12590   }
12591   {
12592     BI opval = 0;
12593     SET_H_INSN_PREFIXED_P (opval);
12594     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12595   }
12596 }
12597 }
12598 }
12599
12600 #undef FLD
12601 }
12602   NEXT (vpc);
12603
12604   CASE (sem, INSN_BOUND_R_D_R) : /* bound-r.d ${Rs},${Rd} */
12605 {
12606   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12607   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12608 #define FLD(f) abuf->fields.sfmt_muls_b.f
12609   int UNUSED written = 0;
12610   IADDR UNUSED pc = abuf->addr;
12611   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12612
12613 {
12614   SI tmp_tmpopd;
12615   SI tmp_tmpops;
12616   SI tmp_newval;
12617   tmp_tmpops = TRUNCSISI (GET_H_GR (FLD (f_operand1)));
12618   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12619   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12620   {
12621     SI opval = tmp_newval;
12622     SET_H_GR (FLD (f_operand2), opval);
12623     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12624   }
12625 {
12626   {
12627     BI opval = LTSI (tmp_newval, 0);
12628     CPU (h_nbit) = opval;
12629     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12630   }
12631   {
12632     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12633     CPU (h_zbit) = opval;
12634     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12635   }
12636 SET_H_CBIT_MOVE (0);
12637 SET_H_VBIT_MOVE (0);
12638 {
12639   {
12640     BI opval = 0;
12641     CPU (h_xbit) = opval;
12642     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12643   }
12644   {
12645     BI opval = 0;
12646     SET_H_INSN_PREFIXED_P (opval);
12647     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12648   }
12649 }
12650 }
12651 }
12652
12653 #undef FLD
12654 }
12655   NEXT (vpc);
12656
12657   CASE (sem, INSN_BOUND_M_B_M) : /* bound-m.b [${Rs}${inc}],${Rd} */
12658 {
12659   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12660   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12661 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
12662   int UNUSED written = 0;
12663   IADDR UNUSED pc = abuf->addr;
12664   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12665
12666 {
12667   SI tmp_tmpopd;
12668   SI tmp_tmpops;
12669   SI tmp_newval;
12670   tmp_tmpops = ZEXTQISI (({   SI tmp_addr;
12671   QI tmp_tmp_mem;
12672   BI tmp_postinc;
12673   tmp_postinc = FLD (f_memmode);
12674 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12675 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
12676 ; if (NEBI (tmp_postinc, 0)) {
12677 {
12678 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12679   tmp_addr = ADDSI (tmp_addr, 1);
12680 }
12681   {
12682     SI opval = tmp_addr;
12683     SET_H_GR (FLD (f_operand1), opval);
12684     written |= (1 << 9);
12685     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12686   }
12687 }
12688 }
12689 ; tmp_tmp_mem; }));
12690   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12691   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12692 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
12693   {
12694     SI opval = tmp_newval;
12695     SET_H_GR (FLD (f_operand1), opval);
12696     written |= (1 << 9);
12697     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12698   }
12699 } else {
12700   {
12701     SI opval = tmp_newval;
12702     SET_H_GR (FLD (f_operand2), opval);
12703     written |= (1 << 8);
12704     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12705   }
12706 }
12707 {
12708   {
12709     BI opval = LTSI (tmp_newval, 0);
12710     CPU (h_nbit) = opval;
12711     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12712   }
12713   {
12714     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12715     CPU (h_zbit) = opval;
12716     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12717   }
12718 SET_H_CBIT_MOVE (0);
12719 SET_H_VBIT_MOVE (0);
12720 {
12721   {
12722     BI opval = 0;
12723     CPU (h_xbit) = opval;
12724     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12725   }
12726   {
12727     BI opval = 0;
12728     SET_H_INSN_PREFIXED_P (opval);
12729     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12730   }
12731 }
12732 }
12733 }
12734
12735   abuf->written = written;
12736 #undef FLD
12737 }
12738   NEXT (vpc);
12739
12740   CASE (sem, INSN_BOUND_M_W_M) : /* bound-m.w [${Rs}${inc}],${Rd} */
12741 {
12742   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12743   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12744 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
12745   int UNUSED written = 0;
12746   IADDR UNUSED pc = abuf->addr;
12747   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12748
12749 {
12750   SI tmp_tmpopd;
12751   SI tmp_tmpops;
12752   SI tmp_newval;
12753   tmp_tmpops = ZEXTHISI (({   SI tmp_addr;
12754   HI tmp_tmp_mem;
12755   BI tmp_postinc;
12756   tmp_postinc = FLD (f_memmode);
12757 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12758 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
12759 ; if (NEBI (tmp_postinc, 0)) {
12760 {
12761 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12762   tmp_addr = ADDSI (tmp_addr, 2);
12763 }
12764   {
12765     SI opval = tmp_addr;
12766     SET_H_GR (FLD (f_operand1), opval);
12767     written |= (1 << 9);
12768     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12769   }
12770 }
12771 }
12772 ; tmp_tmp_mem; }));
12773   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12774   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12775 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
12776   {
12777     SI opval = tmp_newval;
12778     SET_H_GR (FLD (f_operand1), opval);
12779     written |= (1 << 9);
12780     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12781   }
12782 } else {
12783   {
12784     SI opval = tmp_newval;
12785     SET_H_GR (FLD (f_operand2), opval);
12786     written |= (1 << 8);
12787     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12788   }
12789 }
12790 {
12791   {
12792     BI opval = LTSI (tmp_newval, 0);
12793     CPU (h_nbit) = opval;
12794     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12795   }
12796   {
12797     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12798     CPU (h_zbit) = opval;
12799     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12800   }
12801 SET_H_CBIT_MOVE (0);
12802 SET_H_VBIT_MOVE (0);
12803 {
12804   {
12805     BI opval = 0;
12806     CPU (h_xbit) = opval;
12807     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12808   }
12809   {
12810     BI opval = 0;
12811     SET_H_INSN_PREFIXED_P (opval);
12812     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12813   }
12814 }
12815 }
12816 }
12817
12818   abuf->written = written;
12819 #undef FLD
12820 }
12821   NEXT (vpc);
12822
12823   CASE (sem, INSN_BOUND_M_D_M) : /* bound-m.d [${Rs}${inc}],${Rd} */
12824 {
12825   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12826   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12827 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
12828   int UNUSED written = 0;
12829   IADDR UNUSED pc = abuf->addr;
12830   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12831
12832 {
12833   SI tmp_tmpopd;
12834   SI tmp_tmpops;
12835   SI tmp_newval;
12836   tmp_tmpops = ({   SI tmp_addr;
12837   SI tmp_tmp_mem;
12838   BI tmp_postinc;
12839   tmp_postinc = FLD (f_memmode);
12840 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12841 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
12842 ; if (NEBI (tmp_postinc, 0)) {
12843 {
12844 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12845   tmp_addr = ADDSI (tmp_addr, 4);
12846 }
12847   {
12848     SI opval = tmp_addr;
12849     SET_H_GR (FLD (f_operand1), opval);
12850     written |= (1 << 9);
12851     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12852   }
12853 }
12854 }
12855 ; tmp_tmp_mem; });
12856   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12857   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12858 if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
12859   {
12860     SI opval = tmp_newval;
12861     SET_H_GR (FLD (f_operand1), opval);
12862     written |= (1 << 9);
12863     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12864   }
12865 } else {
12866   {
12867     SI opval = tmp_newval;
12868     SET_H_GR (FLD (f_operand2), opval);
12869     written |= (1 << 8);
12870     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12871   }
12872 }
12873 {
12874   {
12875     BI opval = LTSI (tmp_newval, 0);
12876     CPU (h_nbit) = opval;
12877     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12878   }
12879   {
12880     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12881     CPU (h_zbit) = opval;
12882     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12883   }
12884 SET_H_CBIT_MOVE (0);
12885 SET_H_VBIT_MOVE (0);
12886 {
12887   {
12888     BI opval = 0;
12889     CPU (h_xbit) = opval;
12890     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12891   }
12892   {
12893     BI opval = 0;
12894     SET_H_INSN_PREFIXED_P (opval);
12895     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12896   }
12897 }
12898 }
12899 }
12900
12901   abuf->written = written;
12902 #undef FLD
12903 }
12904   NEXT (vpc);
12905
12906   CASE (sem, INSN_BOUND_CB) : /* bound.b [PC+],${Rd} */
12907 {
12908   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12909   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12910 #define FLD(f) abuf->fields.sfmt_bound_cb.f
12911   int UNUSED written = 0;
12912   IADDR UNUSED pc = abuf->addr;
12913   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12914
12915 {
12916   SI tmp_tmpopd;
12917   SI tmp_tmpops;
12918   SI tmp_newval;
12919   tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
12920   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12921   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12922   {
12923     SI opval = tmp_newval;
12924     SET_H_GR (FLD (f_operand2), opval);
12925     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12926   }
12927 {
12928   {
12929     BI opval = LTSI (tmp_newval, 0);
12930     CPU (h_nbit) = opval;
12931     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12932   }
12933   {
12934     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12935     CPU (h_zbit) = opval;
12936     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12937   }
12938 SET_H_CBIT_MOVE (0);
12939 SET_H_VBIT_MOVE (0);
12940 {
12941   {
12942     BI opval = 0;
12943     CPU (h_xbit) = opval;
12944     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12945   }
12946   {
12947     BI opval = 0;
12948     SET_H_INSN_PREFIXED_P (opval);
12949     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12950   }
12951 }
12952 }
12953 }
12954
12955 #undef FLD
12956 }
12957   NEXT (vpc);
12958
12959   CASE (sem, INSN_BOUND_CW) : /* bound.w [PC+],${Rd} */
12960 {
12961   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12962   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12963 #define FLD(f) abuf->fields.sfmt_bound_cw.f
12964   int UNUSED written = 0;
12965   IADDR UNUSED pc = abuf->addr;
12966   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12967
12968 {
12969   SI tmp_tmpopd;
12970   SI tmp_tmpops;
12971   SI tmp_newval;
12972   tmp_tmpops = ZEXTSISI (FLD (f_indir_pc__word));
12973   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12974   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12975   {
12976     SI opval = tmp_newval;
12977     SET_H_GR (FLD (f_operand2), opval);
12978     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12979   }
12980 {
12981   {
12982     BI opval = LTSI (tmp_newval, 0);
12983     CPU (h_nbit) = opval;
12984     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12985   }
12986   {
12987     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12988     CPU (h_zbit) = opval;
12989     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12990   }
12991 SET_H_CBIT_MOVE (0);
12992 SET_H_VBIT_MOVE (0);
12993 {
12994   {
12995     BI opval = 0;
12996     CPU (h_xbit) = opval;
12997     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12998   }
12999   {
13000     BI opval = 0;
13001     SET_H_INSN_PREFIXED_P (opval);
13002     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13003   }
13004 }
13005 }
13006 }
13007
13008 #undef FLD
13009 }
13010   NEXT (vpc);
13011
13012   CASE (sem, INSN_BOUND_CD) : /* bound.d [PC+],${Rd} */
13013 {
13014   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13015   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13016 #define FLD(f) abuf->fields.sfmt_bound_cd.f
13017   int UNUSED written = 0;
13018   IADDR UNUSED pc = abuf->addr;
13019   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13020
13021 {
13022   SI tmp_tmpopd;
13023   SI tmp_tmpops;
13024   SI tmp_newval;
13025   tmp_tmpops = FLD (f_indir_pc__dword);
13026   tmp_tmpopd = GET_H_GR (FLD (f_operand2));
13027   tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
13028   {
13029     SI opval = tmp_newval;
13030     SET_H_GR (FLD (f_operand2), opval);
13031     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13032   }
13033 {
13034   {
13035     BI opval = LTSI (tmp_newval, 0);
13036     CPU (h_nbit) = opval;
13037     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
13038   }
13039   {
13040     BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
13041     CPU (h_zbit) = opval;
13042     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
13043   }
13044 SET_H_CBIT_MOVE (0);
13045 SET_H_VBIT_MOVE (0);
13046 {
13047   {
13048     BI opval = 0;
13049     CPU (h_xbit) = opval;
13050     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13051   }
13052   {
13053     BI opval = 0;
13054     SET_H_INSN_PREFIXED_P (opval);
13055     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13056   }
13057 }
13058 }
13059 }
13060
13061 #undef FLD
13062 }
13063   NEXT (vpc);
13064
13065   CASE (sem, INSN_SCC) : /* s${cc} ${Rd-sfield} */
13066 {
13067   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13068   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13069 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
13070   int UNUSED written = 0;
13071   IADDR UNUSED pc = abuf->addr;
13072   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13073
13074 {
13075   BI tmp_truthval;
13076   tmp_truthval = ({   SI tmp_tmpcond;
13077   BI tmp_condres;
13078   tmp_tmpcond = FLD (f_operand2);
13079 ; if (EQSI (tmp_tmpcond, 0)) {
13080   tmp_condres = NOTBI (CPU (h_cbit));
13081 }
13082  else if (EQSI (tmp_tmpcond, 1)) {
13083   tmp_condres = CPU (h_cbit);
13084 }
13085  else if (EQSI (tmp_tmpcond, 2)) {
13086   tmp_condres = NOTBI (CPU (h_zbit));
13087 }
13088  else if (EQSI (tmp_tmpcond, 3)) {
13089   tmp_condres = CPU (h_zbit);
13090 }
13091  else if (EQSI (tmp_tmpcond, 4)) {
13092   tmp_condres = NOTBI (CPU (h_vbit));
13093 }
13094  else if (EQSI (tmp_tmpcond, 5)) {
13095   tmp_condres = CPU (h_vbit);
13096 }
13097  else if (EQSI (tmp_tmpcond, 6)) {
13098   tmp_condres = NOTBI (CPU (h_nbit));
13099 }
13100  else if (EQSI (tmp_tmpcond, 7)) {
13101   tmp_condres = CPU (h_nbit);
13102 }
13103  else if (EQSI (tmp_tmpcond, 8)) {
13104   tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit));
13105 }
13106  else if (EQSI (tmp_tmpcond, 9)) {
13107   tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)));
13108 }
13109  else if (EQSI (tmp_tmpcond, 10)) {
13110   tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)));
13111 }
13112  else if (EQSI (tmp_tmpcond, 11)) {
13113   tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit));
13114 }
13115  else if (EQSI (tmp_tmpcond, 12)) {
13116   tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)));
13117 }
13118  else if (EQSI (tmp_tmpcond, 13)) {
13119   tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit));
13120 }
13121  else if (EQSI (tmp_tmpcond, 14)) {
13122   tmp_condres = 1;
13123 }
13124  else if (EQSI (tmp_tmpcond, 15)) {
13125   tmp_condres = CPU (h_pbit);
13126 }
13127  else {
13128 cgen_rtx_error (current_cpu, "Unknown condition code");
13129 }
13130 ; tmp_condres; });
13131   {
13132     SI opval = ZEXTBISI (tmp_truthval);
13133     SET_H_GR (FLD (f_operand1), opval);
13134     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13135   }
13136 {
13137   {
13138     BI opval = 0;
13139     CPU (h_xbit) = opval;
13140     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13141   }
13142   {
13143     BI opval = 0;
13144     SET_H_INSN_PREFIXED_P (opval);
13145     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13146   }
13147 }
13148 }
13149
13150 #undef FLD
13151 }
13152   NEXT (vpc);
13153
13154   CASE (sem, INSN_LZ) : /* lz ${Rs},${Rd} */
13155 {
13156   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13157   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13158 #define FLD(f) abuf->fields.sfmt_muls_b.f
13159   int UNUSED written = 0;
13160   IADDR UNUSED pc = abuf->addr;
13161   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13162
13163 {
13164   SI tmp_tmpd;
13165   SI tmp_tmp;
13166   tmp_tmp = GET_H_GR (FLD (f_operand1));
13167   tmp_tmpd = 0;
13168 {
13169 if (GESI (tmp_tmp, 0)) {
13170 {
13171   tmp_tmp = SLLSI (tmp_tmp, 1);
13172   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13173 }
13174 }
13175 if (GESI (tmp_tmp, 0)) {
13176 {
13177   tmp_tmp = SLLSI (tmp_tmp, 1);
13178   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13179 }
13180 }
13181 if (GESI (tmp_tmp, 0)) {
13182 {
13183   tmp_tmp = SLLSI (tmp_tmp, 1);
13184   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13185 }
13186 }
13187 if (GESI (tmp_tmp, 0)) {
13188 {
13189   tmp_tmp = SLLSI (tmp_tmp, 1);
13190   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13191 }
13192 }
13193 if (GESI (tmp_tmp, 0)) {
13194 {
13195   tmp_tmp = SLLSI (tmp_tmp, 1);
13196   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13197 }
13198 }
13199 if (GESI (tmp_tmp, 0)) {
13200 {
13201   tmp_tmp = SLLSI (tmp_tmp, 1);
13202   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13203 }
13204 }
13205 if (GESI (tmp_tmp, 0)) {
13206 {
13207   tmp_tmp = SLLSI (tmp_tmp, 1);
13208   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13209 }
13210 }
13211 if (GESI (tmp_tmp, 0)) {
13212 {
13213   tmp_tmp = SLLSI (tmp_tmp, 1);
13214   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13215 }
13216 }
13217 if (GESI (tmp_tmp, 0)) {
13218 {
13219   tmp_tmp = SLLSI (tmp_tmp, 1);
13220   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13221 }
13222 }
13223 if (GESI (tmp_tmp, 0)) {
13224 {
13225   tmp_tmp = SLLSI (tmp_tmp, 1);
13226   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13227 }
13228 }
13229 if (GESI (tmp_tmp, 0)) {
13230 {
13231   tmp_tmp = SLLSI (tmp_tmp, 1);
13232   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13233 }
13234 }
13235 if (GESI (tmp_tmp, 0)) {
13236 {
13237   tmp_tmp = SLLSI (tmp_tmp, 1);
13238   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13239 }
13240 }
13241 if (GESI (tmp_tmp, 0)) {
13242 {
13243   tmp_tmp = SLLSI (tmp_tmp, 1);
13244   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13245 }
13246 }
13247 if (GESI (tmp_tmp, 0)) {
13248 {
13249   tmp_tmp = SLLSI (tmp_tmp, 1);
13250   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13251 }
13252 }
13253 if (GESI (tmp_tmp, 0)) {
13254 {
13255   tmp_tmp = SLLSI (tmp_tmp, 1);
13256   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13257 }
13258 }
13259 if (GESI (tmp_tmp, 0)) {
13260 {
13261   tmp_tmp = SLLSI (tmp_tmp, 1);
13262   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13263 }
13264 }
13265 if (GESI (tmp_tmp, 0)) {
13266 {
13267   tmp_tmp = SLLSI (tmp_tmp, 1);
13268   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13269 }
13270 }
13271 if (GESI (tmp_tmp, 0)) {
13272 {
13273   tmp_tmp = SLLSI (tmp_tmp, 1);
13274   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13275 }
13276 }
13277 if (GESI (tmp_tmp, 0)) {
13278 {
13279   tmp_tmp = SLLSI (tmp_tmp, 1);
13280   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13281 }
13282 }
13283 if (GESI (tmp_tmp, 0)) {
13284 {
13285   tmp_tmp = SLLSI (tmp_tmp, 1);
13286   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13287 }
13288 }
13289 if (GESI (tmp_tmp, 0)) {
13290 {
13291   tmp_tmp = SLLSI (tmp_tmp, 1);
13292   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13293 }
13294 }
13295 if (GESI (tmp_tmp, 0)) {
13296 {
13297   tmp_tmp = SLLSI (tmp_tmp, 1);
13298   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13299 }
13300 }
13301 if (GESI (tmp_tmp, 0)) {
13302 {
13303   tmp_tmp = SLLSI (tmp_tmp, 1);
13304   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13305 }
13306 }
13307 if (GESI (tmp_tmp, 0)) {
13308 {
13309   tmp_tmp = SLLSI (tmp_tmp, 1);
13310   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13311 }
13312 }
13313 if (GESI (tmp_tmp, 0)) {
13314 {
13315   tmp_tmp = SLLSI (tmp_tmp, 1);
13316   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13317 }
13318 }
13319 if (GESI (tmp_tmp, 0)) {
13320 {
13321   tmp_tmp = SLLSI (tmp_tmp, 1);
13322   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13323 }
13324 }
13325 if (GESI (tmp_tmp, 0)) {
13326 {
13327   tmp_tmp = SLLSI (tmp_tmp, 1);
13328   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13329 }
13330 }
13331 if (GESI (tmp_tmp, 0)) {
13332 {
13333   tmp_tmp = SLLSI (tmp_tmp, 1);
13334   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13335 }
13336 }
13337 if (GESI (tmp_tmp, 0)) {
13338 {
13339   tmp_tmp = SLLSI (tmp_tmp, 1);
13340   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13341 }
13342 }
13343 if (GESI (tmp_tmp, 0)) {
13344 {
13345   tmp_tmp = SLLSI (tmp_tmp, 1);
13346   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13347 }
13348 }
13349 if (GESI (tmp_tmp, 0)) {
13350 {
13351   tmp_tmp = SLLSI (tmp_tmp, 1);
13352   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13353 }
13354 }
13355 if (GESI (tmp_tmp, 0)) {
13356 {
13357   tmp_tmp = SLLSI (tmp_tmp, 1);
13358   tmp_tmpd = ADDSI (tmp_tmpd, 1);
13359 }
13360 }
13361 }
13362   {
13363     SI opval = tmp_tmpd;
13364     SET_H_GR (FLD (f_operand2), opval);
13365     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13366   }
13367 {
13368   {
13369     BI opval = LTSI (tmp_tmpd, 0);
13370     CPU (h_nbit) = opval;
13371     CGEN_TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
13372   }
13373   {
13374     BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
13375     CPU (h_zbit) = opval;
13376     CGEN_TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
13377   }
13378 SET_H_CBIT_MOVE (0);
13379 SET_H_VBIT_MOVE (0);
13380 {
13381   {
13382     BI opval = 0;
13383     CPU (h_xbit) = opval;
13384     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13385   }
13386   {
13387     BI opval = 0;
13388     SET_H_INSN_PREFIXED_P (opval);
13389     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13390   }
13391 }
13392 }
13393 }
13394
13395 #undef FLD
13396 }
13397   NEXT (vpc);
13398
13399   CASE (sem, INSN_ADDOQ) : /* addoq $o,$Rs,ACR */
13400 {
13401   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13402   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13403 #define FLD(f) abuf->fields.sfmt_addoq.f
13404   int UNUSED written = 0;
13405   IADDR UNUSED pc = abuf->addr;
13406   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13407
13408 {
13409   {
13410     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s8));
13411     CPU (h_prefixreg_pre_v32) = opval;
13412     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13413   }
13414   {
13415     BI opval = 1;
13416     SET_H_INSN_PREFIXED_P (opval);
13417     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13418   }
13419 }
13420
13421 #undef FLD
13422 }
13423   NEXT (vpc);
13424
13425   CASE (sem, INSN_BDAPQPC) : /* bdapq $o,PC */
13426 {
13427   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13428   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13429 #define FLD(f) abuf->fields.sfmt_addoq.f
13430   int UNUSED written = 0;
13431   IADDR UNUSED pc = abuf->addr;
13432   SEM_BRANCH_INIT
13433   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13434
13435 {
13436   {
13437     SI opval = ADDSI (ADDSI (pc, 2), FLD (f_s8));
13438     CPU (h_prefixreg_pre_v32) = opval;
13439     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13440   }
13441   {
13442     BI opval = 1;
13443     SET_H_INSN_PREFIXED_P (opval);
13444     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13445   }
13446 cris_flush_simulator_decode_cache (current_cpu, pc);
13447 }
13448
13449   SEM_BRANCH_FINI (vpc);
13450 #undef FLD
13451 }
13452   NEXT (vpc);
13453
13454   CASE (sem, INSN_BDAP_32_PC) : /* bdap ${sconst32},PC */
13455 {
13456   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13457   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13458 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
13459   int UNUSED written = 0;
13460   IADDR UNUSED pc = abuf->addr;
13461   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13462
13463 {
13464   SI tmp_newpc;
13465   SI tmp_oldpc;
13466   SI tmp_offs;
13467   tmp_offs = FLD (f_indir_pc__dword);
13468   tmp_oldpc = ADDSI (pc, 6);
13469   tmp_newpc = ADDSI (tmp_oldpc, tmp_offs);
13470   {
13471     SI opval = tmp_newpc;
13472     CPU (h_prefixreg_pre_v32) = opval;
13473     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13474   }
13475   {
13476     BI opval = 1;
13477     SET_H_INSN_PREFIXED_P (opval);
13478     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13479   }
13480 }
13481
13482 #undef FLD
13483 }
13484   NEXT (vpc);
13485
13486   CASE (sem, INSN_MOVE_M_PCPLUS_P0) : /* move [PC+],P0 */
13487 {
13488   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13489   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13490 #define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
13491   int UNUSED written = 0;
13492   IADDR UNUSED pc = abuf->addr;
13493   SEM_BRANCH_INIT
13494   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13495
13496 if (GET_H_INSN_PREFIXED_P ()) {
13497 {
13498   QI tmp_dummy;
13499   tmp_dummy = ({   SI tmp_addr;
13500   QI tmp_tmp_mem;
13501   BI tmp_postinc;
13502   tmp_postinc = FLD (f_memmode);
13503 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (pc) : (CPU (h_prefixreg_pre_v32)));
13504 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
13505 ; if (NEBI (tmp_postinc, 0)) {
13506 {
13507 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13508   tmp_addr = ADDSI (tmp_addr, 1);
13509 }
13510   {
13511     USI opval = tmp_addr;
13512     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
13513     written |= (1 << 5);
13514     CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
13515   }
13516 }
13517 }
13518 ; tmp_tmp_mem; });
13519 {
13520   {
13521     BI opval = 0;
13522     CPU (h_xbit) = opval;
13523     written |= (1 << 7);
13524     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13525   }
13526   {
13527     BI opval = 0;
13528     SET_H_INSN_PREFIXED_P (opval);
13529     written |= (1 << 6);
13530     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13531   }
13532 }
13533 }
13534 } else {
13535 cgen_rtx_error (current_cpu, "move [PC+],P0 without prefix is not implemented");
13536 }
13537
13538   abuf->written = written;
13539   SEM_BRANCH_FINI (vpc);
13540 #undef FLD
13541 }
13542   NEXT (vpc);
13543
13544   CASE (sem, INSN_MOVE_M_SPPLUS_P8) : /* move [SP+],P8 */
13545 {
13546   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13547   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13548 #define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
13549   int UNUSED written = 0;
13550   IADDR UNUSED pc = abuf->addr;
13551   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13552
13553 if (GET_H_INSN_PREFIXED_P ()) {
13554 {
13555   SI tmp_dummy;
13556   tmp_dummy = ({   SI tmp_addr;
13557   SI tmp_tmp_mem;
13558   BI tmp_postinc;
13559   tmp_postinc = FLD (f_memmode);
13560 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (((UINT) 14))) : (CPU (h_prefixreg_pre_v32)));
13561 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
13562 ; if (NEBI (tmp_postinc, 0)) {
13563 {
13564 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13565   tmp_addr = ADDSI (tmp_addr, 4);
13566 }
13567   {
13568     SI opval = tmp_addr;
13569     SET_H_GR (((UINT) 14), opval);
13570     written |= (1 << 5);
13571     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13572   }
13573 }
13574 }
13575 ; tmp_tmp_mem; });
13576 {
13577   {
13578     BI opval = 0;
13579     CPU (h_xbit) = opval;
13580     written |= (1 << 7);
13581     CGEN_TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13582   }
13583   {
13584     BI opval = 0;
13585     SET_H_INSN_PREFIXED_P (opval);
13586     written |= (1 << 6);
13587     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13588   }
13589 }
13590 }
13591 } else {
13592 cgen_rtx_error (current_cpu, "move [SP+],P8 without prefix is not implemented");
13593 }
13594
13595   abuf->written = written;
13596 #undef FLD
13597 }
13598   NEXT (vpc);
13599
13600   CASE (sem, INSN_ADDO_M_B_M) : /* addo-m.b [${Rs}${inc}],$Rd,ACR */
13601 {
13602   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13603   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13604 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
13605   int UNUSED written = 0;
13606   IADDR UNUSED pc = abuf->addr;
13607   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13608
13609 {
13610   QI tmp_tmps;
13611   tmp_tmps = ({   SI tmp_addr;
13612   QI tmp_tmp_mem;
13613   BI tmp_postinc;
13614   tmp_postinc = FLD (f_memmode);
13615 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13616 ;   tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
13617 ; if (NEBI (tmp_postinc, 0)) {
13618 {
13619 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13620   tmp_addr = ADDSI (tmp_addr, 1);
13621 }
13622   {
13623     SI opval = tmp_addr;
13624     SET_H_GR (FLD (f_operand1), opval);
13625     written |= (1 << 6);
13626     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13627   }
13628 }
13629 }
13630 ; tmp_tmp_mem; });
13631   {
13632     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (tmp_tmps));
13633     CPU (h_prefixreg_pre_v32) = opval;
13634     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13635   }
13636   {
13637     BI opval = 1;
13638     SET_H_INSN_PREFIXED_P (opval);
13639     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13640   }
13641 }
13642
13643   abuf->written = written;
13644 #undef FLD
13645 }
13646   NEXT (vpc);
13647
13648   CASE (sem, INSN_ADDO_M_W_M) : /* addo-m.w [${Rs}${inc}],$Rd,ACR */
13649 {
13650   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13651   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13652 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
13653   int UNUSED written = 0;
13654   IADDR UNUSED pc = abuf->addr;
13655   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13656
13657 {
13658   HI tmp_tmps;
13659   tmp_tmps = ({   SI tmp_addr;
13660   HI tmp_tmp_mem;
13661   BI tmp_postinc;
13662   tmp_postinc = FLD (f_memmode);
13663 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13664 ;   tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
13665 ; if (NEBI (tmp_postinc, 0)) {
13666 {
13667 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13668   tmp_addr = ADDSI (tmp_addr, 2);
13669 }
13670   {
13671     SI opval = tmp_addr;
13672     SET_H_GR (FLD (f_operand1), opval);
13673     written |= (1 << 6);
13674     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13675   }
13676 }
13677 }
13678 ; tmp_tmp_mem; });
13679   {
13680     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (tmp_tmps));
13681     CPU (h_prefixreg_pre_v32) = opval;
13682     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13683   }
13684   {
13685     BI opval = 1;
13686     SET_H_INSN_PREFIXED_P (opval);
13687     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13688   }
13689 }
13690
13691   abuf->written = written;
13692 #undef FLD
13693 }
13694   NEXT (vpc);
13695
13696   CASE (sem, INSN_ADDO_M_D_M) : /* addo-m.d [${Rs}${inc}],$Rd,ACR */
13697 {
13698   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13699   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13700 #define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
13701   int UNUSED written = 0;
13702   IADDR UNUSED pc = abuf->addr;
13703   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13704
13705 {
13706   SI tmp_tmps;
13707   tmp_tmps = ({   SI tmp_addr;
13708   SI tmp_tmp_mem;
13709   BI tmp_postinc;
13710   tmp_postinc = FLD (f_memmode);
13711 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13712 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
13713 ; if (NEBI (tmp_postinc, 0)) {
13714 {
13715 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13716   tmp_addr = ADDSI (tmp_addr, 4);
13717 }
13718   {
13719     SI opval = tmp_addr;
13720     SET_H_GR (FLD (f_operand1), opval);
13721     written |= (1 << 6);
13722     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13723   }
13724 }
13725 }
13726 ; tmp_tmp_mem; });
13727   {
13728     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), tmp_tmps);
13729     CPU (h_prefixreg_pre_v32) = opval;
13730     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13731   }
13732   {
13733     BI opval = 1;
13734     SET_H_INSN_PREFIXED_P (opval);
13735     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13736   }
13737 }
13738
13739   abuf->written = written;
13740 #undef FLD
13741 }
13742   NEXT (vpc);
13743
13744   CASE (sem, INSN_ADDO_CB) : /* addo.b [PC+],$Rd,ACR */
13745 {
13746   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13747   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13748 #define FLD(f) abuf->fields.sfmt_bound_cb.f
13749   int UNUSED written = 0;
13750   IADDR UNUSED pc = abuf->addr;
13751   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
13752
13753 {
13754   {
13755     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))));
13756     CPU (h_prefixreg_pre_v32) = opval;
13757     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13758   }
13759   {
13760     BI opval = 1;
13761     SET_H_INSN_PREFIXED_P (opval);
13762     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13763   }
13764 }
13765
13766 #undef FLD
13767 }
13768   NEXT (vpc);
13769
13770   CASE (sem, INSN_ADDO_CW) : /* addo.w [PC+],$Rd,ACR */
13771 {
13772   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13773   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13774 #define FLD(f) abuf->fields.sfmt_bound_cw.f
13775   int UNUSED written = 0;
13776   IADDR UNUSED pc = abuf->addr;
13777   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
13778
13779 {
13780   {
13781     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))));
13782     CPU (h_prefixreg_pre_v32) = opval;
13783     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13784   }
13785   {
13786     BI opval = 1;
13787     SET_H_INSN_PREFIXED_P (opval);
13788     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13789   }
13790 }
13791
13792 #undef FLD
13793 }
13794   NEXT (vpc);
13795
13796   CASE (sem, INSN_ADDO_CD) : /* addo.d [PC+],$Rd,ACR */
13797 {
13798   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13799   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13800 #define FLD(f) abuf->fields.sfmt_bound_cd.f
13801   int UNUSED written = 0;
13802   IADDR UNUSED pc = abuf->addr;
13803   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13804
13805 {
13806   {
13807     SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword));
13808     CPU (h_prefixreg_pre_v32) = opval;
13809     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13810   }
13811   {
13812     BI opval = 1;
13813     SET_H_INSN_PREFIXED_P (opval);
13814     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13815   }
13816 }
13817
13818 #undef FLD
13819 }
13820   NEXT (vpc);
13821
13822   CASE (sem, INSN_DIP_M) : /* dip [${Rs}${inc}] */
13823 {
13824   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13825   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13826 #define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
13827   int UNUSED written = 0;
13828   IADDR UNUSED pc = abuf->addr;
13829   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13830
13831 {
13832   SI tmp_tmps;
13833   tmp_tmps = ({   SI tmp_addr;
13834   SI tmp_tmp_mem;
13835   BI tmp_postinc;
13836   tmp_postinc = FLD (f_memmode);
13837 ;   tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13838 ;   tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
13839 ; if (NEBI (tmp_postinc, 0)) {
13840 {
13841 if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13842   tmp_addr = ADDSI (tmp_addr, 4);
13843 }
13844   {
13845     SI opval = tmp_addr;
13846     SET_H_GR (FLD (f_operand1), opval);
13847     written |= (1 << 5);
13848     CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13849   }
13850 }
13851 }
13852 ; tmp_tmp_mem; });
13853   {
13854     SI opval = tmp_tmps;
13855     CPU (h_prefixreg_pre_v32) = opval;
13856     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13857   }
13858   {
13859     BI opval = 1;
13860     SET_H_INSN_PREFIXED_P (opval);
13861     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13862   }
13863 }
13864
13865   abuf->written = written;
13866 #undef FLD
13867 }
13868   NEXT (vpc);
13869
13870   CASE (sem, INSN_DIP_C) : /* dip [PC+] */
13871 {
13872   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13873   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13874 #define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
13875   int UNUSED written = 0;
13876   IADDR UNUSED pc = abuf->addr;
13877   vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13878
13879 {
13880   {
13881     SI opval = FLD (f_indir_pc__dword);
13882     CPU (h_prefixreg_pre_v32) = opval;
13883     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13884   }
13885   {
13886     BI opval = 1;
13887     SET_H_INSN_PREFIXED_P (opval);
13888     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13889   }
13890 }
13891
13892 #undef FLD
13893 }
13894   NEXT (vpc);
13895
13896   CASE (sem, INSN_ADDI_ACR_B_R) : /* addi-acr.b ${Rs-dfield}.m,${Rd-sfield},ACR */
13897 {
13898   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13899   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13900 #define FLD(f) abuf->fields.sfmt_add_b_r.f
13901   int UNUSED written = 0;
13902   IADDR UNUSED pc = abuf->addr;
13903   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13904
13905 {
13906   {
13907     SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1));
13908     CPU (h_prefixreg_pre_v32) = opval;
13909     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13910   }
13911   {
13912     BI opval = 1;
13913     SET_H_INSN_PREFIXED_P (opval);
13914     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13915   }
13916 }
13917
13918 #undef FLD
13919 }
13920   NEXT (vpc);
13921
13922   CASE (sem, INSN_ADDI_ACR_W_R) : /* addi-acr.w ${Rs-dfield}.m,${Rd-sfield},ACR */
13923 {
13924   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13925   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13926 #define FLD(f) abuf->fields.sfmt_add_b_r.f
13927   int UNUSED written = 0;
13928   IADDR UNUSED pc = abuf->addr;
13929   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13930
13931 {
13932   {
13933     SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2));
13934     CPU (h_prefixreg_pre_v32) = opval;
13935     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13936   }
13937   {
13938     BI opval = 1;
13939     SET_H_INSN_PREFIXED_P (opval);
13940     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13941   }
13942 }
13943
13944 #undef FLD
13945 }
13946   NEXT (vpc);
13947
13948   CASE (sem, INSN_ADDI_ACR_D_R) : /* addi-acr.d ${Rs-dfield}.m,${Rd-sfield},ACR */
13949 {
13950   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13951   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13952 #define FLD(f) abuf->fields.sfmt_add_b_r.f
13953   int UNUSED written = 0;
13954   IADDR UNUSED pc = abuf->addr;
13955   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13956
13957 {
13958   {
13959     SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4));
13960     CPU (h_prefixreg_pre_v32) = opval;
13961     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13962   }
13963   {
13964     BI opval = 1;
13965     SET_H_INSN_PREFIXED_P (opval);
13966     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13967   }
13968 }
13969
13970 #undef FLD
13971 }
13972   NEXT (vpc);
13973
13974   CASE (sem, INSN_BIAP_PC_B_R) : /* biap-pc.b ${Rs-dfield}.m,PC */
13975 {
13976   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13977   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13978 #define FLD(f) abuf->fields.sfmt_addoq.f
13979   int UNUSED written = 0;
13980   IADDR UNUSED pc = abuf->addr;
13981   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13982
13983 {
13984   {
13985     SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 1));
13986     CPU (h_prefixreg_pre_v32) = opval;
13987     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13988   }
13989   {
13990     BI opval = 1;
13991     SET_H_INSN_PREFIXED_P (opval);
13992     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13993   }
13994 }
13995
13996 #undef FLD
13997 }
13998   NEXT (vpc);
13999
14000   CASE (sem, INSN_BIAP_PC_W_R) : /* biap-pc.w ${Rs-dfield}.m,PC */
14001 {
14002   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
14003   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
14004 #define FLD(f) abuf->fields.sfmt_addoq.f
14005   int UNUSED written = 0;
14006   IADDR UNUSED pc = abuf->addr;
14007   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
14008
14009 {
14010   {
14011     SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 2));
14012     CPU (h_prefixreg_pre_v32) = opval;
14013     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
14014   }
14015   {
14016     BI opval = 1;
14017     SET_H_INSN_PREFIXED_P (opval);
14018     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
14019   }
14020 }
14021
14022 #undef FLD
14023 }
14024   NEXT (vpc);
14025
14026   CASE (sem, INSN_BIAP_PC_D_R) : /* biap-pc.d ${Rs-dfield}.m,PC */
14027 {
14028   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
14029   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
14030 #define FLD(f) abuf->fields.sfmt_addoq.f
14031   int UNUSED written = 0;
14032   IADDR UNUSED pc = abuf->addr;
14033   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
14034
14035 {
14036   {
14037     SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 4));
14038     CPU (h_prefixreg_pre_v32) = opval;
14039     CGEN_TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
14040   }
14041   {
14042     BI opval = 1;
14043     SET_H_INSN_PREFIXED_P (opval);
14044     CGEN_TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
14045   }
14046 }
14047
14048 #undef FLD
14049 }
14050   NEXT (vpc);
14051
14052
14053     }
14054   ENDSWITCH (sem) /* End of semantic switch.  */
14055
14056   /* At this point `vpc' contains the next insn to execute.  */
14057 }
14058
14059 #undef DEFINE_SWITCH
14060 #endif /* DEFINE_SWITCH */