sim/testsuite/aarch64/xtn.s

   1 # mach: aarch64
   2
   3 # Check the extract narrow instructions: xtn, xtn2.
   4
   5 .include "testutils.inc"
   6
   7         .data
   8         .align 4
   9 input:
  10         .word 0x04030201
  11         .word 0x08070605
  12         .word 0x0c0b0a09
  13         .word 0x100f0e0d
  14 input2:
  15         .word 0x14131211
  16         .word 0x18171615
  17         .word 0x1c1b1a19
  18         .word 0x201f1e1d
  19 x16b:
  20         .word 0x07050301
  21         .word 0x0f0d0b09
  22         .word 0x17151311
  23         .word 0x1f1d1b19
  24 x8h:
  25         .word 0x06050201
  26         .word 0x0e0d0a09
  27         .word 0x16151211
  28         .word 0x1e1d1a19
  29 x4s:
  30         .word 0x04030201
  31         .word 0x0c0b0a09
  32         .word 0x14131211
  33         .word 0x1c1b1a19
  34
  35         start
  36         adrp x0, input
  37         ldr q0, [x0, #:lo12:input]
  38         adrp x0, input2
  39         ldr q1, [x0, #:lo12:input2]
  40
  41         xtn v2.8b, v0.8h
  42         xtn2 v2.16b, v1.8h
  43         mov x1, v2.d[0]
  44         mov x2, v2.d[1]
  45         adrp x3, x16b
  46         ldr x4, [x3, #:lo12:x16b]
  47         cmp x1, x4
  48         bne .Lfailure
  49         ldr x5, [x3, #:lo12:x16b+8]
  50         cmp x2, x5
  51         bne .Lfailure
  52
  53         xtn v2.4h, v0.4s
  54         xtn2 v2.8h, v1.4s
  55         mov x1, v2.d[0]
  56         mov x2, v2.d[1]
  57         adrp x3, x8h
  58         ldr x4, [x3, #:lo12:x8h]
  59         cmp x1, x4
  60         bne .Lfailure
  61         ldr x5, [x3, #:lo12:x8h+8]
  62         cmp x2, x5
  63         bne .Lfailure
  64
  65         xtn v2.2s, v0.2d
  66         xtn2 v2.4s, v1.2d
  67         mov x1, v2.d[0]
  68         mov x2, v2.d[1]
  69         adrp x3, x4s
  70         ldr x4, [x3, #:lo12:x4s]
  71         cmp x1, x4
  72         bne .Lfailure
  73         ldr x5, [x3, #:lo12:x4s+8]
  74         cmp x2, x5
  75         bne .Lfailure
  76
  77         pass
  78 .Lfailure:
  79         fail