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Automatic date update in version.in
[binutils-gdb.git]
/
sim
/
testsuite
/
frv
/
bcnolr.cgs
blob
04f0b8dbd84d0738e9c7202fd92255386694af89
1
# frv testcase for bcnolr
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# mach: all
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.include "testutils.inc"
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start
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.global bcnolr
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bcnolr:
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; ccond is true
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set_spr_immed 128,lcr
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set_spr_addr bad,lr
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set_icc 0x0 0
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bcnolr
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set_icc 0x1 1
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bcnolr
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set_icc 0x2 2
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bcnolr
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set_icc 0x3 3
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bcnolr
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set_icc 0x4 0
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bcnolr
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set_icc 0x5 1
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bcnolr
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set_icc 0x6 2
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bcnolr
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set_icc 0x7 3
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bcnolr
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set_icc 0x8 0
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bcnolr
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set_icc 0x9 1
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bcnolr
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set_icc 0xa 2
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bcnolr
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set_icc 0xb 3
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bcnolr
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set_icc 0xc 0
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bcnolr
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set_icc 0xd 1
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bcnolr
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set_icc 0xe 2
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bcnolr
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set_icc 0xf 3
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bcnolr
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; ccond is true
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x0 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x1 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x2 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x3 3
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x4 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x5 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x6 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x7 3
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x8 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x9 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xa 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xb 3
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xc 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xd 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xe 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xf 3
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bcnolr
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; ccond is false
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set_spr_immed 128,lcr
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set_spr_addr bad,lr
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set_icc 0x0 0
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bcnolr
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set_icc 0x1 1
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bcnolr
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set_icc 0x2 2
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bcnolr
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set_icc 0x3 3
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bcnolr
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set_icc 0x4 0
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bcnolr
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set_icc 0x5 1
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bcnolr
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set_icc 0x6 2
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bcnolr
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set_icc 0x7 3
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bcnolr
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set_icc 0x8 0
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bcnolr
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set_icc 0x9 1
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bcnolr
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set_icc 0xa 2
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bcnolr
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set_icc 0xb 3
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bcnolr
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set_icc 0xc 0
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bcnolr
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set_icc 0xd 1
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bcnolr
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set_icc 0xe 2
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bcnolr
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set_icc 0xf 3
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bcnolr
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; ccond is false
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x0 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x1 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x2 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x3 3
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x4 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x5 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x6 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x7 3
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x8 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0x9 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xa 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xb 3
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xc 0
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xd 1
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xe 2
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bcnolr
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set_spr_immed 1,lcr
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set_icc 0xf 3
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bcnolr
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pass
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bad:
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fail