1 # frv testcase for dcef @(GRi,GRj),a
4 .include "testutils.inc"
10 and_spr_immed 0x7fffffff,hsr0 ; data cache only: copy-back mode
19 ok1: test_gr_immed 1,gr11
21 set_mem_immed 0x9600b00d,gr10 ; change to add gr11,gr13,gr11 in cache
24 ok2: test_gr_immed 2,gr11 ; still only added 1
26 set_gr_addr doit1,gr10
27 set_mem_immed 0x9600b00d,gr10 ; change to add gr11,gr13,gr11 in cache
28 dcef @(gr10,gr0),1 ; flush data cache
31 ok3: test_gr_immed 4,gr11 ; added 2 this time
33 set_gr_addr doit2,gr10
34 set_mem_immed 0x9600b00e,gr10 ; change to add gr11,gr14,gr11 in cache
35 dcef @(gr0,gr0),1 ; flush data cache
38 ok4: test_gr_immed 7,gr11 ; added 3 this time
42 doit: add gr11,gr12,gr11
45 doit1: add gr11,gr12,gr11
48 doit2: add gr11,gr12,gr11