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[binutils-gdb.git] / sim / testsuite / frv / fcblelr.cgs
blobb9850d6863dd1c5e1218e9c343f255a3666b55db
1 # frv testcase for fcblelr $FCCi,$ccond,$hint
2 # mach: all
4         .include "testutils.inc"
6         start
8         .global fcblelr
9 fcblelr:
10         ; ccond is true
11         set_spr_immed   128,lcr
12         set_spr_addr    bad,lr
13         set_fcc         0x0 0
14         fcblelr         fcc0,0,0
16         set_spr_addr    bad,lr
17         set_fcc         0x1 1
18         fcblelr         fcc1,0,1
20         set_spr_addr    bad,lr
21         set_fcc         0x2 2
22         fcblelr         fcc2,0,2
24         set_spr_addr    bad,lr
25         set_fcc         0x3 3
26         fcblelr         fcc3,0,3
28         set_spr_addr    ok5,lr
29         set_fcc         0x4 0
30         fcblelr         fcc0,0,0
31         fail
32 ok5:
33         set_spr_addr    ok6,lr
34         set_fcc         0x5 1
35         fcblelr         fcc1,0,1
36         fail
37 ok6:
38         set_spr_addr    ok7,lr
39         set_fcc         0x6 2
40         fcblelr         fcc2,0,2
41         fail
42 ok7:
43         set_spr_addr    ok8,lr
44         set_fcc         0x7 3
45         fcblelr         fcc3,0,3
46         fail
47 ok8:
48         set_spr_addr    ok9,lr
49         set_fcc         0x8 0
50         fcblelr         fcc0,0,0
51         fail
52 ok9:
53         set_spr_addr    oka,lr
54         set_fcc         0x9 1
55         fcblelr         fcc1,0,1
56         fail
57 oka:
58         set_spr_addr    okb,lr
59         set_fcc         0xa 2
60         fcblelr         fcc2,0,2
61         fail
62 okb:
63         set_spr_addr    okc,lr
64         set_fcc         0xb 3
65         fcblelr         fcc3,0,3
66         fail
67 okc:
68         set_spr_addr    okd,lr
69         set_fcc         0xc 0
70         fcblelr         fcc0,0,0
71         fail
72 okd:
73         set_spr_addr    oke,lr
74         set_fcc         0xd 1
75         fcblelr         fcc1,0,1
76         fail
77 oke:
78         set_spr_addr    okf,lr
79         set_fcc         0xe 2
80         fcblelr         fcc2,0,2
81         fail
82 okf:
83         set_spr_addr    okg,lr
84         set_fcc         0xf 3
85         fcblelr         fcc3,0,3
86         fail
87 okg:
89         ; ccond is true
90         set_spr_immed   1,lcr
91         set_spr_addr    bad,lr
92         set_fcc         0x0 0
93         fcblelr         fcc0,1,0
95         set_spr_immed   1,lcr
96         set_spr_addr    bad,lr
97         set_fcc         0x1 1
98         fcblelr         fcc1,1,1
100         set_spr_immed   1,lcr
101         set_spr_addr    bad,lr
102         set_fcc         0x2 2
103         fcblelr         fcc2,1,2
105         set_spr_immed   1,lcr
106         set_spr_addr    bad,lr
107         set_fcc         0x3 3
108         fcblelr         fcc3,1,3
110         set_spr_immed   1,lcr
111         set_spr_addr    okl,lr
112         set_fcc         0x4 0
113         fcblelr         fcc0,1,0
114         fail
115 okl:
116         set_spr_immed   1,lcr
117         set_spr_addr    okm,lr
118         set_fcc         0x5 1
119         fcblelr         fcc1,1,1
120         fail
121 okm:
122         set_spr_immed   1,lcr
123         set_spr_addr    okn,lr
124         set_fcc         0x6 2
125         fcblelr         fcc2,1,2
126         fail
127 okn:
128         set_spr_immed   1,lcr
129         set_spr_addr    oko,lr
130         set_fcc         0x7 3
131         fcblelr         fcc3,1,3
132         fail
133 oko:
134         set_spr_immed   1,lcr
135         set_spr_addr    okp,lr
136         set_fcc         0x8 0
137         fcblelr         fcc0,1,0
138         fail
139 okp:
140         set_spr_immed   1,lcr
141         set_spr_addr    okq,lr
142         set_fcc         0x9 1
143         fcblelr         fcc1,1,1
144         fail
145 okq:
146         set_spr_immed   1,lcr
147         set_spr_addr    okr,lr
148         set_fcc         0xa 2
149         fcblelr         fcc2,1,2
150         fail
151 okr:
152         set_spr_immed   1,lcr
153         set_spr_addr    oks,lr
154         set_fcc         0xb 3
155         fcblelr         fcc3,1,3
156         fail
157 oks:
158         set_spr_immed   1,lcr
159         set_spr_addr    okt,lr
160         set_fcc         0xc 0
161         fcblelr         fcc0,1,0
162         fail
163 okt:
164         set_spr_immed   1,lcr
165         set_spr_addr    oku,lr
166         set_fcc         0xd 1
167         fcblelr         fcc1,1,1
168         fail
169 oku:
170         set_spr_immed   1,lcr
171         set_spr_addr    okv,lr
172         set_fcc         0xe 2
173         fcblelr         fcc2,1,2
174         fail
175 okv:
176         set_spr_immed   1,lcr
177         set_spr_addr    okw,lr
178         set_fcc         0xf 3
179         fcblelr         fcc3,1,3
180         fail
181 okw:
182         ; ccond is false
183         set_spr_immed   128,lcr
185         set_fcc         0x0 0
186         fcblelr fcc0,1,0
187         set_fcc         0x1 1
188         fcblelr fcc1,1,1
189         set_fcc         0x2 2
190         fcblelr fcc2,1,2
191         set_fcc         0x3 3
192         fcblelr fcc3,1,3
193         set_fcc         0x4 0
194         fcblelr fcc0,1,0
195         set_fcc         0x5 1
196         fcblelr fcc1,1,1
197         set_fcc         0x6 2
198         fcblelr fcc2,1,2
199         set_fcc         0x7 3
200         fcblelr fcc3,1,3
201         set_fcc         0x8 0
202         fcblelr fcc0,1,0
203         set_fcc         0x9 1
204         fcblelr fcc1,1,1
205         set_fcc         0xa 2
206         fcblelr fcc2,1,2
207         set_fcc         0xb 3
208         fcblelr fcc3,1,3
209         set_fcc         0xc 0
210         fcblelr fcc0,1,0
211         set_fcc         0xd 1
212         fcblelr fcc1,1,1
213         set_fcc         0xe 2
214         fcblelr fcc2,1,2
215         set_fcc         0xf 3
216         fcblelr fcc3,1,3
218         ; ccond is false
219         set_spr_immed   1,lcr
220         set_fcc         0x0 0
221         fcblelr fcc0,0,0
222         set_spr_immed   1,lcr
223         set_fcc         0x1 1
224         fcblelr fcc1,0,1
225         set_spr_immed   1,lcr
226         set_fcc         0x2 2
227         fcblelr fcc2,0,2
228         set_spr_immed   1,lcr
229         set_fcc         0x3 3
230         fcblelr fcc3,0,3
231         set_spr_immed   1,lcr
232         set_fcc         0x4 0
233         fcblelr fcc0,0,0
234         set_spr_immed   1,lcr
235         set_fcc         0x5 1
236         fcblelr fcc1,0,1
237         set_spr_immed   1,lcr
238         set_fcc         0x6 2
239         fcblelr fcc2,0,2
240         set_spr_immed   1,lcr
241         set_fcc         0x7 3
242         fcblelr fcc3,0,3
243         set_spr_immed   1,lcr
244         set_fcc         0x8 0
245         fcblelr fcc0,0,0
246         set_spr_immed   1,lcr
247         set_fcc         0x9 1
248         fcblelr fcc1,0,1
249         set_spr_immed   1,lcr
250         set_fcc         0xa 2
251         fcblelr fcc2,0,2
252         set_spr_immed   1,lcr
253         set_fcc         0xb 3
254         fcblelr fcc3,0,3
255         set_spr_immed   1,lcr
256         set_fcc         0xc 0
257         fcblelr fcc0,0,0
258         set_spr_immed   1,lcr
259         set_fcc         0xd 1
260         fcblelr fcc1,0,1
261         set_spr_immed   1,lcr
262         set_fcc         0xe 2
263         fcblelr fcc2,0,2
264         set_spr_immed   1,lcr
265         set_fcc         0xf 3
266         fcblelr fcc3,0,3
268         pass
269 bad:
270         fail