Automatic date update in version.in
[binutils-gdb.git] / sim / testsuite / frv / fckle.cgs
blob7d5e6dae951a34021e88dc4f3dee83f235272e37
1 # frv testcase for fckle $FCCi,$CCj_float
2 # mach: all
4         .include "testutils.inc"
6         start
8         .global fckle
9 fckle:
10         set_spr_immed   0x1b1b,cccr
11         set_fcc         0x0 0
12         fckle           fcc0,cc3
13         test_spr_immed  0x1b9b,cccr
15         set_spr_immed   0x1b1b,cccr
16         set_fcc         0x1 0
17         fckle           fcc0,cc3
18         test_spr_immed  0x1b9b,cccr
20         set_spr_immed   0x1b1b,cccr
21         set_fcc         0x2 0
22         fckle           fcc0,cc3
23         test_spr_immed  0x1b9b,cccr
25         set_spr_immed   0x1b1b,cccr
26         set_fcc         0x3 0
27         fckle           fcc0,cc3
28         test_spr_immed  0x1b9b,cccr
30         set_spr_immed   0x1b1b,cccr
31         set_fcc         0x4 0
32         fckle           fcc0,cc3
33         test_spr_immed  0x1bdb,cccr
35         set_spr_immed   0x1b1b,cccr
36         set_fcc         0x5 0
37         fckle           fcc0,cc3
38         test_spr_immed  0x1bdb,cccr
40         set_spr_immed   0x1b1b,cccr
41         set_fcc         0x6 0
42         fckle           fcc0,cc3
43         test_spr_immed  0x1bdb,cccr
45         set_spr_immed   0x1b1b,cccr
46         set_fcc         0x7 0
47         fckle           fcc0,cc3
48         test_spr_immed  0x1bdb,cccr
50         set_spr_immed   0x1b1b,cccr
51         set_fcc         0x8 0
52         fckle           fcc0,cc3
53         test_spr_immed  0x1bdb,cccr
55         set_spr_immed   0x1b1b,cccr
56         set_fcc         0x9 0
57         fckle           fcc0,cc3
58         test_spr_immed  0x1bdb,cccr
60         set_spr_immed   0x1b1b,cccr
61         set_fcc         0xa 0
62         fckle           fcc0,cc3
63         test_spr_immed  0x1bdb,cccr
65         set_spr_immed   0x1b1b,cccr
66         set_fcc         0xb 0
67         fckle           fcc0,cc3
68         test_spr_immed  0x1bdb,cccr
70         set_spr_immed   0x1b1b,cccr
71         set_fcc         0xc 0
72         fckle           fcc0,cc3
73         test_spr_immed  0x1bdb,cccr
75         set_spr_immed   0x1b1b,cccr
76         set_fcc         0xd 0
77         fckle           fcc0,cc3
78         test_spr_immed  0x1bdb,cccr
80         set_spr_immed   0x1b1b,cccr
81         set_fcc         0xe 0
82         fckle           fcc0,cc3
83         test_spr_immed  0x1bdb,cccr
85         set_spr_immed   0x1b1b,cccr
86         set_fcc         0xf 0
87         fckle           fcc0,cc3
88         test_spr_immed  0x1bdb,cccr
90         pass