sim/testsuite/frv/fcmpd.cgs

   1 # frv testcase for fcmpd $GRi,$GRj,$FCCi_2
   2 # mach: frv
   3 # as(frv): -mcpu=frv
   4
   5         .include "testutils.inc"
   6
   7         double_constants
   8         start
   9         load_double_constants
  10
  11         .global fcmpd
  12 fcmpd:
  13         set_fcc         0x7,0           ; Set mask opposite of expected
  14         fcmpd           fr0,fr0,fcc0
  15         test_fcc        0x8,0
  16         set_fcc         0xb,0           ; Set mask opposite of expected
  17         fcmpd           fr0,fr4,fcc0
  18         test_fcc        0x4,0
  19         set_fcc         0xb,0           ; Set mask opposite of expected
  20         fcmpd           fr0,fr8,fcc0
  21         test_fcc        0x4,0
  22         set_fcc         0xb,0           ; Set mask opposite of expected
  23         fcmpd           fr0,fr12,fcc0
  24         test_fcc        0x4,0
  25         set_fcc         0xb,0           ; Set mask opposite of expected
  26         fcmpd           fr0,fr16,fcc0
  27         test_fcc        0x4,0
  28         set_fcc         0xb,0           ; Set mask opposite of expected
  29         fcmpd           fr0,fr20,fcc0
  30         test_fcc        0x4,0
  31         set_fcc         0xb,0           ; Set mask opposite of expected
  32         fcmpd           fr0,fr24,fcc0
  33         test_fcc        0x4,0
  34         set_fcc         0xb,0           ; Set mask opposite of expected
  35         fcmpd           fr0,fr28,fcc0
  36         test_fcc        0x4,0
  37         set_fcc         0xb,0           ; Set mask opposite of expected
  38         fcmpd           fr0,fr32,fcc0
  39         test_fcc        0x4,0
  40         set_fcc         0xb,0           ; Set mask opposite of expected
  41         fcmpd           fr0,fr36,fcc0
  42         test_fcc        0x4,0
  43         set_fcc         0xb,0           ; Set mask opposite of expected
  44         fcmpd           fr0,fr40,fcc0
  45         test_fcc        0x4,0
  46         set_fcc         0xb,0           ; Set mask opposite of expected
  47         fcmpd           fr0,fr44,fcc0
  48         test_fcc        0x4,0
  49         set_fcc         0xb,0           ; Set mask opposite of expected
  50         fcmpd           fr0,fr48,fcc0
  51         test_fcc        0x4,0
  52         set_fcc         0xb,0           ; Set mask opposite of expected
  53         fcmpd           fr0,fr52,fcc0
  54         test_fcc        0x4,0
  55         set_fcc         0xe,0           ; Set mask opposite of expected
  56         fcmpd           fr0,fr56,fcc0
  57         test_fcc        0x1,0
  58         set_fcc         0xe,0           ; Set mask opposite of expected
  59         fcmpd           fr0,fr60,fcc0
  60         test_fcc        0x1,0
  61
  62         set_fcc         0xd,0           ; Set mask opposite of expected
  63         fcmpd           fr4,fr0,fcc0
  64         test_fcc        0x2,0
  65         set_fcc         0x7,0           ; Set mask opposite of expected
  66         fcmpd           fr4,fr4,fcc0
  67         test_fcc        0x8,0
  68         set_fcc         0xb,0           ; Set mask opposite of expected
  69         fcmpd           fr4,fr8,fcc0
  70         test_fcc        0x4,0
  71         set_fcc         0xb,0           ; Set mask opposite of expected
  72         fcmpd           fr4,fr12,fcc0
  73         test_fcc        0x4,0
  74         set_fcc         0xb,0           ; Set mask opposite of expected
  75         fcmpd           fr4,fr16,fcc0
  76         test_fcc        0x4,0
  77         set_fcc         0xb,0           ; Set mask opposite of expected
  78         fcmpd           fr4,fr20,fcc0
  79         test_fcc        0x4,0
  80         set_fcc         0xb,0           ; Set mask opposite of expected
  81         fcmpd           fr4,fr24,fcc0
  82         test_fcc        0x4,0
  83         set_fcc         0xb,0           ; Set mask opposite of expected
  84         fcmpd           fr4,fr28,fcc0
  85         test_fcc        0x4,0
  86         set_fcc         0xb,0           ; Set mask opposite of expected
  87         fcmpd           fr4,fr32,fcc0
  88         test_fcc        0x4,0
  89         set_fcc         0xb,0           ; Set mask opposite of expected
  90         fcmpd           fr4,fr36,fcc0
  91         test_fcc        0x4,0
  92         set_fcc         0xb,0           ; Set mask opposite of expected
  93         fcmpd           fr4,fr40,fcc0
  94         test_fcc        0x4,0
  95         set_fcc         0xb,0           ; Set mask opposite of expected
  96         fcmpd           fr4,fr44,fcc0
  97         test_fcc        0x4,0
  98         set_fcc         0xb,0           ; Set mask opposite of expected
  99         fcmpd           fr4,fr48,fcc0
 100         test_fcc        0x4,0
 101         set_fcc         0xb,0           ; Set mask opposite of expected
 102         fcmpd           fr4,fr52,fcc0
 103         test_fcc        0x4,0
 104         set_fcc         0xe,0           ; Set mask opposite of expected
 105         fcmpd           fr4,fr56,fcc0
 106         test_fcc        0x1,0
 107         set_fcc         0xe,0           ; Set mask opposite of expected
 108         fcmpd           fr4,fr60,fcc0
 109         test_fcc        0x1,0
 110
 111         set_fcc         0xd,0           ; Set mask opposite of expected
 112         fcmpd           fr8,fr0,fcc0
 113         test_fcc        0x2,0
 114         set_fcc         0xd,0           ; Set mask opposite of expected
 115         fcmpd           fr8,fr4,fcc0
 116         test_fcc        0x2,0
 117         set_fcc         0x7,0           ; Set mask opposite of expected
 118         fcmpd           fr8,fr8,fcc0
 119         test_fcc        0x8,0
 120         set_fcc         0xb,0           ; Set mask opposite of expected
 121         fcmpd           fr8,fr12,fcc0
 122         test_fcc        0x4,0
 123         set_fcc         0xb,0           ; Set mask opposite of expected
 124         fcmpd           fr8,fr16,fcc0
 125         test_fcc        0x4,0
 126         set_fcc         0xb,0           ; Set mask opposite of expected
 127         fcmpd           fr8,fr20,fcc0
 128         test_fcc        0x4,0
 129         set_fcc         0xb,0           ; Set mask opposite of expected
 130         fcmpd           fr8,fr24,fcc0
 131         test_fcc        0x4,0
 132         set_fcc         0xb,0           ; Set mask opposite of expected
 133         fcmpd           fr8,fr28,fcc0
 134         test_fcc        0x4,0
 135         set_fcc         0xb,0           ; Set mask opposite of expected
 136         fcmpd           fr8,fr32,fcc0
 137         test_fcc        0x4,0
 138         set_fcc         0xb,0           ; Set mask opposite of expected
 139         fcmpd           fr8,fr36,fcc0
 140         test_fcc        0x4,0
 141         set_fcc         0xb,0           ; Set mask opposite of expected
 142         fcmpd           fr8,fr40,fcc0
 143         test_fcc        0x4,0
 144         set_fcc         0xb,0           ; Set mask opposite of expected
 145         fcmpd           fr8,fr44,fcc0
 146         test_fcc        0x4,0
 147         set_fcc         0xb,0           ; Set mask opposite of expected
 148         fcmpd           fr8,fr48,fcc0
 149         test_fcc        0x4,0
 150         set_fcc         0xb,0           ; Set mask opposite of expected
 151         fcmpd           fr8,fr52,fcc0
 152         test_fcc        0x4,0
 153         set_fcc         0xe,0           ; Set mask opposite of expected
 154         fcmpd           fr8,fr56,fcc0
 155         test_fcc        0x1,0
 156         set_fcc         0xe,0           ; Set mask opposite of expected
 157         fcmpd           fr8,fr60,fcc0
 158         test_fcc        0x1,0
 159
 160         set_fcc         0xd,0           ; Set mask opposite of expected
 161         fcmpd           fr12,fr0,fcc0
 162         test_fcc        0x2,0
 163         set_fcc         0xd,0           ; Set mask opposite of expected
 164         fcmpd           fr12,fr4,fcc0
 165         test_fcc        0x2,0
 166         set_fcc         0xd,0           ; Set mask opposite of expected
 167         fcmpd           fr12,fr8,fcc0
 168         test_fcc        0x2,0
 169         set_fcc         0x7,0           ; Set mask opposite of expected
 170         fcmpd           fr12,fr12,fcc0
 171         test_fcc        0x8,0
 172         set_fcc         0xb,0           ; Set mask opposite of expected
 173         fcmpd           fr12,fr16,fcc0
 174         test_fcc        0x4,0
 175         set_fcc         0xb,0           ; Set mask opposite of expected
 176         fcmpd           fr12,fr20,fcc0
 177         test_fcc        0x4,0
 178         set_fcc         0xb,0           ; Set mask opposite of expected
 179         fcmpd           fr12,fr24,fcc0
 180         test_fcc        0x4,0
 181         set_fcc         0xb,0           ; Set mask opposite of expected
 182         fcmpd           fr12,fr28,fcc0
 183         test_fcc        0x4,0
 184         set_fcc         0xb,0           ; Set mask opposite of expected
 185         fcmpd           fr12,fr32,fcc0
 186         test_fcc        0x4,0
 187         set_fcc         0xb,0           ; Set mask opposite of expected
 188         fcmpd           fr12,fr36,fcc0
 189         test_fcc        0x4,0
 190         set_fcc         0xb,0           ; Set mask opposite of expected
 191         fcmpd           fr12,fr40,fcc0
 192         test_fcc        0x4,0
 193         set_fcc         0xb,0           ; Set mask opposite of expected
 194         fcmpd           fr12,fr44,fcc0
 195         test_fcc        0x4,0
 196         set_fcc         0xb,0           ; Set mask opposite of expected
 197         fcmpd           fr12,fr48,fcc0
 198         test_fcc        0x4,0
 199         set_fcc         0xb,0           ; Set mask opposite of expected
 200         fcmpd           fr12,fr52,fcc0
 201         test_fcc        0x4,0
 202         set_fcc         0xe,0           ; Set mask opposite of expected
 203         fcmpd           fr12,fr56,fcc0
 204         test_fcc        0x1,0
 205         set_fcc         0xe,0           ; Set mask opposite of expected
 206         fcmpd           fr12,fr60,fcc0
 207         test_fcc        0x1,0
 208
 209         set_fcc         0xd,0           ; Set mask opposite of expected
 210         fcmpd           fr16,fr0,fcc0
 211         test_fcc        0x2,0
 212         set_fcc         0xd,0           ; Set mask opposite of expected
 213         fcmpd           fr16,fr4,fcc0
 214         test_fcc        0x2,0
 215         set_fcc         0xd,0           ; Set mask opposite of expected
 216         fcmpd           fr16,fr8,fcc0
 217         test_fcc        0x2,0
 218         set_fcc         0xd,0           ; Set mask opposite of expected
 219         fcmpd           fr16,fr12,fcc0
 220         test_fcc        0x2,0
 221         set_fcc         0x7,0           ; Set mask opposite of expected
 222         fcmpd           fr16,fr16,fcc0
 223         test_fcc        0x8,0
 224         set_fcc         0x7,0           ; Set mask opposite of expected
 225         fcmpd           fr16,fr20,fcc0
 226         test_fcc        0x8,0
 227         set_fcc         0xb,0           ; Set mask opposite of expected
 228         fcmpd           fr16,fr24,fcc0
 229         test_fcc        0x4,0
 230         set_fcc         0xb,0           ; Set mask opposite of expected
 231         fcmpd           fr16,fr28,fcc0
 232         test_fcc        0x4,0
 233         set_fcc         0xb,0           ; Set mask opposite of expected
 234         fcmpd           fr16,fr32,fcc0
 235         test_fcc        0x4,0
 236         set_fcc         0xb,0           ; Set mask opposite of expected
 237         fcmpd           fr16,fr36,fcc0
 238         test_fcc        0x4,0
 239         set_fcc         0xb,0           ; Set mask opposite of expected
 240         fcmpd           fr16,fr40,fcc0
 241         test_fcc        0x4,0
 242         set_fcc         0xb,0           ; Set mask opposite of expected
 243         fcmpd           fr16,fr44,fcc0
 244         test_fcc        0x4,0
 245         set_fcc         0xb,0           ; Set mask opposite of expected
 246         fcmpd           fr16,fr48,fcc0
 247         test_fcc        0x4,0
 248         set_fcc         0xb,0           ; Set mask opposite of expected
 249         fcmpd           fr16,fr52,fcc0
 250         test_fcc        0x4,0
 251         set_fcc         0xe,0           ; Set mask opposite of expected
 252         fcmpd           fr16,fr56,fcc0
 253         test_fcc        0x1,0
 254         set_fcc         0xe,0           ; Set mask opposite of expected
 255         fcmpd           fr16,fr60,fcc0
 256         test_fcc        0x1,0
 257
 258         set_fcc         0xd,0           ; Set mask opposite of expected
 259         fcmpd           fr20,fr0,fcc0
 260         test_fcc        0x2,0
 261         set_fcc         0xd,0           ; Set mask opposite of expected
 262         fcmpd           fr20,fr4,fcc0
 263         test_fcc        0x2,0
 264         set_fcc         0xd,0           ; Set mask opposite of expected
 265         fcmpd           fr20,fr8,fcc0
 266         test_fcc        0x2,0
 267         set_fcc         0xd,0           ; Set mask opposite of expected
 268         fcmpd           fr20,fr12,fcc0
 269         test_fcc        0x2,0
 270         set_fcc         0x7,0           ; Set mask opposite of expected
 271         fcmpd           fr20,fr16,fcc0
 272         test_fcc        0x8,0
 273         set_fcc         0x7,0           ; Set mask opposite of expected
 274         fcmpd           fr20,fr20,fcc0
 275         test_fcc        0x8,0
 276         set_fcc         0xb,0           ; Set mask opposite of expected
 277         fcmpd           fr20,fr24,fcc0
 278         test_fcc        0x4,0
 279         set_fcc         0xb,0           ; Set mask opposite of expected
 280         fcmpd           fr20,fr28,fcc0
 281         test_fcc        0x4,0
 282         set_fcc         0xb,0           ; Set mask opposite of expected
 283         fcmpd           fr20,fr32,fcc0
 284         test_fcc        0x4,0
 285         set_fcc         0xb,0           ; Set mask opposite of expected
 286         fcmpd           fr20,fr36,fcc0
 287         test_fcc        0x4,0
 288         set_fcc         0xb,0           ; Set mask opposite of expected
 289         fcmpd           fr20,fr40,fcc0
 290         test_fcc        0x4,0
 291         set_fcc         0xb,0           ; Set mask opposite of expected
 292         fcmpd           fr20,fr44,fcc0
 293         test_fcc        0x4,0
 294         set_fcc         0xb,0           ; Set mask opposite of expected
 295         fcmpd           fr20,fr48,fcc0
 296         test_fcc        0x4,0
 297         set_fcc         0xb,0           ; Set mask opposite of expected
 298         fcmpd           fr20,fr52,fcc0
 299         test_fcc        0x4,0
 300         set_fcc         0xe,0           ; Set mask opposite of expected
 301         fcmpd           fr20,fr56,fcc0
 302         test_fcc        0x1,0
 303         set_fcc         0xe,0           ; Set mask opposite of expected
 304         fcmpd           fr20,fr60,fcc0
 305         test_fcc        0x1,0
 306
 307         set_fcc         0xd,0           ; Set mask opposite of expected
 308         fcmpd           fr24,fr0,fcc0
 309         test_fcc        0x2,0
 310         set_fcc         0xd,0           ; Set mask opposite of expected
 311         fcmpd           fr24,fr4,fcc0
 312         test_fcc        0x2,0
 313         set_fcc         0xd,0           ; Set mask opposite of expected
 314         fcmpd           fr24,fr8,fcc0
 315         test_fcc        0x2,0
 316         set_fcc         0xd,0           ; Set mask opposite of expected
 317         fcmpd           fr24,fr12,fcc0
 318         test_fcc        0x2,0
 319         set_fcc         0xd,0           ; Set mask opposite of expected
 320         fcmpd           fr24,fr16,fcc0
 321         test_fcc        0x2,0
 322         set_fcc         0xd,0           ; Set mask opposite of expected
 323         fcmpd           fr24,fr20,fcc0
 324         test_fcc        0x2,0
 325         set_fcc         0x7,0           ; Set mask opposite of expected
 326         fcmpd           fr24,fr24,fcc0
 327         test_fcc        0x8,0
 328         set_fcc         0xb,0           ; Set mask opposite of expected
 329         fcmpd           fr24,fr28,fcc0
 330         test_fcc        0x4,0
 331         set_fcc         0xb,0           ; Set mask opposite of expected
 332         fcmpd           fr24,fr32,fcc0
 333         test_fcc        0x4,0
 334         set_fcc         0xb,0           ; Set mask opposite of expected
 335         fcmpd           fr24,fr36,fcc0
 336         test_fcc        0x4,0
 337         set_fcc         0xb,0           ; Set mask opposite of expected
 338         fcmpd           fr24,fr40,fcc0
 339         test_fcc        0x4,0
 340         set_fcc         0xb,0           ; Set mask opposite of expected
 341         fcmpd           fr24,fr44,fcc0
 342         test_fcc        0x4,0
 343         set_fcc         0xb,0           ; Set mask opposite of expected
 344         fcmpd           fr24,fr48,fcc0
 345         test_fcc        0x4,0
 346         set_fcc         0xb,0           ; Set mask opposite of expected
 347         fcmpd           fr24,fr52,fcc0
 348         test_fcc        0x4,0
 349         set_fcc         0xe,0           ; Set mask opposite of expected
 350         fcmpd           fr24,fr56,fcc0
 351         test_fcc        0x1,0
 352         set_fcc         0xe,0           ; Set mask opposite of expected
 353         fcmpd           fr24,fr60,fcc0
 354         test_fcc        0x1,0
 355
 356         set_fcc         0xd,0           ; Set mask opposite of expected
 357         fcmpd           fr28,fr0,fcc0
 358         test_fcc        0x2,0
 359         set_fcc         0xd,0           ; Set mask opposite of expected
 360         fcmpd           fr28,fr4,fcc0
 361         test_fcc        0x2,0
 362         set_fcc         0xd,0           ; Set mask opposite of expected
 363         fcmpd           fr28,fr8,fcc0
 364         test_fcc        0x2,0
 365         set_fcc         0xd,0           ; Set mask opposite of expected
 366         fcmpd           fr28,fr12,fcc0
 367         test_fcc        0x2,0
 368         set_fcc         0xd,0           ; Set mask opposite of expected
 369         fcmpd           fr28,fr16,fcc0
 370         test_fcc        0x2,0
 371         set_fcc         0xd,0           ; Set mask opposite of expected
 372         fcmpd           fr28,fr20,fcc0
 373         test_fcc        0x2,0
 374         set_fcc         0xd,0           ; Set mask opposite of expected
 375         fcmpd           fr28,fr24,fcc0
 376         test_fcc        0x2,0
 377         set_fcc         0x7,0           ; Set mask opposite of expected
 378         fcmpd           fr28,fr28,fcc0
 379         test_fcc        0x8,0
 380         set_fcc         0xb,0           ; Set mask opposite of expected
 381         fcmpd           fr28,fr32,fcc0
 382         test_fcc        0x4,0
 383         set_fcc         0xb,0           ; Set mask opposite of expected
 384         fcmpd           fr28,fr36,fcc0
 385         test_fcc        0x4,0
 386         set_fcc         0xb,0           ; Set mask opposite of expected
 387         fcmpd           fr28,fr40,fcc0
 388         test_fcc        0x4,0
 389         set_fcc         0xb,0           ; Set mask opposite of expected
 390         fcmpd           fr28,fr44,fcc0
 391         test_fcc        0x4,0
 392         set_fcc         0xb,0           ; Set mask opposite of expected
 393         fcmpd           fr28,fr48,fcc0
 394         test_fcc        0x4,0
 395         set_fcc         0xb,0           ; Set mask opposite of expected
 396         fcmpd           fr28,fr52,fcc0
 397         test_fcc        0x4,0
 398         set_fcc         0xe,0           ; Set mask opposite of expected
 399         fcmpd           fr28,fr56,fcc0
 400         test_fcc        0x1,0
 401         set_fcc         0xe,0           ; Set mask opposite of expected
 402         fcmpd           fr28,fr60,fcc0
 403         test_fcc        0x1,0
 404
 405         set_fcc         0xd,0           ; Set mask opposite of expected
 406         fcmpd           fr48,fr0,fcc0
 407         test_fcc        0x2,0
 408         set_fcc         0xd,0           ; Set mask opposite of expected
 409         fcmpd           fr48,fr4,fcc0
 410         test_fcc        0x2,0
 411         set_fcc         0xd,0           ; Set mask opposite of expected
 412         fcmpd           fr48,fr8,fcc0
 413         test_fcc        0x2,0
 414         set_fcc         0xd,0           ; Set mask opposite of expected
 415         fcmpd           fr48,fr12,fcc0
 416         test_fcc        0x2,0
 417         set_fcc         0xd,0           ; Set mask opposite of expected
 418         fcmpd           fr48,fr16,fcc0
 419         test_fcc        0x2,0
 420         set_fcc         0xd,0           ; Set mask opposite of expected
 421         fcmpd           fr48,fr20,fcc0
 422         test_fcc        0x2,0
 423         set_fcc         0xd,0           ; Set mask opposite of expected
 424         fcmpd           fr48,fr24,fcc0
 425         test_fcc        0x2,0
 426         set_fcc         0xd,0           ; Set mask opposite of expected
 427         fcmpd           fr48,fr28,fcc0
 428         test_fcc        0x2,0
 429         set_fcc         0xd,0           ; Set mask opposite of expected
 430         fcmpd           fr48,fr32,fcc0
 431         test_fcc        0x2,0
 432         set_fcc         0xd,0           ; Set mask opposite of expected
 433         fcmpd           fr48,fr36,fcc0
 434         test_fcc        0x2,0
 435         set_fcc         0xd,0           ; Set mask opposite of expected
 436         fcmpd           fr48,fr40,fcc0
 437         test_fcc        0x2,0
 438         set_fcc         0xd,0           ; Set mask opposite of expected
 439         fcmpd           fr48,fr44,fcc0
 440         test_fcc        0x2,0
 441         set_fcc         0x7,0           ; Set mask opposite of expected
 442         fcmpd           fr48,fr48,fcc0
 443         test_fcc        0x8,0
 444         set_fcc         0xb,0           ; Set mask opposite of expected
 445         fcmpd           fr48,fr52,fcc0
 446         test_fcc        0x4,0
 447         set_fcc         0xe,0           ; Set mask opposite of expected
 448         fcmpd           fr48,fr56,fcc0
 449         test_fcc        0x1,0
 450         set_fcc         0xe,0           ; Set mask opposite of expected
 451         fcmpd           fr48,fr60,fcc0
 452         test_fcc        0x1,0
 453
 454         set_fcc         0xd,0           ; Set mask opposite of expected
 455         fcmpd           fr52,fr0,fcc0
 456         test_fcc        0x2,0
 457         set_fcc         0xd,0           ; Set mask opposite of expected
 458         fcmpd           fr52,fr4,fcc0
 459         test_fcc        0x2,0
 460         set_fcc         0xd,0           ; Set mask opposite of expected
 461         fcmpd           fr52,fr8,fcc0
 462         test_fcc        0x2,0
 463         set_fcc         0xd,0           ; Set mask opposite of expected
 464         fcmpd           fr52,fr12,fcc0
 465         test_fcc        0x2,0
 466         set_fcc         0xd,0           ; Set mask opposite of expected
 467         fcmpd           fr52,fr16,fcc0
 468         test_fcc        0x2,0
 469         set_fcc         0xd,0           ; Set mask opposite of expected
 470         fcmpd           fr52,fr20,fcc0
 471         test_fcc        0x2,0
 472         set_fcc         0xd,0           ; Set mask opposite of expected
 473         fcmpd           fr52,fr24,fcc0
 474         test_fcc        0x2,0
 475         set_fcc         0xd,0           ; Set mask opposite of expected
 476         fcmpd           fr52,fr28,fcc0
 477         test_fcc        0x2,0
 478         set_fcc         0xd,0           ; Set mask opposite of expected
 479         fcmpd           fr52,fr32,fcc0
 480         test_fcc        0x2,0
 481         set_fcc         0xd,0           ; Set mask opposite of expected
 482         fcmpd           fr52,fr36,fcc0
 483         test_fcc        0x2,0
 484         set_fcc         0xd,0           ; Set mask opposite of expected
 485         fcmpd           fr52,fr40,fcc0
 486         test_fcc        0x2,0
 487         set_fcc         0xd,0           ; Set mask opposite of expected
 488         fcmpd           fr52,fr44,fcc0
 489         test_fcc        0x2,0
 490         set_fcc         0xd,0           ; Set mask opposite of expected
 491         fcmpd           fr52,fr48,fcc0
 492         test_fcc        0x2,0
 493         set_fcc         0x7,0           ; Set mask opposite of expected
 494         fcmpd           fr52,fr52,fcc0
 495         test_fcc        0x8,0
 496         set_fcc         0xe,0           ; Set mask opposite of expected
 497         fcmpd           fr52,fr56,fcc0
 498         test_fcc        0x1,0
 499         set_fcc         0xe,0           ; Set mask opposite of expected
 500         fcmpd           fr52,fr60,fcc0
 501         test_fcc        0x1,0
 502
 503         set_fcc         0xe,0           ; Set mask opposite of expected
 504         fcmpd           fr56,fr0,fcc0
 505         test_fcc        0x1,0
 506         set_fcc         0xe,0           ; Set mask opposite of expected
 507         fcmpd           fr56,fr4,fcc0
 508         test_fcc        0x1,0
 509         set_fcc         0xe,0           ; Set mask opposite of expected
 510         fcmpd           fr56,fr8,fcc0
 511         test_fcc        0x1,0
 512         set_fcc         0xe,0           ; Set mask opposite of expected
 513         fcmpd           fr56,fr12,fcc0
 514         test_fcc        0x1,0
 515         set_fcc         0xe,0           ; Set mask opposite of expected
 516         fcmpd           fr56,fr16,fcc0
 517         test_fcc        0x1,0
 518         set_fcc         0xe,0           ; Set mask opposite of expected
 519         fcmpd           fr56,fr20,fcc0
 520         test_fcc        0x1,0
 521         set_fcc         0xe,0           ; Set mask opposite of expected
 522         fcmpd           fr56,fr24,fcc0
 523         test_fcc        0x1,0
 524         set_fcc         0xe,0           ; Set mask opposite of expected
 525         fcmpd           fr56,fr28,fcc0
 526         test_fcc        0x1,0
 527         set_fcc         0xe,0           ; Set mask opposite of expected
 528         fcmpd           fr56,fr32,fcc0
 529         test_fcc        0x1,0
 530         set_fcc         0xe,0           ; Set mask opposite of expected
 531         fcmpd           fr56,fr36,fcc0
 532         test_fcc        0x1,0
 533         set_fcc         0xe,0           ; Set mask opposite of expected
 534         fcmpd           fr56,fr40,fcc0
 535         test_fcc        0x1,0
 536         set_fcc         0xe,0           ; Set mask opposite of expected
 537         fcmpd           fr56,fr44,fcc0
 538         test_fcc        0x1,0
 539         set_fcc         0xe,0           ; Set mask opposite of expected
 540         fcmpd           fr56,fr48,fcc0
 541         test_fcc        0x1,0
 542         set_fcc         0xe,0           ; Set mask opposite of expected
 543         fcmpd           fr56,fr52,fcc0
 544         test_fcc        0x1,0
 545         set_fcc         0xe,0           ; Set mask opposite of expected
 546         fcmpd           fr56,fr56,fcc0
 547         test_fcc        0x1,0
 548         set_fcc         0xe,0           ; Set mask opposite of expected
 549         fcmpd           fr56,fr60,fcc0
 550         test_fcc        0x1,0
 551
 552         set_fcc         0xe,0           ; Set mask opposite of expected
 553         fcmpd           fr60,fr0,fcc0
 554         test_fcc        0x1,0
 555         set_fcc         0xe,0           ; Set mask opposite of expected
 556         fcmpd           fr60,fr4,fcc0
 557         test_fcc        0x1,0
 558         set_fcc         0xe,0           ; Set mask opposite of expected
 559         fcmpd           fr60,fr8,fcc0
 560         test_fcc        0x1,0
 561         set_fcc         0xe,0           ; Set mask opposite of expected
 562         fcmpd           fr60,fr12,fcc0
 563         test_fcc        0x1,0
 564         set_fcc         0xe,0           ; Set mask opposite of expected
 565         fcmpd           fr60,fr16,fcc0
 566         test_fcc        0x1,0
 567         set_fcc         0xe,0           ; Set mask opposite of expected
 568         fcmpd           fr60,fr20,fcc0
 569         test_fcc        0x1,0
 570         set_fcc         0xe,0           ; Set mask opposite of expected
 571         fcmpd           fr60,fr24,fcc0
 572         test_fcc        0x1,0
 573         set_fcc         0xe,0           ; Set mask opposite of expected
 574         fcmpd           fr60,fr28,fcc0
 575         test_fcc        0x1,0
 576         set_fcc         0xe,0           ; Set mask opposite of expected
 577         fcmpd           fr60,fr32,fcc0
 578         test_fcc        0x1,0
 579         set_fcc         0xe,0           ; Set mask opposite of expected
 580         fcmpd           fr60,fr36,fcc0
 581         test_fcc        0x1,0
 582         set_fcc         0xe,0           ; Set mask opposite of expected
 583         fcmpd           fr60,fr40,fcc0
 584         test_fcc        0x1,0
 585         set_fcc         0xe,0           ; Set mask opposite of expected
 586         fcmpd           fr60,fr44,fcc0
 587         test_fcc        0x1,0
 588         set_fcc         0xe,0           ; Set mask opposite of expected
 589         fcmpd           fr60,fr48,fcc0
 590         test_fcc        0x1,0
 591         set_fcc         0xe,0           ; Set mask opposite of expected
 592         fcmpd           fr60,fr52,fcc0
 593         test_fcc        0x1,0
 594         set_fcc         0xe,0           ; Set mask opposite of expected
 595         fcmpd           fr60,fr56,fcc0
 596         test_fcc        0x1,0
 597         set_fcc         0xe,0           ; Set mask opposite of expected
 598         fcmpd           fr60,fr60,fcc0
 599         test_fcc        0x1,0
 600
 601         pass