sim/testsuite/frv/mcpxru.cgs

   1 # frv testcase for mcpxru $GRi,$GRj,$GRk
   2 # mach: all
   3
   4         .include "testutils.inc"
   5
   6         start
   7
   8         .global mcpxru
   9 mcpxru:
  10         set_fr_iimmed   4,2,fr7         ; multiply small numbers
  11         set_fr_iimmed   5,3,fr8
  12         mcpxru          fr7,fr8,acc0
  13         test_accg_immed         0,accg0
  14         test_acc_immed  14,acc0
  15
  16         set_fr_iimmed   1,2,fr7         ; multiply by 1
  17         set_fr_iimmed   3,1,fr8
  18         mcpxru          fr7,fr8,acc0
  19         test_accg_immed         0,accg0
  20         test_acc_immed  1,acc0
  21
  22         set_fr_iimmed   0,2,fr7         ; multiply by 0
  23         set_fr_iimmed   2,0,fr8
  24         mcpxru          fr7,fr8,acc0
  25         test_accg_immed         0,accg0
  26         test_acc_immed  0,acc0
  27
  28         set_fr_iimmed   0x3fff,1,fr7    ; 15 bit result
  29         set_fr_iimmed   2,0x0001,fr8
  30         mcpxru          fr7,fr8,acc0
  31         test_accg_immed         0,accg0
  32         test_acc_limmed 0x0000,0x7ffd,acc0
  33
  34         set_fr_iimmed   0x4000,1,fr7    ; 16 bit result
  35         set_fr_iimmed   4,0x0001,fr8
  36         mcpxru          fr7,fr8,acc0
  37         test_accg_immed         0,accg0
  38         test_acc_limmed 0x0000,0xffff,acc0
  39
  40         set_fr_iimmed   0x8000,1,fr7    ; 17 bit result
  41         set_fr_iimmed   4,0x0001,fr8
  42         mcpxru          fr7,fr8,acc0
  43         test_accg_immed         0,accg0
  44         test_acc_immed  0x0001ffff,acc0
  45
  46         set_fr_iimmed   0x7fff,0x0000,fr7       ; max positive result
  47         set_fr_iimmed   0x7fff,0x7fff,fr8
  48         mcpxru          fr7,fr8,acc0
  49         test_accg_immed         0,accg0
  50         test_acc_immed  0x3fff0001,acc0
  51
  52         set_fr_iimmed   0x8000,0x8000,fr7       ; max positive result
  53         set_fr_iimmed   0x8000,0x0000,fr8
  54         mcpxru          fr7,fr8,acc0
  55         test_accg_immed         0,accg0
  56         test_acc_limmed 0x4000,0x0000,acc0
  57
  58         set_fr_iimmed   0xffff,0x0000,fr7       ; max positive result
  59         set_fr_iimmed   0xffff,0xffff,fr8
  60         mcpxru          fr7,fr8,acc0
  61         test_accg_immed         0,accg0
  62         test_acc_limmed 0xfffe,0x0001,acc0
  63
  64         set_fr_iimmed   0x0000,0x0001,fr7       ; saturation
  65         set_fr_iimmed   0xffff,0x0001,fr8
  66         mcpxru          fr7,fr8,acc0
  67         test_spr_bits   0x3c,2,0x8,msr0         ; msr0.sie is set
  68         test_spr_bits   2,1,1,msr0              ; msr0.ovf is set
  69         test_spr_bits   1,0,1,msr0              ; msr0.aovf is set
  70         test_spr_bits   0x7000,12,1,msr0        ; msr0.mtt is set
  71         test_accg_immed         0,accg0
  72         test_acc_immed  0,acc0
  73
  74         set_fr_iimmed   0x0000,0xffff,fr7       ; saturation
  75         set_fr_iimmed   0xffff,0xffff,fr8
  76         mcpxru          fr7,fr8,acc0
  77         test_spr_bits   0x3c,2,0x8,msr0         ; msr0.sie is set
  78         test_spr_bits   2,1,1,msr0              ; msr0.ovf is set
  79         test_spr_bits   1,0,1,msr0              ; msr0.aovf is set
  80         test_spr_bits   0x7000,12,1,msr0        ; msr0.mtt is set
  81         test_accg_immed         0,accg0
  82         test_acc_immed  0,acc0
  83
  84         set_fr_iimmed   0xfffe,0xffff,fr7       ; saturation
  85         set_fr_iimmed   0xffff,0xffff,fr8
  86         mcpxru          fr7,fr8,acc0
  87         test_spr_bits   0x3c,2,0x8,msr0         ; msr0.sie is set
  88         test_spr_bits   2,1,1,msr0              ; msr0.ovf is set
  89         test_spr_bits   1,0,1,msr0              ; msr0.aovf is set
  90         test_spr_bits   0x7000,12,1,msr0        ; msr0.mtt is set
  91         test_accg_immed         0,accg0
  92         test_acc_immed  0,acc0
  93
  94         pass