1 # frv testcase for nfddivs $FRi,$FRj,$FRk
4 .include "testutils.inc"
16 test_spr_immed 0,fner1
17 test_spr_immed 0,fner0
21 test_spr_immed 0,fner1
22 test_spr_immed 0,fner0
26 test_spr_immed 0,fner1
27 test_spr_immed 0,fner0
31 test_spr_immed 0,fner1
32 test_spr_immed 0,fner0
38 test_spr_immed 0,fner1
39 test_spr_immed 0,fner0
45 test_spr_immed 0,fner1
46 test_spr_immed 0,fner0
50 test_spr_immed 0,fner1
51 test_spr_immed 0,fner0
55 test_spr_immed 0,fner1
56 test_spr_immed 0,fner0
60 test_spr_immed 0,fner1
61 test_spr_immed 0,fner0
65 test_spr_immed 0,fner1
66 test_spr_immed 0,fner0
70 test_spr_immed 0,fner1
71 test_spr_immed 0,fner0
75 test_spr_immed 0,fner1
76 test_spr_immed 0,fner0
80 test_spr_immed 0,fner1
81 test_spr_immed 0,fner0
85 test_spr_immed 0,fner1
86 test_spr_immed 0,fner0
93 test_spr_immed 0,fner1
94 test_spr_immed 0,fner0
100 test_spr_immed 0,fner1
101 test_spr_immed 0,fner0
107 test_spr_immed 0,fner1
108 test_spr_immed 0,fner0
109 nfddivs fr16,fr12,fr2
114 test_spr_immed 0,fner1
115 test_spr_immed 0,fner0
116 nfddivs fr16,fr24,fr2
121 test_spr_immed 0,fner1
122 test_spr_immed 0,fner0
123 nfddivs fr16,fr28,fr2
128 test_spr_immed 0,fner1
129 test_spr_immed 0,fner0
130 nfddivs fr16,fr32,fr2
135 test_spr_immed 0,fner1
136 test_spr_immed 0,fner0
137 nfddivs fr16,fr36,fr2
142 test_spr_immed 0,fner1
143 test_spr_immed 0,fner0
144 nfddivs fr16,fr40,fr2
149 test_spr_immed 0,fner1
150 test_spr_immed 0,fner0
151 nfddivs fr16,fr44,fr2
156 test_spr_immed 0,fner1
157 test_spr_immed 0,fner0
158 nfddivs fr16,fr48,fr2
163 test_spr_immed 0,fner1
164 test_spr_immed 0,fner0
165 nfddivs fr16,fr52,fr2
170 test_spr_immed 0,fner1
171 test_spr_immed 0,fner0
178 test_spr_immed 0,fner1
179 test_spr_immed 0,fner0
185 test_spr_immed 0,fner1
186 test_spr_immed 0,fner0
192 test_spr_immed 0,fner1
193 test_spr_immed 0,fner0
194 nfddivs fr20,fr12,fr2
199 test_spr_immed 0,fner1
200 test_spr_immed 0,fner0
201 nfddivs fr20,fr24,fr2
206 test_spr_immed 0,fner1
207 test_spr_immed 0,fner0
208 nfddivs fr20,fr28,fr2
213 test_spr_immed 0,fner1
214 test_spr_immed 0,fner0
215 nfddivs fr20,fr32,fr2
220 test_spr_immed 0,fner1
221 test_spr_immed 0,fner0
222 nfddivs fr20,fr36,fr2
227 test_spr_immed 0,fner1
228 test_spr_immed 0,fner0
229 nfddivs fr20,fr40,fr2
234 test_spr_immed 0,fner1
235 test_spr_immed 0,fner0
236 nfddivs fr20,fr44,fr2
241 test_spr_immed 0,fner1
242 test_spr_immed 0,fner0
243 nfddivs fr20,fr48,fr2
248 test_spr_immed 0,fner1
249 test_spr_immed 0,fner0
250 nfddivs fr20,fr52,fr2
255 test_spr_immed 0,fner1
256 test_spr_immed 0,fner0
261 test_spr_immed 0,fner1
262 test_spr_immed 0,fner0
266 test_spr_immed 0,fner1
267 test_spr_immed 0,fner0
269 nfddivs fr40,fr32,fr2
272 test_spr_immed 0,fner1
273 test_spr_immed 0,fner0
275 ; try to cause exceptions
276 set_spr_immed 0,fner0
277 set_spr_immed 0,fner1
278 nfddivs fr48,fr20,fr2
279 ; test_fr_fr fr2,fr44
280 ; test_fr_fr fr3,fr44
281 test_spr_immed 0xc,fner1
282 test_spr_immed 0,fner0
284 set_spr_immed 0,fner0
285 set_spr_immed 0,fner1
286 nfddivs fr52,fr16,fr2
287 ; test_fr_fr fr2,fr44
288 ; test_fr_fr fr3,fr44
289 test_spr_immed 0x0,fner1
290 test_spr_immed 0,fner0
292 nfddivs fr56,fr28,fr2
293 ; test_fr_fr fr2,fr44
294 ; test_fr_fr fr3,fr44
295 test_spr_immed 0,fner1
296 test_spr_immed 0,fner0
298 nfddivs fr60,fr28,fr2
299 ; test_fr_fr fr2,fr44
300 ; test_fr_fr fr3,fr44
301 test_spr_immed 0xc,fner1
302 test_spr_immed 0,fner0