RISC-V: Cleanup the imply code and test cases for vendor xsf extensions.
[binutils-gdb.git] / sim / testsuite / frv / stdcu.cgs
blobbbae5fff09674bde62e4a4735d65d31fe2f6b501
1 # frv testcase for stdcu $CPk,@($GRi,$GRj)
2 # mach: frv
3 # as(frv): -mcpu=frv
5         .include "testutils.inc"
7         start
9         .global stdcu
10 stdcu:
11         set_mem_limmed  0xbeef,0xdead,sp
12         inc_gr_immed    -4,sp
13         set_mem_limmed  0xdead,0xbeef,sp
14         set_gr_gr       sp,gr20
15         set_gr_immed    0,gr7
16         set_cpr_limmed  0xbeef,0xdead,cpr8
17         set_cpr_limmed  0xdead,0xbeef,cpr9
18         stdcu           cpr8,@(sp,gr7)
19         test_gr_gr      sp,gr20
20         test_mem_limmed 0xbeef,0xdead,sp
21         inc_gr_immed    4,sp
22         test_mem_limmed 0xdead,0xbeef,sp
24         inc_gr_immed    -12,sp
25         set_gr_immed    8,gr7
26         set_cpr_limmed  0x1234,0x5678,cpr8
27         set_cpr_limmed  0x9abc,0xdef0,cpr9
28         stdcu           cpr8,@(sp,gr7)
29         test_gr_gr      sp,gr20
30         test_mem_limmed 0x1234,0x5678,sp
31         inc_gr_immed    4,sp
32         test_mem_limmed 0x9abc,0xdef0,sp
34         inc_gr_immed    4,sp
35         set_gr_immed    -8,gr7
36         set_cpr_limmed  0xfedc,0xba98,cpr8
37         set_cpr_limmed  0x7654,0x3210,cpr9
38         stdcu           cpr8,@(sp,gr7)
39         test_gr_gr      sp,gr20
40         test_mem_limmed 0xfedc,0xba98,sp
41         inc_gr_immed    4,sp
42         test_mem_limmed 0x7654,0x3210,sp
44         pass